commit a29c5e1fec44e7483730dea1d769a08b7e7db619
Author: Nav <nav@navnav.me>
Date:   Sun Apr 4 21:04:12 2021 +0100

    Initial commit

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 00000000..746ee136
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,9 @@
+.idea/
+release
+_CPack_Packages
+build/cmake-build-debug
+build/cmake-build-release
+build/resources
+build/bin/bloom
+build/bin/bloom.json
+*.deb
\ No newline at end of file
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100755
index 00000000..7f26974b
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,222 @@
+cmake_minimum_required(VERSION 3.10)
+project(Bloom LANGUAGES CXX VERSION 0.1)
+
+set(CMAKE_VERBOSE_MAKEFILE off)
+
+# Create directory for generated sources
+file(MAKE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/src/Generated)
+
+set(CMAKE_CXX_STANDARD 20)
+set(ENABLE_SANITIZERS off)
+
+add_definitions(-D_GLIBCXX_USE_CXX11_ABI=0)
+
+# The HIDAPI library lives here
+link_directories(/usr/local/lib)
+
+set(CMAKE_AUTOMOC ON)
+set(CMAKE_INCLUDE_CURRENT_DIR ON)
+set(AUTOGEN_BUILD_DIR ../build/)
+set(CMAKE_RUNTIME_OUTPUT_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}/build/bin")
+
+find_package(Qt5Core)
+find_package(Qt5Gui)
+find_package(Qt5Widgets)
+find_package(Qt5Xml)
+find_package(Qt5Svg)
+find_package(Qt5UiTools)
+
+set(CMAKE_SKIP_BUILD_RPATH true)
+set(CMAKE_BUILD_RPATH_USE_ORIGIN true)
+set(CMAKE_INSTALL_RPATH "\$ORIGIN/../lib")
+set(CMAKE_BUILD_RPATH ${CMAKE_INSTALL_RPATH})
+
+add_executable(Bloom
+    src/main.cpp
+    src/Generated/resources.cpp
+    src/ApplicationConfig.cpp
+    src/Logger/Logger.cpp
+    src/SignalHandler/SignalHandler.cpp
+    src/DebugToolDrivers/USB/Interface.cpp
+    src/DebugToolDrivers/USB/HID/HidInterface.cpp
+    src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.cpp
+    src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.cpp
+    src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp
+    src/Targets/Target.cpp
+    src/Targets/Microchip/AVR/AVR8/Avr8.cpp
+    src/Targets/Microchip/AVR/AVR8/Mega/Mega.cpp
+    src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.cpp
+    src/Application.cpp
+    src/DebugToolDrivers/USB/UsbDevice.cpp
+    src/TargetController/TargetController.cpp
+    src/EventManager/EventListener.cpp
+    src/EventManager/EventManager.cpp
+    src/DebugServers/DebugServer.cpp
+    src/DebugServers/GdbRsp/GdbRspDebugServer.cpp
+    src/DebugServers/GdbRsp/CommandPackets/CommandPacket.cpp
+    src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.cpp
+    src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.cpp
+    src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.cpp
+    src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.cpp
+    src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.cpp
+    src/DebugServers/GdbRsp/CommandPackets/StepExecution.cpp
+    src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.cpp
+    src/DebugServers/GdbRsp/CommandPackets/ReadMemory.cpp
+    src/DebugServers/GdbRsp/CommandPackets/WriteMemory.cpp
+    src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.cpp
+    src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.cpp
+    src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.cpp
+    src/DebugServers/GdbRsp/Connection.cpp
+    src/Insight/Insight.cpp
+    src/Insight/InsightWorker.cpp
+    src/Insight/UserInterfaces/InsightWindow/InsightWindow.cpp
+    src/Insight/UserInterfaces/InsightWindow/AboutWindow.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPackageWidget.hpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPinWidget.hpp
+
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.cpp
+
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.cpp
+    src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.cpp
+    build/resources/TargetPartDescriptions/AVR/Mapping.json
+)
+
+set_target_properties(Bloom PROPERTIES OUTPUT_NAME bloom)
+target_include_directories(Bloom PUBLIC ./)
+
+# Construct JSON mapping of part description files.
+add_custom_command(
+    OUTPUT
+    ${CMAKE_CURRENT_SOURCE_DIR}/build/resources/TargetPartDescriptions/AVR/Mapping.json
+    DEPENDS
+    ${CMAKE_CURRENT_SOURCE_DIR}/build/scripts/CopyAvrPartFilesAndCreateMapping.php
+    COMMAND echo 'Processing AVR target description files.'
+    COMMAND
+    php ${CMAKE_CURRENT_SOURCE_DIR}/build/scripts/CopyAvrPartFilesAndCreateMapping.php
+)
+
+# Compile resources
+add_custom_command(
+    OUTPUT
+    ${CMAKE_CURRENT_SOURCE_DIR}/src/Generated/resources.cpp
+    ${CMAKE_CURRENT_SOURCE_DIR}/src/Generated/resources_fake.cpp
+    DEPENDS
+    ${CMAKE_CURRENT_SOURCE_DIR}/src/resources.qrc
+    COMMAND echo 'Compiling QT resources. |${CMAKE_BUILD_TYPE}|'
+    COMMAND
+    rcc -o ${CMAKE_CURRENT_SOURCE_DIR}/src/Generated/resources.cpp
+    ${CMAKE_CURRENT_SOURCE_DIR}/src/resources.qrc
+)
+
+target_link_libraries(Bloom -static-libgcc -static-libstdc++)
+target_link_libraries(Bloom -lstdc++fs)
+target_link_libraries(Bloom -lpthread)
+target_link_libraries(Bloom -lusb-1.0)
+target_link_libraries(Bloom -lhidapi-libusb)
+target_link_libraries(Bloom Qt5::Core)
+target_link_libraries(Bloom Qt5::Gui)
+target_link_libraries(Bloom Qt5::UiTools)
+target_link_libraries(Bloom Qt5::Widgets)
+target_link_libraries(Bloom Qt5::Xml)
+target_link_libraries(Bloom Qt5::Svg)
+
+target_compile_options(
+    Bloom
+    PUBLIC -std=c++2a
+    PUBLIC -pedantic
+    PUBLIC -Wconversion
+    PUBLIC -fno-sized-deallocation
+    PUBLIC $<$<CONFIG:DEBUG>:-g>
+    PUBLIC $<$<CONFIG:DEBUG>:-Os>
+    PUBLIC $<$<CONFIG:RELEASE>:-O2>
+    PUBLIC $<$<CONFIG:DEBUG>:-fno-inline>
+    PUBLIC $<$<CONFIG:DEBUG>:-fkeep-static-functions>
+)
+
+target_link_options(
+    Bloom
+    PUBLIC [=[-Wl,--disable-new-dtags]=] #,--verbose
+)
+
+if (${ENABLE_SANITIZERS})
+    message(WARNING "Sanitizers have been enabled")
+
+    # For TSAN, see ThreadSanitizerSuppression.txt
+
+    # Some sanitizers are not compatible with each other.
+    target_compile_options(
+        Bloom
+        PUBLIC "-fsanitize=address"
+        #PUBLIC "-fsanitize=undefined"
+#        PUBLIC "-fsanitize=thread"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=address>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=undefined>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=integer-divide-by-zero>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=unreachable>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=vla-bound>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=null>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=return>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=signed-integer-overflow>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=bounds>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=alignment>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=object-size>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=float-divide-by-zero>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=float-cast-overflow>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=nonnull-attribute>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=returns-nonnull-attribute>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=bool>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=enum>"
+#        PUBLIC "$<$<BOOL:${ENABLE_SANITIZERS}>:-fsanitize=vptr>"
+    )
+
+    target_link_libraries(
+        Bloom
+        "-fsanitize=address"
+#        "-fsanitize=undefined"
+#        "-fsanitize=thread"
+    )
+endif()
+
+# Installation configuration
+set(CMAKE_INSTALL_PREFIX "${CMAKE_CURRENT_SOURCE_DIR}/release/")
+install(TARGETS Bloom DESTINATION bin PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ)
+
+install(FILES build/bin/bloom.json DESTINATION bin PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ) # Remove this
+install(DIRECTORY build/bin/plugins DESTINATION "bin" DIRECTORY_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ FILE_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ)
+install(DIRECTORY build/bin/platforms DESTINATION "bin" DIRECTORY_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ FILE_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ)
+install(DIRECTORY build/resources DESTINATION "." DIRECTORY_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ FILE_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ)
+install(DIRECTORY build/lib DESTINATION "." DIRECTORY_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ FILE_PERMISSIONS OWNER_EXECUTE OWNER_WRITE OWNER_READ)
+
+# Debian package configuration
+set(CPACK_GENERATOR "DEB")
+set(CPACK_DEBIAN_PACKAGE_NAME "Bloom")
+set(CPACK_DEBIAN_PACKAGE_DESCRIPTION "")
+file(READ ${CMAKE_CURRENT_SOURCE_DIR}/resources/packaging/description.txt CPACK_DEBIAN_PACKAGE_DESCRIPTION)
+set(CPACK_PACKAGE_DESCRIPTION_SUMMARY "A Linux-based debug interface for embedded systems development")
+set(CPACK_DEBIAN_PACKAGE_MAINTAINER "Bloom Support <support@bloom.oscillate.io>")
+set(CPACK_DEBIAN_PACKAGE_HOMEPAGE "https://bloom.oscillate.io")
+set(CPACK_PACKAGE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
+set(CPACK_DEBIAN_PACKAGE_SHLIBDEPS ON)
+set(CPACK_PACKAGING_INSTALL_PREFIX "/opt/bloom")
+set(
+    CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA
+    ${CMAKE_CURRENT_SOURCE_DIR}/resources/packaging/postinst;
+    ${CMAKE_CURRENT_SOURCE_DIR}/resources/packaging/postrm
+)
+
+include(CPack)
diff --git a/COPYING.LESSER b/COPYING.LESSER
new file mode 100644
index 00000000..418dc9a9
--- /dev/null
+++ b/COPYING.LESSER
@@ -0,0 +1,165 @@
+GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+  This version of the GNU Lesser General Public License incorporates
+the terms and conditions of version 3 of the GNU General Public
+License, supplemented by the additional permissions listed below.
+
+  0. Additional Definitions.
+
+  As used herein, "this License" refers to version 3 of the GNU Lesser
+General Public License, and the "GNU GPL" refers to version 3 of the GNU
+General Public License.
+
+  "The Library" refers to a covered work governed by this License,
+other than an Application or a Combined Work as defined below.
+
+  An "Application" is any work that makes use of an interface provided
+by the Library, but which is not otherwise based on the Library.
+Defining a subclass of a class defined by the Library is deemed a mode
+of using an interface provided by the Library.
+
+  A "Combined Work" is a work produced by combining or linking an
+Application with the Library.  The particular version of the Library
+with which the Combined Work was made is also called the "Linked
+Version".
+
+  The "Minimal Corresponding Source" for a Combined Work means the
+Corresponding Source for the Combined Work, excluding any source code
+for portions of the Combined Work that, considered in isolation, are
+based on the Application, and not on the Linked Version.
+
+  The "Corresponding Application Code" for a Combined Work means the
+object code and/or source code for the Application, including any data
+and utility programs needed for reproducing the Combined Work from the
+Application, but excluding the System Libraries of the Combined Work.
+
+  1. Exception to Section 3 of the GNU GPL.
+
+  You may convey a covered work under sections 3 and 4 of this License
+without being bound by section 3 of the GNU GPL.
+
+  2. Conveying Modified Versions.
+
+  If you modify a copy of the Library, and, in your modifications, a
+facility refers to a function or data to be supplied by an Application
+that uses the facility (other than as an argument passed when the
+facility is invoked), then you may convey a copy of the modified
+version:
+
+   a) under this License, provided that you make a good faith effort to
+   ensure that, in the event an Application does not supply the
+   function or data, the facility still operates, and performs
+   whatever part of its purpose remains meaningful, or
+
+   b) under the GNU GPL, with none of the additional permissions of
+   this License applicable to that copy.
+
+  3. Object Code Incorporating Material from Library Header Files.
+
+  The object code form of an Application may incorporate material from
+a header file that is part of the Library.  You may convey such object
+code under terms of your choice, provided that, if the incorporated
+material is not limited to numerical parameters, data structure
+layouts and accessors, or small macros, inline functions and templates
+(ten or fewer lines in length), you do both of the following:
+
+   a) Give prominent notice with each copy of the object code that the
+   Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the object code with a copy of the GNU GPL and this license
+   document.
+
+  4. Combined Works.
+
+  You may convey a Combined Work under terms of your choice that,
+taken together, effectively do not restrict modification of the
+portions of the Library contained in the Combined Work and reverse
+engineering for debugging such modifications, if you also do each of
+the following:
+
+   a) Give prominent notice with each copy of the Combined Work that
+   the Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the Combined Work with a copy of the GNU GPL and this license
+   document.
+
+   c) For a Combined Work that displays copyright notices during
+   execution, include the copyright notice for the Library among
+   these notices, as well as a reference directing the user to the
+   copies of the GNU GPL and this license document.
+
+   d) Do one of the following:
+
+       0) Convey the Minimal Corresponding Source under the terms of this
+       License, and the Corresponding Application Code in a form
+       suitable for, and under terms that permit, the user to
+       recombine or relink the Application with a modified version of
+       the Linked Version to produce a modified Combined Work, in the
+       manner specified by section 6 of the GNU GPL for conveying
+       Corresponding Source.
+
+       1) Use a suitable shared library mechanism for linking with the
+       Library.  A suitable mechanism is one that (a) uses at run time
+       a copy of the Library already present on the user's computer
+       system, and (b) will operate properly with a modified version
+       of the Library that is interface-compatible with the Linked
+       Version.
+
+   e) Provide Installation Information, but only if you would otherwise
+   be required to provide such information under section 6 of the
+   GNU GPL, and only to the extent that such information is
+   necessary to install and execute a modified version of the
+   Combined Work produced by recombining or relinking the
+   Application with a modified version of the Linked Version. (If
+   you use option 4d0, the Installation Information must accompany
+   the Minimal Corresponding Source and Corresponding Application
+   Code. If you use option 4d1, you must provide the Installation
+   Information in the manner specified by section 6 of the GNU GPL
+   for conveying Corresponding Source.)
+
+  5. Combined Libraries.
+
+  You may place library facilities that are a work based on the
+Library side by side in a single library together with other library
+facilities that are not Applications and are not covered by this
+License, and convey such a combined library under terms of your
+choice, if you do both of the following:
+
+   a) Accompany the combined library with a copy of the same work based
+   on the Library, uncombined with any other library facilities,
+   conveyed under the terms of this License.
+
+   b) Give prominent notice with the combined library that part of it
+   is a work based on the Library, and explaining where to find the
+   accompanying uncombined form of the same work.
+
+  6. Revised Versions of the GNU Lesser General Public License.
+
+  The Free Software Foundation may publish revised and/or new versions
+of the GNU Lesser General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+  Each version is given a distinguishing version number. If the
+Library as you received it specifies that a certain numbered version
+of the GNU Lesser General Public License "or any later version"
+applies to it, you have the option of following the terms and
+conditions either of that published version or of any later version
+published by the Free Software Foundation. If the Library as you
+received it does not specify a version number of the GNU Lesser
+General Public License, you may choose any version of the GNU Lesser
+General Public License ever published by the Free Software Foundation.
+
+  If the Library as you received it specifies that a proxy can decide
+whether future versions of the GNU Lesser General Public License shall
+apply, that proxy's public statement of acceptance of any version is
+permanent authorization for you to choose that version for the
+Library.
\ No newline at end of file
diff --git a/LICENSE.txt b/LICENSE.txt
new file mode 100644
index 00000000..2eccb44a
--- /dev/null
+++ b/LICENSE.txt
@@ -0,0 +1,12 @@
+Bloom is free software: you can redistribute it and/or modify
+it under the terms of the GNU Lesser General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+Bloom is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public License
+along with this program (COPYING.LESSER).  If not, see <https://www.gnu.org/licenses/>.
\ No newline at end of file
diff --git a/README.md b/README.md
new file mode 100644
index 00000000..6acad976
--- /dev/null
+++ b/README.md
@@ -0,0 +1,51 @@
+<img alt="" src="/src/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg"/>
+
+## Bloom
+Bloom is a Linux-based debug platform for microcontrollers. This is the official repository for Bloom's source code.
+For information on how to use Bloom, please visit https://bloom.oscillate.io.
+
+Bloom implements a number of user-space device drivers, enabling support for many debug tools (such as the Atmel-ICE, 
+Power Debugger, MPLAB SNAP* and the MPLAB PICkit 4*). Bloom exposes an interface to the connected target, via a GDB 
+RSP server. This allows any IDE with GDB RSP client capabilities to interface with Bloom and gain full
+access to the target.
+
+Currently, Bloom only supports AVR8 targets from Microchip. Bloom was designed to accommodate targets from different 
+families and architectures. Support for other target families will be considered as and when requested.
+
+*These debug tools are not yet officially supported by Bloom, but will be soon.
+
+### License
+Bloom is released under the LGPLv3 license. See LICENSE.txt
+
+### Bloom Architecture
+Bloom is a multithreaded event-driven program written in C++. It consists of four components:
+
+- TargetController
+- DebugServer
+- Insight
+- SignalHandler
+
+##### TargetController
+The TargetController possesses full control of the connected debug tool and target. Execution of user-space 
+device drivers takes place here. All interaction with the connected hardware goes through the TargetController.
+It exposes an interface to the connected hardware via events. The TargetController runs on a dedicated thread.
+
+##### DebugServer
+The DebugServer exposes an interface to the connected target, for third-party programs such as IDEs. Currently, Bloom
+only supports one DebugServer - the GDB RSP server. With this server, any IDE with GDB RSP support can interface with
+Bloom and thus the connected target. The DebugServer runs on a dedicated thread.
+
+##### Insight
+Insight is a graphical user interface that provides insight of the target's GPIO pin states. It also enables GPIO
+pin manipulation. Insight occupies Bloom's main thread and employs a single worker thread for background tasks. 
+Unlike other components within Bloom, Insight relies heavily on the Qt framework for its GUI capabilities and 
+other useful utilities.
+
+##### SignalHandler
+The SignalHandler is responsible for handling any UNIX signals issued to Bloom. It runs on a dedicated thread. All
+other threads within Bloom do not accept any UNIX signals.
+
+#### Inter-component communication
+The components described above interact with each other using an event-based mechanism.
+
+More documentation to follow.
diff --git a/ThreadSanitizerSuppression.txt b/ThreadSanitizerSuppression.txt
new file mode 100644
index 00000000..0455f753
--- /dev/null
+++ b/ThreadSanitizerSuppression.txt
@@ -0,0 +1,5 @@
+# Suppression file can be specified via:
+# TSAN_OPTIONS="suppressions=../../../ThreadSanitizerSuppression.txt" bloom
+
+race:libusb-1.0
+race:libglib
\ No newline at end of file
diff --git a/build/bin/platforms/libqxcb.so b/build/bin/platforms/libqxcb.so
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diff --git a/build/bin/plugins/imageformats/libqtga.so b/build/bin/plugins/imageformats/libqtga.so
new file mode 100755
index 00000000..13da77cb
Binary files /dev/null and b/build/bin/plugins/imageformats/libqtga.so differ
diff --git a/build/bin/plugins/imageformats/libqtiff.so b/build/bin/plugins/imageformats/libqtiff.so
new file mode 100755
index 00000000..bae478ba
Binary files /dev/null and b/build/bin/plugins/imageformats/libqtiff.so differ
diff --git a/build/bin/plugins/imageformats/libqwbmp.so b/build/bin/plugins/imageformats/libqwbmp.so
new file mode 100755
index 00000000..805a3608
Binary files /dev/null and b/build/bin/plugins/imageformats/libqwbmp.so differ
diff --git a/build/bin/plugins/imageformats/libqwebp.so b/build/bin/plugins/imageformats/libqwebp.so
new file mode 100755
index 00000000..0693c62f
Binary files /dev/null and b/build/bin/plugins/imageformats/libqwebp.so differ
diff --git a/build/bin/plugins/xcbglintegrations/libqxcb-egl-integration.so b/build/bin/plugins/xcbglintegrations/libqxcb-egl-integration.so
new file mode 100755
index 00000000..a284f0a0
Binary files /dev/null and b/build/bin/plugins/xcbglintegrations/libqxcb-egl-integration.so differ
diff --git a/build/bin/plugins/xcbglintegrations/libqxcb-glx-integration.so b/build/bin/plugins/xcbglintegrations/libqxcb-glx-integration.so
new file mode 100755
index 00000000..be69d5fa
Binary files /dev/null and b/build/bin/plugins/xcbglintegrations/libqxcb-glx-integration.so differ
diff --git a/build/lib/libQt5Core.so.5 b/build/lib/libQt5Core.so.5
new file mode 120000
index 00000000..9b3e7af5
--- /dev/null
+++ b/build/lib/libQt5Core.so.5
@@ -0,0 +1 @@
+./libQt5Core.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5Core.so.5.12.10 b/build/lib/libQt5Core.so.5.12.10
new file mode 100644
index 00000000..a61518bc
Binary files /dev/null and b/build/lib/libQt5Core.so.5.12.10 differ
diff --git a/build/lib/libQt5DBus.so.5 b/build/lib/libQt5DBus.so.5
new file mode 120000
index 00000000..292aa1bb
--- /dev/null
+++ b/build/lib/libQt5DBus.so.5
@@ -0,0 +1 @@
+./libQt5DBus.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5DBus.so.5.12.10 b/build/lib/libQt5DBus.so.5.12.10
new file mode 100755
index 00000000..51d47f83
Binary files /dev/null and b/build/lib/libQt5DBus.so.5.12.10 differ
diff --git a/build/lib/libQt5Gui.so.5 b/build/lib/libQt5Gui.so.5
new file mode 120000
index 00000000..83ed1a02
--- /dev/null
+++ b/build/lib/libQt5Gui.so.5
@@ -0,0 +1 @@
+./libQt5Gui.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5Gui.so.5.12.10 b/build/lib/libQt5Gui.so.5.12.10
new file mode 100644
index 00000000..a513fb1f
Binary files /dev/null and b/build/lib/libQt5Gui.so.5.12.10 differ
diff --git a/build/lib/libQt5Svg.so.5 b/build/lib/libQt5Svg.so.5
new file mode 120000
index 00000000..d36545c4
--- /dev/null
+++ b/build/lib/libQt5Svg.so.5
@@ -0,0 +1 @@
+./libQt5Svg.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5Svg.so.5.12.10 b/build/lib/libQt5Svg.so.5.12.10
new file mode 100755
index 00000000..4212b16c
Binary files /dev/null and b/build/lib/libQt5Svg.so.5.12.10 differ
diff --git a/build/lib/libQt5Widgets.so.5 b/build/lib/libQt5Widgets.so.5
new file mode 120000
index 00000000..c11f5d90
--- /dev/null
+++ b/build/lib/libQt5Widgets.so.5
@@ -0,0 +1 @@
+./libQt5Widgets.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5Widgets.so.5.12.10 b/build/lib/libQt5Widgets.so.5.12.10
new file mode 100644
index 00000000..eb3cab38
Binary files /dev/null and b/build/lib/libQt5Widgets.so.5.12.10 differ
diff --git a/build/lib/libQt5XcbQpa.so.5 b/build/lib/libQt5XcbQpa.so.5
new file mode 120000
index 00000000..1abcbf07
--- /dev/null
+++ b/build/lib/libQt5XcbQpa.so.5
@@ -0,0 +1 @@
+./libQt5XcbQpa.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5XcbQpa.so.5.12.10 b/build/lib/libQt5XcbQpa.so.5.12.10
new file mode 100644
index 00000000..c1b0342b
Binary files /dev/null and b/build/lib/libQt5XcbQpa.so.5.12.10 differ
diff --git a/build/lib/libQt5Xml.so.5 b/build/lib/libQt5Xml.so.5
new file mode 120000
index 00000000..3adfe610
--- /dev/null
+++ b/build/lib/libQt5Xml.so.5
@@ -0,0 +1 @@
+./libQt5Xml.so.5.12.10
\ No newline at end of file
diff --git a/build/lib/libQt5Xml.so.5.12.10 b/build/lib/libQt5Xml.so.5.12.10
new file mode 100644
index 00000000..e9e69a78
Binary files /dev/null and b/build/lib/libQt5Xml.so.5.12.10 differ
diff --git a/build/lib/libhidapi-libusb.so.0 b/build/lib/libhidapi-libusb.so.0
new file mode 100644
index 00000000..1e5136a0
Binary files /dev/null and b/build/lib/libhidapi-libusb.so.0 differ
diff --git a/build/lib/libicudata.so.56 b/build/lib/libicudata.so.56
new file mode 120000
index 00000000..e5e55e70
--- /dev/null
+++ b/build/lib/libicudata.so.56
@@ -0,0 +1 @@
+./libicudata.so.56.1
\ No newline at end of file
diff --git a/build/lib/libicudata.so.56.1 b/build/lib/libicudata.so.56.1
new file mode 100644
index 00000000..bcbaea35
Binary files /dev/null and b/build/lib/libicudata.so.56.1 differ
diff --git a/build/lib/libicui18n.so.56 b/build/lib/libicui18n.so.56
new file mode 120000
index 00000000..d07af7f8
--- /dev/null
+++ b/build/lib/libicui18n.so.56
@@ -0,0 +1 @@
+./libicui18n.so.56.1
\ No newline at end of file
diff --git a/build/lib/libicui18n.so.56.1 b/build/lib/libicui18n.so.56.1
new file mode 100644
index 00000000..3dfd5c34
Binary files /dev/null and b/build/lib/libicui18n.so.56.1 differ
diff --git a/build/lib/libicuuc.so.56 b/build/lib/libicuuc.so.56
new file mode 120000
index 00000000..c5702a5f
--- /dev/null
+++ b/build/lib/libicuuc.so.56
@@ -0,0 +1 @@
+./libicuuc.so.56.1
\ No newline at end of file
diff --git a/build/lib/libicuuc.so.56.1 b/build/lib/libicuuc.so.56.1
new file mode 100644
index 00000000..4d55a95d
Binary files /dev/null and b/build/lib/libicuuc.so.56.1 differ
diff --git a/build/lib/libqxcb.so b/build/lib/libqxcb.so
new file mode 100755
index 00000000..c9ffac58
Binary files /dev/null and b/build/lib/libqxcb.so differ
diff --git a/build/lib/libqxcb.so.1 b/build/lib/libqxcb.so.1
new file mode 120000
index 00000000..ab7b6188
--- /dev/null
+++ b/build/lib/libqxcb.so.1
@@ -0,0 +1 @@
+./libqxcb.so
\ No newline at end of file
diff --git a/build/lib/libusb-1.0.so.0 b/build/lib/libusb-1.0.so.0
new file mode 100644
index 00000000..0fc69d9c
Binary files /dev/null and b/build/lib/libusb-1.0.so.0 differ
diff --git a/build/scripts/CleanBuild.sh b/build/scripts/CleanBuild.sh
new file mode 100644
index 00000000..28aba3d5
--- /dev/null
+++ b/build/scripts/CleanBuild.sh
@@ -0,0 +1,17 @@
+#!/bin/bash
+
+cd /home/nav/Projects/Bloom || exit;
+
+rm -fr build/cmake-build-debug/*; rm -fr build/cmake-build-release/*;
+
+rm -fr release;
+rm -fr Bloom-*.deb;
+rm -fr "_CPack_Packages";
+
+export CMAKE_PREFIX_PATH=/opt/Qt/5.12.10/gcc_64/
+
+cd build/cmake-build-debug/ && cmake -DCMAKE_BUILD_TYPE=Debug -DCMAKE_CXX_COMPILER=/usr/bin/g++-9 /home/nav/Projects/Bloom/
+cd /home/nav/Projects/Bloom/ && cmake --build /home/nav/Projects/Bloom/build/cmake-build-debug --target clean
+
+cmake --build /home/nav/Projects/Bloom/build/cmake-build-debug --target Bloom
+cmake --install /home/nav/Projects/Bloom/build/cmake-build-debug --target Bloom
\ No newline at end of file
diff --git a/build/scripts/CopyAvrPartFilesAndCreateMapping.php b/build/scripts/CopyAvrPartFilesAndCreateMapping.php
new file mode 100644
index 00000000..13da3406
--- /dev/null
+++ b/build/scripts/CopyAvrPartFilesAndCreateMapping.php
@@ -0,0 +1,178 @@
+<?php
+/*
+ * Parses Microchip AVR Part Description (.atdf/.xml) files and creates a JSON mapping of target IDs to file paths.
+ * Also copies the files over to the Distribution directory.
+ *
+ * The JSON mapping is compiled as a Qt resource and used for looking-up target description file paths, by target ID.
+ *
+ * This script should be run as part of the build process.
+ */
+
+CONST AVR_PD_FILE_PATH = __DIR__ . "/../../src/Targets/Microchip/AVR/PartDescriptionFiles";
+CONST TARGET_PD_DEST_FILE_PATH = __DIR__ . "/../resources/TargetPartDescriptions/AVR";
+CONST TARGET_PD_DEST_RELATIVE_FILE_PATH = "../resources/TargetPartDescriptions/AVR";
+CONST TARGET_PD_MAPPING_FILE_PATH = TARGET_PD_DEST_FILE_PATH . "/Mapping.json";
+
+CONST PD_COMMENT = "\n<!-- This is an automatically generated file. Any changes made to it will likely be lost. -->\n";
+
+// Empty destination directory
+if (file_exists(TARGET_PD_DEST_FILE_PATH)) {
+    // There is no PHP function to delete a non-empty directory and I can't be arsed to write one. Bite me
+    exec("rm -r " . TARGET_PD_DEST_FILE_PATH);
+}
+
+if (file_exists(TARGET_PD_MAPPING_FILE_PATH)) {
+    unlink(TARGET_PD_MAPPING_FILE_PATH);
+}
+
+mkdir(TARGET_PD_DEST_FILE_PATH, 0777, true);
+
+class TargetDescription implements JsonSerializable
+{
+    public ?string $targetId;
+    public ?string $targetName;
+    public ?string $originalFilePath;
+    public ?string $destinationFilePath;
+    public ?string $relativeDestinationFilePath;
+
+    public function jsonSerialize() {
+        return [
+            'targetName' => $this->targetName,
+            'targetDescriptionFilePath' => $this->relativeDestinationFilePath,
+        ];
+    }
+}
+
+$processedFileCount = 0;
+$failedFileCount = 0;
+
+/**
+ * Will read all .atdf and .xml files in $path and attempt to parse them as AVR target description files.
+ * This function is recursive - it will call itself if it stumbles upon a directory within $path.
+ *
+ * @param $path
+ * @return TargetDescription[][]
+ *  A mapping of target IDs to an array of TargetDescription objects. Note: target IDs are not
+ *  always unique to targets. That is why each ID is mapped to an array of TargetDescription objects.
+ */
+function processAvrPartFiles($path) : array {
+    global $processedFileCount, $failedFileCount;
+
+    /** @var TargetDescription[][] $output */
+    $output = [];
+
+    foreach (glob($path . "/*") as $file) {
+        if (is_dir($file)) {
+            $output = array_merge($output, processAvrPartFiles($file));
+            continue;
+        }
+
+        if (strstr($file, '.atdf') === false && strstr($file, '.xml') === false) {
+            // Unknown file type
+            continue;
+        }
+
+        $fileContents = file_get_contents($file);
+        $pdXml = simplexml_load_string($fileContents);
+
+        if ($pdXml === false) {
+            print "Invalid XML in \"" . $file . "\"\n";
+            $failedFileCount++;
+            continue;
+        }
+
+        $device = $pdXml->devices[0]->device;
+
+        $partDescriptionXml = new TargetDescription();
+        $partDescriptionXml->originalFilePath = $file;
+        $partDescriptionXml->destinationFilePath = TARGET_PD_DEST_FILE_PATH . "/";
+        $partDescriptionXml->relativeDestinationFilePath = TARGET_PD_DEST_RELATIVE_FILE_PATH . "/";
+
+        if (!empty($device['architecture'])
+            && in_array($device['architecture'], ['AVR8', 'AVR32', 'AVR8X', 'AVR8L', 'AVR8_XMEGA'])
+        ) {
+            // This is an AVR device.
+            if (!empty($device['architecture'])) {
+                // Group by architecture
+                $partDescriptionXml->destinationFilePath .= strtoupper((string) $device['architecture']) . "/";
+                $partDescriptionXml->relativeDestinationFilePath .= strtoupper((string) $device['architecture']) . "/";
+            }
+
+            if (!empty($device['family'])) {
+                // Group by family
+                $partDescriptionXml->destinationFilePath .= str_replace([' '] , '_', strtoupper((string) $device['family']));
+                $partDescriptionXml->relativeDestinationFilePath .= str_replace([' '] , '_', strtoupper((string) $device['family']));
+            }
+
+            $partDescriptionXml->targetName = str_replace([' '], '', (string) $device['name']);
+
+            if (!empty(($signatures = $device->{'property-groups'}
+                    ->xpath('property-group[@name="SIGNATURES"]')[0]))
+                && !empty($signatures->xpath('property[@name="SIGNATURE0"]'))
+                && !empty($signatures->xpath('property[@name="SIGNATURE1"]'))
+                && !empty($signatures->xpath('property[@name="SIGNATURE2"]'))
+            ) {
+                $partDescriptionXml->targetId = (string) $signatures->xpath('property[@name="SIGNATURE0"]')[0]['value']
+                    . str_replace('0x', '', (string) $signatures->xpath('property[@name="SIGNATURE1"]')[0]['value'])
+                    . str_replace('0x', '', (string) $signatures->xpath('property[@name="SIGNATURE2"]')[0]['value'])
+                ;
+                $partDescriptionXml->targetId = strtolower($partDescriptionXml->targetId);
+            }
+        }
+
+        if (empty($partDescriptionXml->destinationFilePath)
+            || empty($partDescriptionXml->targetName)
+            || empty($partDescriptionXml->targetId)
+        ) {
+            print "Failed to parse file {$file}\n";
+            $failedFileCount++;
+            continue;
+        }
+
+        if (!file_exists($partDescriptionXml->destinationFilePath)) {
+            mkdir($partDescriptionXml->destinationFilePath, 0777, true);
+        }
+
+        $partDescriptionXml->destinationFilePath .= "/" . strtoupper($partDescriptionXml->targetName) . ".xml";
+        $partDescriptionXml->relativeDestinationFilePath .= "/" . strtoupper($partDescriptionXml->targetName) . ".xml";
+
+        if (strstr($fileContents, '<avr-tools-device-file ') !== false) {
+            // Prefix auto gen comment
+            // This approach could be better
+            $fileContents = str_replace(
+                '<avr-tools-device-file ',
+                PD_COMMENT . "<avr-tools-device-file ",
+                $fileContents
+            );
+        }
+
+        if (file_put_contents($partDescriptionXml->destinationFilePath, $fileContents) === false) {
+            print "FATAL ERROR: Failed to write data to " . $partDescriptionXml->destinationFilePath . "\n";
+            print "Aborting\n";
+            exit(1);
+        }
+
+        $output[$partDescriptionXml->targetId][] = $partDescriptionXml;
+        echo "Target Part Description File Processed: \"" . substr($partDescriptionXml->originalFilePath, strlen(AVR_PD_FILE_PATH)) . "\"\n"
+            . "Target Name: \"" . $partDescriptionXml->targetName . "\" Target ID: \"" . $partDescriptionXml->targetId
+            . "\" Destination: \"" . substr($partDescriptionXml->destinationFilePath, strlen(TARGET_PD_DEST_FILE_PATH))
+            . "\"\n\n"
+        ;
+        $processedFileCount++;
+    }
+
+    return $output;
+}
+
+print "Processing files in " . AVR_PD_FILE_PATH . "\n\n";
+$targetDescriptions = processAvrPartFiles(AVR_PD_FILE_PATH);
+
+if (file_put_contents(TARGET_PD_MAPPING_FILE_PATH, json_encode($targetDescriptions, JSON_PRETTY_PRINT)) === false) {
+    print "FATAL ERROR: Failed to create JSON mapping of target IDs to target description file paths\n";
+    exit(1);
+}
+
+print "\nCreated JSON mapping of target IDs to target description file paths: " . TARGET_PD_MAPPING_FILE_PATH . "\n";
+
+print "\nProcessed " . $processedFileCount . " files. Failures: " . $failedFileCount . "\n";
+print "Done\n";
diff --git a/resources/bloom.template.json b/resources/bloom.template.json
new file mode 100644
index 00000000..3cba6321
--- /dev/null
+++ b/resources/bloom.template.json
@@ -0,0 +1,20 @@
+{
+  "environments": {
+    "default": {
+      "debugToolName": "atmel-ice",
+
+      "target": {
+        "name": "avr8",
+        "physicalInterface": "debugWire"
+      },
+
+      "debugServer": {
+        "name": "avr-gdb-rsp"
+      }
+    }
+  },
+
+  "insight": {
+    "enabled": true
+  }
+}
\ No newline at end of file
diff --git a/resources/help.txt b/resources/help.txt
new file mode 100644
index 00000000..596328bc
--- /dev/null
+++ b/resources/help.txt
@@ -0,0 +1,14 @@
+A Linux-based debug interface for embedded systems development.
+
+Usage:
+  bloom [ENVIRONMENT_NAME/COMMAND]
+
+If no environment name or command is provided, Bloom will fallback to the environment named "default".
+If no such environment exists, Bloom will exit.
+
+Commands:
+  --help, -h      Displays this help text.
+  --version, -v   Displays the current version number.
+  init            Creates a new Bloom project configuration file (bloom.json) in the working directory.
+
+For more information on getting started with Bloom, please visit https://bloom.oscillate.io/getting-started.
diff --git a/resources/packaging/description.txt b/resources/packaging/description.txt
new file mode 100644
index 00000000..56a8fe25
--- /dev/null
+++ b/resources/packaging/description.txt
@@ -0,0 +1 @@
+Bloom is a Linux-based debug interface for embedded systems development. Bloom supports most Microchip AVR8 targets, along with numerous EDBG-based debug tools.
\ No newline at end of file
diff --git a/resources/packaging/postinst b/resources/packaging/postinst
new file mode 100755
index 00000000..7d031c65
--- /dev/null
+++ b/resources/packaging/postinst
@@ -0,0 +1,15 @@
+#!/bin/bash
+
+BLOOM_UDEV_FILE_PATH=/etc/udev/rules.d/
+
+if [ ! -f "${BLOOM_UDEV_FILE_PATH}/99-bloom.rules" ]; then
+  sudo ln -s /opt/bloom/resources/UDevRules/99-bloom.rules "$BLOOM_UDEV_FILE_PATH";
+fi
+
+
+if [ -f "/usr/bin/bloom" ]; then
+  sudo rm /usr/bin/bloom;
+fi
+
+sudo chmod u=rwx,g=rwx,o=rx -R /opt/bloom
+ln -s /opt/bloom/bin/bloom /usr/bin/bloom;
diff --git a/resources/packaging/postrm b/resources/packaging/postrm
new file mode 100755
index 00000000..20b802e2
--- /dev/null
+++ b/resources/packaging/postrm
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+BLOOM_UDEV_FILE_PATH=/etc/udev/rules.d/
+
+if [ -f "${BLOOM_UDEV_FILE_PATH}/99-bloom.rules" ]; then
+  sudo rm "$BLOOM_UDEV_FILE_PATH/99-bloom.rules";
+fi
+
+if [ -f "/usr/bin/bloom" ]; then
+  sudo rm /usr/bin/bloom;
+fi
diff --git a/src/Application.cpp b/src/Application.cpp
new file mode 100644
index 00000000..10823b33
--- /dev/null
+++ b/src/Application.cpp
@@ -0,0 +1,344 @@
+#include <iostream>
+#include <csignal>
+#include <QtCore>
+#include <thread>
+#include <QJsonDocument>
+#include <QCoreApplication>
+#include <unistd.h>
+#include <filesystem>
+
+#include "Application.hpp"
+#include "src/Logger/Logger.hpp"
+#include "SignalHandler/SignalHandler.hpp"
+#include "Exceptions/InvalidConfig.hpp"
+
+using namespace Bloom;
+using namespace Bloom::Events;
+using namespace Bloom::Exceptions;
+
+int Application::run(const std::vector<std::string>& arguments) {
+    try {
+        this->setName("Bloom");
+
+        if (!arguments.empty()) {
+            auto firstArg = arguments.front();
+            auto commandsToCallbackMapping = this->getCommandToCallbackMapping();
+
+            if (commandsToCallbackMapping.contains(firstArg)) {
+                // User has passed an argument that maps to a command callback - invoke the callback and shutdown
+                auto returnValue = commandsToCallbackMapping.at(firstArg)();
+
+                this->shutdown();
+                return returnValue;
+
+            } else {
+                // If the first argument didn't map to a command, we assume it's an environment name
+                this->selectedEnvironmentName = firstArg;
+            }
+        }
+
+        this->startup();
+
+        if (this->insightConfig.insightEnabled) {
+            this->insight.setApplicationConfig(this->applicationConfig);
+            this->insight.setEnvironmentConfig(this->environmentConfig);
+            this->insight.run();
+            Logger::debug("Insight closed");
+            this->shutdown();
+            return EXIT_SUCCESS;
+        }
+
+        // Main event loop
+        while (Thread::getState() == ThreadState::READY) {
+            this->applicationEventListener->waitAndDispatch();
+        }
+
+    } catch (const InvalidConfig& exception) {
+        Logger::error(exception.getMessage());
+
+    } catch (const Exception& exception) {
+        Logger::error(exception.getMessage());
+    }
+
+    this->shutdown();
+    return EXIT_SUCCESS;
+}
+
+void Application::startup() {
+    auto applicationEventListener = this->applicationEventListener;
+    this->eventManager.registerListener(applicationEventListener);
+    applicationEventListener->registerCallbackForEventType<Events::ShutdownApplication>(
+        std::bind(&Application::handleShutdownApplicationEvent, this, std::placeholders::_1)
+    );
+
+    this->applicationConfig = this->extractConfig();
+    Logger::configure(this->applicationConfig);
+
+    // Start signal handler
+    this->blockAllSignalsOnCurrentThread();
+    this->signalHandlerThread = std::thread(&SignalHandler::run, std::ref(this->signalHandler));
+
+    auto environmentName = this->selectedEnvironmentName.value_or("default");
+    Logger::info("Selected environment: " + environmentName);
+    Logger::debug("Number of environments extracted from config: "
+        + std::to_string(this->applicationConfig.environments.size()));
+
+    // Validate the selected environment
+    if (!applicationConfig.environments.contains(environmentName)) {
+        throw InvalidConfig("Environment (\"" + environmentName + "\") not found in configuration.");
+    }
+
+    this->environmentConfig = applicationConfig.environments.at(environmentName);
+    this->insightConfig = this->environmentConfig.insightConfig.value_or(this->applicationConfig.insightConfig);
+
+    if (this->environmentConfig.debugServerConfig.has_value()) {
+        this->debugServerConfig = this->environmentConfig.debugServerConfig.value();
+
+    } else if (this->applicationConfig.debugServerConfig.has_value()) {
+        this->debugServerConfig = this->applicationConfig.debugServerConfig.value();
+
+    } else {
+        throw InvalidConfig("Debug server configuration missing.");
+    }
+
+    applicationEventListener->registerCallbackForEventType<Events::TargetControllerStateChanged>(
+        std::bind(&Application::handleTargetControllerStateChangedEvent, this, std::placeholders::_1)
+    );
+
+    applicationEventListener->registerCallbackForEventType<Events::DebugServerStateChanged>(
+        std::bind(&Application::onDebugServerStateChanged, this, std::placeholders::_1)
+    );
+
+    this->startTargetController();
+    this->startDebugServer();
+
+    Thread::setState(ThreadState::READY);
+}
+
+ApplicationConfig Application::extractConfig() {
+    auto appConfig = ApplicationConfig();
+    auto currentPath = std::filesystem::current_path().string();
+    auto jsonConfigFile = QFile(QString::fromStdString(currentPath + "/bloom.json"));
+
+    if (!jsonConfigFile.exists()) {
+        throw InvalidConfig("Bloom configuration file (bloom.json) not found. Working directory: "
+            + currentPath);
+    }
+
+    if (!jsonConfigFile.open(QIODevice::ReadOnly)) {
+        throw InvalidConfig("Failed to load Bloom configuration file (bloom.json) Working directory: "
+            + currentPath);
+    }
+
+    auto jsonObject = QJsonDocument::fromJson(jsonConfigFile.readAll()).object();
+    appConfig.init(jsonObject);
+
+    jsonConfigFile.close();
+    return appConfig;
+}
+
+int Application::presentHelpText() {
+    /*
+     * Silence all logging here, as we're just to display the help text and then exit the application. Any
+     * further logging will just be noise.
+     */
+    Logger::silence();
+
+    // The file help.txt is included in the binary image as a resource. See src/resource.qrc
+    auto helpFile = QFile(":/compiled/resources/help.txt");
+
+    if (!helpFile.open(QIODevice::ReadOnly)) {
+        // This should never happen - if it does, something has gone very wrong
+        throw Exception("Failed to open help file - please report this issue at https://bloom.oscillate.io/report-issue");
+    }
+
+    std::cout << "Bloom v" << Application::VERSION_STR << std::endl;
+    std::cout << QTextStream(&helpFile).readAll().toUtf8().constData() << std::endl;
+    return EXIT_SUCCESS;
+}
+
+int Application::presentVersionText() {
+    Logger::silence();
+
+    std::cout << "Bloom v" << Application::VERSION_STR << "\n";
+    std::cout << "https://bloom.oscillate.io/" << "\n";
+    std::cout << "Nav Mohammed" << std::endl;
+    return EXIT_SUCCESS;
+}
+
+int Application::initProject() {
+    auto configFile = QFile(QString::fromStdString(std::filesystem::current_path().string() + "/bloom.json"));
+
+    if (configFile.exists()) {
+        throw Exception("Bloom configuration file (bloom.json) already exists in working directory.");
+    }
+
+    /*
+     * The file bloom.template.json is just a template Bloom config file that is included in the binary image as
+     * a resource. See src/resource.qrc
+     *
+     * We simply copy the template file into the user's working directory.
+     */
+    auto templateConfigFile = QFile(":/compiled/resources/bloom.template.json");
+
+    if (!templateConfigFile.open(QIODevice::ReadOnly)) {
+        throw Exception("Failed to open template configuration file - please report this issue at https://bloom.oscillate.io/report-issue");
+    }
+
+    if (!configFile.open(QIODevice::ReadWrite)) {
+        throw Exception("Failed to create Bloom configuration file (bloom.json)");
+    }
+
+    configFile.write(templateConfigFile.readAll());
+
+    configFile.close();
+    templateConfigFile.close();
+
+    Logger::info("Bloom configuration file (bloom.json) created in working directory.");
+    return EXIT_SUCCESS;
+}
+
+void Application::shutdown() {
+    auto appState = Thread::getState();
+    if (appState == ThreadState::STOPPED || appState == ThreadState::SHUTDOWN_INITIATED) {
+        return;
+    }
+
+    Thread::setState(ThreadState::SHUTDOWN_INITIATED);
+    Logger::info("Shutting down Bloom");
+
+    this->stopDebugServer();
+    this->stopTargetController();
+
+    if (this->signalHandler.getState() == ThreadState::READY) {
+        // Signal handler is still running
+        this->signalHandler.triggerShutdown();
+
+        // Send meaningless signal to the SignalHandler thread to have it shutdown.
+        pthread_kill(this->signalHandlerThread.native_handle(), SIGUSR1);
+    }
+
+    if (this->signalHandlerThread.joinable()) {
+        Logger::debug("Joining SignalHandler thread");
+        this->signalHandlerThread.join();
+        Logger::debug("SignalHandler thread joined");
+    }
+
+    Thread::setState(ThreadState::STOPPED);
+}
+
+void Application::startTargetController() {
+    this->targetController.setApplicationConfig(this->applicationConfig);
+    this->targetController.setEnvironmentConfig(this->environmentConfig);
+
+    this->targetControllerThread = std::thread(
+        &TargetController::run,
+        std::ref(this->targetController)
+    );
+
+    auto tcStateChangeEvent = this->applicationEventListener->waitForEvent<Events::TargetControllerStateChanged>();
+
+    if (!tcStateChangeEvent.has_value() || tcStateChangeEvent->get()->getState() != ThreadState::READY) {
+        throw Exception("TargetController failed to startup.");
+    }
+}
+
+void Application::stopTargetController() {
+    auto targetControllerState = this->targetController.getState();
+    if (targetControllerState == ThreadState::STARTING || targetControllerState == ThreadState::READY) {
+        // this->applicationEventListener->clearEventsOfType(Events::TargetControllerStateChanged::name);
+        this->eventManager.triggerEvent(std::make_shared<Events::ShutdownTargetController>());
+        this->applicationEventListener->waitForEvent<Events::TargetControllerStateChanged>(
+            std::chrono::milliseconds(10000)
+        );
+    }
+
+    if (this->targetControllerThread.joinable()) {
+        Logger::debug("Joining TargetController thread");
+        this->targetControllerThread.join();
+        Logger::debug("TargetController thread joined");
+    }
+}
+
+void Application::startDebugServer() {
+    auto supportedDebugServers = this->getSupportedDebugServers();
+    if (!supportedDebugServers.contains(this->debugServerConfig.name)) {
+        throw Exceptions::InvalidConfig("DebugServer \"" + this->debugServerConfig.name + "\" not found.");
+    }
+
+    this->debugServer = supportedDebugServers.at(this->debugServerConfig.name)();
+    this->debugServer->setApplicationConfig(this->applicationConfig);
+    this->debugServer->setEnvironmentConfig(this->environmentConfig);
+    this->debugServer->setDebugServerConfig(this->debugServerConfig);
+
+    Logger::info("Selected DebugServer: " + this->debugServer->getName());
+
+    this->debugServerThread = std::thread(
+        &DebugServer::run,
+        this->debugServer.get()
+    );
+
+    auto dsStateChangeEvent = this->applicationEventListener->waitForEvent<Events::DebugServerStateChanged>();
+
+    if (!dsStateChangeEvent.has_value() || dsStateChangeEvent->get()->getState() != ThreadState::READY) {
+        throw Exception("DebugServer failed to startup.");
+    }
+}
+
+void Application::stopDebugServer() {
+    if (this->debugServer == nullptr) {
+        // DebugServer hasn't been resolved yet.
+        return;
+    }
+
+    auto debugServerState = this->debugServer->getState();
+    if (debugServerState == ThreadState::STARTING || debugServerState == ThreadState::READY) {
+        this->eventManager.triggerEvent(std::make_shared<Events::ShutdownDebugServer>());
+        this->applicationEventListener->waitForEvent<Events::DebugServerStateChanged>(
+            std::chrono::milliseconds(5000)
+        );
+    }
+
+    if (this->debugServerThread.joinable()) {
+        Logger::debug("Joining DebugServer thread");
+        this->debugServerThread.join();
+        Logger::debug("DebugServer thread joined");
+    }
+}
+
+void Application::handleTargetControllerStateChangedEvent(EventPointer<Events::TargetControllerStateChanged> event) {
+    if (event->getState() == ThreadState::STOPPED || event->getState() == ThreadState::SHUTDOWN_INITIATED) {
+        // TargetController has unexpectedly shutdown - it must have encountered a fatal error.
+        this->shutdown();
+    }
+}
+
+void Application::handleShutdownApplicationEvent(EventPointer<Events::ShutdownApplication>) {
+    Logger::debug("ShutdownApplication event received.");
+    this->shutdown();
+}
+
+void Application::onDebugServerStateChanged(EventPointer<Events::DebugServerStateChanged> event) {
+    if (event->getState() == ThreadState::STOPPED || event->getState() == ThreadState::SHUTDOWN_INITIATED) {
+        // DebugServer has unexpectedly shutdown - it must have encountered a fatal error.
+        this->shutdown();
+    }
+}
+
+std::string Application::getApplicationDirPath() {
+    auto pathCharArray = std::array<char, PATH_MAX>();
+
+    if (readlink("/proc/self/exe", pathCharArray.data(), PATH_MAX) < 0) {
+        throw Exception("Failed to obtain application directory path.");
+    }
+
+    return std::filesystem::path(std::string(pathCharArray.begin(), pathCharArray.end())).parent_path();
+}
+
+std::string Application::getResourcesDirPath() {
+    return Application::getApplicationDirPath() + "/../resources/";
+}
+
+bool Application::isRunningAsRoot() {
+    return geteuid() == 0;
+}
diff --git a/src/Application.hpp b/src/Application.hpp
new file mode 100644
index 00000000..5e35aa39
--- /dev/null
+++ b/src/Application.hpp
@@ -0,0 +1,183 @@
+#pragma once
+
+#include <memory>
+#include <map>
+#include <string>
+#include <functional>
+#include <QtCore/QtCore>
+#include <thread>
+
+#include "src/SignalHandler/SignalHandler.hpp"
+#include "src/TargetController/TargetController.hpp"
+#include "src/DebugServers/GdbRsp/AvrGdbRsp/AvrGdbRsp.hpp"
+#include "src/Insight/Insight.hpp"
+#include "src/Helpers/Thread.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "src/EventManager/EventListener.hpp"
+#include "src/EventManager/Events/Events.hpp"
+
+namespace Bloom
+{
+    using namespace DebugServers;
+
+    class Application: public Thread
+    {
+    public:
+        static const inline std::string VERSION_STR = "0.0.1";
+
+    private:
+        /**
+         * This is the application wide event manager. It should be the only instance of the EventManager class at
+         * any given time.
+         *
+         * It should be injected (by reference) into any other instances of classes that require use
+         * of the EventManager.
+         */
+        EventManager eventManager = EventManager();
+        EventListenerPointer applicationEventListener = std::make_shared<EventListener>("ApplicationEventListener");
+
+        SignalHandler signalHandler = SignalHandler(this->eventManager);
+        std::thread signalHandlerThread;
+
+        TargetController targetController = TargetController(this->eventManager);
+        std::thread targetControllerThread;
+
+        std::unique_ptr<DebugServer> debugServer = nullptr;
+        std::thread debugServerThread;
+
+        Insight insight = Insight(this->eventManager);
+
+        ApplicationConfig applicationConfig;
+        EnvironmentConfig environmentConfig;
+        DebugServerConfig debugServerConfig;
+        InsightConfig insightConfig;
+
+        std::optional<std::string> selectedEnvironmentName;
+
+        auto getCommandToCallbackMapping() {
+            return std::map<std::string, std::function<int()>> {
+                {
+                    "--help",
+                    std::bind(&Application::presentHelpText, this)
+                },
+                {
+                    "-h",
+                    std::bind(&Application::presentHelpText, this)
+                },
+                {
+                    "--version",
+                    std::bind(&Application::presentVersionText, this)
+                },
+                {
+                    "-v",
+                    std::bind(&Application::presentVersionText, this)
+                },
+                {
+                    "init",
+                    std::bind(&Application::initProject, this)
+                },
+            };
+        }
+
+        /**
+         * Extracts config from the user's JSON config file and generates an ApplicationConfig object.
+         *
+         * @see ApplicationConfig declaration for more on this.
+         * @return
+         */
+        static ApplicationConfig extractConfig();
+
+        /**
+         * Presents application help text to user.
+         *
+         * @return
+         */
+        int presentHelpText();
+
+        /**
+         * Presents the current Bloom version number to user.
+         *
+         * @return
+         */
+        int presentVersionText();
+
+        /**
+         * Initialises a project in the user's working directory.
+         *
+         * @return
+         */
+        int initProject();
+
+        /**
+         * Kicks off the application.
+         *
+         * Will start the TargetController and DebugServer. And register the main application's event handlers.
+         */
+        void startup();
+
+        /**
+         * Will cleanly shutdown the application. This should never fail.
+         */
+        void shutdown();
+
+        /**
+         * Prepares a dedicated thread for the TargetController and kicks it off.
+         */
+        void startTargetController();
+
+        /**
+         * Invokes a clean shutdown of the TargetController. The TargetController should disconnect from the target
+         * and debug tool in a clean and safe manner, ensuring that both are left in a sensible state.
+         *
+         * This will join the TargetController thread.
+         */
+        void stopTargetController();
+
+        void startDebugServer();
+
+        void stopDebugServer();
+
+    public:
+        explicit Application() = default;
+
+        auto getSupportedDebugServers() {
+            return std::map<std::string, std::function<std::unique_ptr<DebugServer>()>> {
+                {
+                    "avr-gdb-rsp",
+                    [this]() -> std::unique_ptr<DebugServer> {
+                        return std::make_unique<DebugServers::Gdb::AvrGdbRsp>(this->eventManager);
+                    }
+                },
+            };
+        };
+
+        int run(const std::vector<std::string>& arguments);
+
+        void handleTargetControllerStateChangedEvent(EventPointer<Events::TargetControllerStateChanged> event);
+        void onDebugServerStateChanged(EventPointer<Events::DebugServerStateChanged> event);
+        void handleShutdownApplicationEvent(EventPointer<Events::ShutdownApplication>);
+
+        /**
+         * Returns the path to the directory in which the Bloom binary resides.
+         *
+         * @return
+         */
+        static std::string getApplicationDirPath();
+
+        /**
+         * Returns the path to the Resources directory, located in the application directory.
+         *
+         * @return
+         */
+        static std::string getResourcesDirPath();
+
+        /**
+         * Checks if the current effective user running Bloom has root privileges.
+         *
+         * @return
+         */
+        static bool isRunningAsRoot();
+    };
+}
diff --git a/src/ApplicationConfig.cpp b/src/ApplicationConfig.cpp
new file mode 100644
index 00000000..1c05397a
--- /dev/null
+++ b/src/ApplicationConfig.cpp
@@ -0,0 +1,88 @@
+#include <src/Logger/Logger.hpp>
+#include <src/Exceptions/InvalidConfig.hpp>
+#include "ApplicationConfig.hpp"
+
+using namespace Bloom;
+
+void ApplicationConfig::init(QJsonObject jsonObject) {
+    if (!jsonObject.contains("environments")) {
+        throw Exceptions::InvalidConfig("No environments found.");
+    }
+
+    // Extract all environment objects from JSON config.
+    auto environments = jsonObject.find("environments").value().toObject();
+    for (auto environmentIt = environments.begin(); environmentIt != environments.end(); environmentIt++) {
+        auto environmentName = environmentIt.key().toStdString();
+
+        try {
+            auto environmentConfig = EnvironmentConfig();
+            environmentConfig.init(environmentName, environmentIt.value().toObject());
+
+            this->environments.insert(
+                std::pair<std::string, EnvironmentConfig>(environmentName, environmentConfig)
+            );
+        } catch (Exceptions::InvalidConfig& exception) {
+            Logger::error("Invalid environment config for environment '" + environmentName + "': "
+                + exception.getMessage() + " Environment will be ignored.");
+        }
+    }
+
+    if (jsonObject.contains("debugServer")) {
+        auto debugServerConfig = DebugServerConfig();
+        debugServerConfig.init(jsonObject.find("debugServer")->toObject());
+        this->debugServerConfig = debugServerConfig;
+    }
+
+    if (jsonObject.contains("insight")) {
+        this->insightConfig.init(jsonObject.find("insight")->toObject());
+    }
+
+    if (jsonObject.contains("debugLoggingEnabled")) {
+        this->debugLoggingEnabled = jsonObject.find("debugLoggingEnabled").value().toBool();
+    }
+}
+
+void InsightConfig::init(QJsonObject jsonObject) {
+    if (jsonObject.contains("enabled")) {
+        this->insightEnabled = jsonObject.find("enabled").value().toBool();
+    }
+}
+
+void EnvironmentConfig::init(std::string name, QJsonObject jsonObject) {
+    this->name = name;
+    this->debugToolName = jsonObject.find("debugToolName")->toString().toLower().toStdString();
+
+    // Extract target data
+    if (!jsonObject.contains("target")) {
+        // Environment has no target data - ignore
+        throw Exceptions::InvalidConfig("No target configuration provided");
+    }
+
+    this->targetConfig.init(jsonObject.find("target")->toObject());
+
+    if (jsonObject.contains("debugServer")) {
+        auto debugServerConfig = DebugServerConfig();
+        debugServerConfig.init(jsonObject.find("debugServer")->toObject());
+        this->debugServerConfig = debugServerConfig;
+    }
+
+    if (jsonObject.contains("insight")) {
+        auto insightConfig = InsightConfig();
+        insightConfig.init(jsonObject.find("insight")->toObject());
+        this->insightConfig = insightConfig;
+    }
+}
+
+void TargetConfig::init(QJsonObject jsonObject) {
+    if (!jsonObject.contains("name")) {
+        throw Exceptions::InvalidConfig("No target name found.");
+    }
+
+    this->name = jsonObject.find("name")->toString().toLower().toStdString();
+    this->jsonObject = jsonObject;
+}
+
+void DebugServerConfig::init(QJsonObject jsonObject) {
+    this->name = jsonObject.find("name")->toString().toLower().toStdString();
+    this->jsonObject = jsonObject;
+}
diff --git a/src/ApplicationConfig.hpp b/src/ApplicationConfig.hpp
new file mode 100644
index 00000000..7bf6eb6c
--- /dev/null
+++ b/src/ApplicationConfig.hpp
@@ -0,0 +1,154 @@
+#pragma once
+
+#include <memory>
+#include <map>
+#include <string>
+#include <QJsonObject>
+
+namespace Bloom
+{
+    /*
+     * Currently, all user configuration is stored in a JSON file (bloom.json), in the user's project directory.
+     *
+     * The JSON config file should define debugging environment objects. A debugging environment object is just
+     * a user defined JSON object that holds parameters relating to a specific debugging environment (like the
+     * name of the DebugTool, Target configuration and any debug server config). Because a config file
+     * can define multiple debugging environments, each object should be assigned a key in the config file. We use this
+     * key to allow users to select different debugging environments between debugging sessions.
+     *
+     * On application startup, we extract the config from this JSON file and generate an ApplicationConfig object.
+     * See Application::extractConfig() for more on this.
+     *
+     * Some config parameters are specific to certain entities within Bloom, but have no significance across the
+     * rest of the application. For example, AVR8 targets require 'physicalInterface' and 'configVariant' parameters.
+     * These are used to configure the AVR8 target, but have no significance across the rest of the application.
+     * This is why some configuration structs (like TargetConfig) include a QJsonObject member, typically named jsonObject.
+     * When instances of these structs are passed to the appropriate entities, any configuration required by those
+     * entities is extracted from the jsonObject member. This means we don't have to worry about any entity specific
+     * config parameters at the application level. We can simply extract what we need at an entity level and the rest
+     * of the application can remain oblivious. For an example on extracting entity specific config, see AVR8::configure().
+     */
+
+    /**
+     * Configuration relating to a specific target.
+     *
+     * Please don't define any target specific configuration here, unless it applies to *all* targets across
+     * the application. If a target requires specific config, it should be extracted from the jsonObject member.
+     * This should be done in Target::preActivationConfigure(), to which an instance of TargetConfig is passed.
+     * See the comment above on entity specific config for more on this.
+     */
+    struct TargetConfig
+    {
+        /**
+         * Obtains config parameters from JSON object.
+         *
+         * @param jsonObject
+         */
+        void init(QJsonObject jsonObject);
+
+        std::string name;
+        QJsonObject jsonObject;
+    };
+
+    /**
+     * Debug server configuration.
+     */
+    struct DebugServerConfig
+    {
+        /**
+         * Obtains config parameters from JSON object.
+         *
+         * @param jsonObject
+         */
+        void init(QJsonObject jsonObject);
+
+        std::string name;
+        QJsonObject jsonObject;
+    };
+
+    struct InsightConfig
+    {
+        /**
+         * Obtains config parameters from JSON object.
+         *
+         * @param jsonObject
+         */
+        void init(QJsonObject jsonObject);
+
+        bool insightEnabled = true;
+    };
+
+    /**
+     * Configuration relating to a specific user defined environment.
+     *
+     * An instance of this type will be instantiated for each environment defined in the user's config file.
+     * See Application::extractConfig() implementation for more on this.
+     */
+    struct EnvironmentConfig
+    {
+        /**
+         * Obtains config parameters from JSON object.
+         *
+         * @param jsonObject
+         */
+        void init(std::string name, QJsonObject jsonObject);
+
+        /**
+         * The environment name is stored as the key to the JSON object containing the environment parameters.
+         *
+         * Environment names must be unique.
+         */
+        std::string name;
+
+        /**
+         * Name of the selected debug tool for this environment.
+         */
+        std::string debugToolName;
+
+        /**
+         * Configuration for the environment's selected target.
+         *
+         * Each environment can consist of only one target.
+         */
+        TargetConfig targetConfig;
+
+        /**
+         * Configuration for the environment's debug server. Users can define this at the application level if
+         * they desire.
+         */
+        std::optional<DebugServerConfig> debugServerConfig;
+
+        /**
+         * Insight configuration can be defined at an environment level as well as at an application level.
+         */
+        std::optional<InsightConfig> insightConfig;
+    };
+
+    /**
+     * This holds all user provided application configuration.
+     */
+    struct ApplicationConfig
+    {
+        /**
+         * Obtains config parameters from JSON object.
+         *
+         * @param jsonObject
+         */
+        void init(QJsonObject jsonObject);
+
+        /**
+         * A mapping of environment names to EnvironmentConfig objects.
+         */
+        std::map<std::string, EnvironmentConfig> environments;
+
+        /**
+         * Application level debug server configuration. We use this as a fallback if no debug server config is
+         * provided at the environment level.
+         */
+        std::optional<DebugServerConfig> debugServerConfig;
+
+        InsightConfig insightConfig;
+
+        bool debugLoggingEnabled = false;
+    };
+}
diff --git a/src/DebugServers/DebugServer.cpp b/src/DebugServers/DebugServer.cpp
new file mode 100644
index 00000000..c0cb7d2e
--- /dev/null
+++ b/src/DebugServers/DebugServer.cpp
@@ -0,0 +1,233 @@
+#include <variant>
+#include <cstdint>
+
+#include "DebugServer.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::DebugServers;
+
+void DebugServer::run() {
+    try {
+        this->startup();
+
+        Logger::info("DebugServer ready");
+
+        while (this->getState() == ThreadState::READY) {
+            this->serve();
+            this->eventListener->dispatchCurrentEvents();
+        }
+    } catch (const std::exception& exception) {
+        Logger::error("DebugServer fatal error: " + std::string(exception.what()));
+    }
+
+    this->shutdown();
+}
+
+void DebugServer::startup() {
+    this->setName("DS");
+    Logger::info("Starting DebugServer");
+
+    this->eventManager.registerListener(this->eventListener);
+
+    this->interruptEventNotifier = std::make_shared<EventNotifier>();
+    this->interruptEventNotifier->init();
+    this->eventListener->setInterruptEventNotifier(this->interruptEventNotifier);
+
+    // Register event handlers
+    this->eventListener->registerCallbackForEventType<Events::ShutdownDebugServer>(
+        std::bind(&DebugServer::onShutdownDebugServerEvent, this, std::placeholders::_1)
+    );
+
+    this->init();
+    this->setStateAndEmitEvent(ThreadState::READY);
+}
+
+void DebugServer::shutdown() {
+    if (this->getState() == ThreadState::STOPPED || this->getState() == ThreadState::SHUTDOWN_INITIATED) {
+        return;
+    }
+
+    this->setState(ThreadState::SHUTDOWN_INITIATED);
+    Logger::info("Shutting down DebugServer");
+    this->close();
+    this->interruptEventNotifier->close();
+    this->setStateAndEmitEvent(ThreadState::STOPPED);
+}
+
+void DebugServer::onShutdownDebugServerEvent(EventPointer<Events::ShutdownDebugServer> event) {
+    this->shutdown();
+}
+
+void DebugServer::stopTargetExecution() {
+    auto stopTargetEvent = std::make_shared<Events::StopTargetExecution>();
+    this->eventManager.triggerEvent(stopTargetEvent);
+
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::TargetExecutionStopped,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), stopTargetEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::TargetExecutionStopped>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
+void DebugServer::continueTargetExecution(std::optional<std::uint32_t> fromAddress) {
+    auto resumeExecutionEvent = std::make_shared<Events::ResumeTargetExecution>();
+
+    if (fromAddress.has_value()) {
+        resumeExecutionEvent->fromProgramCounter = fromAddress.value();
+    }
+
+    this->eventManager.triggerEvent(resumeExecutionEvent);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::TargetExecutionResumed,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), resumeExecutionEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::TargetExecutionResumed>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
+void DebugServer::stepTargetExecution(std::optional<std::uint32_t> fromAddress) {
+    auto stepExecutionEvent = std::make_shared<Events::StepTargetExecution>();
+
+    if (fromAddress.has_value()) {
+        stepExecutionEvent->fromProgramCounter = fromAddress.value();
+    }
+
+    this->eventManager.triggerEvent(stepExecutionEvent);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::TargetExecutionResumed,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), stepExecutionEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::TargetExecutionResumed>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
+TargetRegisters DebugServer::readGeneralRegistersFromTarget(TargetRegisterDescriptors descriptors) {
+    auto readRegistersEvent = std::make_shared<Events::RetrieveRegistersFromTarget>();
+    readRegistersEvent->descriptors = descriptors;
+
+    this->eventManager.triggerEvent(readRegistersEvent);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::RegistersRetrievedFromTarget,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), readRegistersEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::RegistersRetrievedFromTarget>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+
+    auto retrievedRegistersEvent = std::get<EventPointer<Events::RegistersRetrievedFromTarget>>(responseEvent.value());
+    return retrievedRegistersEvent->registers;
+}
+
+void DebugServer::writeGeneralRegistersToTarget(TargetRegisters registers) {
+    auto event = std::make_shared<Events::WriteRegistersToTarget>();
+    event->registers = registers;
+
+    this->eventManager.triggerEvent(event);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::RegistersWrittenToTarget,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), event->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::RegistersWrittenToTarget>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
+TargetMemoryBuffer DebugServer::readMemoryFromTarget(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) {
+    auto readMemoryEvent = std::make_shared<Events::RetrieveMemoryFromTarget>();
+    readMemoryEvent->memoryType = memoryType;
+    readMemoryEvent->startAddress = startAddress;
+    readMemoryEvent->bytes = bytes;
+
+    this->eventManager.triggerEvent(readMemoryEvent);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::MemoryRetrievedFromTarget,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), readMemoryEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::MemoryRetrievedFromTarget>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+
+    auto retrievedRegistersEvent = std::get<EventPointer<Events::MemoryRetrievedFromTarget>>(responseEvent.value());
+    return retrievedRegistersEvent->data;
+}
+
+void DebugServer::writeMemoryToTarget(
+    TargetMemoryType memoryType,
+    std::uint32_t startAddress,
+    const TargetMemoryBuffer& buffer
+) {
+    auto writeMemoryEvent = std::make_shared<Events::WriteMemoryToTarget>();
+    writeMemoryEvent->memoryType = memoryType;
+    writeMemoryEvent->startAddress = startAddress;
+    writeMemoryEvent->buffer = buffer;
+
+    this->eventManager.triggerEvent(writeMemoryEvent);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::MemoryWrittenToTarget,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), writeMemoryEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::MemoryWrittenToTarget>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
+void DebugServer::setBreakpointOnTarget(TargetBreakpoint breakpoint) {
+    auto event = std::make_shared<Events::SetBreakpointOnTarget>();
+    event->breakpoint = breakpoint;
+
+    this->eventManager.triggerEvent(event);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::BreakpointSetOnTarget,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), event->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::BreakpointSetOnTarget>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
+void DebugServer::removeBreakpointOnTarget(TargetBreakpoint breakpoint) {
+    auto event = std::make_shared<Events::RemoveBreakpointOnTarget>();
+    event->breakpoint = breakpoint;
+
+    this->eventManager.triggerEvent(event);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::BreakpointRemovedOnTarget,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), event->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::BreakpointRemovedOnTarget>>(responseEvent.value())
+    ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+}
+
diff --git a/src/DebugServers/DebugServer.hpp b/src/DebugServers/DebugServer.hpp
new file mode 100644
index 00000000..8c32b7cb
--- /dev/null
+++ b/src/DebugServers/DebugServer.hpp
@@ -0,0 +1,195 @@
+#pragma once
+
+#include <map>
+#include <functional>
+#include <cstdint>
+
+#include "src/EventManager/Events/Events.hpp"
+#include "src/EventManager/EventManager.hpp"
+#include "src/Exceptions/DebugServerInterrupted.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "src/Helpers/Thread.hpp"
+#include "src/Targets/TargetRegister.hpp"
+#include "src/Targets/TargetBreakpoint.hpp"
+
+namespace Bloom::DebugServers
+{
+    using Targets::TargetRegister;
+    using Targets::TargetRegisterDescriptor;
+    using Targets::TargetRegisters;
+    using Targets::TargetRegisterMap;
+    using Targets::TargetMemoryBuffer;
+    using Targets::TargetMemoryType;
+    using Targets::TargetBreakpoint;
+
+    /**
+     * The DebugServer exposes the connected target to third-party debugging software such as IDEs.
+     * The DebugServer runs on a dedicated thread which is kicked off shortly after the TargetController has been
+     * started.
+     *
+     * All supported DebugServers should be derived from this class.
+     *
+     * Bloom currently only supports one DebugServer - the GdbRspDebugServer.
+     */
+    class DebugServer: public Thread
+    {
+    private:
+        /**
+         * Prepares the debug server thread and then calls init().
+         *
+         * Derived classes should not override this method - they should instead use init().
+         */
+        void startup();
+
+        /**
+         * Calls close() and updates the thread state.
+         *
+         * As with startup(), derived classes should not override this method. They should use close() instead.
+         */
+        void shutdown();
+
+        /**
+         * Updates the state of the DebugServer and emits a state changed event.
+         *
+         * @param state
+         * @param emitEvent
+         */
+        void setStateAndEmitEvent(ThreadState state) {
+            Thread::setState(state);
+            this->eventManager.triggerEvent(
+                std::make_shared<Events::DebugServerStateChanged>(state)
+            );
+        };
+
+        /**
+         * Handles a shutdown request.
+         *
+         * @param event
+         */
+        void onShutdownDebugServerEvent(EventPointer<Events::ShutdownDebugServer> event);
+
+    protected:
+        /**
+         * Application-wide instance to EventManager
+         */
+        EventManager& eventManager;
+        EventListenerPointer eventListener = std::make_shared<EventListener>("DebugServerEventListener");
+
+        /**
+         * Enables the interruption of any blocking file IO.
+         */
+        std::shared_ptr<EventNotifier> interruptEventNotifier = nullptr;
+
+        ApplicationConfig applicationConfig;
+        EnvironmentConfig environmentConfig;
+        DebugServerConfig debugServerConfig;
+
+        /**
+         * Called on startup of the DebugServer thread. Derived classes should implement any initialisation work here.
+         */
+        virtual void init() = 0;
+
+        /**
+         * Called repeatedly in an infinite loop when the DebugServer is running.
+         */
+        virtual void serve() = 0;
+
+        /**
+         * Called on shutdown of the debug server.
+         */
+        virtual void close() = 0;
+
+        /**
+         * Requests the TargetController to halt execution on the target.
+         */
+        void stopTargetExecution();
+
+        /**
+         * Requests the TargetController to continue execution on the target.
+         *
+         * @param fromAddress
+         */
+        void continueTargetExecution(std::optional<std::uint32_t> fromAddress);
+
+        /**
+         * Requests the TargetController to step execution on the target.
+         *
+         * @param fromAddress
+         */
+        void stepTargetExecution(std::optional<std::uint32_t> fromAddress);
+
+        /**
+         * Requests the TargetController to read register values from the target.
+         *
+         * @param descriptors
+         *  Descriptors of the registers to read.
+         *
+         * @return
+         */
+        TargetRegisters readGeneralRegistersFromTarget(TargetRegisterDescriptors descriptors);
+
+        /**
+         * Requests the TargetController to write register values to the target.
+         *
+         * @param registers
+         */
+        void writeGeneralRegistersToTarget(TargetRegisters registers);
+
+        /**
+         * Requests the TargetController to read memory from the target.
+         *
+         * @param memoryType
+         * @param startAddress
+         * @param bytes
+         * @return
+         */
+        TargetMemoryBuffer readMemoryFromTarget(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes);
+
+        /**
+         * Requests the TargetController to write memory to the target.
+         *
+         * @param memoryType
+         * @param startAddress
+         * @param buffer
+         */
+        void writeMemoryToTarget(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer);
+
+        /**
+         * Requests the TargetController to set a breakpoint on the target.
+         *
+         * @param breakpoint
+         */
+        void setBreakpointOnTarget(TargetBreakpoint breakpoint);
+
+        /**
+         * Requests the TargetController to remove a breakpoint from the target.
+         *
+         * @param breakpoint
+         */
+        void removeBreakpointOnTarget(TargetBreakpoint breakpoint);
+
+    public:
+        DebugServer(EventManager& eventManager) : eventManager(eventManager) {};
+
+        void setApplicationConfig(const ApplicationConfig& applicationConfig) {
+            this->applicationConfig = applicationConfig;
+        }
+
+        void setEnvironmentConfig(const EnvironmentConfig& environmentConfig) {
+            this->environmentConfig = environmentConfig;
+        }
+
+        void setDebugServerConfig(const DebugServerConfig& debugServerConfig) {
+            this->debugServerConfig = debugServerConfig;
+        }
+
+        /**
+         * Entry point for the DebugServer. This must called from a dedicated thread.
+         */
+        void run();
+
+        virtual std::string getName() const = 0;
+
+        virtual ~DebugServer() = default;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/AvrGdbRsp/AvrGdbRsp.hpp b/src/DebugServers/GdbRsp/AvrGdbRsp/AvrGdbRsp.hpp
new file mode 100644
index 00000000..b66b40df
--- /dev/null
+++ b/src/DebugServers/GdbRsp/AvrGdbRsp/AvrGdbRsp.hpp
@@ -0,0 +1,121 @@
+#pragma once
+
+#include <cstdint>
+
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+#include "src/DebugServers/GdbRsp/Register.hpp"
+
+namespace Bloom::DebugServers::Gdb
+{
+    /**
+     * The AVR GDB client (avr-gdb) defines a set of parameters relating to AVR targets. These parameters are
+     * hardcoded in the AVR GDB source code. The client expects all compatible GDB RSP servers to be aware of
+     * these parameters.
+     *
+     * An example of these hardcoded parameters is target registers and the order in which they are supplied; AVR GDB
+     * clients expect 35 registers to be accessible via the server. 32 of these registers are general purpose CPU
+     * registers. The GP registers are expected to be followed by the status register (SREG), stack pointer
+     * register (SPH & SPL) and the program counter. These must all be given in a specific order, which is
+     * pre-determined by the AVR GDB client. See AvrGdbRsp::getRegisterNumberToDescriptorMapping() for more.
+     *
+     * For more on this, see the AVR GDB source code at https://github.com/bminor/binutils-gdb/blob/master/gdb/avr-tdep.c
+     *
+     * The AvrGdpRsp class extends the generic GDB RSP debug server and implements these AVR specific parameters.
+     */
+    class AvrGdbRsp: public GdbRspDebugServer
+    {
+    private:
+        /**
+         * The mask used by the AVR GDB client to encode the memory type into memory addresses.
+         * See AvrGdbRsp::getMemoryTypeFromGdbAddress() for more.
+         */
+        unsigned int gdbInternalMemoryMask = 0xFE0000u;
+
+    protected:
+        /**
+         * For AVR targets, avr-gdb defines 35 registers in total:
+         *
+         * Register number 0 through 31 are general purpose registers
+         * Register number 32 is the status register (SREG)
+         * Register number 33 is the stack pointer register
+         * Register number 34 is the program counter register
+         *
+         * Only general purpose registers have register IDs. The others do not require an ID.
+         *
+         * @return
+         */
+        BiMap<GdbRegisterNumber, TargetRegisterDescriptor> getRegisterNumberToDescriptorMapping() override {
+            static BiMap<GdbRegisterNumber, TargetRegisterDescriptor> mapping = {
+                {0, TargetRegisterDescriptor(0, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {1, TargetRegisterDescriptor(1, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {2, TargetRegisterDescriptor(2, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {3, TargetRegisterDescriptor(3, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {4, TargetRegisterDescriptor(4, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {5, TargetRegisterDescriptor(5, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {6, TargetRegisterDescriptor(6, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {7, TargetRegisterDescriptor(7, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {8, TargetRegisterDescriptor(8, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {9, TargetRegisterDescriptor(9, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {10, TargetRegisterDescriptor(10, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {11, TargetRegisterDescriptor(11, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {12, TargetRegisterDescriptor(12, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {13, TargetRegisterDescriptor(13, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {14, TargetRegisterDescriptor(14, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {15, TargetRegisterDescriptor(15, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {16, TargetRegisterDescriptor(16, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {17, TargetRegisterDescriptor(17, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {18, TargetRegisterDescriptor(18, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {19, TargetRegisterDescriptor(19, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {20, TargetRegisterDescriptor(20, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {21, TargetRegisterDescriptor(21, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {22, TargetRegisterDescriptor(22, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {23, TargetRegisterDescriptor(23, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {24, TargetRegisterDescriptor(24, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {25, TargetRegisterDescriptor(25, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {26, TargetRegisterDescriptor(26, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {27, TargetRegisterDescriptor(27, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {28, TargetRegisterDescriptor(28, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {29, TargetRegisterDescriptor(29, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {30, TargetRegisterDescriptor(30, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {31, TargetRegisterDescriptor(31, TargetRegisterType::GENERAL_PURPOSE_REGISTER)},
+                {32, TargetRegisterDescriptor(TargetRegisterType::STATUS_REGISTER)},
+                {33, TargetRegisterDescriptor(TargetRegisterType::STACK_POINTER)},
+                {34, TargetRegisterDescriptor(TargetRegisterType::PROGRAM_COUNTER)},
+            };
+
+            return mapping;
+        };
+
+        /**
+         * avr-gdb uses the most significant 15 bits in memory addresses to indicate the type of memory being
+         * addressed.
+         *
+         * @param address
+         * @return
+         */
+        TargetMemoryType getMemoryTypeFromGdbAddress(std::uint32_t address) override {
+            if (address & this->gdbInternalMemoryMask) {
+                return TargetMemoryType::RAM;
+            }
+
+            return TargetMemoryType::FLASH;
+        };
+
+        /**
+         * Strips the most significant 15 bits from a GDB memory address.
+         *
+         * @param address
+         * @return
+         */
+        std::uint32_t removeMemoryTypeIndicatorFromGdbAddress(std::uint32_t address) override {
+            return address & this->gdbInternalMemoryMask ? (address & ~(this->gdbInternalMemoryMask)) : address;
+        };
+
+    public:
+        AvrGdbRsp(EventManager& eventManager) : GdbRspDebugServer(eventManager) {};
+
+        std::string getName() const override {
+            return "AVR GDB Remote Serial Protocol Debug Server";
+        }
+    };
+}
\ No newline at end of file
diff --git a/src/DebugServers/GdbRsp/BreakpointType.hpp b/src/DebugServers/GdbRsp/BreakpointType.hpp
new file mode 100644
index 00000000..5789fc2d
--- /dev/null
+++ b/src/DebugServers/GdbRsp/BreakpointType.hpp
@@ -0,0 +1,11 @@
+#pragma once
+
+namespace Bloom::DebugServers::Gdb
+{
+    enum class BreakpointType: int
+    {
+        UNKNOWN = 0,
+        SOFTWARE_BREAKPOINT = 1,
+        HARDWARE_BREAKPOINT = 2,
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/CommandPacket.cpp b/src/DebugServers/GdbRsp/CommandPackets/CommandPacket.cpp
new file mode 100644
index 00000000..c051bf6a
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/CommandPacket.cpp
@@ -0,0 +1,8 @@
+#include "CommandPacket.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void CommandPacket::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
\ No newline at end of file
diff --git a/src/DebugServers/GdbRsp/CommandPackets/CommandPacket.hpp b/src/DebugServers/GdbRsp/CommandPackets/CommandPacket.hpp
new file mode 100644
index 00000000..8e21e94d
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/CommandPacket.hpp
@@ -0,0 +1,51 @@
+#pragma once
+
+#include <vector>
+#include <memory>
+
+#include "src/DebugServers/GdbRsp/Packet.hpp"
+
+namespace Bloom::DebugServers::Gdb {
+    class GdbRspDebugServer;
+}
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    /**
+     * GDB RSP command packets are sent to the server, from the GDB client. These packets carry instructions that the
+     * server is expected to carry out. Upon completion, the server is expected to respond to the client with
+     * a ResponsePacket.
+     *
+     * For some command packets, we define a specific data structure by extending this CommandPacket class. These
+     * classes extend the data structure to include fields for data which may be specific to the command.
+     * They also implement additional methods that allow us to easily access the additional data. An example
+     * of this would be the SupportedFeaturesQuery class. It extends the CommandPacket class and provides access
+     * to additional data fields that are specific to the command (in this case, a set of GDB features reported to be
+     * supported by the GDB client).
+     *
+     * Typically, command packets that require specific data structures are handled in a dedicated handler method
+     * in the GdbRspDebugServer. This is done by double dispatching the packet object to the appropriate handler.
+     * See CommandPacket::dispatchToHandler(), GdbRspDebugServer::serve() and the overloads
+     * for GdbRspDebugServer::handleGdbPacket() for more on this.
+     *
+     * Some command packets are so simple they do not require a dedicated data structure. An example of this is
+     * the halt reason packet, which contains nothing more than an ? character in the packet body. These packets are
+     * typically handled in the generic GdbRspDebugServer::handleGdbPacket(CommandPacket&) method.
+     *
+     * See the Packet class for information on how the raw packets are formatted.
+     */
+    class CommandPacket: public Packet
+    {
+    public:
+        CommandPacket(const std::vector<unsigned char>& rawPacket) : Packet(rawPacket) {}
+
+        /**
+         * Double dispatches the packet to the appropriate overload of handleGdbPacket(), within the passed instance of
+         * GdbRspDebugServer. If there is no overload defined for a specific CommandPacket-inherited type, the
+         * generic GdbRspDebugServer::handleGdbPacket(CommandPacket&) is used.
+         *
+         * @param gdbRspDebugServer
+         */
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer);
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.cpp b/src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.cpp
new file mode 100644
index 00000000..8980b176
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.cpp
@@ -0,0 +1,129 @@
+#include <vector>
+#include <memory>
+#include <map>
+
+#include "CommandPacketFactory.hpp"
+
+using namespace Bloom::DebugServers::Gdb;
+
+std::unique_ptr<CommandPacket> CommandPacketFactory::create(std::vector<unsigned char> rawPacket) {
+
+    if (rawPacket.size() == 5 && rawPacket[1] == 0x03) {
+        // This is an interrupt request - create a fake packet for it
+        return std::make_unique<CommandPackets::InterruptExecution>(rawPacket);
+    }
+
+    auto rawPacketString = std::string(rawPacket.begin(), rawPacket.end());
+
+    if (rawPacketString.size() >= 2) {
+        /*
+         * First byte of the raw packet will be 0x24 ('$'), so find() should return 1, not 0, when
+         * looking for a command identifier string.
+         */
+        if (rawPacketString.find("qSupported") == 1) {
+            return std::make_unique<CommandPackets::SupportedFeaturesQuery>(rawPacket);
+
+        } else if (rawPacketString[1] == 'g' || rawPacketString[1] == 'p') {
+            return std::make_unique<CommandPackets::ReadGeneralRegisters>(rawPacket);
+
+        } else if (rawPacketString[1] == 'G' || rawPacketString[1] == 'P') {
+            return std::make_unique<CommandPackets::WriteGeneralRegisters>(rawPacket);
+
+        } else if (rawPacketString[1] == 'c') {
+            return std::make_unique<CommandPackets::ContinueExecution>(rawPacket);
+
+        } else if (rawPacketString[1] == 's') {
+            return std::make_unique<CommandPackets::StepExecution>(rawPacket);
+
+        } else if (rawPacketString[1] == 'm') {
+            return std::make_unique<CommandPackets::ReadMemory>(rawPacket);
+
+        }  else if (rawPacketString[1] == 'M') {
+            return std::make_unique<CommandPackets::WriteMemory>(rawPacket);
+
+        } else if (rawPacketString[1] == 'Z') {
+            return std::make_unique<CommandPackets::SetBreakpoint>(rawPacket);
+
+        } else if (rawPacketString[1] == 'z') {
+            return std::make_unique<CommandPackets::RemoveBreakpoint>(rawPacket);
+        }
+    }
+
+    return std::make_unique<CommandPacket>(rawPacket);
+}
+
+std::vector<std::vector<unsigned char>> CommandPacketFactory::extractRawPackets(std::vector<unsigned char> buffer) {
+    std::vector<std::vector<unsigned char>> output;
+
+    std::size_t bufferIndex;
+    std::size_t bufferSize = buffer.size();
+    unsigned char byte;
+    for (bufferIndex = 0; bufferIndex < bufferSize; bufferIndex++) {
+        byte = buffer[bufferIndex];
+
+        if (byte == 0x03) {
+            /*
+             * This is an interrupt packet - it doesn't carry any of the usual packet frame bytes, so we'll just
+             * add them here, in order to keep things consistent.
+             *
+             * Because we're effectively faking the packet frame, we can use any value for the checksum.
+             */
+            output.push_back({'$', byte, '#', 'F', 'F'});
+
+        } else if (byte == '$') {
+            // Beginning of packet
+            std::vector<unsigned char> rawPacket;
+            rawPacket.push_back('$');
+
+            auto packetIndex = bufferIndex;
+            bool validPacket = false;
+            bool isByteEscaped = false;
+
+            for (packetIndex++; packetIndex < bufferSize; packetIndex++) {
+                byte = buffer[packetIndex];
+
+                if (byte == '}' && !isByteEscaped) {
+                    isByteEscaped = true;
+                    continue;
+                }
+
+                if (byte == '$' && !isByteEscaped) {
+                    // Unexpected end of packet
+                    validPacket = false;
+                    break;
+                }
+
+                if (byte == '#' && !isByteEscaped) {
+                    // End of packet data
+                    if ((bufferSize - 1) < (packetIndex + 2)) {
+                        // There should be at least two more bytes in the buffer, for the checksum.
+                        break;
+                    }
+
+                    rawPacket.push_back(byte);
+
+                    // Add the checksum bytes and break the loop
+                    rawPacket.push_back(buffer[++packetIndex]);
+                    rawPacket.push_back(buffer[++packetIndex]);
+                    validPacket = true;
+                    break;
+                }
+
+                if (isByteEscaped) {
+                    // Escaped bytes are XOR'd with a 0x20 mask.
+                    byte ^= 0x20;
+                    isByteEscaped = false;
+                }
+
+                rawPacket.push_back(byte);
+            }
+
+            if (validPacket) {
+                output.push_back(rawPacket);
+                bufferIndex = packetIndex;
+            }
+        }
+    }
+
+    return output;
+}
\ No newline at end of file
diff --git a/src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.hpp b/src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.hpp
new file mode 100644
index 00000000..3a418df6
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/CommandPacketFactory.hpp
@@ -0,0 +1,51 @@
+#pragma once
+
+#include <vector>
+#include <memory>
+
+// Command packets
+#include "CommandPacket.hpp"
+#include "InterruptExecution.hpp"
+#include "SupportedFeaturesQuery.hpp"
+#include "ReadGeneralRegisters.hpp"
+#include "WriteGeneralRegisters.hpp"
+#include "ReadMemory.hpp"
+#include "WriteMemory.hpp"
+#include "StepExecution.hpp"
+#include "ContinueExecution.hpp"
+#include "SetBreakpoint.hpp"
+#include "RemoveBreakpoint.hpp"
+
+namespace Bloom::DebugServers::Gdb
+{
+    using namespace CommandPackets;
+
+    /**
+     * The CommandPacketFactory class provides a means for extracting raw packet data from a raw buffer, and
+     * constructing the appropriate CommandPacket objects.
+     */
+    class CommandPacketFactory
+    {
+    public:
+        /**
+         * Extracts raw GDB RSP packets from buffer.
+         *
+         * @param buffer
+         *  The buffer from which to extract the raw GDB RSP packets.
+         *
+         * @return
+         *  A vector of raw packets.
+         */
+        static std::vector<std::vector<unsigned char>> extractRawPackets(std::vector<unsigned char> buffer);
+
+        /**
+         * Constructs the appropriate CommandPacket object from a single raw GDB RSP packet.
+         *
+         * @param rawPacket
+         *  The raw GDB RSP packet from which to construct the CommandPacket object.
+         *
+         * @return
+         */
+        static std::unique_ptr<CommandPacket> create(std::vector<unsigned char> rawPacket);
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.cpp b/src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.cpp
new file mode 100644
index 00000000..776b6ae4
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.cpp
@@ -0,0 +1,18 @@
+#include <cstdint>
+
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+#include "ContinueExecution.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void ContinueExecution::init() {
+    if (this->data.size() > 1) {
+        this->fromProgramCounter = static_cast<std::uint32_t>(
+            std::stoi(std::string(this->data.begin(), this->data.end()), nullptr, 16)
+        );
+    }
+}
+
+void ContinueExecution::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.hpp b/src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.hpp
new file mode 100644
index 00000000..78b74f8d
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/ContinueExecution.hpp
@@ -0,0 +1,38 @@
+#pragma once
+
+#include <cstdint>
+#include <optional>
+
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The ContinueExecution class implements a structure for "c" packets. These packets instruct the server
+     * to continue execution on the target.
+     *
+     * See @link https://sourceware.org/gdb/onlinedocs/gdb/Packets.html#Packets for more on this.
+     */
+    class ContinueExecution: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * The "c" packet can contain an address which defines the point from which the execution should be resumed on
+         * the target.
+         *
+         * Although the packet *can* contain this address, it is not required, hence the optional.
+         */
+        std::optional<std::uint32_t> fromProgramCounter;
+
+        ContinueExecution(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.cpp b/src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.cpp
new file mode 100644
index 00000000..041d4cd0
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.cpp
@@ -0,0 +1,8 @@
+#include "InterruptExecution.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void InterruptExecution::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.hpp b/src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.hpp
new file mode 100644
index 00000000..adca0a75
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/InterruptExecution.hpp
@@ -0,0 +1,24 @@
+#pragma once
+
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The InterruptException class represents interrupt command packets. Upon receiving an interrupt packet, the
+     * server is expected to interrupt execution on the target.
+     *
+     * Technically, interrupts are not sent by the client in the form of a typical GDP RSP packet. Instead, they're
+     * just sent as a single byte from the client. We fake the packet on our end, to save us the headache of dealing
+     * with this inconsistency. We do this in CommandPacketFactory::extractRawPackets().
+     */
+    class InterruptExecution: public CommandPacket
+    {
+    public:
+        InterruptExecution(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {};
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.cpp b/src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.cpp
new file mode 100644
index 00000000..4e97f536
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.cpp
@@ -0,0 +1,15 @@
+#include "ReadGeneralRegisters.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void ReadGeneralRegisters::init() {
+    if (this->data.size() >= 2 && this->data.front() == 'p') {
+        // This command packet is requesting a specific register
+        this->registerNumber = static_cast<size_t>(std::stoi(std::string(this->data.begin() + 1, this->data.end())));
+    }
+}
+
+void ReadGeneralRegisters::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.hpp b/src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.hpp
new file mode 100644
index 00000000..6262a8c4
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/ReadGeneralRegisters.hpp
@@ -0,0 +1,37 @@
+#pragma once
+
+#include <optional>
+
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The ReadGeneralRegisters class implements a structure for "g" and "p" command packets. In response to these
+     * packets, the server is expected to send register values for all registers (for "g" packets) or for a single
+     * register (for "p" packets).
+     */
+    class ReadGeneralRegisters: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * "p" packets include a register number to indicate which register is requested for reading. When this is set,
+         * the server is expected to respond with only the value of the requested register.
+         *
+         * If the register number is not supplied (as is the case with "g" packets), the server is expected to respond
+         * with values for all registers.
+         */
+        std::optional<int> registerNumber;
+
+        ReadGeneralRegisters(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/ReadMemory.cpp b/src/DebugServers/GdbRsp/CommandPackets/ReadMemory.cpp
new file mode 100644
index 00000000..e24d1b37
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/ReadMemory.cpp
@@ -0,0 +1,43 @@
+#include "ReadMemory.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+using namespace Bloom::Exceptions;
+
+void ReadMemory::init() {
+    if (this->data.size() < 4) {
+        throw Exception("Invalid packet length");
+    }
+
+    auto packetString = QString::fromLocal8Bit(
+        reinterpret_cast<const char*>(this->data.data() + 1),
+        static_cast<int>(this->data.size() - 1)
+    );
+
+    /*
+     * The read memory ('m') packet consists of two segments, an address and a number of bytes to read.
+     * These are separated by a comma character.
+     */
+    auto packetSegments = packetString.split(",");
+
+    if (packetSegments.size() != 2) {
+        throw Exception("Unexpected number of segments in packet data: " + std::to_string(packetSegments.size()));
+    }
+
+    bool conversionStatus = false;
+    this->startAddress = packetSegments.at(0).toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to parse start address from read memory packet data");
+    }
+
+    this->bytes = packetSegments.at(1).toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to parse read length from read memory packet data");
+    }
+}
+
+void ReadMemory::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/ReadMemory.hpp b/src/DebugServers/GdbRsp/CommandPackets/ReadMemory.hpp
new file mode 100644
index 00000000..64148582
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/ReadMemory.hpp
@@ -0,0 +1,42 @@
+#pragma once
+
+#include <cstdint>
+#include <optional>
+
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The ReadMemory class implements a structure for "m" packets. Upon receiving these packets, the server is
+     * expected to read memory from the target and send it the client.
+     */
+    class ReadMemory: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * The startAddress sent from the GDB client may include additional bits used to indicate the memory type.
+         * These bits have to be removed from the address before it can be used as a start address. This is not done
+         * here, as it's target specific.
+         *
+         * For an example of where GDB does this, see the AvrGdbRsp class.
+         */
+        std::uint32_t startAddress;
+
+        /**
+         * Number of bytes to read.
+         */
+        std::uint32_t bytes;
+
+        ReadMemory(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.cpp b/src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.cpp
new file mode 100644
index 00000000..e117756b
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.cpp
@@ -0,0 +1,38 @@
+#include <QtCore/QString>
+
+#include "RemoveBreakpoint.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+using namespace Bloom::Exceptions;
+
+void RemoveBreakpoint::init() {
+    if (data.size() < 6) {
+        throw Exception("Unexpected RemoveBreakpoint packet size");
+    }
+
+    // z0 = SW breakpoint, z1 = HW breakpoint
+    this->type = (data[1] == 0) ? BreakpointType::SOFTWARE_BREAKPOINT : (data[1] == 1) ?
+        BreakpointType::HARDWARE_BREAKPOINT : BreakpointType::UNKNOWN;
+
+    auto packetData = QString::fromLocal8Bit(
+        reinterpret_cast<const char*>(this->data.data() + 2),
+        static_cast<int>(this->data.size() - 2)
+    );
+
+    auto packetSegments = packetData.split(",");
+    if (packetSegments.size() < 3) {
+        throw Exception("Unexpected number of packet segments in RemoveBreakpoint packet");
+    }
+
+    bool conversionStatus = true;
+    this->address = packetSegments.at(1).toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to convert address hex value from RemoveBreakpoint packet.");
+    }
+}
+
+void RemoveBreakpoint::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.hpp b/src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.hpp
new file mode 100644
index 00000000..24ff9771
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/RemoveBreakpoint.hpp
@@ -0,0 +1,44 @@
+#pragma once
+
+#include <cstdint>
+#include <string>
+#include <set>
+
+#include "../BreakpointType.hpp"
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb {
+    enum class Feature: int;
+}
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The RemoveBreakpoint class implements the structure for "z" command packets. Upon receiving this command, the
+     * server is expected to remove a breakpoint at the specified address.
+     */
+    class RemoveBreakpoint: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * Breakpoint type (Software or Hardware)
+         */
+        BreakpointType type = BreakpointType::UNKNOWN;
+
+        /**
+         * Address at which the breakpoint should be located.
+         */
+        std::uint32_t address;
+
+        RemoveBreakpoint(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            this->init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.cpp b/src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.cpp
new file mode 100644
index 00000000..43289fb6
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.cpp
@@ -0,0 +1,39 @@
+#include "SetBreakpoint.hpp"
+#include <QtCore/QString>
+#include <QtCore/QStringList>
+
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+using namespace Bloom::Exceptions;
+
+void SetBreakpoint::init() {
+    if (data.size() < 6) {
+        throw Exception("Unexpected SetBreakpoint packet size");
+    }
+
+    // Z0 = SW breakpoint, Z1 = HW breakpoint
+    this->type = (data[1] == 0) ? BreakpointType::SOFTWARE_BREAKPOINT : (data[1] == 1) ?
+        BreakpointType::HARDWARE_BREAKPOINT : BreakpointType::UNKNOWN;
+
+    auto packetData = QString::fromLocal8Bit(
+        reinterpret_cast<const char*>(this->data.data() + 2),
+        static_cast<int>(this->data.size() - 2)
+    );
+
+    auto packetSegments = packetData.split(",");
+    if (packetSegments.size() < 3) {
+        throw Exception("Unexpected number of packet segments in SetBreakpoint packet");
+    }
+
+    bool conversionStatus = true;
+    this->address = packetSegments.at(1).toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to convert address hex value from SetBreakpoint packet.");
+    }
+}
+
+void SetBreakpoint::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.hpp b/src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.hpp
new file mode 100644
index 00000000..e39bcdc1
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/SetBreakpoint.hpp
@@ -0,0 +1,44 @@
+#pragma once
+
+#include <cstdint>
+#include <string>
+#include <set>
+
+#include "../BreakpointType.hpp"
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb {
+    enum class Feature: int;
+}
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The SetBreakpoint class implements the structure for "Z" command packets. Upon receiving this command, the
+     * server is expected to set a breakpoint at the specified address.
+     */
+    class SetBreakpoint: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * Breakpoint type (Software or Hardware)
+         */
+        BreakpointType type = BreakpointType::UNKNOWN;
+
+        /**
+         * Address at which the breakpoint should be located.
+         */
+        std::uint32_t address;
+
+        SetBreakpoint(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            this->init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/StepExecution.cpp b/src/DebugServers/GdbRsp/CommandPackets/StepExecution.cpp
new file mode 100644
index 00000000..626f9900
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/StepExecution.cpp
@@ -0,0 +1,18 @@
+#include <cstdint>
+
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+#include "StepExecution.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void StepExecution::init() {
+    if (this->data.size() > 1) {
+        this->fromProgramCounter = static_cast<std::uint32_t>(
+            std::stoi(std::string(this->data.begin(), this->data.end()), nullptr, 16)
+        );
+    }
+}
+
+void StepExecution::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/StepExecution.hpp b/src/DebugServers/GdbRsp/CommandPackets/StepExecution.hpp
new file mode 100644
index 00000000..03bba741
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/StepExecution.hpp
@@ -0,0 +1,32 @@
+#pragma once
+
+#include <optional>
+
+#include "CommandPacket.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The StepExecution class implements the structure for "s" command packets. Upon receiving this command, the
+     * server is expected to step execution on the target.
+     */
+    class StepExecution: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * The address from which to begin the step.
+         */
+        std::optional<size_t> fromProgramCounter;
+
+        StepExecution(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.cpp b/src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.cpp
new file mode 100644
index 00000000..0aaebbda
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.cpp
@@ -0,0 +1,43 @@
+#include "SupportedFeaturesQuery.hpp"
+#include <QtCore/QString>
+
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+#include "../Feature.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void SupportedFeaturesQuery::init() {
+    /*
+     * For qSupported packets, supported and unsupported GDB features are reported in the packet
+     * data, where each GDB feature is separated by a semicolon.
+     */
+
+    // The "qSupported:" prefix occupies 11 bytes
+    if (data.size() > 11) {
+        auto packetData = QString::fromLocal8Bit(
+            reinterpret_cast<const char*>(this->data.data() + 11),
+            static_cast<int>(this->data.size() - 11)
+        );
+
+        auto featureList = packetData.split(";");
+        auto gdbFeatureMapping = getGdbFeatureToNameMapping();
+
+        for (int i = 0; i < featureList.size(); i++) {
+            auto featureString = featureList.at(i);
+
+            // We only care about supported features. Supported features will precede a '+' character.
+            if (featureString[featureString.size() - 1] == "+") {
+                featureString.remove("+");
+
+                auto feature = gdbFeatureMapping.valueAt(featureString.toStdString());
+                if (feature.has_value()) {
+                    this->supportedFeatures.insert(static_cast<decltype(feature)::value_type>(feature.value()));
+                }
+            }
+        }
+    }
+}
+
+void SupportedFeaturesQuery::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.hpp b/src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.hpp
new file mode 100644
index 00000000..7c791d99
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/SupportedFeaturesQuery.hpp
@@ -0,0 +1,46 @@
+#pragma once
+
+#include <string>
+#include <set>
+
+#include "CommandPacket.hpp"
+#include "../Feature.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+
+    /**
+     * The SupportedFeaturesQuery command packet is a query from the GDB client, requesting a list of GDB features
+     * supported by the GDB server. The body of this packet also contains a list GDB features that are supported or
+     * unsupported by the GDB client.
+     *
+     * The command packet is identified by its 'qSupported' prefix in the command packet data. Following the prefix is
+     * a list of GDB features that are supported/unsupported by the client. For more info on this command
+     * packet, see the GDP RSP documentation.
+     *
+     * Responses to this command packet should take the form of a ResponsePackets::SupportedFeaturesResponse.
+     */
+    class SupportedFeaturesQuery: public CommandPacket
+    {
+    private:
+        std::set<Feature> supportedFeatures;
+
+        void init();
+
+    public:
+        SupportedFeaturesQuery(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            this->init();
+        };
+
+        bool isFeatureSupported(const Feature& feature) const {
+            return this->supportedFeatures.find(feature) != this->supportedFeatures.end();
+        }
+
+        const std::set<Feature>& getSupportedFeatures() const {
+            return this->supportedFeatures;
+        }
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.cpp b/src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.cpp
new file mode 100644
index 00000000..d9ee45c6
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.cpp
@@ -0,0 +1,26 @@
+#include "WriteGeneralRegisters.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+
+void WriteGeneralRegisters::init() {
+    // The P packet updates a single register
+    auto packet = std::string(this->data.begin(), this->data.end());
+
+    if (packet.size() < 6) {
+        throw Exception("Invalid P command packet - insufficient data in packet.");
+    }
+
+    if (packet.find("=") == std::string::npos) {
+        throw Exception("Invalid P command packet - unexpected format");
+    }
+
+    auto packetSegments = QString::fromStdString(packet).split("=");
+    this->registerNumber = packetSegments.front().mid(1).toUInt(nullptr, 16);
+    this->registerValue = this->hexToData(packetSegments.back().toStdString());
+    std::reverse(this->registerValue.begin(), this->registerValue.end());
+}
+
+void WriteGeneralRegisters::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.hpp b/src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.hpp
new file mode 100644
index 00000000..0ffeb67a
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/WriteGeneralRegisters.hpp
@@ -0,0 +1,34 @@
+#pragma once
+
+#include <optional>
+
+#include "CommandPacket.hpp"
+#include "src/Targets/TargetRegister.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+    using Bloom::Targets::TargetRegister;
+    using Bloom::Targets::TargetRegisterMap;
+
+    /**
+     * The WriteGeneralRegisters class implements the structure for "G" and "P" packets. Upon receiving this packet,
+     * server is expected to write register values to the target.
+     */
+    class WriteGeneralRegisters: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        TargetRegisterMap registerMap;
+        int registerNumber;
+        std::vector<unsigned char> registerValue;
+
+        WriteGeneralRegisters(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/WriteMemory.cpp b/src/DebugServers/GdbRsp/CommandPackets/WriteMemory.cpp
new file mode 100644
index 00000000..c9f48d8a
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/WriteMemory.cpp
@@ -0,0 +1,52 @@
+#include "WriteMemory.hpp"
+#include "src/DebugServers/GdbRsp/GdbRspDebugServer.hpp"
+
+using namespace Bloom::DebugServers::Gdb::CommandPackets;
+using namespace Bloom::Exceptions;
+
+void WriteMemory::init() {
+    if (this->data.size() < 4) {
+        throw Exception("Invalid packet length");
+    }
+
+    auto packetString = QString::fromLocal8Bit(
+        reinterpret_cast<const char*>(this->data.data() + 1),
+        static_cast<int>(this->data.size() - 1)
+    );
+
+    /*
+     * The write memory ('M') packet consists of three segments, an address, a length and a buffer.
+     * The address and length are separated by a comma character, and the buffer proceeds a colon character.
+     */
+    auto packetSegments = packetString.split(",");
+    if (packetSegments.size() != 2) {
+        throw Exception("Unexpected number of segments in packet data: " + std::to_string(packetSegments.size()));
+    }
+
+    bool conversionStatus = false;
+    this->startAddress = packetSegments.at(0).toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to parse start address from write memory packet data");
+    }
+
+    auto lengthAndBufferSegments = packetSegments.at(1).split(":");
+    if (lengthAndBufferSegments.size() != 2) {
+        throw Exception("Unexpected number of segments in packet data: " + std::to_string(lengthAndBufferSegments.size()));
+    }
+
+    auto bufferSize = lengthAndBufferSegments.at(0).toUInt(&conversionStatus, 16);
+    if (!conversionStatus) {
+        throw Exception("Failed to parse write length from write memory packet data");
+    }
+
+    this->buffer = this->hexToData(lengthAndBufferSegments.at(1).toStdString());
+
+    if (this->buffer.size() != bufferSize) {
+        throw Exception("Buffer size does not match length value given in write memory packet");
+    }
+}
+
+void WriteMemory::dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) {
+    gdbRspDebugServer.handleGdbPacket(*this);
+}
diff --git a/src/DebugServers/GdbRsp/CommandPackets/WriteMemory.hpp b/src/DebugServers/GdbRsp/CommandPackets/WriteMemory.hpp
new file mode 100644
index 00000000..6d0095f3
--- /dev/null
+++ b/src/DebugServers/GdbRsp/CommandPackets/WriteMemory.hpp
@@ -0,0 +1,38 @@
+#pragma once
+
+#include <cstdint>
+#include <optional>
+
+#include "CommandPacket.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::DebugServers::Gdb::CommandPackets
+{
+    using namespace Bloom::DebugServers::Gdb;
+    using Bloom::Targets::TargetMemoryBuffer;
+
+    /**
+     * The WriteMemory class implements the structure for "M" packets. Upon receiving this packet, the server is
+     * expected to write data to the target's memory, at the specified start address.
+     */
+    class WriteMemory: public CommandPacket
+    {
+    private:
+        void init();
+
+    public:
+        /**
+         * Like with the ReadMemory command packet, the start address carries additional bits that indicate
+         * the memory type.
+         */
+        std::uint32_t startAddress;
+
+        TargetMemoryBuffer buffer;
+
+        WriteMemory(std::vector<unsigned char> rawPacket) : CommandPacket(rawPacket) {
+            init();
+        };
+
+        virtual void dispatchToHandler(Gdb::GdbRspDebugServer& gdbRspDebugServer) override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Connection.cpp b/src/DebugServers/GdbRsp/Connection.cpp
new file mode 100644
index 00000000..2d37a309
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Connection.cpp
@@ -0,0 +1,208 @@
+#include <sys/socket.h>
+#include <sys/epoll.h>
+#include <errno.h>
+#include <fcntl.h>
+
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "src/Exceptions/DebugServerInterrupted.hpp"
+#include "Connection.hpp"
+#include "Exceptions/ClientDisconnected.hpp"
+#include "Exceptions/ClientCommunicationError.hpp"
+#include "CommandPackets/CommandPacketFactory.hpp"
+
+using namespace Bloom::DebugServers::Gdb;
+using namespace Bloom::DebugServers::Gdb::Exceptions;
+using namespace Bloom::Exceptions;
+
+void Connection::accept(int serverSocketFileDescriptor) {
+    int socketAddressLength = sizeof(this->socketAddress);
+
+    this->socketFileDescriptor = ::accept(
+        serverSocketFileDescriptor,
+        (sockaddr*)& (this->socketAddress),
+        (socklen_t*)& socketAddressLength
+    );
+
+    if (this->socketFileDescriptor == -1) {
+        throw Exception("Failed to accept GDB Remote Serial Protocol connection");
+    }
+
+    ::fcntl(
+        this->socketFileDescriptor,
+        F_SETFL,
+        fcntl(this->socketFileDescriptor, F_GETFL, 0) | O_NONBLOCK
+    );
+
+    // Create event FD
+    this->eventFileDescriptor = ::epoll_create(2);
+    struct epoll_event event = {};
+    event.events = EPOLLIN;
+    event.data.fd = this->socketFileDescriptor;
+
+    if (::epoll_ctl(this->eventFileDescriptor, EPOLL_CTL_ADD, this->socketFileDescriptor, &event) != 0) {
+        throw Exception("Failed to create event FD for GDB client connection - could not add client connection "
+                        "socket FD to epoll FD");
+    }
+
+    this->enableReadInterrupts();
+}
+
+void Connection::disableReadInterrupts() {
+    if (::epoll_ctl(
+        this->eventFileDescriptor,
+        EPOLL_CTL_DEL,
+        this->interruptEventNotifier->getFileDescriptor(),
+        NULL) != 0
+    ) {
+        throw Exception("Failed to disable GDB client connection read interrupts - epoll_ctl failed");
+    }
+
+    this->readInterruptEnabled = false;
+}
+
+void Connection::enableReadInterrupts() {
+    auto interruptFileDescriptor = this->interruptEventNotifier->getFileDescriptor();
+    struct epoll_event event = {};
+    event.events = EPOLLIN;
+    event.data.fd = interruptFileDescriptor;
+
+    if (::epoll_ctl(this->eventFileDescriptor, EPOLL_CTL_ADD, interruptFileDescriptor, &event) != 0) {
+        throw Exception("Failed to enable GDB client connection read interrupts - epoll_ctl failed");
+    }
+
+    this->readInterruptEnabled = true;
+}
+
+void Connection::close() noexcept {
+    if (this->socketFileDescriptor > 0) {
+        ::close(this->socketFileDescriptor);
+        this->socketFileDescriptor = 0;
+    }
+}
+
+void Connection::write(const std::vector<unsigned char>& buffer) {
+    Logger::debug("Writing packet: " + std::string(buffer.begin(), buffer.end()));
+    if (::write(this->socketFileDescriptor, buffer.data(), buffer.size()) == -1) {
+        if (errno == EPIPE || errno == ECONNRESET) {
+            // Connection was closed
+            throw ClientDisconnected();
+
+        } else {
+            throw ClientCommunicationError("Failed to write " + std::to_string(buffer.size())
+            + " bytes to GDP client socket - error no: " + std::to_string(errno));
+        }
+    }
+}
+
+void Connection::writePacket(const ResponsePacket& packet) {
+    // Write the packet repeatedly until the GDB client acknowledges it.
+    int attempts = 0;
+    auto rawPacket = packet.toRawPacket();
+
+    do {
+        if (attempts > 10) {
+            throw ClientCommunicationError("Failed to write GDB response packet - client failed to "
+               "acknowledge receipt - retry limit reached");
+        }
+
+        this->write(rawPacket);
+        attempts++;
+
+    } while(this->readSingleByte(false).value_or(0) != '+');
+}
+
+std::vector<unsigned char> Connection::read(size_t bytes, bool interruptible, std::optional<int> msTimeout) {
+    auto output = std::vector<unsigned char>();
+    constexpr size_t bufferSize = 1024;
+    std::array<unsigned char, bufferSize> buffer;
+    ssize_t bytesRead;
+
+    if (interruptible) {
+        if (this->readInterruptEnabled != interruptible) {
+            this->enableReadInterrupts();
+        } else {
+            // Clear any previous interrupts that are still hanging around
+            this->interruptEventNotifier->clear();
+        }
+    }
+
+    if (this->readInterruptEnabled != interruptible && !interruptible) {
+        this->disableReadInterrupts();
+    }
+
+    std::array<struct epoll_event, 1> events = {};
+
+    int eventCount = ::epoll_wait(
+        this->eventFileDescriptor,
+        events.data(),
+        1,
+        msTimeout.value_or(-1)
+    );
+
+    if (eventCount > 0) {
+        for (size_t i = 0; i < eventCount; i++) {
+            auto fileDescriptor = events[i].data.fd;
+
+            if (fileDescriptor == this->interruptEventNotifier->getFileDescriptor()) {
+                // Interrupted
+                this->interruptEventNotifier->clear();
+                throw DebugServerInterrupted();
+            }
+        }
+
+        size_t bytesToRead = (bytes > bufferSize || bytes == 0) ? bufferSize : bytes;
+        while (bytesToRead > 0 && (bytesRead = ::read(this->socketFileDescriptor, buffer.data(), bytesToRead)) > 0) {
+            output.insert(output.end(), buffer.begin(), buffer.begin() + bytesRead);
+
+            if (bytesRead < bytesToRead) {
+                // No more data available
+                break;
+            }
+
+            bytesToRead = ((bytes - output.size()) > bufferSize || bytes == 0) ? bufferSize : (bytes - output.size());
+        }
+
+        if (output.empty()) {
+            // EOF means the client has disconnected
+            throw ClientDisconnected();
+        }
+    }
+
+    return output;
+}
+
+std::optional<unsigned char> Connection::readSingleByte(bool interruptible) {
+    auto bytes = this->read(1, interruptible, 300);
+
+    if (!bytes.empty()) {
+        return bytes.front();
+    }
+
+    return std::nullopt;
+}
+
+std::vector<std::unique_ptr<CommandPacket>> Connection::readPackets() {
+    auto buffer = this->read();
+    Logger::debug("GDB client data received (" + std::to_string(buffer.size()) + " bytes): " + std::string(buffer.begin(), buffer.end()));
+
+    auto rawPackets = CommandPacketFactory::extractRawPackets(buffer);
+    std::vector<std::unique_ptr<CommandPacket>> output;
+
+    for (const auto& rawPacket : rawPackets) {
+        try {
+            output.push_back(CommandPacketFactory::create(rawPacket));
+            this->write({'+'});
+
+        } catch (const ClientDisconnected& exception) {
+            throw exception;
+
+        } catch (const Exception& exception) {
+            Logger::error("Failed to parse GDB packet - " + exception.getMessage());
+            this->write({'-'});
+
+        }
+    }
+
+    return output;
+}
diff --git a/src/DebugServers/GdbRsp/Connection.hpp b/src/DebugServers/GdbRsp/Connection.hpp
new file mode 100644
index 00000000..2058ab3e
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Connection.hpp
@@ -0,0 +1,137 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+#include <netinet/in.h>
+#include <queue>
+#include <array>
+#include <sys/socket.h>
+#include <arpa/inet.h>
+
+#include "src/Helpers/EventNotifier.hpp"
+#include "src/DebugServers/GdbRsp/CommandPackets/CommandPacket.hpp"
+#include "src/DebugServers/GdbRsp/ResponsePackets/ResponsePacket.hpp"
+
+namespace Bloom::DebugServers::Gdb
+{
+    using namespace CommandPackets;
+    using namespace ResponsePackets;
+
+    /**
+     * The Connection class represents an active connection between the GDB RSP server and client.
+     *
+     * All interfacing with the GDB client should take place here.
+     */
+    class Connection
+    {
+    private:
+        int socketFileDescriptor = -1;
+        int eventFileDescriptor = -1;
+
+        struct sockaddr_in socketAddress = {};
+        int maxPacketSize = 1024;
+
+        /**
+         * The interruptEventNotifier allows us to interrupt blocking IO calls on the GDB debug server.
+         * Under the hood, this is just a wrapper for a Linux event notifier. See the EventNotifier class for more.
+         */
+        std::shared_ptr<EventNotifier> interruptEventNotifier = nullptr;
+        bool readInterruptEnabled = false;
+
+        /**
+         * Reads data from the client into a raw buffer.
+         *
+         * @param bytes
+         *  Number of bytes to read.
+         *
+         * @param interruptible
+         *  If this flag is set to false, no other component within Bloom will be able to gracefully interrupt
+         *  the read (via means of this->interruptEventNotifier). This flag has no affect if this->readInterruptEnabled
+         *  is false.
+         *
+         * @param msTimeout
+         *  The timeout in milliseconds. If not supplied, no timeout will be applied.
+         *
+         * @return
+         */
+        std::vector<unsigned char> read(std::size_t bytes = 0, bool interruptible = true, std::optional<int> msTimeout = std::nullopt);
+
+        /**
+         * Does the same as Connection::read(), but only reads a single byte.
+         *
+         * @param interruptible
+         *  See Connection::read().
+         *
+         * @return
+         */
+        std::optional<unsigned char> readSingleByte(bool interruptible = true);
+
+        /**
+         * Writes data from a raw buffer to the client connection.
+         *
+         * @param buffer
+         */
+        void write(const std::vector<unsigned char>& buffer);
+
+        void disableReadInterrupts();
+
+        void enableReadInterrupts();
+
+    public:
+        /**
+         * When the GDB client is waiting for the target to reach a breakpoint, this is set to true so we know when to
+         * notify the client.
+         *
+         * @TODO: This is pretty gross. Consider rethinking it.
+         */
+        bool waitingForBreak = false;
+
+        Connection(std::shared_ptr<EventNotifier> interruptEventNotifier)
+        : interruptEventNotifier(interruptEventNotifier) {};
+
+        /**
+         * Accepts a connection on serverSocketFileDescriptor.
+         *
+         * @param serverSocketFileDescriptor
+         */
+        void accept(int serverSocketFileDescriptor);
+
+        /**
+         * Closes the connection with the client.
+         */
+        void close() noexcept;
+
+        /**
+         * Obtains the human readable IP address of the connected client.
+         *
+         * @return
+         */
+        std::string getIpAddress() {
+            std::array<char, INET_ADDRSTRLEN> ipAddress;
+
+            if (::inet_ntop(AF_INET, &(socketAddress.sin_addr), ipAddress.data(), INET_ADDRSTRLEN) == nullptr) {
+                throw Exceptions::Exception("Failed to convert client IP address to text form.");
+            }
+
+            return std::string(ipAddress.data());
+        };
+
+        /**
+         * Waits for incoming data from the client and returns any received command packets.
+         *
+         * @return
+         */
+        std::vector<std::unique_ptr<CommandPacket>> readPackets();
+
+        /**
+         * Sends a response packet to the client.
+         *
+         * @param packet
+         */
+        void writePacket(const ResponsePacket& packet);
+
+        int getMaxPacketSize() {
+            return this->maxPacketSize;
+        }
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Exceptions/ClientCommunicationError.hpp b/src/DebugServers/GdbRsp/Exceptions/ClientCommunicationError.hpp
new file mode 100644
index 00000000..2fe8b7e1
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Exceptions/ClientCommunicationError.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "src/Exceptions/Exception.hpp"
+
+namespace Bloom::DebugServers::Gdb::Exceptions
+{
+    using namespace Bloom::Exceptions;
+
+    /**
+     * In the event that communication between the GDB RSP client and Bloom fails, a ClientCommunicationFailure
+     * exception should be thrown. The GDB debug server handles this by severing the connection.
+     *
+     * See GdbRspDebugServer::serve() for handling code.
+     */
+    class ClientCommunicationError: public Exception
+    {
+    public:
+        explicit ClientCommunicationError(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit ClientCommunicationError(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+
+        explicit ClientCommunicationError() = default;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Exceptions/ClientDisconnected.hpp b/src/DebugServers/GdbRsp/Exceptions/ClientDisconnected.hpp
new file mode 100644
index 00000000..6f190c66
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Exceptions/ClientDisconnected.hpp
@@ -0,0 +1,29 @@
+#pragma once
+
+#include "src/Exceptions/Exception.hpp"
+
+namespace Bloom::DebugServers::Gdb::Exceptions
+{
+    using namespace Bloom::Exceptions;
+
+    /**
+     * When a GDB RSP client unexpectedly drops the connection in the middle of an IO operation, a ClientDisconnected
+     * exception should be thrown. The GDB debug server handles this by clearing the connection and waiting for a new
+     * one.
+     *
+     * See GdbRspDebugServer::serve() for handling code.
+     */
+    class ClientDisconnected: public Exception
+    {
+    public:
+        explicit ClientDisconnected(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit ClientDisconnected(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+
+        explicit ClientDisconnected() = default;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Exceptions/ClientNotSupported.hpp b/src/DebugServers/GdbRsp/Exceptions/ClientNotSupported.hpp
new file mode 100644
index 00000000..1796834c
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Exceptions/ClientNotSupported.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "src/Exceptions/Exception.hpp"
+
+namespace Bloom::DebugServers::Gdb::Exceptions
+{
+    using namespace Bloom::Exceptions;
+
+    /**
+     * In the event that the GDB debug server determines that the connected client cannot be served,
+     * the ClientNotSupported exception should be thrown.
+     *
+     * See GdbRspDebugServer::serve() for handling code.
+     */
+    class ClientNotSupported: public Exception
+    {
+    public:
+        explicit ClientNotSupported(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit ClientNotSupported(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+
+        explicit ClientNotSupported() = default;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Feature.hpp b/src/DebugServers/GdbRsp/Feature.hpp
new file mode 100644
index 00000000..3091ae4e
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Feature.hpp
@@ -0,0 +1,23 @@
+#pragma once
+
+#include "src/Helpers/BiMap.hpp"
+
+namespace Bloom::DebugServers::Gdb
+{
+    enum class Feature: int
+    {
+        SOFTWARE_BREAKPOINTS,
+        HARDWARE_BREAKPOINTS,
+        PACKET_SIZE,
+        MEMORY_MAP_READ,
+    };
+
+    static inline BiMap<Feature, std::string> getGdbFeatureToNameMapping() {
+        return BiMap<Feature, std::string>{
+            {Feature::HARDWARE_BREAKPOINTS, "hwbreak"},
+            {Feature::SOFTWARE_BREAKPOINTS, "swbreak"},
+            {Feature::PACKET_SIZE, "PacketSize"},
+            {Feature::MEMORY_MAP_READ, "qXfer:memory-map:read"},
+        };
+    }
+}
diff --git a/src/DebugServers/GdbRsp/GdbRspDebugServer.cpp b/src/DebugServers/GdbRsp/GdbRspDebugServer.cpp
new file mode 100644
index 00000000..bb9302ec
--- /dev/null
+++ b/src/DebugServers/GdbRsp/GdbRspDebugServer.cpp
@@ -0,0 +1,404 @@
+#include <sys/socket.h>
+#include <sys/epoll.h>
+#include <cstdint>
+
+#include "GdbRspDebugServer.hpp"
+#include "Exceptions/ClientDisconnected.hpp"
+#include "Exceptions/ClientNotSupported.hpp"
+#include "Exceptions/ClientCommunicationError.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::DebugServers::Gdb;
+using namespace Exceptions;
+
+void GdbRspDebugServer::init() {
+    auto ipAddress = this->debugServerConfig.jsonObject.find("ipAddress")->toString().toStdString();
+    auto port = static_cast<std::uint16_t>(this->debugServerConfig.jsonObject.find("port")->toInt());
+
+    if (!ipAddress.empty()) {
+        this->listeningAddress = ipAddress;
+    }
+
+    if (port > 0) {
+        this->listeningPortNumber = port;
+    }
+
+    this->socketAddress.sin_family = AF_INET;
+    this->socketAddress.sin_port = htons(this->listeningPortNumber);
+
+    if (::inet_pton(AF_INET, this->listeningAddress.c_str(), &(this->socketAddress.sin_addr)) == 0) {
+        // Invalid IP address
+        throw InvalidConfig("Invalid IP address provided in config file: (\"" + this->listeningAddress + "\")");
+    }
+
+    int socketFileDescriptor;
+
+    if ((socketFileDescriptor = ::socket(AF_INET, SOCK_STREAM, 0)) == 0) {
+        throw Exception("Failed to create socket file descriptor.");
+    }
+
+    if (::setsockopt(
+        socketFileDescriptor,
+        SOL_SOCKET,
+        SO_REUSEADDR,
+       &this->enableReuseAddressSocketOption,
+        sizeof(this->enableReuseAddressSocketOption)) < 0
+    ) {
+        Logger::error("Failed to set socket SO_REUSEADDR option.");
+    }
+
+    if (::bind(
+        socketFileDescriptor,
+        reinterpret_cast<const sockaddr*>(&(this->socketAddress)),
+        sizeof(this->socketAddress)
+        ) < 0
+    ) {
+        throw Exception("Failed to bind address.");
+    }
+
+    this->serverSocketFileDescriptor = socketFileDescriptor;
+
+    this->eventFileDescriptor = ::epoll_create(2);
+    struct epoll_event event = {};
+    event.events = EPOLLIN;
+    event.data.fd = this->serverSocketFileDescriptor;
+
+    if (::epoll_ctl(this->eventFileDescriptor, EPOLL_CTL_ADD, this->serverSocketFileDescriptor, &event) != 0) {
+        throw Exception("Failed epoll_ctl server socket");
+    }
+
+    if (this->interruptEventNotifier != nullptr) {
+        auto interruptFileDescriptor = this->interruptEventNotifier->getFileDescriptor();
+        event.events = EPOLLIN;
+        event.data.fd = interruptFileDescriptor;
+
+        if (::epoll_ctl(this->eventFileDescriptor, EPOLL_CTL_ADD, interruptFileDescriptor, &event) != 0) {
+            throw Exception("Failed epoll_ctl interrupt event fd");
+        }
+    }
+
+    Logger::info("GDB RSP address: " + this->listeningAddress);
+    Logger::info("GDB RSP port: " + std::to_string(this->listeningPortNumber));
+
+    this->eventListener->registerCallbackForEventType<Events::TargetExecutionStopped>(
+        std::bind(&GdbRspDebugServer::onTargetExecutionStopped, this, std::placeholders::_1)
+    );
+}
+
+void GdbRspDebugServer::serve() {
+    try {
+        if (!this->clientConnection.has_value()) {
+            Logger::info("Waiting for GDB RSP connection");
+            this->waitForConnection();
+        }
+
+        auto packets = this->clientConnection->readPackets();
+
+        for (auto& packet : packets) {
+            // Double-dispatch to appropriate handler
+            packet->dispatchToHandler(*this);
+        }
+
+    } catch (const ClientDisconnected&) {
+        Logger::info("GDB RSP client disconnected");
+        this->closeClientConnection();
+        return;
+
+    } catch (const ClientCommunicationError& exception) {
+        Logger::error("GDB client communication error - " + exception.getMessage() + " - closing connection");
+        this->closeClientConnection();
+        return;
+
+    } catch (const ClientNotSupported& exception) {
+        Logger::error("Invalid GDB client - " + exception.getMessage() + " - closing connection");
+        this->closeClientConnection();
+        return;
+
+    } catch (const DebugServerInterrupted&) {
+        // Server was interrupted
+        Logger::debug("GDB RSP interrupted");
+        return;
+    }
+}
+
+void GdbRspDebugServer::waitForConnection() {
+    if (::listen(this->serverSocketFileDescriptor, 3) != 0) {
+        throw Exception("Failed to listen on server socket");
+    }
+
+    std::array<struct epoll_event, 5> events = {};
+    int eventCount = ::epoll_wait(
+        this->eventFileDescriptor,
+        events.data(),
+        5,
+        -1
+    );
+
+    if (eventCount > 0) {
+        for (size_t i = 0; i < eventCount; i++) {
+            auto fileDescriptor = events[i].data.fd;
+
+            if (fileDescriptor == this->interruptEventNotifier->getFileDescriptor()) {
+                // Interrupted
+                this->interruptEventNotifier->clear();
+                throw DebugServerInterrupted();
+            }
+        }
+
+        this->clientConnection = Connection(this->interruptEventNotifier);
+        this->clientConnection->accept(this->serverSocketFileDescriptor);
+
+        Logger::info("Accepted GDP RSP connection from " + this->clientConnection->getIpAddress());
+        this->eventManager.triggerEvent(std::make_shared<Events::DebugSessionStarted>());
+    } else {
+        // This method should not return until a connection has been established (or an exception is thrown)
+        return this->waitForConnection();
+    }
+}
+
+void GdbRspDebugServer::close() {
+    this->closeClientConnection();
+
+    if (this->serverSocketFileDescriptor > 0) {
+        ::close(this->serverSocketFileDescriptor);
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPacket& packet) {
+    auto packetData = packet.getData();
+    auto packetString = std::string(packetData.begin(), packetData.end());
+
+    if (packetString[0] == '?') {
+        // Status report
+        this->clientConnection->writePacket(TargetStopped(Signal::TRAP));
+
+    } else if (packetString.find("qAttached") == 0) {
+        Logger::debug("Handling qAttached");
+        this->clientConnection->writePacket(ResponsePacket({1}));
+
+    } else {
+        Logger::debug("Unknown GDB RSP packet: " + packetString + " - returning empty response");
+
+        // Respond with an empty packet
+        this->clientConnection->writePacket(ResponsePacket({0}));
+    }
+}
+
+void GdbRspDebugServer::onTargetExecutionStopped(EventPointer<Events::TargetExecutionStopped>) {
+    if (this->clientConnection.has_value() && this->clientConnection->waitingForBreak) {
+        this->clientConnection->writePacket(TargetStopped(Signal::TRAP));
+        this->clientConnection->waitingForBreak = false;
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::SupportedFeaturesQuery& packet) {
+    Logger::debug("Handling QuerySupport packet");
+
+    if (!packet.isFeatureSupported(Feature::HARDWARE_BREAKPOINTS)
+        && !packet.isFeatureSupported(Feature::SOFTWARE_BREAKPOINTS)) {
+        // All GDB clients are expected to support breakpoints!
+        throw ClientNotSupported("GDB client does not support HW or SW breakpoints");
+    }
+
+    // Respond with a SupportedFeaturesResponse packet, listing all supported GDB features by Bloom
+    auto response = ResponsePackets::SupportedFeaturesResponse({
+       {Feature::SOFTWARE_BREAKPOINTS, std::nullopt},
+       {Feature::PACKET_SIZE, std::to_string(this->clientConnection->getMaxPacketSize())},
+    });
+
+    this->clientConnection->writePacket(response);
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::ReadGeneralRegisters& packet) {
+    Logger::debug("Handling ReadGeneralRegisters packet");
+
+    try {
+        auto descriptors = TargetRegisterDescriptors();
+
+        if (packet.registerNumber.has_value()) {
+            Logger::debug("Reading register number: " + std::to_string(packet.registerNumber.value()));
+            descriptors.push_back(this->getRegisterDescriptorFromNumber(packet.registerNumber.value()));
+
+        } else {
+            // Read all descriptors
+            auto descriptorMapping = this->getRegisterNumberToDescriptorMapping();
+            for (auto& descriptor : descriptorMapping.getMap()) {
+                descriptors.push_back(descriptor.second);
+            }
+        }
+
+        auto registerSet = this->readGeneralRegistersFromTarget(descriptors);
+        auto registerNumberToDescriptorMapping = this->getRegisterNumberToDescriptorMapping();
+
+        /*
+         * Remove any registers that are not mapped to GDB register numbers (as we won't know where to place
+         * them in our response to GDB). All registers that are expected from the GDB client should be mapped
+         * to register numbers.
+         *
+         * Registers that are not mapped to a GDB register number are presumed to be unknown to GDB, so GDB shouldn't
+         * complain about not receiving them.
+         */
+        registerSet.erase(
+            std::remove_if(
+                registerSet.begin(),
+                registerSet.end(),
+                [&registerNumberToDescriptorMapping](const TargetRegister& reg) {
+                    return !registerNumberToDescriptorMapping.contains(reg.descriptor);
+                }
+            ),
+            registerSet.end()
+        );
+
+        /*
+         * Sort each register by their respective GDB register number - this will leave us with a collection of
+         * registers in the order expected by the GDB client.
+         */
+        std::sort(
+            registerSet.begin(),
+            registerSet.end(),
+            [this, &registerNumberToDescriptorMapping](const TargetRegister& registerA, const TargetRegister& registerB) {
+                return registerNumberToDescriptorMapping.valueAt(registerA.descriptor) <
+                    registerNumberToDescriptorMapping.valueAt(registerB.descriptor);
+            }
+        );
+
+        /*
+         * Finally, implode the register values, convert to hexadecimal form and send to the GDB client.
+         */
+        auto registers = std::vector<unsigned char>();
+        for (const auto& reg : registerSet) {
+            registers.insert(registers.end(), reg.value.begin(), reg.value.end());
+        }
+
+        auto responseRegisters = Packet::dataToHex(registers);
+        this->clientConnection->writePacket(
+            ResponsePacket(std::vector<unsigned char>(responseRegisters.begin(), responseRegisters.end()))
+        );
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to read general registers - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::WriteGeneralRegisters& packet) {
+    Logger::debug("Handling WriteGeneralRegisters packet");
+
+    try {
+        auto registerDescriptor = this->getRegisterDescriptorFromNumber(packet.registerNumber);
+        this->writeGeneralRegistersToTarget({TargetRegister(registerDescriptor, packet.registerValue)});
+        this->clientConnection->writePacket(ResponsePacket({'O', 'K'}));
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to write general registers - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::ContinueExecution& packet) {
+    Logger::debug("Handling ContinueExecution packet");
+
+    try {
+        this->continueTargetExecution(packet.fromProgramCounter);
+        this->clientConnection->waitingForBreak = true;
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to continue execution on target - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::StepExecution& packet) {
+    Logger::debug("Handling StepExecution packet");
+
+    try {
+        this->stepTargetExecution(packet.fromProgramCounter);
+        this->clientConnection->waitingForBreak = true;
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to step execution on target - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::ReadMemory& packet) {
+    Logger::debug("Handling ReadMemory packet");
+
+    try {
+        auto memoryType = this->getMemoryTypeFromGdbAddress(packet.startAddress);
+        auto startAddress = this->removeMemoryTypeIndicatorFromGdbAddress(packet.startAddress);
+        auto memoryBuffer = this->readMemoryFromTarget(memoryType, startAddress, packet.bytes);
+
+        auto hexMemoryBuffer = Packet::dataToHex(memoryBuffer);
+        this->clientConnection->writePacket(
+            ResponsePacket(std::vector<unsigned char>(hexMemoryBuffer.begin(), hexMemoryBuffer.end()))
+        );
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to read memory from target - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::WriteMemory& packet) {
+    Logger::debug("Handling WriteMemory packet");
+
+    try {
+        auto memoryType = this->getMemoryTypeFromGdbAddress(packet.startAddress);
+        auto startAddress = this->removeMemoryTypeIndicatorFromGdbAddress(packet.startAddress);
+        this->writeMemoryToTarget(memoryType, startAddress, packet.buffer);
+
+        this->clientConnection->writePacket(ResponsePacket({'O', 'K'}));
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to write memory two target - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::SetBreakpoint& packet) {
+    Logger::debug("Handling SetBreakpoint packet");
+
+    try {
+        auto breakpoint = TargetBreakpoint();
+        breakpoint.address = packet.address;
+        this->setBreakpointOnTarget(breakpoint);
+
+        this->clientConnection->writePacket(ResponsePacket({'O', 'K'}));
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to set breakpoint on target - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::RemoveBreakpoint& packet) {
+    Logger::debug("Removing breakpoint at address " + std::to_string(packet.address));
+
+    try {
+        auto breakpoint = TargetBreakpoint();
+        breakpoint.address = packet.address;
+        this->removeBreakpointOnTarget(breakpoint);
+
+        this->clientConnection->writePacket(ResponsePacket({'O', 'K'}));
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to remove breakpoint on target - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
+
+void GdbRspDebugServer::handleGdbPacket(CommandPackets::InterruptExecution& packet) {
+    Logger::debug("Handling InterruptExecution packet");
+
+    try {
+        this->stopTargetExecution();
+        this->clientConnection->writePacket(TargetStopped(Signal::INTERRUPTED));
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to interrupt execution - " + exception.getMessage());
+        this->clientConnection->writePacket(ResponsePacket({'E', '0', '1'}));
+    }
+}
diff --git a/src/DebugServers/GdbRsp/GdbRspDebugServer.hpp b/src/DebugServers/GdbRsp/GdbRspDebugServer.hpp
new file mode 100644
index 00000000..a9e7272c
--- /dev/null
+++ b/src/DebugServers/GdbRsp/GdbRspDebugServer.hpp
@@ -0,0 +1,257 @@
+#pragma once
+
+#include <netinet/in.h>
+#include <arpa/inet.h>
+#include <vector>
+#include <queue>
+#include <cstdint>
+
+#include "../DebugServer.hpp"
+#include "Connection.hpp"
+#include "Signal.hpp"
+#include "Register.hpp"
+#include "Feature.hpp"
+#include "src/Helpers/EventNotifier.hpp"
+#include "src/Helpers/BiMap.hpp"
+#include "CommandPackets/CommandPacketFactory.hpp"
+#include "src/Targets/TargetRegister.hpp"
+
+// Response packets
+#include "ResponsePackets/SupportedFeaturesResponse.hpp"
+#include "ResponsePackets/TargetStopped.hpp"
+
+namespace Bloom::DebugServers::Gdb
+{
+    using Bloom::Targets::TargetRegisterType;
+    using Bloom::Targets::TargetRegisterDescriptor;
+
+    /**
+     * The GdbRspDebugServer is an implementation of a GDB server using the GDB Remote Serial Protocol.
+     *
+     * This DebugServer employs TCP/IP sockets to interface with GDB clients. The listening address can be configured
+     * in the user's project config file.
+     *
+     * See https://sourceware.org/gdb/onlinedocs/gdb/Remote-Protocol.html for more info on the GDB Remote
+     * Serial Protocol.
+     *
+     * @TODO: This could do with some cleaning.
+     */
+    class GdbRspDebugServer: public DebugServer
+    {
+    protected:
+        /**
+         * The port number for the GDB server to listen on.
+         *
+         * This will be pulled from the user's project configuration, if set. Otherwise it will default to whatever is
+         * set here.
+         */
+        std::uint16_t listeningPortNumber = 1055;
+
+        /**
+         * The address for the GDB server to listen on.
+         *
+         * Like the port number, this can also be pulled from the user's project configuration.
+         */
+        std::string listeningAddress = "127.0.0.1";
+
+        /**
+         * Listening socket address
+         */
+        struct sockaddr_in socketAddress = {};
+
+        /**
+         * Listening socket file descriptor
+         */
+        int serverSocketFileDescriptor = -1;
+
+        /**
+         * We don't listen on the this->serverSocketFileDescriptor directly. Instead, we add it to an epoll set, along
+         * with the this->interruptEventNotifier FD. This allows us to interrupt any blocking socket IO calls when
+         * we have other things to do.
+         *
+         * See GdbRspDebugServer::init()
+         * See DebugServer::interruptEventNotifier
+         * See EventNotifier
+         */
+        int eventFileDescriptor = -1;
+
+        /**
+         * SO_REUSEADDR option value for listening socket.
+         */
+        int enableReuseAddressSocketOption = 1;
+
+        /**
+         * The current active GDB client connection, if any.
+         */
+        std::optional<Connection> clientConnection;
+
+        /**
+         * Prepares the GDB server for listing on the selected address and port.
+         */
+        void init() override;
+
+        /**
+         * Closes any client connection as well as the listening socket file descriptor.
+         */
+        void close() override;
+
+        /**
+         * See DebugServer::serve()
+         */
+        void serve() override;
+
+        /**
+         * Waits for a GDB client to connect on the listening socket. Accepts the connection and
+         * sets this->clientConnection.
+         */
+        void waitForConnection();
+
+        void closeClientConnection() {
+            if (this->clientConnection.has_value()) {
+                this->clientConnection->close();
+                this->clientConnection = std::nullopt;
+                this->eventManager.triggerEvent(std::make_shared<Events::DebugSessionFinished>());
+            }
+        }
+
+        /**
+         * GDB clients encode memory type information (flash, ram, eeprom, etc) in memory addresses. This is typically
+         * hardcoded in the GDB client source. This method extracts memory type information from a given memory address.
+         * The specifics of the encoding may vary with targets, which is why this method is virtual. For an example,
+         * see the implementation of this method in AvrGdbRsp.
+         *
+         * @param address
+         * @return
+         */
+        virtual TargetMemoryType getMemoryTypeFromGdbAddress(std::uint32_t address) = 0;
+
+        /**
+         * Removes memory type information from memory address.
+         * See comment for GdbRspDebugServer::getMemoryTypeFromGdbAddress()
+         *
+         * @param address
+         * @return
+         */
+        virtual std::uint32_t removeMemoryTypeIndicatorFromGdbAddress(std::uint32_t address) = 0;
+
+        /**
+         * Like with the method of encoding memory type information onto memory addresses, GDB clients also expect
+         * a pre-defined set of registers. The defined set being dependant on the target. This is hardcoded in the the
+         * GDB client source. The order of the registers is also pre-defined in the GDB client.
+         *
+         * For an example, see the implementation of this method in the AvrGdbRsp class.
+         *
+         * @return
+         */
+        virtual BiMap<GdbRegisterNumber, TargetRegisterDescriptor> getRegisterNumberToDescriptorMapping() = 0;
+
+        /**
+         * Obtains the appropriate register descriptor from a register number.
+         *
+         * @param number
+         * @return
+         */
+        virtual TargetRegisterDescriptor getRegisterDescriptorFromNumber(GdbRegisterNumber number) {
+            auto mapping = this->getRegisterNumberToDescriptorMapping();
+
+            if (!mapping.contains(number)) {
+                throw Exception("Unknown register from GDB - register number (" + std::to_string(number)
+                    + ") not mapped to any register descriptor.");
+            }
+
+            return mapping.valueAt(number).value();
+        }
+
+    public:
+        GdbRspDebugServer(EventManager& eventManager) : DebugServer(eventManager) {};
+
+        std::string getName() const override {
+            return "GDB Remote Serial Protocol DebugServer";
+        };
+
+        /**
+         * If the GDB client is currently waiting for the target execution to stop, this event handler will issue
+         * a "stop reply" packet to the client once the target execution stops.
+         */
+        void onTargetExecutionStopped(EventPointer<Events::TargetExecutionStopped>);
+
+        /**
+         * Handles any other GDB command packet that has not been promoted to a more specific type.
+         * This would be packets like "?" and "qAttached".
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPacket& packet);
+
+        /**
+         * Handles the supported features query ("qSupported") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::SupportedFeaturesQuery& packet);
+
+        /**
+         * Handles the read registers ("g" and "p") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::ReadGeneralRegisters& packet);
+
+        /**
+         * Handles the write general registers ("G" and "P") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::WriteGeneralRegisters& packet);
+
+        /**
+         * Handles the continue execution ("c") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::ContinueExecution& packet);
+
+        /**
+         * Handles the step execution ("s") packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::StepExecution& packet);
+
+        /**
+         * Handles the read memory ("m") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::ReadMemory& packet);
+
+        /**
+         * Handles the write memory ("M") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::WriteMemory& packet);
+
+        /**
+         * Handles the set breakpoint ("Z") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::SetBreakpoint& packet);
+
+        /**
+         * Handles the remove breakpoint ("z") command packet.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::RemoveBreakpoint& packet);
+
+        /**
+         * Handles the interrupt command packet.
+         * Will attempt to halt execution on the target. Should respond with a "stop reply" packet, or an error code.
+         *
+         * @param packet
+         */
+        virtual void handleGdbPacket(CommandPackets::InterruptExecution& packet);
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Packet.hpp b/src/DebugServers/GdbRsp/Packet.hpp
new file mode 100644
index 00000000..d7a130b5
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Packet.hpp
@@ -0,0 +1,123 @@
+#pragma once
+
+#include <vector>
+#include <memory>
+#include <numeric>
+#include <QString>
+#include <sstream>
+#include <iomanip>
+
+namespace Bloom::DebugServers::Gdb
+{
+    /**
+     * The Packet class implements the data structure for GDB RSP packets.
+     *
+     * Fore more information on the packet data structure, see https://sourceware.org/gdb/onlinedocs/gdb/Overview.html#Overview
+     */
+    class Packet
+    {
+    protected:
+        std::vector<unsigned char> data;
+
+        void init(const std::vector<unsigned char>& rawPacket) {
+            this->data.insert(
+                this->data.begin(),
+                rawPacket.begin() + 1,
+                rawPacket.end() - 3
+            );
+        }
+    public:
+        Packet() = default;
+        Packet(const std::vector<unsigned char>& rawPacket) {
+            this->init(rawPacket);
+        }
+
+        virtual std::vector<unsigned char> getData() const {
+            return this->data;
+        }
+
+        void setData(const std::vector<unsigned char>& data) {
+            this->data = data;
+        }
+
+        /**
+         * Generates a raw packet.
+         *
+         * @return
+         */
+        std::vector<unsigned char> toRawPacket() const {
+            std::vector<unsigned char> packet = {'$'};
+            auto data = this->getData();
+
+            for (const auto& byte : data) {
+                // Escape $ and # characters
+                switch (byte) {
+                    case '$':
+                    case '#': {
+                        packet.push_back('}');
+                        packet.push_back(byte ^ 0x20);
+                    }
+                    default: {
+                        packet.push_back(byte);
+                    }
+                }
+            }
+
+            auto dataSum = std::accumulate(packet.begin() + 1, packet.end(), 0);
+            packet.push_back('#');
+            auto checkSum = QStringLiteral("%1").arg(dataSum % 256, 2, 16, QLatin1Char('0')).toStdString();
+
+            if (checkSum.size() < 2) {
+                packet.push_back('0');
+
+                if (checkSum.size() < 1) {
+                    packet.push_back('0');
+                } else {
+                    packet.push_back(static_cast<unsigned char>(checkSum[0]));
+                }
+            }
+
+            packet.push_back(static_cast<unsigned char>(checkSum[0]));
+            packet.push_back(static_cast<unsigned char>(checkSum[1]));
+
+            return packet;
+        }
+
+        /**
+         * Converts raw data to hexadecimal form, the form in which responses are expected to be delivered from the
+         * server.
+         *
+         * @param data
+         * @return
+         */
+        static std::string dataToHex(std::vector<unsigned char> data) {
+            std::stringstream stream;
+            stream << std::hex << std::setfill('0');
+
+            for (const auto& byte : data) {
+                stream << std::setw(2) << static_cast<unsigned int>(byte);
+            }
+
+            return stream.str();
+        }
+
+        /**
+         * Converts data in hexadecimal form to raw data.
+         *
+         * @param hexData
+         * @return
+         */
+        static std::vector<unsigned char> hexToData(const std::string& hexData) {
+            std::vector<unsigned char> output;
+
+            for (auto i = 0; i < hexData.size(); i += 2) {
+                auto hexByte = std::string((hexData.begin() + i), (hexData.begin() + i + 2));
+                output.push_back(static_cast<unsigned char>(std::stoi(hexByte, nullptr, 16)));
+            }
+
+            return output;
+        }
+
+        virtual ~Packet() = default;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Register.hpp b/src/DebugServers/GdbRsp/Register.hpp
new file mode 100644
index 00000000..98220c1e
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Register.hpp
@@ -0,0 +1,6 @@
+#pragma once
+
+namespace Bloom::DebugServers::Gdb
+{
+    using GdbRegisterNumber = int;
+}
diff --git a/src/DebugServers/GdbRsp/ResponsePackets/Ok.hpp b/src/DebugServers/GdbRsp/ResponsePackets/Ok.hpp
new file mode 100644
index 00000000..4945610d
--- /dev/null
+++ b/src/DebugServers/GdbRsp/ResponsePackets/Ok.hpp
@@ -0,0 +1,25 @@
+#pragma once
+
+#include <set>
+
+#include "ResponsePacket.hpp"
+
+namespace Bloom::DebugServers::Gdb {
+    enum class Feature;
+}
+
+namespace Bloom::DebugServers::Gdb::ResponsePackets
+{
+    /**
+     * OK response packet expected by the GDB client, in response to certain commands.
+     */
+    class Ok: public ResponsePacket
+    {
+    public:
+        Ok() = default;
+
+        std::vector<unsigned char> getData() const override {
+            return {'O', 'K'};
+        }
+    };
+}
diff --git a/src/DebugServers/GdbRsp/ResponsePackets/ResponsePacket.hpp b/src/DebugServers/GdbRsp/ResponsePackets/ResponsePacket.hpp
new file mode 100644
index 00000000..d685a9cf
--- /dev/null
+++ b/src/DebugServers/GdbRsp/ResponsePackets/ResponsePacket.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <vector>
+#include <memory>
+
+#include "src/DebugServers/GdbRsp/Packet.hpp"
+
+namespace Bloom::DebugServers::Gdb::ResponsePackets
+{
+    /**
+     * Upon receiving a CommandPacket from the connected GDB RSP client, the server is expected to respond with a
+     * response packet.
+     */
+    class ResponsePacket: public Packet
+    {
+    public:
+        ResponsePacket() = default;
+        explicit ResponsePacket(const std::vector<unsigned char>& data) {
+            this->data = data;
+        }
+    };
+}
diff --git a/src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.cpp b/src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.cpp
new file mode 100644
index 00000000..4a16adcf
--- /dev/null
+++ b/src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.cpp
@@ -0,0 +1,23 @@
+#include "SupportedFeaturesResponse.hpp"
+
+using namespace Bloom::DebugServers::Gdb::ResponsePackets;
+
+std::vector<unsigned char> SupportedFeaturesResponse::getData() const {
+    std::string output = "qSupported:";
+    auto gdbFeatureMapping = getGdbFeatureToNameMapping();
+
+    for (const auto& supportedFeature : this->supportedFeatures) {
+        auto featureString = gdbFeatureMapping.valueAt(supportedFeature.first);
+
+        if (featureString.has_value()) {
+            if (supportedFeature.second.has_value()) {
+                output.append(featureString.value() + "=" + supportedFeature.second.value() + ";");
+            } else {
+                output.append(featureString.value() + "+;");
+            }
+
+        }
+    }
+
+    return std::vector<unsigned char>(output.begin(), output.end());
+}
diff --git a/src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.hpp b/src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.hpp
new file mode 100644
index 00000000..084936d9
--- /dev/null
+++ b/src/DebugServers/GdbRsp/ResponsePackets/SupportedFeaturesResponse.hpp
@@ -0,0 +1,25 @@
+#pragma once
+
+#include <set>
+
+#include "ResponsePacket.hpp"
+#include "../Feature.hpp"
+
+namespace Bloom::DebugServers::Gdb::ResponsePackets
+{
+    /**
+     * The SupportedFeaturesResponse class implements the response packet structure for the "qSupported" command.
+     */
+    class SupportedFeaturesResponse: public ResponsePacket
+    {
+    protected:
+        std::set<std::pair<Feature, std::optional<std::string>>> supportedFeatures;
+
+    public:
+        SupportedFeaturesResponse() = default;
+        SupportedFeaturesResponse(const std::set<std::pair<Feature, std::optional<std::string>>>& supportedFeatures)
+        : supportedFeatures(supportedFeatures) {};
+
+        std::vector<unsigned char> getData() const override;
+    };
+}
diff --git a/src/DebugServers/GdbRsp/ResponsePackets/TargetStopped.hpp b/src/DebugServers/GdbRsp/ResponsePackets/TargetStopped.hpp
new file mode 100644
index 00000000..3527b206
--- /dev/null
+++ b/src/DebugServers/GdbRsp/ResponsePackets/TargetStopped.hpp
@@ -0,0 +1,47 @@
+#pragma once
+
+#include "ResponsePacket.hpp"
+#include "../Signal.hpp"
+#include "../StopReason.hpp"
+#include "src/Targets/TargetRegister.hpp"
+
+namespace Bloom::DebugServers::Gdb::ResponsePackets
+{
+    using Bloom::Targets::TargetRegisterMap;
+
+    /**
+     * The TargetStopped class implements the response packet structure for any commands that expect a "StopReply"
+     * packet in response.
+     */
+    class TargetStopped: public ResponsePacket
+    {
+    public:
+        Signal signal;
+        std::optional<TargetRegisterMap> registerMap;
+        std::optional<StopReason> stopReason;
+
+        TargetStopped(Signal signal) : signal(signal) {}
+
+        std::vector<unsigned char> getData() const override {
+            std::string output = "T" + this->dataToHex({static_cast<unsigned char>(this->signal)});
+
+            if (this->stopReason.has_value()) {
+                auto stopReasonMapping = getStopReasonToNameMapping();
+                auto stopReasonName = stopReasonMapping.valueAt(this->stopReason.value());
+
+                if (stopReasonName.has_value()) {
+                    output += stopReasonName.value() + ":;";
+                }
+            }
+
+            if (this->registerMap.has_value()) {
+                for (const auto& [registerId, registerValue] : this->registerMap.value()) {
+                    output += this->dataToHex({static_cast<unsigned char>(registerId)});
+                    output += ":" + this->dataToHex(registerValue.value) + ";";
+                }
+            }
+
+            return std::vector<unsigned char>(output.begin(), output.end());
+        }
+    };
+}
diff --git a/src/DebugServers/GdbRsp/Signal.hpp b/src/DebugServers/GdbRsp/Signal.hpp
new file mode 100644
index 00000000..403acc03
--- /dev/null
+++ b/src/DebugServers/GdbRsp/Signal.hpp
@@ -0,0 +1,10 @@
+#pragma once
+
+namespace Bloom::DebugServers::Gdb
+{
+    enum class Signal: unsigned char
+    {
+        TRAP = 5,
+        INTERRUPTED = 2,
+    };
+}
diff --git a/src/DebugServers/GdbRsp/StopReason.hpp b/src/DebugServers/GdbRsp/StopReason.hpp
new file mode 100644
index 00000000..80d085a2
--- /dev/null
+++ b/src/DebugServers/GdbRsp/StopReason.hpp
@@ -0,0 +1,19 @@
+#pragma once
+
+#include "src/Helpers/BiMap.hpp"
+
+namespace Bloom::DebugServers::Gdb
+{
+    enum class StopReason: int
+    {
+        SOFTWARE_BREAKPOINT = 0,
+        HARDWARE_BREAKPOINT = 1,
+    };
+
+    static inline BiMap<StopReason, std::string> getStopReasonToNameMapping() {
+        return BiMap<StopReason, std::string>({
+            {StopReason::HARDWARE_BREAKPOINT, "hwbreak"},
+            {StopReason::SOFTWARE_BREAKPOINT, "swbreak"},
+        });
+    }
+}
diff --git a/src/DebugToolDrivers/DebugTool.hpp b/src/DebugToolDrivers/DebugTool.hpp
new file mode 100644
index 00000000..e6b63cbd
--- /dev/null
+++ b/src/DebugToolDrivers/DebugTool.hpp
@@ -0,0 +1,54 @@
+#pragma once
+
+#include "TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp"
+
+namespace Bloom
+{
+    using DebugToolDrivers::TargetInterfaces::Microchip::Avr::Avr8::Avr8Interface;
+
+    /**
+     * A debug tool can be any device that provides access to the connected target. Debug tools are usually connected
+     * to the host machine via USB.
+     *
+     * Each debug tool must implement this interface. Note that target specific driver code should not be placed here.
+     * Each target family will expect the debug tool to provide an interface for that particular group of targets.
+     * For an example, see the Avr8Interface class and the DebugTool::getAvr8Interface().
+     */
+    class DebugTool
+    {
+    private:
+        bool initialised = false;
+
+    protected:
+        void setInitialised(bool initialised) {
+            this->initialised = initialised;
+        }
+
+    public:
+        bool isInitialised() const {
+            return this->initialised;
+        }
+
+        virtual void init() = 0;
+
+        virtual void close() = 0;
+
+        virtual std::string getName() = 0;
+
+        virtual std::string getSerialNumber() = 0;
+
+        /**
+         * All debug tools that support AVR8 targets must provide an implementation of the Avr8Interface
+         * class, via this method.
+         *
+         * For debug tools that do not support AVR8 targets, this method should return a nullptr.
+         *
+         * @return
+         */
+        virtual Avr8Interface* getAvr8Interface() {
+            return nullptr;
+        };
+
+        virtual ~DebugTool() = default;
+    };
+}
diff --git a/src/DebugToolDrivers/DebugTools.hpp b/src/DebugToolDrivers/DebugTools.hpp
new file mode 100644
index 00000000..9ab06998
--- /dev/null
+++ b/src/DebugToolDrivers/DebugTools.hpp
@@ -0,0 +1,5 @@
+#pragma once
+
+#include "DebugTool.hpp"
+#include "src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.hpp"
+#include "src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.hpp"
diff --git a/src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.cpp b/src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.cpp
new file mode 100644
index 00000000..d39c4533
--- /dev/null
+++ b/src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.cpp
@@ -0,0 +1,87 @@
+#include <stdexcept>
+
+#include "AtmelIce.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers;
+using namespace Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+
+void AtmelIce::init() {
+    UsbDevice::init();
+
+    // TODO: Move away from hard-coding the CMSIS-DAP/EDBG interface number
+    auto& usbHidInterface = this->getEdbgInterface().getUsbHidInterface();
+    usbHidInterface.setNumber(0);
+    usbHidInterface.setUSBDevice(this->getLibUsbDevice());
+    usbHidInterface.setVendorId(this->getVendorId());
+    usbHidInterface.setProductId(this->getProductId());
+
+    if (!usbHidInterface.isInitialised()) {
+        usbHidInterface.init();
+    }
+
+    /**
+     * The Atmel-ICE EDBG/CMSIS-DAP interface doesn't operate properly when sending commands too quickly.
+     *
+     * Because of this, we have to enforce a minimum time gap between commands. See comment
+     * in CmsisDapInterface class declaration for more info.
+     */
+    this->getEdbgInterface().setMinimumCommandTimeGap(35);
+
+    // We don't need to claim the CMSISDAP interface here as the HIDAPI will have already done so.
+    if (!this->sessionStarted) {
+        this->startSession();
+    }
+
+    this->edbgAvr8Interface = std::make_unique<EdbgAvr8Interface>(this->edbgInterface);
+    this->setInitialised(true);
+}
+
+void AtmelIce::close() {
+    if (this->sessionStarted) {
+        this->endSession();
+    }
+
+    this->getEdbgInterface().getUsbHidInterface().close();
+    UsbDevice::close();
+}
+
+std::string AtmelIce::getSerialNumber() {
+    auto response = this->getEdbgInterface().sendAvrCommandFrameAndWaitForResponseFrame(
+        CommandFrames::Discovery::Query(CommandFrames::Discovery::QueryContext::SERIAL_NUMBER)
+    );
+
+    if (response.getResponseId() != CommandFrames::Discovery::ResponseId::OK) {
+        throw Exception("Failed to fetch serial number from device - invalid Discovery Protocol response ID.");
+    }
+
+    auto data = response.getPayloadData();
+    return std::string(data.begin(), data.end());
+}
+
+void AtmelIce::startSession() {
+    auto response = this->getEdbgInterface().sendAvrCommandFrameAndWaitForResponseFrame(
+        CommandFrames::HouseKeeping::StartSession()
+    );
+
+    if (response.getResponseId() == CommandFrames::HouseKeeping::ResponseId::FAILED) {
+        // Failed response returned!
+        throw Exception("Failed to start session with Atmel-ICE!");
+    }
+
+    this->sessionStarted = true;
+}
+
+void AtmelIce::endSession() {
+    auto response = this->getEdbgInterface().sendAvrCommandFrameAndWaitForResponseFrame(
+        CommandFrames::HouseKeeping::EndSession()
+    );
+
+    if (response.getResponseId() == CommandFrames::HouseKeeping::ResponseId::FAILED) {
+        // Failed response returned!
+        throw Exception("Failed to end session with Atmel-ICE!");
+    }
+
+    this->sessionStarted = false;
+}
diff --git a/src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.hpp b/src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.hpp
new file mode 100644
index 00000000..81aaee44
--- /dev/null
+++ b/src/DebugToolDrivers/Microchip/AtmelICE/AtmelIce.hpp
@@ -0,0 +1,104 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+#include <memory>
+
+#include "src/DebugToolDrivers/DebugTool.hpp"
+#include "src/DebugToolDrivers/USB/UsbDevice.hpp"
+#include "src/DebugToolDrivers/USB/HID/HidInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrames.hpp"
+
+namespace Bloom::DebugToolDrivers
+{
+    using namespace Protocols::CmsisDap;
+    using Protocols::CmsisDap::Edbg::EdbgInterface;
+    using Protocols::CmsisDap::Edbg::Avr::EdbgAvr8Interface;
+
+    /**
+     * The Atmel-ICE device is an EDBG (Embedded Debugger) device. It implements the CMSIS-DAP layer as well
+     * as an Atmel Data Gateway Interface (DGI).
+     *
+     * Communication:
+     *  Using the Atmel-ICE device for AVR debugging/programming requires the AVR communication protocol, which
+     *  is a sub-protocol of the CMSIS-DAP (AVR communication protocol commands are wrapped in CMSIS-DAP vendor
+     *  commands). AVR communication protocol commands contain AVR frames, in which commands for numerous
+     *  sub-protocols are enveloped.
+     *
+     *  So to summarise, issuing an AVR command to the EDBG device, involves:
+     *  Actual command data -> AVR sub-protocol -> AVR Frames -> CMSIS-DAP Vendor commands -> EDBG Device
+     *
+     *  For more information on protocols and sub-protocols employed by Microchip EDBG devices, see
+     *  the 'Embedded Debugger-Based Tools Protocols User's Guide' document by Microchip.
+     *  @link http://ww1.microchip.com/downloads/en/DeviceDoc/50002630A.pdf
+     *
+     * USB Setup:
+     *  Vendor ID: 0x03eb (1003)
+     *  Product ID: 0x2141 (8513)
+     *
+     *  The Atmel-ICE consists of two USB interfaces. One HID interface for CMSIS-DAP and one vendor specific
+     *  interface for the DGI. We only work with the CMSIS-DAP interface, for now.
+     */
+    class AtmelIce: public DebugTool, public Usb::UsbDevice
+    {
+    private:
+        /**
+         * The EDBG interface implements additional functionality via vendor specific CMSIS-DAP commands.
+         * In other words, all EDBG commands are just CMSIS-DAP vendor commands that allow the debug tool
+         * to support additional functionality, like AVR programming and debugging.
+         *
+         * Any non-EDBG CMSIS-DAP commands for the Atmel-ICE can be sent through the EdbgInterface (as the
+         * EdbgInterface extends the CmsisDapInterface).
+         */
+        EdbgInterface edbgInterface = EdbgInterface();
+
+        /**
+         * The Atmel-ICE employs the EDBG AVR8 Generic protocol, for debugging AVR8 targets. This protocol is
+         * implemented in EdbgAvr8Interface. See the EdbgAvr8Interface class for more information.
+         */
+        std::unique_ptr<EdbgAvr8Interface> edbgAvr8Interface = nullptr;
+
+        bool sessionStarted = false;
+
+    public:
+        static const std::uint16_t USB_VENDOR_ID = 1003;
+        static const std::uint16_t USB_PRODUCT_ID = 8513;
+
+        AtmelIce() : UsbDevice(AtmelIce::USB_VENDOR_ID, AtmelIce::USB_PRODUCT_ID) {}
+
+        void init() override;
+        void close() override;
+
+        EdbgInterface& getEdbgInterface()  {
+            return this->edbgInterface;
+        }
+
+        Avr8Interface* getAvr8Interface() override {
+            return this->edbgAvr8Interface.get();
+        }
+
+        std::string getName() override {
+            return "Atmel-ICE";
+        };
+
+        /**
+         * Retrieves the device serial number via the Discovery Protocol.
+         *
+         * @return
+         */
+        std::string getSerialNumber() override;
+
+        /**
+         * Starts a session with the EDBG-based tool using the housekeeping protocol.
+         */
+        void startSession();
+
+        /**
+         * Ends the active session with the debug tool.
+         */
+        void endSession();
+    };
+}
diff --git a/src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.cpp b/src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.cpp
new file mode 100644
index 00000000..2dbaf37b
--- /dev/null
+++ b/src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.cpp
@@ -0,0 +1,87 @@
+#include <stdexcept>
+
+#include "PowerDebugger.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers;
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+
+void PowerDebugger::init() {
+    UsbDevice::init();
+
+    // TODO: Move away from hard-coding the CMSIS-DAP/EDBG interface number
+    auto& usbHidInterface = this->getEdbgInterface().getUsbHidInterface();
+    usbHidInterface.setNumber(0);
+    usbHidInterface.setUSBDevice(this->getLibUsbDevice());
+    usbHidInterface.setVendorId(this->getVendorId());
+    usbHidInterface.setProductId(this->getProductId());
+
+    if (!usbHidInterface.isInitialised()) {
+        usbHidInterface.init();
+    }
+
+    /**
+     * The Power Debugger EDBG/CMSIS-DAP interface doesn't operate properly when sending commands too quickly.
+     *
+     * Because of this, we have to enforce a minimum time gap between commands. See comment in
+     * CmsisDapInterface class declaration for more info.
+     */
+    this->getEdbgInterface().setMinimumCommandTimeGap(35);
+
+    // We don't need to claim the CMSISDAP interface here as the HIDAPI will have already done so.
+    if (!this->sessionStarted) {
+        this->startSession();
+    }
+
+    this->edbgAvr8Interface = std::make_unique<EdbgAvr8Interface>(this->edbgInterface);
+    this->setInitialised(true);
+}
+
+void PowerDebugger::close() {
+    if (this->sessionStarted) {
+        this->endSession();
+    }
+
+    this->getEdbgInterface().getUsbHidInterface().close();
+    UsbDevice::close();
+}
+
+std::string PowerDebugger::getSerialNumber() {
+    auto response = this->getEdbgInterface().sendAvrCommandFrameAndWaitForResponseFrame(
+        CommandFrames::Discovery::Query(Discovery::QueryContext::SERIAL_NUMBER)
+    );
+
+    if (response.getResponseId() != Discovery::ResponseId::OK) {
+        throw Exception("Failed to fetch serial number from device - invalid Discovery Protocol response ID.");
+    }
+
+    auto data = response.getPayloadData();
+    return std::string(data.begin(), data.end());
+}
+
+void PowerDebugger::startSession() {
+    auto response = this->getEdbgInterface().sendAvrCommandFrameAndWaitForResponseFrame(
+        CommandFrames::HouseKeeping::StartSession()
+    );
+
+    if (response.getResponseId() == HouseKeeping::ResponseId::FAILED) {
+        // Failed response returned!
+        throw Exception("Failed to start session with the Power Debugger - device returned failed response ID");
+    }
+
+    this->sessionStarted = true;
+}
+
+void PowerDebugger::endSession() {
+    auto response = this->getEdbgInterface().sendAvrCommandFrameAndWaitForResponseFrame(
+        CommandFrames::HouseKeeping::EndSession()
+    );
+
+    if (response.getResponseId() == HouseKeeping::ResponseId::FAILED) {
+        // Failed response returned!
+        throw Exception("Failed to end session with the Power Debugger - device returned failed response ID");
+    }
+
+    this->sessionStarted = false;
+}
diff --git a/src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.hpp b/src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.hpp
new file mode 100644
index 00000000..2e4e116a
--- /dev/null
+++ b/src/DebugToolDrivers/Microchip/PowerDebugger/PowerDebugger.hpp
@@ -0,0 +1,96 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+#include <memory>
+
+#include "src/DebugToolDrivers/DebugTool.hpp"
+#include "src/DebugToolDrivers/USB/UsbDevice.hpp"
+#include "src/DebugToolDrivers/USB/HID/HidInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrames.hpp"
+
+namespace Bloom::DebugToolDrivers
+{
+    using namespace Protocols::CmsisDap;
+    using namespace Protocols::CmsisDap::Edbg::Avr::CommandFrames;
+    using namespace Protocols::CmsisDap::Edbg::Avr::CommandFrames::Discovery;
+    using namespace Protocols::CmsisDap::Edbg::Avr::CommandFrames::HouseKeeping;
+    using Protocols::CmsisDap::Edbg::EdbgInterface;
+    using Protocols::CmsisDap::Edbg::Avr::EdbgAvr8Interface;
+
+    /**
+     * The Power Debugger device is very similar to the Atmel-ICE. It implements the CMSIS-DAP layer as well
+     * as an Atmel Data Gateway Interface (DGI).
+     *
+     * Communication:
+     *  Like the Atmel-ICE, using the Power Debugger device for AVR debugging/programming requires the AVR
+     *  communication protocol, which is a sub-protocol of the CMSIS-DAP.
+     *
+     *  For more information on the communication protocol, see the DebugToolDrivers::AtmelIce class.
+     *
+     * USB Setup:
+     *  Vendor ID: 0x03eb (1003)
+     *  Product ID: 0x2141 (8513)
+     */
+    class PowerDebugger: public DebugTool, public Usb::UsbDevice
+    {
+    private:
+        /**
+         * The EDBG interface implements additional functionality via vendor specific CMSIS-DAP commands.
+         * In other words, all EDBG commands are just CMSIS-DAP vendor commands that allow the debug tool
+         * to support additional functionality, like AVR programming and debugging.
+         *
+         * Any non-EDBG CMSIS-DAP commands for the Power Debugger can be sent through the EDBGInterface (as the
+         * EdbgInterface extends the CmsisDapInterface).
+         */
+        EdbgInterface edbgInterface = EdbgInterface();
+
+        /**
+         * The Power Debugger employs the EDBG AVR8Generic protocol for interfacing with AVR8 targets.
+         */
+        std::unique_ptr<EdbgAvr8Interface> edbgAvr8Interface;
+
+        bool sessionStarted = false;
+
+    public:
+        static const std::uint16_t USB_VENDOR_ID = 1003;
+        static const std::uint16_t USB_PRODUCT_ID = 8516;
+
+        PowerDebugger() : UsbDevice(PowerDebugger::USB_VENDOR_ID, PowerDebugger::USB_PRODUCT_ID) {}
+
+        void init() override;
+        void close() override;
+
+        EdbgInterface& getEdbgInterface()  {
+            return this->edbgInterface;
+        }
+
+        Avr8Interface* getAvr8Interface() override {
+            return this->edbgAvr8Interface.get();
+        }
+
+        std::string getName() override {
+            return "Power Debugger";
+        };
+
+        /**
+         * Retrieves the device serial number via the Discovery Protocol.
+         *
+         * @return
+         */
+        std::string getSerialNumber() override;
+
+        /**
+         * Starts a session with the EDBG-based tool using the housekeeping protocol.
+         */
+        void startSession();
+
+        /**
+         * Ends the active session with the debug tool.
+         */
+        void endSession();
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.cpp
new file mode 100644
index 00000000..84ff5bb8
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.cpp
@@ -0,0 +1,51 @@
+#include <memory>
+#include <chrono>
+#include <thread>
+
+#include "CmsisDapInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap;
+using namespace Bloom::Exceptions;
+
+void CmsisDapInterface::sendCommand(const Command& cmsisDapCommand) {
+    if (this->msSendCommandDelay > 0) {
+        using namespace std::chrono;
+        long now = duration_cast<milliseconds>(high_resolution_clock::now().time_since_epoch()).count();
+        long difference = (now - this->lastCommandSentTimeStamp);
+
+        if (difference < this->msSendCommandDelay) {
+            std::this_thread::sleep_for(milliseconds(this->msSendCommandDelay - difference));
+        }
+
+        this->lastCommandSentTimeStamp = now;
+    }
+
+    this->getUsbHidInterface().write(static_cast<std::vector<unsigned char>>(cmsisDapCommand));
+}
+
+std::unique_ptr<Response> CmsisDapInterface::getResponse() {
+    auto rawResponse = this->getUsbHidInterface().read(5000);
+
+    if (rawResponse.size() == 0) {
+        throw Exception("Empty CMSIS-DAP response received");
+    }
+
+    auto response = std::make_unique<Response>(Response());
+    response->init(rawResponse);
+    return response;
+}
+
+std::unique_ptr<Response> CmsisDapInterface::sendCommandAndWaitForResponse(const Command& cmsisDapCommand) {
+    this->sendCommand(cmsisDapCommand);
+    auto response = this->getResponse();
+
+    if (response->getResponseId() != cmsisDapCommand.getCommandId()) {
+        // This response is not what we were expecting
+        throw Exception("Unexpected response to CMSIS-DAP command.");
+    }
+
+    return response;
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.hpp
new file mode 100644
index 00000000..a3b1d101
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.hpp
@@ -0,0 +1,91 @@
+#pragma once
+
+#include <memory>
+#include <chrono>
+
+#include "src/DebugToolDrivers/USB/HID/HidInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.hpp"
+
+using namespace Bloom::DebugToolDrivers;
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap
+{
+    /**
+     * The CmsisDapInterface class implements the CMSIS-DAP protocol.
+     *
+     * See https://www.keil.com/support/man/docs/dapdebug/dapdebug_introduction.htm for more on the CMSIS-DAP protocol.
+     */
+    class CmsisDapInterface
+    {
+    private:
+        /**
+         * All CMSIS-DAP devices employ the USB HID interface for communication.
+         *
+         * For many CMSIS-DAP devices, the USB HID interface parameters (interface number, endpoint config, etc) vary
+         * amongst devices, so we'll need to be able to preActivationConfigure the CMSISDAPInterface from a
+         * higher level. For an example, see the constructor of the AtmelIce device class.
+         */
+        Usb::HidInterface usbHidInterface = Usb::HidInterface();
+
+        /**
+         * Some CMSIS-DAP debug tools fail to operate properly when we send commands too quickly. Even if we've
+         * received a response from every previous command.
+         *
+         * Because of this, we may need to enforce a minimum time gap between sending CMSIS commands.
+         * Setting msSendCommandDelay to any value above 0 will enforce an x millisecond gap between each command
+         * being sent, where x is the value of msSendCommandDelay.
+         */
+        int msSendCommandDelay = 0;
+        long lastCommandSentTimeStamp;
+
+    public:
+        explicit CmsisDapInterface() = default;
+
+        Usb::HidInterface& getUsbHidInterface() {
+            return this->usbHidInterface;
+        }
+
+        void setUsbHidInterface(Usb::HidInterface& usbHidInterface) {
+            this->usbHidInterface = usbHidInterface;
+        }
+
+        size_t getUsbHidInputReportSize() {
+            return this->usbHidInterface.getInputReportSize();
+        }
+
+        void setMinimumCommandTimeGap(int millisecondTimeGap) {
+            this->msSendCommandDelay = millisecondTimeGap;
+        }
+
+        /**
+         * Sends a CMSIS-DAP command to the device.
+         *
+         * @param cmsisDapCommand
+         */
+        virtual void sendCommand(const Protocols::CmsisDap::Command& cmsisDapCommand);
+
+        /**
+         * Listens for a CMSIS-DAP response from the device.
+         *
+         * @TODO: There is a hard-coded timeout in this method. Review.
+         *
+         * @return
+         *  The parsed response.
+         */
+        virtual std::unique_ptr<Protocols::CmsisDap::Response> getResponse();
+
+        /**
+         * Sends a CMSIS-DAP command and waits for a response.
+         *
+         * @param cmsisDapCommand
+         *
+         * @return
+         *  The parsed response.
+         */
+        virtual std::unique_ptr<Protocols::CmsisDap::Response> sendCommandAndWaitForResponse(
+            const Protocols::CmsisDap::Command& cmsisDapCommand
+        );
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.cpp
new file mode 100644
index 00000000..962a161a
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.cpp
@@ -0,0 +1,12 @@
+#include "Command.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap;
+
+Command::operator std::vector<unsigned char> () const
+{
+    auto rawCommand = std::vector<unsigned char>(1, this->getCommandId());
+    auto commandData = this->getData();
+    rawCommand.insert(rawCommand.end(), commandData.begin(), commandData.end());
+
+    return rawCommand;
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp
new file mode 100644
index 00000000..7fd4b6b0
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp
@@ -0,0 +1,52 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap
+{
+    class Command
+    {
+    private:
+        unsigned char commandId = 0x00;
+        std::vector<unsigned char> data;
+
+    public:
+        unsigned char getCommandId() const {
+            return this->commandId;
+        }
+
+        void setCommandId(unsigned char commandId) {
+            this->commandId = commandId;
+        }
+
+        virtual std::vector<unsigned char> getData() const {
+            return this->data;
+        }
+
+        void setData(const std::vector<unsigned char>& data) {
+            this->data = data;
+        }
+
+        [[nodiscard]] int getCommandSize() const {
+            // +1 for the command ID
+            return (int) (1 + this->getData().size());
+        }
+
+        std::uint16_t getDataSize() const {
+            return (std::uint16_t) this->getData().size();
+        }
+
+        /**
+         * Converts instance of a CMSIS Command to a vector of unsigned char (buffer), for sending
+         * to the debug tool.
+         *
+         * @return
+         */
+        explicit virtual operator std::vector<unsigned char>() const;
+
+        virtual ~Command() = default;
+
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.cpp
new file mode 100644
index 00000000..73dd8617
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.cpp
@@ -0,0 +1,24 @@
+#include <cstdint>
+
+#include "src/Exceptions/Exception.hpp"
+#include "Response.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap;
+
+void Response::init(unsigned char* response, std::size_t length)
+{
+    if (length == 0) {
+        throw Exceptions::Exception("Failed to process CMSIS-DAP response - invalid response");
+    }
+
+    this->setResponseId(response[0]);
+    std::vector<unsigned char> data = this->getData();
+
+    // TODO: use insert with iterators here
+    for (std::size_t i = 1; i < length; i++) {
+        data.push_back(response[i]);
+    }
+
+    this->setData(data);
+}
+
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp
new file mode 100644
index 00000000..e74dcae6
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp
@@ -0,0 +1,41 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap
+{
+    class Response
+    {
+    private:
+        unsigned char responseId = 0x00;
+
+        std::vector<unsigned char> data;
+
+    protected:
+        void setResponseId(unsigned char commandId) {
+            this->responseId = commandId;
+        }
+
+        void setData(const std::vector<unsigned char>& data) {
+            this->data = data;
+        }
+
+    public:
+        Response() = default;
+        virtual void init(unsigned char* response, std::size_t length);
+        virtual void init(std::vector<unsigned char> response) {
+            this->init(response.data(), response.size());
+        }
+
+        unsigned char getResponseId() const {
+            return this->responseId;
+        }
+
+        virtual const std::vector<unsigned char>& getData() const {
+            return this->data;
+        }
+
+        virtual ~Response() = default;
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Avr8Generic.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Avr8Generic.hpp
new file mode 100644
index 00000000..232f9c84
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Avr8Generic.hpp
@@ -0,0 +1,146 @@
+#pragma once
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    struct Avr8EdbgParameter
+    {
+        unsigned char context = 0x00;
+        unsigned char id = 0x00;
+
+        constexpr Avr8EdbgParameter() = default;
+        constexpr Avr8EdbgParameter(unsigned char context, unsigned char id)
+            : context(context), id(id) {};
+    };
+
+    struct Avr8EdbgParameters
+    {
+        constexpr static Avr8EdbgParameter CONFIG_VARIANT {0x00, 0x00};
+        constexpr static Avr8EdbgParameter CONFIG_FUNCTION {0x00, 0x01};
+        constexpr static Avr8EdbgParameter PHYSICAL_INTERFACE {0x01, 0x00};
+        constexpr static Avr8EdbgParameter DW_CLOCK_DIVISION_FACTOR {0x01, 0x10};
+        constexpr static Avr8EdbgParameter XMEGA_PDI_CLOCK {0x01, 0x31};
+
+        // debugWire and JTAG parameters
+        constexpr static Avr8EdbgParameter DEVICE_BOOT_START_ADDR {0x02, 0x0A};
+        constexpr static Avr8EdbgParameter DEVICE_FLASH_BASE {0x02, 0x06};
+        constexpr static Avr8EdbgParameter DEVICE_SRAM_START {0x02, 0x0E};
+        constexpr static Avr8EdbgParameter DEVICE_EEPROM_SIZE {0x02, 0x10};
+        constexpr static Avr8EdbgParameter DEVICE_EEPROM_PAGE_SIZE {0x02, 0x12};
+        constexpr static Avr8EdbgParameter DEVICE_FLASH_PAGE_SIZE {0x02, 0x00};
+        constexpr static Avr8EdbgParameter DEVICE_FLASH_SIZE {0x02, 0x02};
+        constexpr static Avr8EdbgParameter DEVICE_OCD_REVISION {0x02, 0x13};
+        constexpr static Avr8EdbgParameter DEVICE_OCD_DATA_REGISTER {0x02, 0x18};
+        constexpr static Avr8EdbgParameter DEVICE_SPMCR_REGISTER {0x02, 0x1D};
+        constexpr static Avr8EdbgParameter DEVICE_OSCCAL_ADDR {0x02, 0x1E};
+        constexpr static Avr8EdbgParameter DEVICE_EEARH_ADDR {0x02, 0x19};
+        constexpr static Avr8EdbgParameter DEVICE_EEARL_ADDR {0x02, 0x1A};
+        constexpr static Avr8EdbgParameter DEVICE_EECR_ADDR {0x02, 0x1B};
+        constexpr static Avr8EdbgParameter DEVICE_EEDR_ADDR {0x02, 0x1C};
+
+        // PDI/XMega device parameters
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_APPL_BASE_ADDR {0x02, 0x00};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_BOOT_BASE_ADDR {0x02, 0x04};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_EEPROM_BASE_ADDR {0x02, 0x08};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_FUSE_BASE_ADDR {0x02, 0x0C};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_LOCKBIT_BASE_ADDR {0x02, 0x10};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_USER_SIGN_BASE_ADDR {0x02, 0x14};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_PROD_SIGN_BASE_ADDR {0x02, 0x18};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_DATA_BASE_ADDR {0x02, 0x1C};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_APPLICATION_BYTES {0x02, 0x20};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_BOOT_BYTES {0x02, 0x24};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_NVM_BASE {0x02, 0x2B};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_SIGNATURE_OFFSET {0x02, 0x2D};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_FLASH_PAGE_BYTES {0x02, 0x26};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_EEPROM_SIZE {0x02, 0x28};
+        constexpr static Avr8EdbgParameter DEVICE_XMEGA_EEPROM_PAGE_SIZE {0x02, 0x2A};
+
+        constexpr static Avr8EdbgParameter RUN_TIMERS_WHILST_STOPPED {0x03, 0x00};
+    };
+
+    enum class Avr8ConfigVariant: unsigned char
+    {
+        LOOPBACK = 0x00,
+        NONE = 0xff,
+        DEBUG_WIRE = 0x01,
+        MEGAJTAG = 0x02,
+        XMEGA = 0x03,
+        UPDI = 0x05,
+    };
+
+    enum class Avr8ConfigFunction: unsigned char
+    {
+        NONE = 0x00,
+        PROGRAMMING = 0x01,
+        DEBUGGING = 0x02,
+    };
+
+    enum class Avr8PhysicalInterface: unsigned char
+    {
+        NONE = 0x00,
+        JTAG = 0x04,
+        DEBUG_WIRE = 0x05,
+        PDI = 0x06,
+        PDI_1W = 0x08,
+    };
+
+    enum class Avr8MemoryType: unsigned char
+    {
+        /**
+         * The SRAM memory type can be used to read  &write to internal memory on the target.
+         *
+         * It's available with all of the config variants in debugging mode.
+         */
+        SRAM = 0x20,
+
+        /**
+         * The EEPROM memory type can be used to read  &write to EEPROM memory on the target.
+         *
+         * It's available with all of the config variants, in debugging mode.
+         */
+        EEPROM = 0x22,
+
+        /**
+         * The FLASH_PAGE memory type can be used to read  &write full flash pages on the target.
+         *
+         * Only available with the JTAG and debugWire config variants.
+         *
+         * This memory type is not available with the JTAG config variant in debugging mode. Programming mode will need
+         * to be enabled before it can be used with JTAG targets. With the debugWire variant, this memory type *can* be
+         * used whilst in debugging mode.
+         */
+        FLASH_PAGE = 0xB0,
+
+        /**
+         * The APPL_FLASH memory type can be used to read/write flash memory on the target.
+         *
+         * Only available with the XMEGA (PDI) and UPDI (PDI_1W) config variants.
+         *
+         * When in debugging mode, only read access is permitted. Programming mode will need to be enabled before
+         * any attempts of writing data.
+         */
+        APPL_FLASH = 0xC0,
+
+        /**
+         * The SPM memory type can be used to read memory from the target whilst in debugging mode.
+         *
+         * Only available with JTAG and debugWire config variants.
+         */
+        SPM = 0xA0,
+
+        /**
+         * The REGISTER_FILE memory type can be used to read  &write to general purpose registers.
+         *
+         * Only available in debugging mode and with XMEGA and UPDI config variants. The SRAM memory type can be used
+         * to access general purpose registers when other variants are in use.
+         */
+        REGISTER_FILE = 0xB8,
+    };
+
+    enum class Avr8ResponseId: unsigned char
+    {
+        OK = 0x80,
+        DATA = 0x84,
+        FAILED = 0xA0,
+    };
+
+}
\ No newline at end of file
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.cpp
new file mode 100644
index 00000000..e18cdeaa
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.cpp
@@ -0,0 +1,26 @@
+#include "AvrCommand.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+
+std::vector<unsigned char> AvrCommand::getData() const
+{
+    std::vector<unsigned char> data;
+    auto commandPacket = this->getCommandPacket();
+    std::size_t commandPacketSize = commandPacket.size();
+    data.resize(3 + commandPacketSize);
+    // FragmentInfo byte
+    data[0] = static_cast<unsigned char>((this->getFragmentNumber() << 4) | this->getFragmentCount());
+
+    // Size byte
+    data[1] = (unsigned char) (commandPacketSize >> 8);
+    data[2] = (unsigned char) (commandPacketSize & 0xFF);
+
+    if (commandPacketSize > 0) {
+        for (std::size_t index = 0; index <= commandPacketSize - 1; index++) {
+            data[3 + index] = commandPacket[index];
+        }
+    }
+
+    return data;
+}
+
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.hpp
new file mode 100644
index 00000000..a5bbc2d8
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.hpp
@@ -0,0 +1,54 @@
+#pragma once
+
+#include <vector>
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    class AvrCommand: public Command
+    {
+    private:
+        size_t fragmentNumber = 1;
+        size_t fragmentCount = 1;
+
+        std::vector<unsigned char> commandPacket;
+
+    public:
+        AvrCommand() {
+            this->setCommandId(0x80);
+        }
+
+        /**
+         * Constructs raw command data on the fly.
+         *
+         * @return
+         */
+        std::vector<unsigned char> getData() const override;
+
+        size_t getFragmentNumber() const {
+            return this->fragmentNumber;
+        }
+
+        void setFragmentNumber(size_t fragmentNumber) {
+            this->fragmentNumber = fragmentNumber;
+        }
+
+        size_t getFragmentCount() const {
+            return this->fragmentCount;
+        }
+
+        void setFragmentCount(size_t fragmentCount) {
+            this->fragmentCount = fragmentCount;
+        }
+
+        const std::vector<unsigned char>& getCommandPacket() const {
+            return this->commandPacket;
+        }
+
+        void setCommandPacket(const std::vector<unsigned char>& commandPacket) {
+            this->commandPacket = commandPacket;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.cpp
new file mode 100644
index 00000000..04536765
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.cpp
@@ -0,0 +1,53 @@
+#include <stdexcept>
+#include <iostream>
+
+#include "AvrEvent.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+
+void AvrEvent::init(unsigned char* response, size_t length)
+{
+    Response::init(response, length);
+
+    if (this->getResponseId() != 0x82) {
+        throw Exception("Failed to construct AvrEvent object - invalid response ID.");
+    }
+
+    std::vector<unsigned char> responseData = this->getData();
+
+    if (responseData.size() < 2) {
+        // All AVR_EVT responses should consist of at least two bytes (excluding the AVR_EVT ID)
+        throw Exception("Failed to construct AvrEvent object - AVR_EVT response "
+                        "returned no additional data.");
+    }
+
+    // Response size is two bytes, MSB
+    size_t responsePacketSize = static_cast<size_t>((responseData[0] << 8) | responseData[1]);
+
+    if (responseData.size() < 2) {
+        // All AVR_EVT responses should consist of at least two bytes (excluding the AVR_EVT ID)
+        throw Exception("Failed to construct AvrEvent object - AVR_EVT response "
+                        "contained invalid event data size.");
+    }
+
+    std::vector<unsigned char> eventData;
+
+    /*
+     * Ignore the SOF, protocol version  &handler id and sequence ID (with all make up 5 bytes in total, 7 when
+     * you include the two size bytes)
+     */
+    eventData.insert(
+        eventData.end(),
+        responseData.begin() + 7,
+        responseData.begin() + 7 + static_cast<long>(responsePacketSize)
+    );
+
+    this->setEventData(eventData);
+
+    if (eventData.size() >= 1) {
+        this->eventId = eventData[0];
+    }
+}
+
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.hpp
new file mode 100644
index 00000000..cebc832c
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.hpp
@@ -0,0 +1,65 @@
+#pragma once
+
+#include <vector>
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/Edbg.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    using Edbg::ProtocolHandlerId;
+
+    enum class AvrEventId : unsigned char
+    {
+        AVR8_BREAK_EVENT = 0x40,
+    };
+
+    inline bool operator==(unsigned char rawId, AvrEventId id) {
+        return static_cast<unsigned char>(id) == rawId;
+    }
+
+    inline bool operator==(AvrEventId id, unsigned char rawId) {
+        return rawId == id;
+    }
+
+    class AvrEvent: public Response
+    {
+    private:
+        unsigned char eventId;
+
+        std::vector<unsigned char> eventData;
+
+    protected:
+        void setEventData(const std::vector<unsigned char>& eventData) {
+            this->eventData = eventData;
+        }
+
+    public:
+        AvrEvent() = default;
+
+        /**
+         * Construct an AVRResponse object from a Response object.
+         *
+         * @param response
+         */
+        void init(const Response& response) {
+            auto rawData = response.getData();
+            rawData.insert(rawData.begin(), response.getResponseId());
+            this->init(rawData.data(), rawData.size());
+        }
+
+        void init(unsigned char* response, size_t length) override;
+
+        const std::vector<unsigned char>& getEventData() const {
+            return this->eventData;
+        }
+
+        size_t getEventDataSize() const {
+            return this->eventData.size();
+        }
+
+        AvrEventId getEventId() {
+            return static_cast<AvrEventId>(this->eventId);
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEventCommand.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEventCommand.hpp
new file mode 100644
index 00000000..54bbeb9a
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEventCommand.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include <vector>
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap
+{
+    class AvrEventCommand: public Command
+    {
+    public:
+        AvrEventCommand() {
+            this->setCommandId(0x82);
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.cpp
new file mode 100644
index 00000000..b3187fa6
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.cpp
@@ -0,0 +1,44 @@
+#include <cstdint>
+
+#include "AvrResponse.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+
+void AvrResponse::init(unsigned char* response, std::size_t length)
+{
+    Response::init(response, length);
+
+    if (this->getResponseId() != 0x81) {
+        throw Exception("Failed to construct AvrResponse object - invalid response ID.");
+    }
+
+    std::vector<unsigned char> responseData = this->getData();
+
+    if (responseData.empty()) {
+        // All AVR responses should contain at least one byte (the fragment info byte)
+        throw Exception("Failed to construct AvrResponse object - AVR_RSP response "
+                                 "returned no additional data");
+    }
+
+    if (responseData[0] == 0x00) {
+        // This AVR Response contains no data (the device had no data to send), so we can stop here.
+        return;
+    }
+
+    this->setFragmentCount(static_cast<std::uint8_t>(responseData[0] & 0x0Fu));
+    this->setFragmentNumber(static_cast<std::uint8_t>(responseData[0] >> 4));
+
+    // Response size is two bytes, MSB
+    std::size_t responsePacketSize = static_cast<std::size_t>((responseData[1] << 8u) + responseData[2]);
+    std::vector<unsigned char> responsePacket;
+    responsePacket.resize(responsePacketSize);
+
+    for (std::size_t i = 0; i < responsePacketSize; i++) {
+        responsePacket[i] = responseData[i + 3];
+    }
+
+    this->setResponsePacket(responsePacket);
+}
+
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.hpp
new file mode 100644
index 00000000..083f5b00
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.hpp
@@ -0,0 +1,59 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Response.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    class AvrResponse: public Response
+    {
+    private:
+        std::uint8_t fragmentNumber = 0;
+        std::uint8_t fragmentCount = 0;
+
+        std::vector<unsigned char> responsePacket;
+
+    protected:
+        void setFragmentNumber(std::uint8_t fragmentNumber) {
+            this->fragmentNumber = fragmentNumber;
+        }
+
+        void setFragmentCount(std::uint8_t fragmentCount) {
+            this->fragmentCount = fragmentCount;
+        }
+
+        void setResponsePacket(const std::vector<unsigned char>& responsePacket) {
+            this->responsePacket = responsePacket;
+        }
+
+    public:
+        AvrResponse() = default;
+
+        /**
+         * Construct an AVRResponse object from a Response object.
+         *
+         * @param response
+         */
+        void init(const Response& response) {
+            auto rawData = response.getData();
+            rawData.insert(rawData.begin(), response.getResponseId());
+            this->init(rawData.data(), rawData.size());
+        }
+
+        void init(unsigned char* response, std::size_t length) override;
+
+        std::uint8_t getFragmentNumber() const {
+            return this->fragmentNumber;
+        }
+
+        std::uint8_t getFragmentCount() const {
+            return this->fragmentCount;
+        }
+
+        const std::vector<unsigned char>& getResponsePacket() const {
+            return this->responsePacket;
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponseCommand.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponseCommand.hpp
new file mode 100644
index 00000000..7b9725a5
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponseCommand.hpp
@@ -0,0 +1,28 @@
+#pragma once
+#include <vector>
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    /**
+     * All AVR commands result in an automatic response, but that is just a response to confirm
+     * receipt of the AVR Command. It is *not* a response to the AVR command.
+     *
+     * Responses to AVR commands are not automatically sent from the device, they must be requested from the device.
+     *
+     * An AvrResponseCommand is a CMSIS-DAP command, used to request a response for an AVR command. In response to an
+     * AvrResponseCommand, the device will send over an AVRResponse, which will contain the response to the AVR command.
+     *
+     * For more information on this, see the 'Embedded Debugger-Based Tools Protocols User's Guide'
+     * document, by Microchip. Link provided in the AtmelICE device class declaration.
+     *
+     * An AvrResponseCommand is very simple - it consists of a command ID and nothing more.
+     */
+    class AvrResponseCommand: public Command
+    {
+    public:
+        AvrResponseCommand() {
+            this->setCommandId(0x81);
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ActivatePhysical.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ActivatePhysical.hpp
new file mode 100644
index 00000000..a2b31928
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ActivatePhysical.hpp
@@ -0,0 +1,36 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class ActivatePhysical: public Avr8GenericCommandFrame
+    {
+    private:
+        bool reset = false;
+
+    public:
+        ActivatePhysical() = default;
+        ActivatePhysical(bool reset) : reset(reset) {};
+
+        void setReset(bool reset) {
+            this->reset = reset;
+        }
+
+        std::vector<unsigned char> getPayload() const override {
+            /*
+             * The activate physical command consists of 3 bytes:
+             * 1. Command ID (0x10)
+             * 2. Version (0x00)
+             * 3. Reset flag (to apply external reset)
+             */
+            auto output = std::vector<unsigned char>(3, 0x00);
+            output[0] = 0x10;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->reset);
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Attach.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Attach.hpp
new file mode 100644
index 00000000..0c5c8fb4
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Attach.hpp
@@ -0,0 +1,36 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class Attach: public Avr8GenericCommandFrame
+    {
+    private:
+        bool breakAfterAttach = false;
+
+    public:
+        Attach() = default;
+        Attach(bool breakAfterAttach) : breakAfterAttach(breakAfterAttach) {};
+
+        void setBreadAfterAttach(bool breakAfterAttach) {
+            this->breakAfterAttach = breakAfterAttach;
+        }
+
+        std::vector<unsigned char> getPayload() const override {
+            /*
+             * The attach command consists of 3 bytes:
+             * 1. Command ID (0x13)
+             * 2. Version (0x00)
+             * 3. Break (stop) after attach flag
+             */
+            auto output = std::vector<unsigned char>(3, 0x00);
+            output[0] = 0x13;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->breakAfterAttach);
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Avr8GenericCommandFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Avr8GenericCommandFrame.hpp
new file mode 100644
index 00000000..33e45295
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Avr8GenericCommandFrame.hpp
@@ -0,0 +1,23 @@
+#pragma once
+
+#include "src/Exceptions/Exception.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Avr8Generic.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/Avr8GenericResponseFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    using namespace DebugToolDrivers::Protocols::CmsisDap;
+    using namespace DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+
+    class Avr8GenericCommandFrame: public AvrCommandFrame
+    {
+    public:
+        using ResponseFrameType = ResponseFrames::Avr8Generic::Avr8GenericResponseFrame;
+
+        Avr8GenericCommandFrame() {
+            this->setProtocolHandlerId(ProtocolHandlerId::Avr8Generic);
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearAllSoftwareBreakpoints.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearAllSoftwareBreakpoints.hpp
new file mode 100644
index 00000000..24c019fd
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearAllSoftwareBreakpoints.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class ClearAllSoftwareBreakpoints: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The clear all software breakpoints command consists of 2 bytes:
+             * 1. Command ID (0x45)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x45;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        ClearAllSoftwareBreakpoints() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearSoftwareBreakpoints.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearSoftwareBreakpoints.hpp
new file mode 100644
index 00000000..0db59ddd
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearSoftwareBreakpoints.hpp
@@ -0,0 +1,47 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class ClearSoftwareBreakpoints: public Avr8GenericCommandFrame
+    {
+    private:
+        std::vector<std::uint32_t> addresses;
+
+    public:
+        ClearSoftwareBreakpoints() = default;
+
+        ClearSoftwareBreakpoints(const std::vector<std::uint32_t>& addresses) : addresses(addresses) {}
+
+        void setAddresses(const std::vector<std::uint32_t>& addresses) {
+            this->addresses = addresses;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The clear software breakpoints command consists of 2 bytes + 4*n bytes, where n is the number
+             * of breakpoints to clear:
+             *
+             * 1. Command ID (0x44)
+             * 2. Version (0x00)
+             * ... addresses
+             */
+            auto output = std::vector<unsigned char>(2, 0x00);
+            output[0] = 0x44;
+            output[1] = 0x00;
+
+            for (const auto& address : this->addresses) {
+                output.push_back(static_cast<unsigned char>(address));
+                output.push_back(static_cast<unsigned char>(address >> 8));
+                output.push_back(static_cast<unsigned char>(address >> 16));
+                output.push_back(static_cast<unsigned char>(address >> 24));
+            }
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DeactivatePhysical.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DeactivatePhysical.hpp
new file mode 100644
index 00000000..e34e8802
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DeactivatePhysical.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class DeactivatePhysical: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The deactivate physical command consists of 2 bytes:
+             * 1. Command ID (0x11)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x11;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        DeactivatePhysical() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Detach.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Detach.hpp
new file mode 100644
index 00000000..2f8ac46e
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Detach.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class Detach: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The detach command consists of 2 bytes:
+             * 1. Command ID (0x11)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x11;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        Detach() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DisableDebugWire.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DisableDebugWire.hpp
new file mode 100644
index 00000000..a60cce95
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DisableDebugWire.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class DisableDebugWire: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The disable debugWire command consists of 2 bytes:
+             * 1. Command ID (0x17)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x17;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        DisableDebugWire() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetDeviceId.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetDeviceId.hpp
new file mode 100644
index 00000000..848ed029
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetDeviceId.hpp
@@ -0,0 +1,31 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+#include "../../ResponseFrames/AVR8Generic/GetDeviceId.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class GetDeviceId: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The get device ID command consists of 2 bytes:
+             * 1. Command ID (0x12)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x12;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        using ResponseFrameType = ResponseFrames::Avr8Generic::GetDeviceId;
+
+        GetDeviceId() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetParameter.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetParameter.hpp
new file mode 100644
index 00000000..b117a444
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetParameter.hpp
@@ -0,0 +1,54 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class GetParameter: public Avr8GenericCommandFrame
+    {
+    private:
+        Avr8EdbgParameter parameter;
+        std::uint8_t size;
+
+    public:
+        GetParameter() = default;
+
+        GetParameter(const Avr8EdbgParameter& parameter) {
+            this->setParameter(parameter);
+        }
+
+        GetParameter(const Avr8EdbgParameter& parameter, std::uint8_t size) : GetParameter(parameter) {
+            this->setSize(size);
+        }
+
+        void setParameter(const Avr8EdbgParameter& parameter) {
+            this->parameter = parameter;
+        }
+
+        void setSize(std::uint8_t size) {
+            this->size = size;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The get param command consists of 5 bytes:
+             * 1. Command ID (0x02)
+             * 2. Version (0x00)
+             * 3. Param context (Avr8Parameter::context)
+             * 4. Param ID (Avr8Parameter::id)
+             * 5. Param value length (this->size)
+             */
+            auto output = std::vector<unsigned char>(5, 0x00);
+            output[0] = 0x02;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->parameter.context);
+            output[3] = static_cast<unsigned char>(this->parameter.id);
+            output[4] = static_cast<unsigned char>(this->size);
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetProgramCounter.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetProgramCounter.hpp
new file mode 100644
index 00000000..b1685baa
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetProgramCounter.hpp
@@ -0,0 +1,31 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+#include "../../ResponseFrames/AVR8Generic/GetProgramCounter.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class GetProgramCounter: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The PC Read command consists of 2 bytes:
+             * 1. Command ID (0x35)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x35;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        using ResponseFrameType = ResponseFrames::Avr8Generic::GetProgramCounter;
+
+        GetProgramCounter() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ReadMemory.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ReadMemory.hpp
new file mode 100644
index 00000000..fbf96079
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ReadMemory.hpp
@@ -0,0 +1,62 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+#include "../../ResponseFrames/AVR8Generic/ReadMemory.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    using namespace Exceptions;
+
+    class ReadMemory: public Avr8GenericCommandFrame
+    {
+    private:
+        Avr8MemoryType type;
+        std::uint32_t address = 0;
+        std::uint32_t bytes = 0;
+
+    public:
+        using ResponseFrameType = ResponseFrames::Avr8Generic::ReadMemory;
+
+        ReadMemory() = default;
+
+        void setType(const Avr8MemoryType& type) {
+            this->type = type;
+        }
+
+        void setAddress(std::uint32_t address) {
+            this->address = address;
+        }
+
+        void setBytes(std::uint32_t bytes) {
+            this->bytes = bytes;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The read memory command consists of 11 bytes:
+             * 1. Command ID (0x21)
+             * 2. Version (0x00)
+             * 3. Memory type (Avr8MemoryType)
+             * 4. Start address (4 bytes)
+             * 5. Number of bytes to read (4 bytes)
+             */
+            auto output = std::vector<unsigned char>(11, 0x00);
+            output[0] = 0x21;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->type);
+            output[3] = static_cast<unsigned char>(this->address);
+            output[4] = static_cast<unsigned char>(this->address >> 8);
+            output[5] = static_cast<unsigned char>(this->address >> 16);
+            output[6] = static_cast<unsigned char>(this->address >> 24);
+            output[7] = static_cast<unsigned char>(this->bytes);
+            output[8] = static_cast<unsigned char>(this->bytes >> 8);
+            output[9] = static_cast<unsigned char>(this->bytes >> 16);
+            output[10] = static_cast<unsigned char>(this->bytes >> 24);
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Reset.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Reset.hpp
new file mode 100644
index 00000000..2a0091a3
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Reset.hpp
@@ -0,0 +1,36 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class Reset: public Avr8GenericCommandFrame
+    {
+    private:
+        bool stopAtMainAddress = false;
+
+    public:
+        Reset() = default;
+        Reset(bool stopAtMainAddress) : stopAtMainAddress(stopAtMainAddress) {};
+
+        void setStopAtMainAddress(bool stopAtMainAddress) {
+            this->stopAtMainAddress = stopAtMainAddress;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The reset command consists of 3 bytes:
+             * 1. Command ID (0x30)
+             * 2. Version (0x00)
+             * 3. "Level" (0x01 to stop at boot reset vector or 0x02 to stop at main address)
+             */
+            auto output = std::vector<unsigned char>(3, 0x00);
+            output[0] = 0x30;
+            output[1] = 0x00;
+            output[2] = this->stopAtMainAddress ? 0x02 : 0x01;
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Run.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Run.hpp
new file mode 100644
index 00000000..684103d7
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Run.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class Run: public Avr8GenericCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The run command consists of 2 bytes:
+             * 1. Command ID (0x32)
+             * 2. Version (0x00)
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x32;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        Run() {
+            init();
+        };
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/RunTo.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/RunTo.hpp
new file mode 100644
index 00000000..97a50b48
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/RunTo.hpp
@@ -0,0 +1,45 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class RunTo: public Avr8GenericCommandFrame
+    {
+    private:
+        std::uint32_t address;
+
+    public:
+        RunTo() = default;
+
+        RunTo(const std::uint32_t& address) : address(address) {}
+
+        void setAddress(const std::uint32_t& address) {
+            this->address = address;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The run-to command consists of 6 bytes:
+             *
+             * 1. Command ID (0x33)
+             * 2. Version (0x00)
+             * 3. Address to run to (4 bytes)
+             */
+            auto output = std::vector<unsigned char>(6, 0x00);
+            output[0] = 0x33;
+            output[1] = 0x00;
+
+            // The address to run to needs to be the 16-bit word address, not the byte address.
+            auto wordAddress = this->address / 2;
+            output[2] = (static_cast<unsigned char>(wordAddress));
+            output[3] = (static_cast<unsigned char>(wordAddress >> 8));
+            output[4] = (static_cast<unsigned char>(wordAddress >> 16));
+            output[5] = (static_cast<unsigned char>(wordAddress >> 24));
+
+            return output;
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetParameter.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetParameter.hpp
new file mode 100644
index 00000000..d45ba18d
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetParameter.hpp
@@ -0,0 +1,64 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    using namespace Exceptions;
+
+    class SetParameter: public Avr8GenericCommandFrame
+    {
+    private:
+        Avr8EdbgParameter parameter;
+        std::vector<unsigned char> value;
+
+    public:
+        SetParameter() = default;
+
+        SetParameter(const Avr8EdbgParameter& parameter) {
+            this->setParameter(parameter);
+        }
+
+        SetParameter(const Avr8EdbgParameter& parameter, const std::vector<unsigned char>& value) : SetParameter(parameter) {
+            this->setValue(value);
+        }
+
+        SetParameter(const Avr8EdbgParameter& parameter, unsigned char value) : SetParameter(parameter) {
+            this->setValue(value);
+        }
+
+        void setParameter(const Avr8EdbgParameter& parameter) {
+            this->parameter = parameter;
+        }
+
+        void setValue(const std::vector<unsigned char>& value) {
+            this->value = value;
+        }
+
+        void setValue(unsigned char value) {
+            this->value.resize(1, value);
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The set param command consists of this->value.size() + 5 bytes. The first five bytes consist of:
+             * 1. Command ID (0x01)
+             * 2. Version (0x00)
+             * 3. Param context (Avr8Parameter::context)
+             * 4. Param ID (Avr8Parameter::id)
+             * 5. Param value length (this->value.size()) - this is only one byte in size, so its value should
+             *    never exceed 255.
+             */
+            auto output = std::vector<unsigned char>(this->value.size() + 5, 0x00);
+            output[0] = 0x01;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->parameter.context);
+            output[3] = static_cast<unsigned char>(this->parameter.id);
+            output[4] = static_cast<unsigned char>(this->value.size());
+            output.insert(output.begin() + 5, this->value.begin(), this->value.end());
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetProgramCounter.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetProgramCounter.hpp
new file mode 100644
index 00000000..a044423d
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetProgramCounter.hpp
@@ -0,0 +1,37 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    using namespace Exceptions;
+
+    class SetProgramCounter: public Avr8GenericCommandFrame
+    {
+    private:
+        std::uint32_t programCounter = 0;
+
+    public:
+        SetProgramCounter(std::uint32_t programCounter) : programCounter(programCounter) {}
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The PC write command consists of 6 bytes:
+             * 1. Command ID (0x01)
+             * 2. Version (0x00)
+             * 3. PC (4 bytes, LSB)
+             */
+            auto output = std::vector<unsigned char>(6, 0x00);
+            output[0] = 0x36;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->programCounter);
+            output[3] = static_cast<unsigned char>(this->programCounter >> 8);
+            output[4] = static_cast<unsigned char>(this->programCounter >> 16);
+            output[5] = static_cast<unsigned char>(this->programCounter >> 24);
+
+            return output;
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetSoftwareBreakpoints.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetSoftwareBreakpoints.hpp
new file mode 100644
index 00000000..f906ac7f
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetSoftwareBreakpoints.hpp
@@ -0,0 +1,47 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class SetSoftwareBreakpoints: public Avr8GenericCommandFrame
+    {
+    private:
+        std::vector<std::uint32_t> addresses;
+
+    public:
+        SetSoftwareBreakpoints() = default;
+
+        SetSoftwareBreakpoints(const std::vector<std::uint32_t>& addresses) : addresses(addresses) {}
+
+        void setAddresses(const std::vector<std::uint32_t>& addresses) {
+            this->addresses = addresses;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The set software breakpoint command consists of 2 bytes + 4*n bytes, where n is the number
+             * of breakpoints to set:
+             *
+             * 1. Command ID (0x43)
+             * 2. Version (0x00)
+             * ... addresses
+             */
+            auto output = std::vector<unsigned char>(2, 0x00);
+            output[0] = 0x43;
+            output[1] = 0x00;
+
+            for (const auto& address : this->addresses) {
+                output.push_back(static_cast<unsigned char>(address));
+                output.push_back(static_cast<unsigned char>(address >> 8));
+                output.push_back(static_cast<unsigned char>(address >> 16));
+                output.push_back(static_cast<unsigned char>(address >> 24));
+            }
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetXmegaSoftwareBreakpoint.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetXmegaSoftwareBreakpoint.hpp
new file mode 100644
index 00000000..4809cbdf
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetXmegaSoftwareBreakpoint.hpp
@@ -0,0 +1,45 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class SetXmegaSoftwareBreakpoint: public Avr8GenericCommandFrame
+    {
+    private:
+        std::uint32_t address;
+
+    public:
+        SetXmegaSoftwareBreakpoint() = default;
+
+        SetXmegaSoftwareBreakpoint(std::uint32_t address) : address(address) {}
+
+        void setAddress(std::uint32_t address) {
+            this->address = address;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The set software breakpoint command consists of 6 bytes bytes
+             *
+             * 1. Command ID (0x42)
+             * 2. Version (0x00)
+             * 3. Address (4 bytes)
+             */
+            auto output = std::vector<unsigned char>(15, 0x00);
+            output[0] = 0x42;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(address);
+            output[3] = static_cast<unsigned char>(address >> 8);
+            output[4] = static_cast<unsigned char>(address >> 16);
+            output[5] = static_cast<unsigned char>(address >> 24);
+            output[13] = 0x01; // One breakpoint
+            output[14] = 0x00;
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Step.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Step.hpp
new file mode 100644
index 00000000..e2652c85
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Step.hpp
@@ -0,0 +1,30 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class Step: public Avr8GenericCommandFrame
+    {
+    public:
+        Step() = default;
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The step command consists of 4 bytes:
+             * 1. Command ID (0x34)
+             * 2. Version (0x00)
+             * 3. Level (0x01 for instruction level step, 0x02 for statement level step)
+             * 4. Mode (0x00 for step over, 0x01 for step into, 0x02 for step out)
+             */
+            auto output = std::vector<unsigned char>(4, 0x00);
+            output[0] = 0x34;
+            output[1] = 0x00;
+            output[2] = 0x01;
+            output[3] = 0x01;
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Stop.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Stop.hpp
new file mode 100644
index 00000000..80c0b0f8
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Stop.hpp
@@ -0,0 +1,36 @@
+#pragma once
+
+#include "Avr8GenericCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    class Stop: public Avr8GenericCommandFrame
+    {
+    private:
+        bool stopImmediately = true;
+
+    public:
+        Stop() = default;
+        Stop(bool stopImmediately) : stopImmediately(stopImmediately) {};
+
+        void setStopImmediately(bool stopImmediately) {
+            this->stopImmediately = stopImmediately;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The stop command consists of 3 bytes:
+             * 1. Command ID (0x31)
+             * 2. Version (0x00)
+             * 3. Stop immediately (0x01 to stop immediately or 0x02 to stop at the next symbol)
+             */
+            auto output = std::vector<unsigned char>(3, 0x00);
+            output[0] = 0x31;
+            output[1] = 0x00;
+            output[2] = this->stopImmediately ? 0x01 : 0x02;
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/WriteMemory.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/WriteMemory.hpp
new file mode 100644
index 00000000..a0b1a156
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/WriteMemory.hpp
@@ -0,0 +1,70 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericCommandFrame.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Avr8Generic
+{
+    using namespace Exceptions;
+    using Bloom::Targets::TargetMemoryBuffer;
+
+    class WriteMemory: public Avr8GenericCommandFrame
+    {
+    private:
+        Avr8MemoryType type;
+        std::uint32_t address = 0;
+        TargetMemoryBuffer buffer;
+
+    public:
+        WriteMemory() = default;
+
+        void setType(const Avr8MemoryType& type) {
+            this->type = type;
+        }
+
+        void setAddress(std::uint32_t address) {
+            this->address = address;
+        }
+
+        void setBuffer(const TargetMemoryBuffer& buffer) {
+            this->buffer = buffer;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The write memory command consists of 12 bytes + the buffer size:
+             * 1. Command ID (0x23)
+             * 2. Version (0x00)
+             * 3. Memory type (Avr8MemoryType)
+             * 4. Start address (4 bytes)
+             * 5. Number of bytes to write (4 bytes)
+             * 6. Asynchronous flag (0x00 for "write first, then reply" and 0x01 for "reply first, then write")
+             * 7. Buffer
+             */
+            auto output = std::vector<unsigned char>(12, 0x00);
+            output[0] = 0x23;
+            output[1] = 0x00;
+            output[2] = static_cast<unsigned char>(this->type);
+            output[3] = static_cast<unsigned char>(this->address);
+            output[4] = static_cast<unsigned char>(this->address >> 8);
+            output[5] = static_cast<unsigned char>(this->address >> 16);
+            output[6] = static_cast<unsigned char>(this->address >> 24);
+
+            auto bytesToWrite = static_cast<std::uint32_t>(this->buffer.size());
+            output[7] = static_cast<unsigned char>(bytesToWrite);
+            output[8] = static_cast<unsigned char>(bytesToWrite >> 8);
+            output[9] = static_cast<unsigned char>(bytesToWrite >> 16);
+            output[10] = static_cast<unsigned char>(bytesToWrite >> 24);
+
+            // We always set the async flag to 0x00 ("write first, then reply")
+            output[11] = 0x00;
+
+            output.insert(output.end(), this->buffer.begin(), this->buffer.end());
+
+            return output;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.cpp
new file mode 100644
index 00000000..0206ea9d
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.cpp
@@ -0,0 +1,61 @@
+#include <math.h>
+
+#include "AvrCommandFrame.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+
+std::vector<AvrCommand> AvrCommandFrame::generateAvrCommands(std::size_t maximumCommandPacketSize) const {
+    auto rawCommandFrame = static_cast<std::vector<unsigned char>>(*this);
+    std::size_t commandFrameSize = rawCommandFrame.size();
+    std::size_t commandsRequired = static_cast<std::size_t>(ceil(static_cast<float>(commandFrameSize) / static_cast<float>(maximumCommandPacketSize)));
+
+    std::vector<AvrCommand> avrCommands;
+    std::size_t copiedPacketSize = 0;
+    for (std::size_t i = 0; i < commandsRequired; i++) {
+        AvrCommand avrCommand;
+        avrCommand.setFragmentCount(commandsRequired);
+        avrCommand.setFragmentNumber(i + 1);
+        auto commandPacket = avrCommand.getCommandPacket();
+
+        // If we're on the last packet, the packet size will be what ever is left of the AvrCommandFrame
+        std::size_t commandPacketSize = ((i + 1) != commandsRequired) ? maximumCommandPacketSize
+            : (commandFrameSize - (maximumCommandPacketSize * i));
+
+        commandPacket.insert(
+            commandPacket.end(),
+            rawCommandFrame.begin() + static_cast<long>(copiedPacketSize),
+            rawCommandFrame.begin() + static_cast<long>(copiedPacketSize + commandPacketSize)
+        );
+
+        avrCommand.setCommandPacket(commandPacket);
+        avrCommands.push_back(avrCommand);
+        copiedPacketSize += commandPacketSize;
+    }
+
+    return avrCommands;
+}
+
+AvrCommandFrame::operator std::vector<unsigned char> () const {
+    auto data = this->getPayload();
+    auto dataSize = data.size();
+
+    auto rawCommand = std::vector<unsigned char>(5);
+
+    rawCommand[0] = this->SOF;
+    rawCommand[1] = this->getProtocolVersion();
+
+    rawCommand[2] = static_cast<unsigned char>(this->getSequenceId());
+    rawCommand[3] = static_cast<unsigned char>(this->getSequenceId() >> 8);
+
+    rawCommand[4] = static_cast<unsigned char>(this->getProtocolHandlerId());
+
+    if (dataSize > 0) {
+        rawCommand.insert(
+            rawCommand.end(),
+            data.begin(),
+            data.end()
+        );
+    }
+
+    return rawCommand;
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.hpp
new file mode 100644
index 00000000..91e57d83
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.hpp
@@ -0,0 +1,110 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+#include <memory>
+#include <limits>
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/Edbg.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    using namespace Edbg;
+    using namespace DebugToolDrivers::Protocols::CmsisDap;
+
+    class AvrCommandFrame
+    {
+    private:
+        unsigned char SOF = 0x0E;
+
+        unsigned char protocolVersion = 0x00;
+
+        /**
+         * Incrementing from 0x00
+         */
+        std::uint16_t sequenceId = 0;
+        inline static std::uint16_t lastSequenceId = 0;
+
+        /**
+         * Destination sub-protocol handler ID
+         */
+        ProtocolHandlerId protocolHandlerID;
+
+        std::vector<unsigned char> payload;
+
+    public:
+        using ResponseFrameType = AvrResponseFrame;
+
+        AvrCommandFrame() {
+            if (this->lastSequenceId < std::numeric_limits<decltype(this->lastSequenceId)>::max()) {
+                this->sequenceId = ++(this->lastSequenceId);
+
+            } else {
+                this->sequenceId = 0;
+                this->lastSequenceId = 0;
+            }
+        };
+
+        unsigned char getProtocolVersion() const {
+            return this->protocolVersion;
+        }
+
+        void setProtocolVersion(unsigned char protocolVersion) {
+            this->protocolVersion = protocolVersion;
+        }
+
+        std::uint16_t getSequenceId() const {
+            return this->sequenceId;
+        }
+
+        ProtocolHandlerId getProtocolHandlerId() const {
+            return this->protocolHandlerID;
+        }
+
+        void setProtocolHandlerId(ProtocolHandlerId protocolHandlerId) {
+            this->protocolHandlerID = protocolHandlerId;
+        }
+
+        void setProtocolHandlerId(unsigned char protocolHandlerId) {
+            this->protocolHandlerID = static_cast<ProtocolHandlerId>(protocolHandlerId);
+        }
+
+        virtual std::vector<unsigned char> getPayload() const {
+            return this->payload;
+        }
+
+        void setPayload(const std::vector<unsigned char>& payload) {
+            this->payload = payload;
+        }
+
+        /**
+         * AvrCommandFrames are sent to the device via AVRCommands (CMSIS-DAP vendor commands).
+         *
+         * If the size of an AvrCommandFrame exceeds the maximum packet size of an AVRCommand, it will need to
+         * be split into multiple AVRCommands before being sent to the device.
+         *
+         * This methods generates AVR commands from an AvrCommandFrame. The number of AVRCommands generated depends
+         * on the size of the AvrCommandFrame and the passed maximumCommandPacketSize.
+         *
+         * @param maximumCommandPacketSize
+         *  The maximum size of an AVRCommand command packet. This is usually the REPORT_SIZE of the HID
+         *  endpoint, minus a few bytes to account for other AVRCommand fields. The maximumCommandPacketSize is used to
+         *  determine the number of AVRCommands to be generated.
+         *
+         * @return
+         *  A vector of sequenced AVRCommands, each containing a segment of the AvrCommandFrame.
+         */
+        std::vector<AvrCommand> generateAvrCommands(std::size_t maximumCommandPacketSize) const;
+
+        /**
+         * Converts instance of a CMSIS Command to an unsigned char, for sending to the Atmel ICE device.
+         *
+         * @return
+         */
+        explicit virtual operator std::vector<unsigned char> () const;
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrames.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrames.hpp
new file mode 100644
index 00000000..7043d3ca
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrames.hpp
@@ -0,0 +1,12 @@
+#pragma once
+
+#include "AvrCommandFrame.hpp"
+
+#include "Discovery/DiscoveryCommandFrame.hpp"
+#include "Discovery/Query.hpp"
+
+#include "HouseKeeping/HouseKeepingCommandFrame.hpp"
+#include "HouseKeeping/StartSession.hpp"
+#include "HouseKeeping/EndSession.hpp"
+
+#include "AVR8Generic/Avr8GenericCommandFrame.hpp"
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/Discovery/DiscoveryCommandFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/Discovery/DiscoveryCommandFrame.hpp
new file mode 100644
index 00000000..ae7270bc
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/Discovery/DiscoveryCommandFrame.hpp
@@ -0,0 +1,47 @@
+#pragma once
+
+#include <src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/DiscoveryResponseFrame.hpp>
+#include "../AvrCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Discovery
+{
+    using namespace DebugToolDrivers::Protocols::CmsisDap;
+    /**
+     * Discovery commands can only return two responses; A LIST response and a failure.
+     */
+    enum class ResponseId : unsigned char
+    {
+        /*
+         * According to the protocol docs, response ID 0x81 is for a LIST response, but this doesn't seem to be
+         * well defined. So just going to use a generic name.
+         */
+        OK = 0x81,
+        FAILED = 0xA0,
+    };
+
+    inline bool operator==(unsigned char rawId, ResponseId id) {
+        return static_cast<unsigned char>(id) == rawId;
+    }
+
+    inline bool operator==(ResponseId id, unsigned char rawId) {
+        return static_cast<unsigned char>(id) == rawId;
+    }
+
+    inline bool operator!=(unsigned char rawId, ResponseId id) {
+        return static_cast<unsigned char>(id) != rawId;
+    }
+
+    inline bool operator!=(ResponseId id, unsigned char rawId) {
+        return static_cast<unsigned char>(id) != rawId;
+    }
+
+    class DiscoveryCommandFrame: public AvrCommandFrame
+    {
+    public:
+        using ResponseFrameType = ResponseFrames::DiscoveryResponseFrame;
+
+        DiscoveryCommandFrame() {
+            this->setProtocolHandlerId(ProtocolHandlerId::Discovery);
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/Discovery/Query.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/Discovery/Query.hpp
new file mode 100644
index 00000000..b58e30d5
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/Discovery/Query.hpp
@@ -0,0 +1,49 @@
+#pragma once
+
+#include "DiscoveryCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::Discovery
+{
+    /**
+     * The query context is the type of query to execute.
+     */
+    enum class QueryContext : unsigned char
+    {
+        COMMAND_HANDLERS = 0x00,
+        TOOL_NAME = 0x80,
+        SERIAL_NUMBER = 0x81,
+        MANUFACTURE_DATE = 0x82,
+    };
+
+    /**
+     * The Discovery protocol handler only supports one command; the Query command. This command is used to
+     * query information from the device, such as device capabilities, manufacture date, serial number, etc.
+     */
+    class Query: public DiscoveryCommandFrame
+    {
+    private:
+        QueryContext context;
+
+    public:
+        Query() : DiscoveryCommandFrame() {}
+
+        Query(QueryContext context) : DiscoveryCommandFrame() {
+            this->setContext(context);
+        }
+
+        void setContext(QueryContext context) {
+            this->context = context;
+        }
+
+        virtual std::vector<unsigned char> getPayload() const override {
+            /*
+             * The payload for the Query command consists of three bytes. A command ID (0x00), version (0x00) and a
+             * query context.
+             */
+            auto output = std::vector<unsigned char>(3, 0x00);
+            output[2] = static_cast<unsigned char>(this->context);
+
+            return output;
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/EndSession.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/EndSession.hpp
new file mode 100644
index 00000000..8a586d3b
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/EndSession.hpp
@@ -0,0 +1,31 @@
+#pragma once
+
+#include "HouseKeepingCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::HouseKeeping
+{
+    /**
+     * The End Session command ends the active session with the tool.
+     */
+    class EndSession: public HouseKeepingCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The payload for the End Session command consists of three bytes. A command ID byte (0x11), a
+             * version byte (0x00) and a reset flag (0x00 for no reset, 0x01 for tool reset).
+             */
+            auto payload = std::vector<unsigned char>(3);
+            payload[0] = 0x11;
+            payload[1] = 0x00;
+            payload[2] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        EndSession() : HouseKeepingCommandFrame() {
+            this->init();
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/HouseKeepingCommandFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/HouseKeepingCommandFrame.hpp
new file mode 100644
index 00000000..b2306790
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/HouseKeepingCommandFrame.hpp
@@ -0,0 +1,32 @@
+#pragma once
+
+#include "../AvrCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::HouseKeeping
+{
+    enum class ResponseId : unsigned char
+    {
+        OK = 0x80,
+        LIST = 0x81,
+        DATA = 0x84,
+        FAILED = 0xA0,
+        FAILED_WITH_DATA = 0xA1
+    };
+
+    inline bool operator==(unsigned char rawId, ResponseId id) {
+        return static_cast<unsigned char>(id) == rawId;
+    }
+
+    inline bool operator==(ResponseId id, unsigned char rawId) {
+        return rawId == id;
+    }
+
+    class HouseKeepingCommandFrame: public AvrCommandFrame
+    {
+    public:
+        HouseKeepingCommandFrame() {
+            this->setProtocolHandlerId(ProtocolHandlerId::HouseKeeping);
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/StartSession.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/StartSession.hpp
new file mode 100644
index 00000000..16c4dbfa
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/HouseKeeping/StartSession.hpp
@@ -0,0 +1,30 @@
+#pragma once
+
+#include "HouseKeepingCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::CommandFrames::HouseKeeping
+{
+    /**
+     * The Start Session command begins a session with the tool.
+     */
+    class StartSession: public HouseKeepingCommandFrame
+    {
+    private:
+        void init() {
+            /*
+             * The payload for the Start Session command consists of two bytes. A command ID byte (0x10) and a
+             * version byte (0x00).
+             */
+            auto payload = std::vector<unsigned char>(2);
+            payload[0] = 0x10;
+            payload[1] = 0x00;
+            this->setPayload(payload);
+        }
+
+    public:
+        StartSession() : HouseKeepingCommandFrame() {
+            this->init();
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp
new file mode 100644
index 00000000..52e9da52
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.cpp
@@ -0,0 +1,919 @@
+#include <cstdint>
+#include <thread>
+#include <math.h>
+
+#include "EdbgAvr8Interface.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Exceptions/Avr8CommandFailure.hpp"
+
+// Command frames
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetParameter.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetParameter.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ActivatePhysical.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DeactivatePhysical.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Attach.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Detach.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Stop.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Step.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Run.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/RunTo.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetDeviceId.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/Reset.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ReadMemory.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/WriteMemory.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/GetProgramCounter.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetProgramCounter.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/DisableDebugWire.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetSoftwareBreakpoints.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/SetXmegaSoftwareBreakpoint.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearAllSoftwareBreakpoints.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AVR8Generic/ClearSoftwareBreakpoints.hpp"
+
+// AVR events
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+using Bloom::Targets::TargetState;
+using Bloom::Targets::TargetRegister;
+using Bloom::Targets::TargetRegisters;
+using Bloom::Targets::TargetRegisterType;
+
+void EdbgAvr8Interface::setParameter(const Avr8EdbgParameter& parameter, const std::vector<unsigned char>& value) {
+    auto commandFrame = CommandFrames::Avr8Generic::SetParameter(parameter, value);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Failed to set parameter on device!", response);
+    }
+}
+
+std::vector<unsigned char> EdbgAvr8Interface::getParameter(const Avr8EdbgParameter& parameter, std::uint8_t size) {
+    auto commandFrame = CommandFrames::Avr8Generic::GetParameter(parameter, size);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Failed to get parameter from device!", response);
+    }
+
+    return response.getPayloadData();
+}
+
+void EdbgAvr8Interface::configure(const TargetConfig& targetConfig) {
+    auto physicalInterface = targetConfig.jsonObject.find("physicalInterface")->toString().toLower().toStdString();
+
+    auto availablePhysicalInterfaces = EdbgAvr8Interface::physicalInterfacesByName;
+    auto availableConfigVariants = EdbgAvr8Interface::configVariantsByPhysicalInterface;
+
+    if (physicalInterface.empty()
+        || availablePhysicalInterfaces.find(physicalInterface) == availablePhysicalInterfaces.end()
+    ) {
+        throw InvalidConfig("Invalid physical interface config parameter for AVR8 target.");
+    }
+
+    auto selectedPhysicalInterface = availablePhysicalInterfaces.find(physicalInterface)->second;
+
+    if (availableConfigVariants.find(selectedPhysicalInterface) == availableConfigVariants.end()) {
+        throw InvalidConfig("Invalid config variant deduced from physical interface.");
+    }
+
+    if (selectedPhysicalInterface == Avr8PhysicalInterface::DEBUG_WIRE) {
+        Logger::warning("AVR8 debugWire interface selected - the DWEN fuse will need to be enabled");
+    }
+
+    this->physicalInterface = selectedPhysicalInterface;
+    this->configVariant = availableConfigVariants.find(selectedPhysicalInterface)->second;
+
+    if (this->configVariant == Avr8ConfigVariant::XMEGA) {
+        // Default PDI clock to 4MHz
+        this->setParameter(Avr8EdbgParameters::XMEGA_PDI_CLOCK, static_cast<std::uint16_t>(0x0FA0));
+    }
+}
+
+void EdbgAvr8Interface::setTargetParameters(const Avr8Bit::TargetParameters& config) {
+    this->targetParameters = config;
+
+    if (!config.stackPointerRegisterStartAddress.has_value()) {
+        throw Exception("Failed to find stack pointer register start address");
+    }
+
+    if (!config.stackPointerRegisterSize.has_value()) {
+        throw Exception("Failed to find stack pointer register size");
+    }
+
+    if (!config.statusRegisterStartAddress.has_value()) {
+        throw Exception("Failed to find status register start address");
+    }
+
+    if (!config.statusRegisterSize.has_value()) {
+        throw Exception("Failed to find status register size");
+    }
+
+    if (this->configVariant == Avr8ConfigVariant::XMEGA) {
+        if (!config.appSectionPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: APPL_BASE_ADDR");
+        }
+
+        if (!config.bootSectionPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: BOOT_BASE_ADDR");
+        }
+
+        if (!config.bootSectionSize.has_value()) {
+            throw Exception("Missing required parameter: BOOT_BYTES");
+        }
+
+        if (!config.flashSize.has_value()) {
+            throw Exception("Missing required parameter: APPLICATION_BYTES");
+        }
+
+        if (!config.eepromPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: EEPROM_BASE_ADDR");
+        }
+
+        if (!config.fuseRegistersPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: FUSE_BASE_ADDR");
+        }
+
+        if (!config.lockRegistersPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: LOCKBIT_BASE_ADDR");
+        }
+
+        if (!config.userSignaturesPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: USER_SIGN_BASE_ADDR");
+        }
+
+        if (!config.productSignaturesPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: PROD_SIGN_BASE_ADDR");
+        }
+
+        if (!config.ramPdiOffset.has_value()) {
+            throw Exception("Missing required parameter: DATA_BASE_ADDR");
+        }
+
+        if (!config.flashPageSize.has_value()) {
+            throw Exception("Missing required parameter: FLASH_PAGE_BYTES");
+        }
+
+        if (!config.eepromSize.has_value()) {
+            throw Exception("Missing required parameter: EEPROM_SIZE");
+        }
+
+        if (!config.eepromPageSize.has_value()) {
+            throw Exception("Missing required parameter: EEPROM_PAGE_SIZE");
+        }
+
+        Logger::debug("Setting APPL_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_APPL_BASE_ADDR, config.appSectionPdiOffset.value());
+
+        Logger::debug("Setting BOOT_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_BOOT_BASE_ADDR, config.bootSectionPdiOffset.value());
+
+        Logger::debug("Setting EEPROM_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_EEPROM_BASE_ADDR, config.eepromPdiOffset.value());
+
+        Logger::debug("Setting FUSE_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_FUSE_BASE_ADDR, config.fuseRegistersPdiOffset.value());
+
+        Logger::debug("Setting LOCKBIT_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_LOCKBIT_BASE_ADDR, config.lockRegistersPdiOffset.value());
+
+        Logger::debug("Setting USER_SIGN_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_USER_SIGN_BASE_ADDR, config.userSignaturesPdiOffset.value());
+
+        Logger::debug("Setting PROD_SIGN_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_PROD_SIGN_BASE_ADDR, config.productSignaturesPdiOffset.value());
+
+        Logger::debug("Setting DATA_BASE_ADDR AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_DATA_BASE_ADDR, config.ramPdiOffset.value());
+
+        Logger::debug("Setting APPLICATION_BYTES AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_APPLICATION_BYTES, config.flashSize.value());
+
+        Logger::debug("Setting BOOT_BYTES AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_BOOT_BYTES, config.bootSectionSize.value());
+
+        Logger::debug("Setting FLASH_PAGE_BYTES AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_FLASH_PAGE_BYTES, config.flashPageSize.value());
+
+        Logger::debug("Setting EEPROM_SIZE AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_EEPROM_SIZE, config.eepromSize.value());
+
+        Logger::debug("Setting EEPROM_PAGE_SIZE AVR8 parameter");
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_EEPROM_PAGE_SIZE, static_cast<unsigned char>(config.eepromPageSize.value()));
+
+        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_NVM_BASE, static_cast<std::uint16_t>(0x01c0));
+//        this->setParameter(Avr8EdbgParameters::DEVICE_XMEGA_SIGNATURE_OFFSET, static_cast<std::uint16_t>(0x0090));
+
+    } else {
+        if (config.flashPageSize.has_value()) {
+            Logger::debug("Setting DEVICE_FLASH_PAGE_SIZE AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_FLASH_PAGE_SIZE, config.flashPageSize.value());
+        }
+
+        if (config.flashSize.has_value()) {
+            Logger::debug("Setting DEVICE_FLASH_SIZE AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_FLASH_SIZE, config.flashSize.value());
+        }
+
+        if (config.flashStartAddress.has_value()) {
+            Logger::debug("Setting DEVICE_FLASH_BASE AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_FLASH_BASE, config.flashStartAddress.value());
+        }
+
+        if (config.ramStartAddress.has_value()) {
+            Logger::debug("Setting DEVICE_SRAM_START AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_SRAM_START, config.ramStartAddress.value());
+        }
+
+        if (config.eepromSize.has_value()) {
+            Logger::debug("Setting DEVICE_EEPROM_SIZE AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_EEPROM_SIZE, config.eepromSize.value());
+        }
+
+        if (config.eepromPageSize.has_value()) {
+            Logger::debug("Setting DEVICE_EEPROM_PAGE_SIZE AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_EEPROM_PAGE_SIZE, config.eepromPageSize.value());
+        }
+
+        if (config.ocdRevision.has_value()) {
+            Logger::debug("Setting DEVICE_OCD_REVISION AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_OCD_REVISION, config.ocdRevision.value());
+        }
+
+        if (config.ocdDataRegister.has_value()) {
+            Logger::debug("Setting DEVICE_OCD_DATA_REGISTER AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_OCD_DATA_REGISTER, config.ocdDataRegister.value());
+        }
+
+        if (config.spmcsRegisterStartAddress.has_value()) {
+            Logger::debug("Setting DEVICE_SPMCR_REGISTER AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_SPMCR_REGISTER, config.spmcsRegisterStartAddress.value());
+        }
+
+        if (config.osccalAddress.has_value()) {
+            Logger::debug("Setting DEVICE_OSCCAL_ADDR AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_OSCCAL_ADDR, config.osccalAddress.value());
+        }
+
+        if (config.eepromAddressRegisterLow.has_value()) {
+            Logger::debug("Setting DEVICE_EEARL_ADDR AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_EEARL_ADDR, config.eepromAddressRegisterLow.value());
+        }
+
+        if (config.eepromAddressRegisterHigh.has_value()) {
+            Logger::debug("Setting DEVICE_EEARH_ADDR AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_EEARH_ADDR, config.eepromAddressRegisterHigh.value());
+        }
+
+        if (config.eepromControlRegisterAddress.has_value()) {
+            Logger::debug("Setting DEVICE_EECR_ADDR AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_EECR_ADDR, config.eepromControlRegisterAddress.value());
+        }
+
+        if (config.eepromDataRegisterAddress.has_value()) {
+            Logger::debug("Setting DEVICE_EEDR_ADDR AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_EEDR_ADDR, config.eepromDataRegisterAddress.value());
+        }
+
+        if (config.bootSectionStartAddress.has_value()) {
+            Logger::debug("Setting DEVICE_BOOT_START_ADDR AVR8 parameter");
+            this->setParameter(Avr8EdbgParameters::DEVICE_BOOT_START_ADDR, config.bootSectionStartAddress.value());
+        }
+    }
+}
+
+void EdbgAvr8Interface::init() {
+    this->setParameter(
+        Avr8EdbgParameters::CONFIG_VARIANT,
+        static_cast<unsigned char>(this->configVariant)
+    );
+
+    this->setParameter(
+        Avr8EdbgParameters::CONFIG_FUNCTION,
+        static_cast<unsigned char>(this->configFunction)
+    );
+
+    this->setParameter(
+        Avr8EdbgParameters::PHYSICAL_INTERFACE,
+        static_cast<unsigned char>(this->physicalInterface)
+    );
+}
+
+std::unique_ptr<AvrEvent> EdbgAvr8Interface::getAvrEvent() {
+    auto event = this->edbgInterface.requestAvrEvent();
+
+    if (!event.has_value()) {
+        return nullptr;
+    }
+
+    switch (event->getEventId()) {
+        case AvrEventId::AVR8_BREAK_EVENT: {
+            // Break event
+            return std::make_unique<BreakEvent>(event.value());
+        }
+        default: {
+            /*
+             * TODO: This isn't very nice as we're performing an unnecessary copy. Maybe requestAvrEvents should
+             * return a unique_ptr instead?
+             */
+            return std::make_unique<AvrEvent>(event.value());
+        }
+    }
+}
+
+void EdbgAvr8Interface::clearEvents() {
+    while (this->getAvrEvent() != nullptr) {}
+}
+
+void EdbgAvr8Interface::activatePhysical(bool applyExternalReset) {
+    auto commandFrame = CommandFrames::Avr8Generic::ActivatePhysical(applyExternalReset);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        if (!applyExternalReset) {
+            // Try again with external reset applied
+            Logger::debug("Failed to activate physical interface on AVR8 target - retrying with external reset applied.");
+            return this->activatePhysical(true);
+        } else {
+            throw Exception("Activate physical interface command failed");
+        }
+    }
+
+    this->physicalInterfaceActivated = true;
+}
+
+void EdbgAvr8Interface::deactivatePhysical() {
+    auto commandFrame = CommandFrames::Avr8Generic::DeactivatePhysical();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("deactivate physical interface on AVR8 target command failed", response);
+    }
+
+    this->physicalInterfaceActivated = false;
+}
+
+void EdbgAvr8Interface::attach() {
+    auto commandFrame = CommandFrames::Avr8Generic::Attach(true);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Attach AVR8 target command failed", response);
+    }
+
+    this->targetAttached = true;
+
+    // Wait for stopped event
+    this->waitForStoppedEvent();
+}
+
+void EdbgAvr8Interface::detach() {
+    auto commandFrame = CommandFrames::Avr8Generic::Detach();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Detach AVR8 target command failed", response);
+    }
+
+    this->targetAttached = false;
+}
+
+void EdbgAvr8Interface::activate() {
+    if (!this->physicalInterfaceActivated) {
+        this->activatePhysical();
+    }
+
+    if (!this->targetAttached) {
+        this->attach();
+    }
+}
+
+void EdbgAvr8Interface::deactivate() {
+    if (this->targetAttached) {
+        if (this->physicalInterface == Avr8PhysicalInterface::DEBUG_WIRE && this->disableDebugWireOnDeactivate) {
+            try {
+                this->disableDebugWire();
+                Logger::warning("Successfully disabled debugWire on the AVR8 target - this is only temporary - "
+                    "the debugWire module has lost control of the RESET pin. Bloom will no longer be able to interface "
+                    "with the target until the next power cycle.");
+
+            } catch (const Exception& exception) {
+                // Failing to disable debugWire should never prevent us from proceeding with target deactivation.
+                Logger::error(exception.getMessage());
+            }
+        }
+
+        this->stop();
+        this->clearAllBreakpoints();
+        this->run();
+
+        this->detach();
+    }
+
+    if (this->physicalInterfaceActivated) {
+        this->deactivatePhysical();
+    }
+}
+
+void EdbgAvr8Interface::reset() {
+    auto commandFrame = CommandFrames::Avr8Generic::Reset();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Reset AVR8 target command failed", response);
+    }
+}
+
+void EdbgAvr8Interface::stop() {
+    auto commandFrame = CommandFrames::Avr8Generic::Stop();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Stop AVR8 target command failed", response);
+    }
+
+    if (this->getTargetState() == TargetState::RUNNING) {
+        this->waitForStoppedEvent();
+    }
+}
+
+void EdbgAvr8Interface::step() {
+    auto commandFrame = CommandFrames::Avr8Generic::Step();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Step AVR8 target command failed", response);
+    }
+
+    this->targetState = TargetState::RUNNING;
+}
+
+void EdbgAvr8Interface::waitForStoppedEvent() {
+    auto breakEvent = this->waitForAvrEvent<BreakEvent>();
+
+    if (breakEvent == nullptr) {
+        throw Exception("Failed to receive break event for AVR8 target.");
+    }
+
+    this->targetState = TargetState::STOPPED;
+}
+
+void EdbgAvr8Interface::disableDebugWire() {
+    auto commandFrame = CommandFrames::Avr8Generic::DisableDebugWire();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Disable debugWire AVR8 target command failed", response);
+    }
+}
+
+void EdbgAvr8Interface::run() {
+    this->clearEvents();
+    auto commandFrame = CommandFrames::Avr8Generic::Run();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Run AVR8 command failed", response);
+    }
+
+    this->targetState = TargetState::RUNNING;
+}
+
+void EdbgAvr8Interface::runTo(std::uint32_t address) {
+    this->clearEvents();
+    Logger::debug("Running to address: " + std::to_string(address));
+    auto commandFrame = CommandFrames::Avr8Generic::RunTo(address);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Run-to AVR8 command failed", response);
+    }
+
+    this->targetState = TargetState::RUNNING;
+}
+
+std::uint32_t EdbgAvr8Interface::getProgramCounter() {
+    if (this->targetState != TargetState::STOPPED) {
+        this->stop();
+    }
+
+    auto commandFrame = CommandFrames::Avr8Generic::GetProgramCounter();
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Get AVR8 program counter command failed", response);
+    }
+
+    return response.extractProgramCounter();
+}
+
+TargetRegister EdbgAvr8Interface::getStackPointerRegister() {
+    return TargetRegister(TargetRegisterType::STACK_POINTER, this->readMemory(
+        Avr8MemoryType::SRAM,
+        this->targetParameters.stackPointerRegisterStartAddress.value(),
+        this->targetParameters.stackPointerRegisterSize.value()
+    ));
+}
+
+TargetRegister EdbgAvr8Interface::getStatusRegister() {
+    return TargetRegister(TargetRegisterType::STATUS_REGISTER, this->readMemory(
+        Avr8MemoryType::SRAM,
+        this->targetParameters.statusRegisterStartAddress.value(),
+        this->targetParameters.statusRegisterSize.value()
+    ));
+}
+
+void EdbgAvr8Interface::setStackPointerRegister(const TargetRegister& stackPointerRegister) {
+    auto maximumStackPointerRegisterSize = this->targetParameters.stackPointerRegisterSize.value();
+    auto registerValue = stackPointerRegister.value;
+
+    if (registerValue.size() > maximumStackPointerRegisterSize) {
+        throw Exception("Provided stack pointer register value exceeds maximum size.");
+
+    } else if (registerValue.size() < maximumStackPointerRegisterSize) {
+        // Fill the missing most-significant bytes with 0x00
+        registerValue.insert(registerValue.begin(), maximumStackPointerRegisterSize - registerValue.size(), 0x00);
+    }
+
+    this->writeMemory(
+        Avr8MemoryType::SRAM,
+        this->targetParameters.stackPointerRegisterStartAddress.value(),
+        registerValue
+    );
+}
+
+void EdbgAvr8Interface::setStatusRegister(const TargetRegister& statusRegister) {
+    auto maximumStatusRegisterSize = this->targetParameters.statusRegisterSize.value();
+    auto registerValue = statusRegister.value;
+
+    if (registerValue.size() > maximumStatusRegisterSize) {
+        throw Exception("Provided status register value exceeds maximum size.");
+
+    } else if (registerValue.size() < maximumStatusRegisterSize) {
+        // Fill the missing most-significant bytes with 0x00
+        registerValue.insert(registerValue.begin(), maximumStatusRegisterSize - registerValue.size(), 0x00);
+    }
+
+    this->writeMemory(
+        Avr8MemoryType::SRAM,
+        this->targetParameters.statusRegisterStartAddress.value(),
+        registerValue
+    );
+}
+
+void EdbgAvr8Interface::setProgramCounter(std::uint32_t programCounter) {
+    if (this->targetState != TargetState::STOPPED) {
+        this->stop();
+    }
+
+    /*
+     * The program counter will be given in byte address form, but the EDBG tool will be expecting it in word
+     * address (16-bit) form. This is why we divide it by 2.
+     */
+    auto commandFrame = CommandFrames::Avr8Generic::SetProgramCounter(programCounter / 2);
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Set program counter command failed", response);
+    }
+}
+
+TargetSignature EdbgAvr8Interface::getDeviceId() {
+    auto commandFrame = CommandFrames::Avr8Generic::GetDeviceId();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Get device ID command failed", response);
+    }
+
+    return response.extractSignature(this->physicalInterface);
+}
+
+void EdbgAvr8Interface::setBreakpoint(std::uint32_t address) {
+    auto commandFrame = CommandFrames::Avr8Generic::SetSoftwareBreakpoints({address});
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Set software breakpoint command failed", response);
+    }
+}
+
+void EdbgAvr8Interface::clearBreakpoint(std::uint32_t address) {
+    auto commandFrame = CommandFrames::Avr8Generic::ClearSoftwareBreakpoints({address});
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Clear AVR8 software breakpoint command failed", response);
+    }
+}
+
+void EdbgAvr8Interface::clearAllBreakpoints() {
+    auto commandFrame = CommandFrames::Avr8Generic::ClearAllSoftwareBreakpoints();
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Clear all AVR8 software breakpoints command failed", response);
+    }
+}
+
+void EdbgAvr8Interface::refreshTargetState() {
+    auto avrEvent = this->getAvrEvent();
+
+    if (avrEvent != nullptr && avrEvent->getEventId() == AvrEventId::AVR8_BREAK_EVENT) {
+        auto breakEvent = dynamic_cast<BreakEvent*>(avrEvent.get());
+
+        if (breakEvent == nullptr) {
+            throw Exception("Failed to process AVR8 break event");
+        }
+
+        this->targetState = TargetState::STOPPED;
+        return;
+    }
+
+    this->targetState = TargetState::RUNNING;
+}
+
+TargetState EdbgAvr8Interface::getTargetState() {
+    /*
+     * We are not informed when a target goes from a stopped state to a running state, so there is no need
+     * to query the tool when we already know the target has stopped.
+     *
+     * This means we have to rely on the assumption that the target cannot enter a running state without
+     * our instruction.
+     */
+    if (this->targetState != TargetState::STOPPED) {
+        this->refreshTargetState();
+    }
+
+    return this->targetState;
+}
+
+TargetMemoryBuffer EdbgAvr8Interface::readMemory(Avr8MemoryType type, std::uint32_t address, std::uint32_t bytes) {
+    if (type == Avr8MemoryType::FLASH_PAGE && this->targetParameters.flashPageSize.value_or(0) > 0) {
+        // Flash reads must be done in pages
+        auto pageSize = this->targetParameters.flashPageSize.value();
+
+        if ((bytes % pageSize) != 0 || (address % pageSize) != 0) {
+            /*
+             * The number of bytes to read and/or the start address are not aligned.
+             *
+             * Align both and call this function again.
+             */
+            auto alignedAddress = address;
+            auto alignedBytesToRead = bytes;
+
+            if ((bytes % pageSize) != 0) {
+                auto pagesRequired = static_cast<std::uint32_t>(std::ceil(
+                    static_cast<float>(bytes) / static_cast<float>(pageSize)
+                ));
+
+                alignedBytesToRead = (pagesRequired * pageSize);
+            }
+
+            if ((address % pageSize) != 0) {
+                alignedAddress = static_cast<std::uint32_t>(std::floor(
+                    static_cast<float>(address) / static_cast<float>(pageSize)
+                ) * pageSize);
+
+                /*
+                 * Given that we've pushed the start address back, this must be accounted for in the number of
+                 * bytes to read. We'll need to include the difference as those are the bytes we're actually
+                 * interested in.
+                 *
+                 * For example:
+                 *
+                 * Given: page size = 4
+                 * Given: dummy memory (each character represents one byte, with first byte at 0x00) = aaaabbbbccccdddd
+                 * Given: requested start address = 0x05
+                 * Given: requested bytes to read = 4
+                 *
+                 * The start address (0x05) would be:
+                 * aaaabbbbccccdddd
+                 *      ^
+                 * Because only 4 bytes were requested, starting at address 0x05, we're only interested in the bytes
+                 * at addresses 0x05, 0x06, 0x07 and 0x08 (that's bytes bbbc).
+                 *
+                 * But the start address isn't aligned, so we need to align it by pushing it back to the beginning
+                 * of the page (so we'd set it to 0x04, for this example), which is what we do above, when setting
+                 * alignedAddress:
+                 * aaaabbbbccccdddd
+                 *     ^
+                 * But now we'll only be reading 4 bytes from start address 0x04, meaning we won't be reading
+                 * that 4th byte (0x08). So we need to account for this by adding the difference of the requested start
+                 * address and the aligned start address to the number of bytes to read, to ensure that we're reading
+                 * all of the bytes that we're interested in. But this will throw off the aligned bytes!! So we need
+                 * to also account for this by aligning the additional bytes before adding them to alignedBytesToRead.
+                 *
+                 * However, we could simply get away with just adding the bytes without aligning
+                 * them (alignedBytesToRead += (address - alignedAddress);), as the subsequent recursive call will
+                 * align them for us, but it will result in an unnecessary recursion, so we'll just align the
+                 * additional bytes here.
+                 */
+                if ((address - alignedAddress) > (alignedBytesToRead - bytes)) {
+                    alignedBytesToRead += static_cast<std::uint32_t>(std::ceil(
+                        static_cast<float>(address - alignedAddress) / static_cast<float>(pageSize)
+                    )) * pageSize;
+                }
+            }
+
+            /*
+             * Now that the start address and bytes to read have been aligned, we can simply invoke this function
+             * for a second time, with the aligned values. Then, return the requested data and discard the rest.
+             */
+            auto memoryBuffer = this->readMemory(type, alignedAddress, alignedBytesToRead);
+            return TargetMemoryBuffer(
+                memoryBuffer.begin() + (address - alignedAddress),
+                memoryBuffer.begin() + (address - alignedAddress) + bytes
+            );
+        }
+
+        // We can only read one flash page at a time.
+        if (bytes > pageSize) {
+            // bytes should always be a multiple of pageSize (given the code above)
+            assert(bytes % pageSize == 0);
+            int pagesRequired = static_cast<int>(bytes / pageSize);
+            TargetMemoryBuffer memoryBuffer;
+
+            for (auto i = 1; i <= pagesRequired; i++) {
+                auto pageBuffer = this->readMemory(type, address + (pageSize * i), pageSize);
+                memoryBuffer.insert(memoryBuffer.end(), pageBuffer.begin(), pageBuffer.end());
+            }
+
+            return memoryBuffer;
+        }
+    }
+
+    /*
+     * EDBG AVR8 debug tools behave in a really weird way when responding with more than two packets
+     * for a single read memory command. The data they return in this case appears to be of little use.
+     *
+     * To address this, we make sure we only issue read memory commands that will result in no more than two
+     * response packets. For calls that require more than this, we simply split them into numerous calls.
+     */
+
+    /*
+     * The subtraction of 20 bytes here is just to account for any other bytes included in the response
+     * that isn't actually the memory data (like the command ID, version bytes, etc). I could have sought the
+     * actual value but who has the time. It won't exceed 20 bytes. Bite me.
+     */
+    auto singlePacketSize = static_cast<std::uint32_t>(this->edbgInterface.getUsbHidInputReportSize() - 20);
+    auto totalResponsePackets = std::ceil(static_cast<float>(bytes) / static_cast<float>(singlePacketSize));
+    auto totalReadsRequired = std::ceil(static_cast<float>(totalResponsePackets) / 2);
+
+    if (totalResponsePackets > 2) {
+        /*
+         * This call to readMemory() will result in more than two response packets, so split it into multiple calls
+         * that will result in no more than two response packets per call.
+         */
+        auto output = std::vector<unsigned char>();
+
+        for (float i = 1; i <= totalReadsRequired; i++) {
+            auto bytesToRead = static_cast<std::uint32_t>((bytes - output.size()) > (singlePacketSize * 2) ?
+                (singlePacketSize * 2) : bytes - output.size());
+            auto data = this->readMemory(type, static_cast<std::uint32_t>(address + output.size()), bytesToRead);
+            output.insert(output.end(), data.begin(), data.end());
+        }
+
+        return output;
+    }
+
+    auto commandFrame = CommandFrames::Avr8Generic::ReadMemory();
+    commandFrame.setType(type);
+    commandFrame.setAddress(address);
+    commandFrame.setBytes(bytes);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Read memory AVR8 from target command failed", response);
+    }
+
+    return response.getMemoryBuffer();
+}
+
+void EdbgAvr8Interface::writeMemory(Avr8MemoryType type, std::uint32_t address, TargetMemoryBuffer buffer) {
+    if (type == Avr8MemoryType::FLASH_PAGE) {
+        // TODO: Implement support for writing to flash
+        throw Exception("Cannot write to flash");
+    }
+
+    auto commandFrame = CommandFrames::Avr8Generic::WriteMemory();
+    commandFrame.setType(type);
+    commandFrame.setAddress(address);
+    commandFrame.setBuffer(buffer);
+
+    auto response = this->edbgInterface.sendAvrCommandFrameAndWaitForResponseFrame(commandFrame);
+    if (response.getResponseId() == Avr8ResponseId::FAILED) {
+        throw Avr8CommandFailure("Write memory AVR8 from target command failed", response);
+    }
+
+    return;
+}
+
+TargetRegisters EdbgAvr8Interface::readGeneralPurposeRegisters(std::set<std::size_t> registerIds) {
+    auto output = TargetRegisters();
+
+    auto registers = this->readMemory(
+        this->targetParameters.family == Family::XMEGA ? Avr8MemoryType::REGISTER_FILE : Avr8MemoryType::SRAM,
+        this->targetParameters.gpRegisterStartAddress.value_or(0x00),
+        this->targetParameters.gpRegisterSize.value_or(32)
+    );
+
+    for (std::size_t registerIndex = 0; registerIndex < registers.size(); registerIndex++) {
+        if (!registerIds.empty() && registerIds.find(registerIndex) == registerIds.end()) {
+            continue;
+        }
+
+        output.push_back(TargetRegister(registerIndex, {registers[registerIndex]}));
+    }
+
+    return output;
+}
+
+void EdbgAvr8Interface::writeGeneralPurposeRegisters(const TargetRegisters& registers) {
+    auto gpRegisterSize = this->targetParameters.gpRegisterSize.value_or(32);
+    auto gpStartAddress = this->targetParameters.gpRegisterStartAddress.value_or(0x00);
+
+    for (const auto& gpRegister : registers) {
+        auto descriptor = gpRegister.descriptor;
+        if (gpRegister.descriptor.type != TargetRegisterType::GENERAL_PURPOSE_REGISTER) {
+            // We are only to update GP registers here
+            throw Exception("Cannot write non GP register");
+        }
+
+        if (!descriptor.id.has_value()) {
+            throw Exception("Missing GP register ID");
+
+        } else if ((descriptor.id.value() + 1) > gpRegisterSize || (descriptor.id.value() + 1) < 0) {
+            throw Exception("Invalid GP register ID: " + std::to_string(descriptor.id.value()));
+        }
+
+        if (gpRegister.value.size() != 1) {
+            throw Exception("Invalid GP register value size");
+        }
+
+        // TODO: This can be inefficient when updating many registers, maybe do something a little smarter here.
+        this->writeMemory(
+            this->configVariant == Avr8ConfigVariant::XMEGA ? Avr8MemoryType::REGISTER_FILE : Avr8MemoryType::SRAM,
+            static_cast<std::uint32_t>(gpStartAddress + descriptor.id.value()),
+            gpRegister.value
+        );
+    }
+}
+
+TargetMemoryBuffer EdbgAvr8Interface::readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) {
+    auto avr8MemoryType = Avr8MemoryType::SRAM;
+
+    switch (memoryType) {
+        case TargetMemoryType::RAM: {
+            avr8MemoryType = Avr8MemoryType::SRAM;
+            break;
+        }
+        case TargetMemoryType::FLASH: {
+            if (this->configVariant == Avr8ConfigVariant::DEBUG_WIRE) {
+                avr8MemoryType = Avr8MemoryType::FLASH_PAGE;
+
+            } else if (this->configVariant == Avr8ConfigVariant::XMEGA || this->configVariant == Avr8ConfigVariant::UPDI) {
+                avr8MemoryType = Avr8MemoryType::APPL_FLASH;
+
+            } else {
+                avr8MemoryType = Avr8MemoryType::SPM;
+            }
+            break;
+        }
+        case TargetMemoryType::EEPROM: {
+            avr8MemoryType = Avr8MemoryType::EEPROM;
+        }
+    }
+
+    return this->readMemory(avr8MemoryType, startAddress, bytes);
+}
+
+void EdbgAvr8Interface::writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) {
+    auto avr8MemoryType = Avr8MemoryType::SRAM;
+
+    switch (memoryType) {
+        case TargetMemoryType::RAM: {
+            avr8MemoryType = Avr8MemoryType::SRAM;
+            break;
+        }
+        case TargetMemoryType::FLASH: {
+            if (this->configVariant == Avr8ConfigVariant::DEBUG_WIRE) {
+                avr8MemoryType = Avr8MemoryType::FLASH_PAGE;
+
+            } else if (this->configVariant == Avr8ConfigVariant::MEGAJTAG) {
+                avr8MemoryType = Avr8MemoryType::FLASH_PAGE;
+                // TODO: Enable programming mode
+
+            } else if (this->configVariant == Avr8ConfigVariant::XMEGA || this->configVariant == Avr8ConfigVariant::UPDI) {
+                avr8MemoryType = Avr8MemoryType::APPL_FLASH;
+
+            } else {
+                avr8MemoryType = Avr8MemoryType::SPM;
+            }
+            break;
+        }
+        case TargetMemoryType::EEPROM: {
+            avr8MemoryType = Avr8MemoryType::EEPROM;
+        }
+    }
+
+    return this->writeMemory(avr8MemoryType, startAddress, buffer);
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.hpp
new file mode 100644
index 00000000..0bf56ac9
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/EdbgAvr8Interface.hpp
@@ -0,0 +1,528 @@
+#pragma once
+
+#include <cstdint>
+#include <chrono>
+#include <thread>
+#include <cassert>
+
+#include "src/DebugToolDrivers/TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Avr8Generic.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.hpp"
+#include "src/Targets/Microchip/AVR/Target.hpp"
+#include "src/Targets/Microchip/AVR/AVR8/Family.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    using namespace DebugToolDrivers;
+    using namespace Targets;
+    using namespace Targets::Microchip::Avr;
+    using namespace Events;
+
+    using Protocols::CmsisDap::Edbg::EdbgInterface;
+    using Targets::Microchip::Avr::Avr8Bit::Family;
+    using Targets::TargetRegister;
+    using Targets::TargetRegisterMap;
+    using Targets::TargetMemoryBuffer;
+
+    inline bool operator==(unsigned char rawId, Avr8ResponseId id) {
+        return static_cast<unsigned char>(id) == rawId;
+    }
+
+    inline bool operator==(Avr8ResponseId id, unsigned char rawId) {
+        return rawId == id;
+    }
+
+    /**
+     * The EdbgAvr8Interface implements the AVR8 Generic EDBG/CMSIS-DAP protocol, as an Avr8Interface.
+     *
+     * See the "AVR8 Generic Protocol" section in the DS50002630A document by Microchip, for more information on the
+     * protocol.
+     *
+     * This implementation should work with any Microchip EDBG based CMSIS-DAP debug tool (such as the Atmel-ICE,
+     * Power Debugger and the MPLAB SNAP debugger (in "AVR mode")).
+     */
+    class EdbgAvr8Interface: public Avr8Interface
+    {
+    private:
+        /**
+         * The AVR8 Generic protocol is a sub-protocol of the EDBG AVR protocol, which is served via CMSIS-DAP vendor
+         * commands.
+         *
+         * Every EDBG based debug tool that utilises this implementation must provide access to its EDBG interface.
+         */
+        EdbgInterface& edbgInterface;
+
+        /**
+         * The AVR8 Generic protocol provides two functions: Debugging and programming. The desired function must be
+         * configured via the setting of the "AVR8_CONFIG_FUNCTION" parameter.
+         */
+        Avr8ConfigFunction configFunction = Avr8ConfigFunction::DEBUGGING;
+
+        /**
+         * Configuring of the AVR8 Generic protocol depends on some characteristics of the target.
+         * The "AVR8_CONFIG_VARIANT" parameter allows us to determine which target parameters are required by the
+         * debug tool.
+         */
+        Avr8ConfigVariant configVariant;
+
+        /**
+         * Currently, the AVR8 Generic protocol supports 4 physical interfaces: debugWire, JTAG, PDI and UPDI.
+         * The desired physical interface must be selected by setting the "AVR8_PHY_PHYSICAL" parameter.
+         */
+        Avr8PhysicalInterface physicalInterface;
+
+        /**
+         * EDBG-based debug tools require target specific parameters such as memory locations, page sizes and
+         * register addresses. It is the AVR8 target's responsibility to obtain the required information and pass it
+         * to the Avr8Interface. See Avr8::getTargetParameters() and Avr8::postPromotionConfigure().
+         *
+         * For the EdbgAvr8Interface, we send the required parameters to the debug tool immediately upon receiving
+         * them. See EdbgAvr8Interface::setTargetParameters().
+         */
+        Avr8Bit::TargetParameters targetParameters;
+
+        /**
+         * We keep record of the current target state for caching purposes. We'll only refresh the target state if the
+         * target is running. If it has already stopped, then we assume it cannot transition to a running state without
+         * an instruction from us.
+         *
+         * @TODO: Review this. Is the above assumption correct? Always? Explore the option of polling the target state.
+         */
+        TargetState targetState = TargetState::UNKNOWN;
+
+        /**
+         * Upon configuration, the physical interface must be activated on the debug tool. We keep record of this to
+         * assist in our decision to deactivate the physical interface, when deactivate() is called.
+         */
+        bool physicalInterfaceActivated = false;
+
+        /**
+         * As with activating the physical interface, we are required to issue the "attach" command to the debug
+         * tool, in order to start a debug session in the target.
+         */
+        bool targetAttached = false;
+
+        /**
+         * Because the debugWire module requires control of the reset pin on the target, enabling this module will
+         * effectively mean losing control of the reset pin. This means users won't be able to use other
+         * interfaces that require access to the reset pin, such as ISP, until the debugWire module is disabled.
+         *
+         * The AVR8 Generic protocol provides a function for temporarily disabling the debugWire module on the target.
+         * This doesn't change the DWEN fuse and its affect is only temporary - the debugWire module will be
+         * reactivated upon the user cycling the power to the target.
+         *
+         * Bloom is able to temporarily disable the debugWire module, automatically, upon deactivating of the
+         * target (which usually occurs after a debug session has ended). This allows users to program the target via
+         * ISP, after they've finished a debug session. After programming the target, the user will need to cycle the
+         * target power before Bloom can gain access for another debug session.
+         *
+         * This feature can be activated via the user's Bloom configuration.
+         *
+         * See disableDebugWire() method below.
+         */
+        bool disableDebugWireOnDeactivate = false;
+
+        /**
+         * Users are required to set their desired physical interface in their Bloom configuration. This would take
+         * the form of a string, so we map the available options to the appropriate enums.
+         */
+        static inline std::map<std::string, Avr8PhysicalInterface> physicalInterfacesByName = {
+            {"debugwire", Avr8PhysicalInterface::DEBUG_WIRE},
+            {"pdi", Avr8PhysicalInterface::PDI},
+//            {"jtag", Avr8PhysicalInterface::JTAG}, // Disabled for now - will add support later
+//            {"updi", Avr8PhysicalInterface::PDI_1W}, // Disabled for now - will add support later
+        };
+
+        /**
+         * Although users can supply the desired config variant via their Bloom configuration, this is not required.
+         * This mapping allows us to determine which config variant to select, based on the selected physical
+         * interface.
+         */
+        static inline std::map<Avr8PhysicalInterface, Avr8ConfigVariant> configVariantsByPhysicalInterface = {
+            {Avr8PhysicalInterface::DEBUG_WIRE, Avr8ConfigVariant::DEBUG_WIRE},
+            {Avr8PhysicalInterface::PDI, Avr8ConfigVariant::XMEGA},
+            {Avr8PhysicalInterface::JTAG, Avr8ConfigVariant::MEGAJTAG},
+            {Avr8PhysicalInterface::PDI_1W, Avr8ConfigVariant::UPDI},
+        };
+
+        /**
+         * Sets an AVR8 parameter on the debug tool. See the Avr8EdbgParameters class and protocol documentation
+         * for more on available parameters.
+         *
+         * @param parameter
+         * @param value
+         */
+        void setParameter(const Avr8EdbgParameter& parameter, const std::vector<unsigned char>& value);
+
+        /**
+         * Overload for setting parameters with single byte values.
+         *
+         * @param parameter
+         * @param value
+         */
+        void setParameter(const Avr8EdbgParameter& parameter, unsigned char value) {
+            this->setParameter(parameter, std::vector<unsigned char>(1, value));
+        }
+
+        /**
+         * Overload for setting parameters with four byte integer values.
+         *
+         * @param parameter
+         * @param value
+         */
+        void setParameter(const Avr8EdbgParameter& parameter, std::uint32_t value) {
+            auto paramValue = std::vector<unsigned char>(4);
+            paramValue[0] = static_cast<unsigned char>(value);
+            paramValue[1] = static_cast<unsigned char>(value >> 8);
+            paramValue[2] = static_cast<unsigned char>(value >> 16);
+            paramValue[3] = static_cast<unsigned char>(value >> 24);
+
+            this->setParameter(parameter, paramValue);
+        }
+
+        /**
+         * Overload for setting parameters with two byte integer values.
+         *
+         * @param parameter
+         * @param value
+         */
+        void setParameter(const Avr8EdbgParameter& parameter, std::uint16_t value) {
+            auto paramValue = std::vector<unsigned char>(2);
+            paramValue[0] = static_cast<unsigned char>(value);
+            paramValue[1] = static_cast<unsigned char>(value >> 8);
+
+            this->setParameter(parameter, paramValue);
+        }
+
+        /**
+         * Fetches an AV8 parameter from the debug tool.
+         *
+         * @param parameter
+         * @param size
+         * @return
+         */
+        std::vector<unsigned char> getParameter(const Avr8EdbgParameter& parameter, std::uint8_t size);
+
+        /**
+         * Sends the "Activate Physical" command to the debug tool, activating the physical interface and thus enabling
+         * communication between the debug tool and the target.
+         *
+         * @param applyExternalReset
+         */
+        void activatePhysical(bool applyExternalReset = false);
+
+        /**
+         * Sends the "Deactivate Physical" command to the debug tool, which will result in the connection between the
+         * debug tool and the target being severed.
+         */
+        void deactivatePhysical();
+
+        /**
+         * Sends the "Attach" command to the debug tool, which starts a debug session on the target.
+         */
+        void attach();
+
+        /**
+         * Sends the "Detach" command to the debug tool, which terminates any active debug session on the target.
+         */
+        void detach();
+
+        /**
+         * Fetches any queued events belonging to the AVR8 Generic protocol (such as target break events).
+         *
+         * @return
+         */
+        std::unique_ptr<AvrEvent> getAvrEvent();
+
+        /**
+         * Clears (discards) any queued AVR8 Generic protocol events on the debug tool.
+         */
+        void clearEvents();
+
+        /**
+         * Reads memory on the target.
+         *
+         * This method will handle any alignment requirements for the selected memory type.
+         *
+         * See the Avr8MemoryType enum for list of supported AVR8 memory types.
+         *
+         * @param type
+         *  The type of memory to access (Flash, EEPROM, SRAM, etc). See protocol documentation for more on this.
+         *
+         * @param address
+         *  The start address (byte address)
+         *
+         * @param bytes
+         *  Number of bytes to access.
+         *
+         * @return
+         */
+        TargetMemoryBuffer readMemory(Avr8MemoryType type, std::uint32_t address, std::uint32_t bytes);
+
+        /**
+         * Writes memory to the target.
+         *
+         * This method will handle any alignment requirements for the selected memory type.
+         *
+         * See the Avr8MemoryType enum for list of supported AVR8 memory types.
+         *
+         * @param type
+         * @param address
+         * @param buffer
+         */
+        void writeMemory(Avr8MemoryType type, std::uint32_t address, TargetMemoryBuffer buffer);
+
+        /**
+         * Fetches the current target state.
+         *
+         * This currently uses AVR BREAK events to determine if a target has stopped. The lack of any
+         * queued BREAK events leads to the assumption that the target is still running.
+         */
+        void refreshTargetState();
+
+        /**
+         * Temporarily disables the debugWire module on the target. This does not affect the DWEN fuse. The module
+         * will be reactivated upon the cycling of the target power.
+         */
+        void disableDebugWire();
+
+        /**
+         * Waits for an AVR event of a specific type.
+         *
+         * @tparam AvrEventType
+         *  Type of AVR event to wait for. See AvrEvent class for more.
+         *
+         * @param maximumAttempts
+         *  Maximum number of attempts to poll the debug tool for the expected event.
+         *
+         * @return
+         *  If an event is found before maximumAttempts is reached, the event will be returned. Otherwise a nullptr
+         *  will be returned.
+         */
+        template <class AvrEventType>
+        std::unique_ptr<AvrEventType> waitForAvrEvent(int maximumAttempts = 20) {
+            int attemptCount = 0;
+
+            while (attemptCount <= maximumAttempts) {
+                auto genericEvent = this->getAvrEvent();
+
+                if (genericEvent != nullptr) {
+                    // Attempt to downcast event
+                    auto event = std::unique_ptr<AvrEventType>(dynamic_cast<AvrEventType*>(genericEvent.release()));
+
+                    if (event != nullptr) {
+                        return event;
+                    }
+                }
+
+                std::this_thread::sleep_for(std::chrono::milliseconds(50));
+                attemptCount++;
+            }
+
+            return nullptr;
+        }
+
+        /**
+         * Waits for an AVR BREAK event.
+         *
+         * This simply wraps a call to waitForAvrEvent<BreakEvent>(). An exception will be thrown if the call doesn't
+         * return a BreakEvent.
+         *
+         * This should only be used when a BreakEvent is always expected.
+         */
+        void waitForStoppedEvent();
+
+    public:
+        EdbgAvr8Interface(EdbgInterface& edbgInterface)
+        : edbgInterface(edbgInterface) {};
+
+        /*
+         * The public methods below implement the interface defined by the Avr8Interface class.
+         * See the comments in that class for more info on the expected behaviour of each method.
+         */
+
+        /**
+         * As already mentioned in numerous comments above, the EdbgAvr8Interface requires some configuration from
+         * the user. This is supplied via the user's Bloom configuration.
+         *
+         * @param targetConfig
+         */
+        virtual void configure(const TargetConfig& targetConfig) override;
+
+        /**
+         * Accepts target parameters from the AVR8 target instance and sends the necessary target parameters to the
+         * debug tool.
+         *
+         * @param config
+         */
+        virtual void setTargetParameters(const Avr8Bit::TargetParameters& config) override;
+
+        /**
+         * Initialises the AVR8 Generic protocol interface by setting the appropriate parameters on the debug tool.
+         */
+        virtual void init() override;
+
+        /**
+         * Issues the "stop" command to the debug tool, halting target execution.
+         */
+        virtual void stop() override;
+
+        /**
+         * Issues the "run" command to the debug tool, resuming execution on the target.
+         */
+        virtual void run() override;
+
+        /**
+         * Issues the "run to" command to the debug tool, resuming execution on the target, up to a specific byte
+         * address. The target will dispatch an AVR BREAK event once it reaches the specified address.
+         *
+         * @param address
+         *  The (byte) address to run to.
+         */
+        virtual void runTo(std::uint32_t address) override;
+
+        /**
+         * Issues the "step" command to the debug tool, stepping the execution on the target. The stepping can be
+         * configured to step in, out or over. But currently we only support stepping in. The target will dispatch
+         * an AVR BREAK event once it reaches the next instruction.
+         */
+        virtual void step() override;
+
+        /**
+         * Issues the "reset" command to the debug tool, resetting target execution.
+         */
+        virtual void reset() override;
+
+        /**
+         * Activates the physical interface and starts a debug session on the target (via attach()).
+         */
+        virtual void activate() override;
+
+        /**
+         * Terminates any active debug session on the target and severs the connection between the debug tool and
+         * the target (by deactivating the physical interface).
+         */
+        virtual void deactivate() override;
+
+        /**
+         * Issues the "PC Read" command to the debug tool, to extract the current program counter.
+         *
+         * @return
+         */
+        virtual std::uint32_t getProgramCounter() override;
+
+        /**
+         * Reads the stack pointer register from the target.
+         *
+         * @return
+         */
+        virtual TargetRegister getStackPointerRegister() override;
+
+        /**
+         * Reads the status register from the target.
+         *
+         * @return
+         */
+        virtual TargetRegister getStatusRegister() override;
+
+        /**
+         * Updates the stack pointer register on ther target.
+         *
+         * @param stackPointerRegister
+         */
+        virtual void setStackPointerRegister(const TargetRegister& stackPointerRegister) override;
+
+        /**
+         * Updates the status register on the target.
+         *
+         * @param statusRegister
+         */
+        virtual void setStatusRegister(const TargetRegister& statusRegister) override;
+
+        /**
+         * Issues the "PC Write" command to the debug tool, setting the program counter on the target.
+         *
+         * @param programCounter
+         *  The byte address to set as the program counter.
+         */
+        virtual void setProgramCounter(std::uint32_t programCounter) override;
+
+        /**
+         * Issues the "Get ID" command to the debug tool, to extract the signature from the target.
+         *
+         * @return
+         */
+        virtual TargetSignature getDeviceId() override;
+
+        /**
+         * Issues the "Software Breakpoint Set" command to the debug tool, setting a software breakpoint at the given
+         * byte address.
+         *
+         * @param address
+         *  The byte address to position the breakpoint.
+         */
+        virtual void setBreakpoint(std::uint32_t address) override;
+
+        /**
+         * Issues the "Software Breakpoint Clear" command to the debug tool, clearing any breakpoint at the given
+         * byte address.
+         *
+         * @param address
+         *  The byte address of the breakpoint to clear.
+         */
+        virtual void clearBreakpoint(std::uint32_t address) override;
+
+        /**
+         * Issues the "Software Breakpoint Clear All" command to the debug tool, clearing all software breakpoints
+         * that were set *in the current debug session*.
+         *
+         * If the debug session ended before any of the set breakpoints were cleared, this will *not* clear them.
+         */
+        virtual void clearAllBreakpoints() override;
+
+        /**
+         * Reads gernal purpose registers from the target.
+         *
+         * @param registerIds
+         * @return
+         */
+        virtual TargetRegisters readGeneralPurposeRegisters(std::set<std::size_t> registerIds) override;
+
+        /**
+         * Writes general purpose registers to target.
+         *
+         * @param registers
+         */
+        virtual void writeGeneralPurposeRegisters(const TargetRegisters& registers) override;
+
+        /**
+         * This is an overloaded method.
+         *
+         * Resolves the correct Avr8MemoryType from the given TargetMemoryType and calls readMemory().
+         *
+         * @param memoryType
+         * @param startAddress
+         * @param bytes
+         * @return
+         */
+        virtual TargetMemoryBuffer readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) override;
+
+        /**
+         * This is an overloaded method.
+         *
+         * Resolves the correct Avr8MemoryType from the given TargetMemoryType and calls writeMemory().
+         *
+         * @param memoryType
+         * @param startAddress
+         * @param buffer
+         */
+        virtual void writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) override;
+
+        /**
+         * Returns the current state of the target.
+         *
+         * @return
+         */
+        virtual TargetState getTargetState() override;
+    };
+}
\ No newline at end of file
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.cpp
new file mode 100644
index 00000000..0e4d2f18
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.cpp
@@ -0,0 +1,29 @@
+#include <cstdint>
+
+#include "BreakEvent.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+
+void BreakEvent::init(const AvrEvent& event) {
+    AvrEvent::init(event);
+    auto& data = this->getEventData();
+
+    if (data.size() < 8) {
+        /*
+         * All BreakEvent packets must consist of at least 9 bytes:
+         * 1 byte for event ID
+         * 4 bytes for program counter
+         * 1 byte for break cause
+         * 2 bytes for extended info
+         */
+        throw Exception("Failed to process BreakEvent from AvrEvent - unexpected packet size.");
+    }
+
+    // Program counter consists of 4 bytes
+    this->programCounter = static_cast<std::uint32_t>((data[4] << 24) | (data[3] << 16) | (data[2] << 8) | data[1]) * 2;
+
+    // Break cause is 1 byte, where 0x01 is 'program breakpoint' and 0x00 'unspecified'
+    this->breakCause = data[7] == 0x01 ? TargetBreakCause::BREAKPOINT : TargetBreakCause::UNKNOWN;
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.hpp
new file mode 100644
index 00000000..e639e808
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Events/AVR8Generic/BreakEvent.hpp
@@ -0,0 +1,33 @@
+#pragma once
+
+#include <cstdint>
+
+#include "../../AvrEvent.hpp"
+#include "src/Targets/Microchip/AVR/Target.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    using Targets::TargetBreakCause;
+
+    class BreakEvent: public AvrEvent
+    {
+    private:
+        std::uint32_t programCounter;
+        TargetBreakCause breakCause;
+
+        void init(const AvrEvent& event);
+
+    public:
+        BreakEvent(const AvrEvent& event) {
+            this->init(event);
+        }
+
+        std::uint32_t getProgramCounter() {
+            return this->programCounter;
+        }
+
+        TargetBreakCause getBreakCause() {
+            return this->breakCause;
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Exceptions/Avr8CommandFailure.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Exceptions/Avr8CommandFailure.hpp
new file mode 100644
index 00000000..d8153fa9
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/Exceptions/Avr8CommandFailure.hpp
@@ -0,0 +1,81 @@
+#pragma once
+
+#include "src/Exceptions/Exception.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/Avr8GenericResponseFrame.hpp"
+
+namespace Bloom::Exceptions
+{
+    using Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::ResponseFrames::Avr8Generic::Avr8GenericResponseFrame;
+    class Avr8CommandFailure: public Exception
+    {
+    private:
+        static inline auto failureCodeToDescription = std::map<unsigned char, std::string>({
+            {0x10, "debugWIRE physical error"},
+            {0x11, "JTAGM failed to initialise"},
+            {0x12, "JTAGM did something strange"},
+            {0x13, "JTAG low level error"},
+            {0x14, "Unsupported version of JTAGM"},
+            {0x15, "JTAG master timed out"},
+            {0x16, "JTAG bit banger timed out"},
+            {0x17, "Parity error in received data"},
+            {0x18, "Did not receive EMPTY byte"},
+            {0x19, "PDI physical timed out"},
+            {0x1A, "Collision on physical level"},
+            {0x1B, "PDI enable failed"},
+            {0x20, "Target not found"},
+            {0x21, "Failure when increasing baud"},
+            {0x22, "Target power not detected"},
+            {0x23, "Must run attach command first"},
+            {0x24, "Devices > 31"},
+            {0x25, "Configured device bits do not add up to detected bits"},
+            {0x31, "Physical not activated"},
+            {0x32, "Illegal run / stopped state"},
+            {0x33, "Invalid config for activate phy"},
+            {0x34, "Not a valid memtype"},
+            {0x35, "Too many or too few bytes"},
+            {0x36, "Asked for a bad address"},
+            {0x37, "Asked for badly aligned data"},
+            {0x38, "Address not within legal range"},
+            {0x39, "Illegal value given"},
+            {0x3A, "Illegal target ID"},
+            {0x3B, "Clock value out of range"},
+            {0x3C, "A timeout occurred"},
+            {0x3D, "Read an illegal OCD status"},
+            {0x40, "NVM failed to be enabled"},
+            {0x41, "NVM failed to be disabled"},
+            {0x42, "Illegal control/status bits"},
+            {0x43, "CRC mismatch"},
+            {0x44, "Failed to enable OCD"},
+            {0x50, "Device not under control"},
+            {0x60, "Error when reading PC"},
+            {0x61, "Error when reading register"},
+            {0x70, "Error while reading"},
+            {0x71, "Error while writing"},
+            {0x72, "Timeout while reading"},
+            {0x80, "Invalid breakpoint configuration"},
+            {0x81, "Not enough available resources"},
+            {0x90, "Feature not available"},
+            {0x91, "Command has not been implemented"},
+            {0xFF, "Unknown error"},
+        });
+
+    public:
+        explicit Avr8CommandFailure(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit Avr8CommandFailure(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+
+        explicit Avr8CommandFailure(const std::string& message, Avr8GenericResponseFrame& responseFrame)
+        : Exception(message) {
+            this->message = message;
+
+            auto responsePayload = responseFrame.getPayload();
+            if (responsePayload.size() == 3 && this->failureCodeToDescription.contains(responsePayload[2])) {
+                this->message += " - Failure reason: " + this->failureCodeToDescription.find(responsePayload[2])->second;
+            }
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/Avr8GenericResponseFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/Avr8GenericResponseFrame.hpp
new file mode 100644
index 00000000..7ff882b1
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/Avr8GenericResponseFrame.hpp
@@ -0,0 +1,31 @@
+#pragma once
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::ResponseFrames::Avr8Generic
+{
+    class Avr8GenericResponseFrame: public AvrResponseFrame
+    {
+    public:
+        Avr8GenericResponseFrame(const std::vector<AvrResponse>& AVRResponses) : AvrResponseFrame(AVRResponses) {}
+        Avr8GenericResponseFrame() {}
+
+        /**
+         * See parent method.
+         */
+        std::vector<unsigned char> getPayloadData() override {
+            /*
+             * AVR8 data payloads are in little endian form and include two bytes before the data (response ID and
+             * version byte) as well as an additional byte after the data, known as the 'status code'.
+             */
+            auto data = std::vector<unsigned char>(
+                this->getPayload().begin() + 2,
+                this->getPayload().end() - 1
+            );
+
+            std::reverse(data.begin(), data.end());
+            return data;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/GetDeviceId.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/GetDeviceId.hpp
new file mode 100644
index 00000000..d4b94a33
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/GetDeviceId.hpp
@@ -0,0 +1,40 @@
+#pragma once
+
+#include "Avr8GenericResponseFrame.hpp"
+#include "src/Targets/Microchip/AVR/Target.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::ResponseFrames::Avr8Generic
+{
+    using namespace Targets::Microchip::Avr;
+
+    class GetDeviceId: public Avr8GenericResponseFrame
+    {
+    public:
+        GetDeviceId(const std::vector<AvrResponse>& AvrResponses) : Avr8GenericResponseFrame(AvrResponses) {}
+        GetDeviceId() {}
+
+        TargetSignature extractSignature(Avr8PhysicalInterface physicalInterface) {
+            auto payloadData = this->getPayloadData();
+
+            switch (physicalInterface) {
+                case Avr8PhysicalInterface::DEBUG_WIRE: {
+                    /*
+                     * When using the DebugWire physical interface, the get device ID command will return
+                     * four bytes, where the first can be ignored.
+                     */
+                    return TargetSignature(payloadData[1], payloadData[2], payloadData[3]);
+                }
+                case Avr8PhysicalInterface::PDI:
+                case Avr8PhysicalInterface::PDI_1W: {
+                    /*
+                     * When using the PDI physical interface, the signature is returned in LSB format.
+                     */
+                    return TargetSignature(payloadData[3], payloadData[2], payloadData[1]);
+                }
+                default: {
+                    return TargetSignature(payloadData[0], payloadData[1], payloadData[2]);
+                }
+            }
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/GetProgramCounter.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/GetProgramCounter.hpp
new file mode 100644
index 00000000..1f73e95d
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/GetProgramCounter.hpp
@@ -0,0 +1,32 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Avr8GenericResponseFrame.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::ResponseFrames::Avr8Generic
+{
+    using namespace Bloom::Exceptions;
+
+    class GetProgramCounter: public Avr8GenericResponseFrame
+    {
+    public:
+        GetProgramCounter(const std::vector<AvrResponse>& AVRResponses) : Avr8GenericResponseFrame(AVRResponses) {}
+        GetProgramCounter() {}
+
+        std::uint32_t extractProgramCounter() {
+            /*
+             * The payload for the PC Read command should always consist of six bytes. Thr first two being the
+             * command ID and version, the other four being the PC. The four PC bytes are little-endian.
+             */
+            auto& payload = this->getPayload();
+            if (payload.size() != 6) {
+                throw Exception("Failed to extract PC from payload of PC read command response frame - unexpected payload size.");
+            }
+
+            return static_cast<std::uint32_t>(payload[5] << 24 | payload[4] << 16 | payload[3] << 8 | payload[2]) * 2;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/ReadMemory.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/ReadMemory.hpp
new file mode 100644
index 00000000..56465d66
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AVR8Generic/ReadMemory.hpp
@@ -0,0 +1,31 @@
+#pragma once
+
+#include "Avr8GenericResponseFrame.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::ResponseFrames::Avr8Generic
+{
+    using namespace Bloom::Exceptions;
+    using Bloom::Targets::TargetMemoryBuffer;
+
+    class ReadMemory: public Avr8GenericResponseFrame
+    {
+    public:
+        ReadMemory(const std::vector<AvrResponse>& AVRResponses) : Avr8GenericResponseFrame(AVRResponses) {}
+        ReadMemory() {}
+
+        TargetMemoryBuffer getMemoryBuffer() {
+            /*
+             * AVR8 data payloads are typically in little endian form, but this does not apply the data returned
+             * from the READ MEMORY commands.
+             */
+            auto data = std::vector<unsigned char>(
+                this->getPayload().begin() + 2,
+                this->getPayload().end() - 1
+            );
+
+            return data;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.cpp
new file mode 100644
index 00000000..ea413093
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.cpp
@@ -0,0 +1,38 @@
+#include <cstdint>
+
+#include "AvrResponseFrame.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::Exceptions;
+
+void AvrResponseFrame::initFromAvrResponses(const std::vector<AvrResponse>& avrResponses) {
+    // Build a raw frame buffer from the AVRResponse objects and just call initFromRawFrame()
+    std::vector<unsigned char> rawFrame;
+
+    for (auto& avrResponse : avrResponses) {
+        auto responsePacket = avrResponse.getResponsePacket();
+        rawFrame.insert(rawFrame.end(), responsePacket.begin(), responsePacket.end());
+    }
+
+    return this->initFromRawFrame(rawFrame);
+}
+
+void AvrResponseFrame::initFromRawFrame(const std::vector<unsigned char>& rawFrame) {
+    if (rawFrame.size() < 4) {
+        // All AVR response frames must consist of at least four bytes (SOF, sequence ID (two bytes) and
+        // a protocol handler ID)
+        throw Exception("Failed to construct AvrResponseFrame - unexpected end to raw frame");
+    }
+
+    if (rawFrame[0] != 0x0E) {
+        // The SOF field must always be 0x0E
+        throw Exception("Failed to construct AvrResponseFrame - unexpected SOF field value in raw frame");
+    }
+
+    this->setSequenceId(static_cast<std::uint16_t>((rawFrame[2] << 8) + rawFrame[1]));
+    this->setProtocolHandlerId(rawFrame[3]);
+
+    auto& payload = this->getPayload();
+    payload.insert(payload.begin(), rawFrame.begin() + 4, rawFrame.end());
+}
\ No newline at end of file
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.hpp
new file mode 100644
index 00000000..61e0039e
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.hpp
@@ -0,0 +1,88 @@
+#pragma once
+
+#include <cstdint>
+#include <vector>
+#include <algorithm>
+#include <memory>
+
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/Command.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/Edbg.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponse.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr
+{
+    using namespace Edbg;
+
+    class AvrResponseFrame
+    {
+    private:
+        unsigned char SOF = 0x0E;
+
+        /**
+         * Incrementing from 0x00
+         */
+        std::uint16_t sequenceID = 1;
+
+        /**
+         * Destination sub-protocol handler ID
+         */
+        ProtocolHandlerId protocolHandlerID;
+
+        std::vector<unsigned char> payload;
+
+    protected:
+        virtual void initFromRawFrame(const std::vector<unsigned char>& rawFrame);
+
+        void setSequenceId(std::uint16_t sequenceId) {
+            this->sequenceID = sequenceId;
+        }
+
+        void setProtocolHandlerId(ProtocolHandlerId protocolHandlerId) {
+            this->protocolHandlerID = protocolHandlerId;
+        }
+
+        void setProtocolHandlerId(unsigned char protocolHandlerId) {
+            this->protocolHandlerID = static_cast<ProtocolHandlerId>(protocolHandlerId);
+        }
+
+        void setPayload(const std::vector<unsigned char>& payload) {
+            this->payload = payload;
+        }
+
+    public:
+        explicit AvrResponseFrame(const std::vector<AvrResponse>& AVRResponses) {
+            this->initFromAvrResponses(AVRResponses);
+        }
+
+        explicit AvrResponseFrame() {}
+
+        /**
+         * An AVRResponse contains a single fragment of an AvrResponseFrame.
+         *
+         * This method will construct an AvrResponseFrame from a vector of AVRResponses.
+         *
+         * @param avrResponses
+         */
+        void initFromAvrResponses(const std::vector<AvrResponse>& avrResponses);
+
+        std::uint16_t getSequenceId() const {
+            return this->sequenceID;
+        }
+
+        ProtocolHandlerId getProtocolHandlerId() const {
+            return this->protocolHandlerID;
+        }
+
+        std::vector<unsigned char>& getPayload() {
+            return this->payload;
+        }
+
+        unsigned char getResponseId() {
+            return this->payload[0];
+        }
+
+        virtual std::vector<unsigned char> getPayloadData() {
+            return this->getPayload();
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/DiscoveryResponseFrame.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/DiscoveryResponseFrame.hpp
new file mode 100644
index 00000000..ca36ef49
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/DiscoveryResponseFrame.hpp
@@ -0,0 +1,29 @@
+#pragma once
+
+#include "AvrResponseFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr::ResponseFrames
+{
+    class DiscoveryResponseFrame: public AvrResponseFrame
+    {
+    public:
+        DiscoveryResponseFrame(const std::vector<AvrResponse>& AVRResponses) : AvrResponseFrame(AVRResponses) {}
+        DiscoveryResponseFrame() {}
+
+        /**
+         * See parent method.
+         */
+        std::vector<unsigned char> getPayloadData() override {
+            /*
+             * DISCOVERY payloads include two bytes before the data (response ID and version byte).
+             */
+            auto data = std::vector<unsigned char>(
+                this->getPayload().begin() + 2,
+                this->getPayload().end()
+            );
+
+            return data;
+        }
+    };
+
+}
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/Edbg.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/Edbg.hpp
new file mode 100644
index 00000000..da4357da
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/Edbg.hpp
@@ -0,0 +1,12 @@
+#pragma once
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg
+{
+    enum class ProtocolHandlerId: unsigned char
+    {
+        Discovery = 0x00,
+        HouseKeeping = 0x01,
+        Avr8Generic = 0x12,
+        Avr32Generic = 0x13,
+    };
+}
\ No newline at end of file
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.cpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.cpp
new file mode 100644
index 00000000..a466c246
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.cpp
@@ -0,0 +1,91 @@
+#include <cstdint>
+#include <cstring>
+#include <memory>
+
+#include "EdbgInterface.hpp"
+
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg::Avr;
+using namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg;
+using namespace Bloom::Exceptions;
+
+Protocols::CmsisDap::Response EdbgInterface::sendAvrCommandFrameAndWaitForResponse(
+    const Protocols::CmsisDap::Edbg::Avr::AvrCommandFrame& avrCommandFrame
+) {
+    // An AVR command frame can be split into multiple CMSIS-DAP commands. Each command
+    // containing a fragment of the AvrCommandFrame.
+
+    // Minus 3 to accommodate AVR command meta data
+    std::size_t maximumCommandPacketSize = (this->getUsbHidInputReportSize() - 3);
+
+    auto avrCommands = avrCommandFrame.generateAvrCommands(maximumCommandPacketSize);
+
+    for (auto& avrCommand : avrCommands) {
+        // Send command to device
+        auto response = this->sendCommandAndWaitForResponse(avrCommand);
+
+        if (&avrCommand ==& avrCommands.back()) {
+            return* response;
+        }
+    }
+
+    // This should never happen
+    throw Exception("Cannot send AVR command frame - failed to generate CMSIS-DAP Vendor (AVR) commands");
+}
+
+Protocols::CmsisDap::Edbg::Avr::AvrResponse EdbgInterface::getAvrResponse() {
+    auto cmsisResponse = this->getResponse();
+
+    if (cmsisResponse->getResponseId() == 0x81) {
+        // This is an AVR_RSP response
+        auto avrResponse = Protocols::CmsisDap::Edbg::Avr::AvrResponse();
+        avrResponse.init(*cmsisResponse);
+        return avrResponse;
+    } else {
+        throw Exception("Unexpected response to AvrResponseCommand from device");
+    }
+}
+
+std::optional<Protocols::CmsisDap::Edbg::Avr::AvrEvent> EdbgInterface::requestAvrEvent() {
+    this->sendCommand(AvrEventCommand());
+    auto cmsisResponse = this->getResponse();
+
+    if (cmsisResponse->getResponseId() == 0x82) {
+        // This is an AVR_EVT response
+        auto avrEvent = Protocols::CmsisDap::Edbg::Avr::AvrEvent();
+        avrEvent.init(*cmsisResponse);
+        return avrEvent.getEventDataSize() > 0 ? std::optional(avrEvent) : std::nullopt;
+    } else {
+        throw Exception("Unexpected response to AvrEventCommand from device");
+    }
+}
+
+std::vector<Protocols::CmsisDap::Edbg::Avr::AvrResponse> EdbgInterface::requestAvrResponses() {
+    std::vector<Protocols::CmsisDap::Edbg::Avr::AvrResponse> responses;
+    AvrResponseCommand responseCommand;
+
+    this->sendCommand(responseCommand);
+    auto response = this->getAvrResponse();
+    responses.push_back(response);
+    int fragmentCount = response.getFragmentCount();
+
+    while (responses.size() < fragmentCount) {
+        // There are more response packets
+        this->sendCommand(responseCommand);
+        response = this->getAvrResponse();
+
+        if (response.getFragmentCount() != fragmentCount) {
+            throw Exception("Failed to fetch AVRResponse objects - invalid fragment count returned.");
+        }
+
+        if (response.getFragmentCount() == 0 && response.getFragmentNumber() == 0) {
+            throw Exception("Failed to fetch AVRResponse objects - unexpected empty response");
+        } else if (response.getFragmentNumber() == 0) {
+            // End of response data ( &this packet can be ignored)
+            break;
+        }
+
+        responses.push_back(response);
+    }
+
+    return responses;
+}
\ No newline at end of file
diff --git a/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.hpp b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.hpp
new file mode 100644
index 00000000..abf9849d
--- /dev/null
+++ b/src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/EdbgInterface.hpp
@@ -0,0 +1,77 @@
+#pragma once
+
+#include <memory>
+
+#include "src/Exceptions/Exception.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/CmsisDapInterface.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrCommand.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEventCommand.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrEvent.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/AvrResponseCommand.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/ResponseFrames/AvrResponseFrame.hpp"
+#include "src/DebugToolDrivers/Protocols/CMSIS-DAP/VendorSpecific/EDBG/AVR/CommandFrames/AvrCommandFrame.hpp"
+
+namespace Bloom::DebugToolDrivers::Protocols::CmsisDap::Edbg
+{
+    using namespace Protocols::CmsisDap::Edbg::Avr;
+    using namespace Exceptions;
+
+    /**
+     * The EdbgInterface class implements the EDBG sub-protocol, which takes the form of numerous CMSIS-DAP vendor
+     * commands.
+     */
+    class EdbgInterface: public CmsisDapInterface
+    {
+    public:
+        explicit EdbgInterface() = default;
+
+        /**
+         * Send an AvrCommandFrame to the debug tool and wait for a response.
+         *
+         * NOTE: The response this method waits for is *not* an AvrResponseFrame, but rather, just a response from
+         * the debug tool indicating successful receipt of the AvrCommandFrame.
+         * See EdbgInterface::sendAvrCommandFrameAndWaitForResponseFrame().
+         *
+         * @param avrCommandFrame
+         * @return
+         */
+        virtual Protocols::CmsisDap::Response sendAvrCommandFrameAndWaitForResponse(
+            const Protocols::CmsisDap::Edbg::Avr::AvrCommandFrame& avrCommandFrame
+        );
+
+        Protocols::CmsisDap::Edbg::Avr::AvrResponse getAvrResponse();
+
+        virtual std::vector<Protocols::CmsisDap::Edbg::Avr::AvrResponse> requestAvrResponses();
+
+        virtual std::optional<Protocols::CmsisDap::Edbg::Avr::AvrEvent> requestAvrEvent();
+
+
+        template<class CommandFrameType>
+        typename CommandFrameType::ResponseFrameType sendAvrCommandFrameAndWaitForResponseFrame(
+            const CommandFrameType& avrCommandFrame
+        ) {
+            static_assert(
+                std::is_base_of<AvrCommandFrame, CommandFrameType>::value,
+                "AVR Command must be base of AvrCommandFrame."
+            );
+
+            static_assert(
+                std::is_base_of<AvrResponseFrame, typename CommandFrameType::ResponseFrameType>::value,
+                "AVR Command must specify a valid response frame type, derived from AvrResponseFrame."
+            );
+
+            auto response = this->sendAvrCommandFrameAndWaitForResponse(avrCommandFrame);
+
+            if (response.getData()[0] != 0x01) {
+                // The last response packet should always acknowledge receipt of the AvrCommandFrame
+                throw Exception("Failed to send AvrCommandFrame to device - device did not acknowledge receipt.");
+            }
+
+            auto responses = this->requestAvrResponses();
+            auto responseFrame = typename CommandFrameType::ResponseFrameType();
+            responseFrame.initFromAvrResponses(responses);
+            return responseFrame;
+        }
+    };
+}
diff --git a/src/DebugToolDrivers/TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp b/src/DebugToolDrivers/TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp
new file mode 100644
index 00000000..a5e171d1
--- /dev/null
+++ b/src/DebugToolDrivers/TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp
@@ -0,0 +1,211 @@
+#pragma once
+
+#include <cstdint>
+#include <set>
+
+#include "src/Targets/Microchip/AVR/TargetSignature.hpp"
+#include "src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp"
+#include "src/Targets/TargetState.hpp"
+#include "src/Targets/TargetRegister.hpp"
+#include "src/Targets/TargetMemory.hpp"
+#include "src/ApplicationConfig.hpp"
+
+namespace Bloom::DebugToolDrivers::TargetInterfaces::Microchip::Avr::Avr8
+{
+    using namespace Bloom;
+    using namespace Targets::Microchip::Avr;
+
+    using Targets::TargetState;
+    using Targets::TargetRegisterMap;
+    using Targets::TargetMemoryBuffer;
+    using Targets::TargetMemoryType;
+    using Targets::TargetRegister;
+    using Targets::TargetRegisters;
+    using Targets::Microchip::Avr::TargetSignature;
+
+    /**
+     * Interfacing with an AVR8 target can vary significantly, depending on the debug tool being used.
+     *
+     * This class describes the interface required for interfacing with AVR8 targets.
+     *
+     * Each debug tool that supports interfacing with AVR8 targets must provide an implementation
+     * of this interface class. For example, the Atmel-ICE provides the EdbgAvr8Interface implementation for
+     * interfacing with AVR8 targets. See Bloom::DebugToolDrivers::AtmelIce->getAvr8Interface() and
+     * Bloom::DebugToolDriver->getAvr8Interface() for more on this.
+     */
+    class Avr8Interface
+    {
+    public:
+        /**
+         * Configures the interface. Any debug tool -> target interface specific configuration should take
+         * place here.
+         *
+         * For example, the EdbgAvr8Interface implementation configures the physical interface and config
+         * variant here.
+         *
+         * @param targetConfig
+         */
+        virtual void configure(const TargetConfig& targetConfig) = 0;
+
+        /**
+         * Should accept Avr8 target parameters for configuration of the interface.
+         *
+         * @param config
+         */
+        virtual void setTargetParameters(const Avr8Bit::TargetParameters& config) = 0;
+
+        /**
+         * Should initialise the interface between the debug tool and the AVR8 target.
+         */
+        virtual void init() = 0;
+
+        /**
+         * Should stop execution on that target.
+         */
+        virtual void stop() = 0;
+
+        /**
+         * Should resume execution on the AVR8 target.
+         */
+        virtual void run() = 0;
+
+        /**
+         * Continue execution up to a specific byte address.
+         */
+        virtual void runTo(std::uint32_t address) = 0;
+
+        /**
+         * Step execution on teh AVR8 target.
+         */
+        virtual void step() = 0;
+
+        /**
+         * Should reset the AVR8 target.
+         */
+        virtual void reset() = 0;
+
+        /**
+         * Should activate the physical interface between the debug tool and the AVR8 target.
+         */
+        virtual void activate() = 0;
+
+        /**
+         * Should deactivate the physical interface between the debug tool and the AVR8 target.
+         */
+        virtual void deactivate() = 0;
+
+        /**
+         * Should retrieve the AVR8 target signature of the AVR8 target.
+         *
+         * This method may invoke stop(), as some interfaces are known to require the target to be in a stopped
+         * state before the signature can be read.
+         *
+         * @return
+         */
+        virtual TargetSignature getDeviceId() = 0;
+
+        /**
+         * Should set a software breakpoint at a given address.
+         *
+         * @param address
+         */
+        virtual void setBreakpoint(std::uint32_t address) = 0;
+
+        /**
+         * Should remove a software breakpoint at a given address.
+         *
+         * @param address
+         */
+        virtual void clearBreakpoint(std::uint32_t address) = 0;
+
+        /**
+         * Should remove all software and hardware breakpoints on the target.
+         */
+        virtual void clearAllBreakpoints() = 0;
+
+        /**
+         * Should retrieve the current program counter value from the target.
+         *
+         * @return
+         */
+        virtual std::uint32_t getProgramCounter() = 0;
+
+        /**
+         * Should retrieve the current stack pointer register value from the target.
+         *
+         * @return
+         */
+        virtual TargetRegister getStackPointerRegister() = 0;
+
+        /**
+         * Should retrieve the current status register value from the target.
+         *
+         * @return
+         */
+        virtual TargetRegister getStatusRegister() = 0;
+
+        /**
+         * Should update the program counter value on the target.
+         *
+         * @param programCounter
+         */
+        virtual void setProgramCounter(std::uint32_t programCounter) = 0;
+
+        /**
+         * SHould update the stack pointer register value on the target.
+         *
+         * @param stackPointerRegister
+         */
+        virtual void setStackPointerRegister(const TargetRegister& stackPointerRegister) = 0;
+
+        /**
+         * Should update the status register value on the target.
+         *
+         * @param statusRegister
+         */
+        virtual void setStatusRegister(const TargetRegister& statusRegister) = 0;
+
+        /**
+         * Should read the requested general purpose register from the target.
+         *
+         * @param registerIds
+         *  A set of register IDs: 0 -> 31
+         *
+         * @return
+         */
+        virtual TargetRegisters readGeneralPurposeRegisters(std::set<size_t> registerIds) = 0;
+
+        /**
+         * Should update the value of general purpose registers.
+         *
+         * @param registers
+         */
+        virtual void writeGeneralPurposeRegisters(const TargetRegisters& registers) = 0;
+
+        /**
+         * Should read memory from the target, for the given memory type.
+         *
+         * @param memoryType
+         * @param startAddress
+         * @param bytes
+         * @return
+         */
+        virtual TargetMemoryBuffer readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) = 0;
+
+        /**
+         * Should write memory to the target, for a given memory type.
+         *
+         * @param memoryType
+         * @param startAddress
+         * @param buffer
+         */
+        virtual void writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) = 0;
+
+        /**
+         * Should obtain the current target state.
+         *
+         * @return
+         */
+        virtual TargetState getTargetState() = 0;
+    };
+}
\ No newline at end of file
diff --git a/src/DebugToolDrivers/USB/HID/HidInterface.cpp b/src/DebugToolDrivers/USB/HID/HidInterface.cpp
new file mode 100644
index 00000000..741cab04
--- /dev/null
+++ b/src/DebugToolDrivers/USB/HID/HidInterface.cpp
@@ -0,0 +1,135 @@
+#include <cstdint>
+#include <string>
+#include <stdexcept>
+#include <src/Logger/Logger.hpp>
+
+#include "hidapi.hpp"
+#include "HidInterface.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "src/Exceptions/DeviceCommunicationFailure.hpp"
+
+using namespace Bloom::Usb;
+using namespace Bloom::Exceptions;
+
+std::string HidInterface::getDevicePathByInterfaceNumber(const std::uint16_t& interfaceNumber) {
+    hid_device_info* HIDDeviceInfoList = hid_enumerate(this->getVendorId(), this->getProductId());
+
+    while (HIDDeviceInfoList != nullptr) {
+        if (HIDDeviceInfoList->interface_number == interfaceNumber) {
+            break;
+        }
+
+        HIDDeviceInfoList = HIDDeviceInfoList->next;
+    }
+
+    if (HIDDeviceInfoList == nullptr) {
+        throw std::runtime_error("Failed to match interface number with HID interface.");
+    }
+
+    auto path = std::string(HIDDeviceInfoList->path);
+    hid_free_enumeration(HIDDeviceInfoList);
+    return path;
+}
+
+void HidInterface::init() {
+    /*
+     * Because we use the HIDAPI with libusb for our HID interfaces, we must allow the HIDAPI to own the device
+     * resources (device handle and the interface). However, the HIDAPI does not provide any means to ensure that a
+     * specific configuration is set against the device. This is why we first open the device via libusb (by calling
+     * the generic init() method), so that we can set the correct configuration. We then close the device to allow
+     * the HIDAPI to take ownership.
+     */
+    Interface::init();
+    Interface::detachKernelDriver();
+    Interface::setConfiguration(0);
+    Interface::close();
+
+    hid_init();
+    hid_device* hidDevice;
+
+    std::string HIDInterfacePath = this->getDevicePathByInterfaceNumber(this->getNumber());
+    Logger::debug("HID device path: " + HIDInterfacePath);
+
+    if ((hidDevice = hid_open_path(HIDInterfacePath.c_str())) == nullptr) {
+        throw Exception("Failed to open HID device via hidapi.");
+    }
+
+    if (hidDevice->input_ep_max_packet_size < 1) {
+        throw Exception("Invalid max packet size for USB endpoint, on interface " + std::to_string(this->getNumber()));
+    }
+
+    this->setHidDevice(hidDevice);
+    this->setInputReportSize(static_cast<std::size_t>(hidDevice->input_ep_max_packet_size));
+    this->setLibUsbDeviceHandle(hidDevice->device_handle);
+}
+
+void HidInterface::close() {
+    auto hidDevice = this->getHidDevice();
+
+    if (hidDevice != nullptr) {
+        this->setLibUsbDeviceHandle(nullptr);
+        hid_close(hidDevice);
+        // hid_close() releases the interface
+        Interface::setClaimed(false);
+    }
+
+    hid_exit();
+    Interface::close();
+}
+
+std::size_t HidInterface::read(unsigned char* buffer, std::size_t maxLength, unsigned int timeout) {
+    int transferred;
+
+    if ((transferred = hid_read_timeout(this->getHidDevice(), buffer, maxLength,
+        timeout == 0 ? -1 : static_cast<int>(timeout))) == -1
+    ) {
+        throw DeviceCommunicationFailure("Failed to read from HID device.");
+    }
+
+    return static_cast<std::size_t>(transferred);
+}
+
+void HidInterface::write(unsigned char* buffer, std::size_t length) {
+    int transferred;
+
+    if ((transferred = hid_write(this->getHidDevice(), buffer, length)) != length) {
+        Logger::debug("Attempted to write " + std::to_string(length)
+        + " bytes to HID interface. Bytes written: " + std::to_string(transferred));
+        throw DeviceCommunicationFailure("Failed to write data to HID interface.");
+    }
+}
+
+void HidInterface::write(std::vector<unsigned char> buffer) {
+    if (buffer.size() > this->getInputReportSize()) {
+        throw Exception("Cannot send data via HID interface - data exceeds maximum packet size.");
+
+    } else if (buffer.size() < this->getInputReportSize()) {
+        /*
+         * Every report we send via the USB HID interface should be of a fixed size.
+         * In the event of a report being too small, we just fill the buffer vector with 0.
+         */
+        buffer.resize(this->getInputReportSize(), 0);
+    }
+
+    this->write(buffer.data(), buffer.size());
+}
+
+std::vector<unsigned char> HidInterface::read(unsigned int timeout) {
+    std::vector<unsigned char> output;
+    auto readSize = this->getInputReportSize();
+
+    // Attempt to read the first HID report packet, and whatever is left after that.
+    output.resize(readSize);
+    auto transferredByteCount = this->read(output.data(), readSize, timeout);
+    auto totalByteCount = transferredByteCount;
+
+    while (transferredByteCount >= readSize) {
+        output.resize(totalByteCount + readSize);
+
+        transferredByteCount = this->read(output.data() + totalByteCount, readSize, 1);
+        totalByteCount += transferredByteCount;
+    }
+
+    output.resize(totalByteCount);
+    return output;
+}
diff --git a/src/DebugToolDrivers/USB/HID/HidInterface.hpp b/src/DebugToolDrivers/USB/HID/HidInterface.hpp
new file mode 100644
index 00000000..c6528e72
--- /dev/null
+++ b/src/DebugToolDrivers/USB/HID/HidInterface.hpp
@@ -0,0 +1,117 @@
+#pragma once
+
+#include <cstdint>
+#include <string>
+#include <vector>
+
+#include "hidapi.hpp"
+#include "src/DebugToolDrivers/USB/Interface.hpp"
+
+namespace Bloom::Usb
+{
+    /**
+     * The HIDInterface uses the HIDAPI library to implement communication with HID endpoints.
+     *
+     * Currently, this interface only supports single-report HID implementations. HID interfaces with
+     * multiple reports will be supported as-and-when we need it.
+     */
+    class HidInterface: public Interface
+    {
+    private:
+        /**
+         * The HIDAPI library provides a hid_device data structure to represent a USB HID interface.
+         *
+         * @see hidapi.hpp or the HIDAPI documentation for more on this.
+         */
+        hid_device* hidDevice = nullptr;
+
+        /**
+         * All HID reports have a fixed report length. This means that every packet
+         * we send or receive to/from an HID endpoint must be equal to the report length in size.
+         *
+         * The default input report size is 64 bytes, but this is overridden at interface initialisation.
+         * @see definition of init() for more on this.
+         */
+        std::size_t inputReportSize = 64;
+
+        void setHidDevice(hid_device* hidDevice) {
+            this->hidDevice = hidDevice;
+        }
+
+        void setInputReportSize(const std::size_t& inputReportSize) {
+            this->inputReportSize = inputReportSize;
+        }
+
+        /**
+         * Reads a maximum of `maxLength` bytes into `buffer`, from the HID input endpoint.
+         *
+         * Keeping this in the private scope to enforce use of vector<unsigned char>. See read()
+         * method in public scope.
+         *
+         * @param buffer
+         * @param maxLength
+         * @param timeout
+         *
+         * @return
+         *  Number of bytes read.
+         */
+        std::size_t read(unsigned char* buffer, std::size_t maxLength, unsigned int timeout);
+
+        /**
+         * Writes `length` bytes from `buffer` to HID output endpoint.
+         *
+         * Keeping this in the private scope to enforce use of vector<unsigned char>.
+         * @see write(std::vector<unsigned char> buffer);
+         *
+         * @param buffer
+         * @param length
+         */
+        void write(unsigned char* buffer, std::size_t length);
+
+    protected:
+        hid_device* getHidDevice() const {
+            return this->hidDevice;
+        }
+
+    public:
+        std::size_t getInputReportSize() {
+            return 512;
+            // return this->inputReportSize;
+        }
+
+        /**
+         * Claims the USB HID interface, obtains a hid_device instance and configures
+         */
+        void init() override;
+
+        void close() override;
+
+        /**
+         * Wrapper for write(unsigned char *buffer, int length)
+         *
+         * @param buffer
+         */
+        void write(std::vector<unsigned char> buffer);
+
+        /**
+         * Reads as much data as the device has to offer, into a vector.
+         *
+         * If `timeout` is set to 0, this method will block until at least one HID report
+         * packet is received.
+         *
+         * @param timeout
+         *
+         * @return
+         *  A vector of the data received from the device.
+         */
+        std::vector<unsigned char> read(unsigned int timeout = 0);
+
+        /**
+         * Resolves a device path from a USB interface number.
+         *
+         * @param interfaceNumber
+         * @return
+         */
+        std::string getDevicePathByInterfaceNumber(const std::uint16_t& interfaceNumber);
+    };
+}
diff --git a/src/DebugToolDrivers/USB/HID/hidapi.hpp b/src/DebugToolDrivers/USB/HID/hidapi.hpp
new file mode 100644
index 00000000..801c419b
--- /dev/null
+++ b/src/DebugToolDrivers/USB/HID/hidapi.hpp
@@ -0,0 +1,37 @@
+#pragma once
+
+#include <libusb-1.0/libusb.h>
+#include <hidapi/hidapi.h>
+
+struct hid_device_ {
+    /* Handle to the actual device. */
+    libusb_device_handle* device_handle;
+
+    /* Endpoint information */
+    int input_endpoint;
+    int output_endpoint;
+    int input_ep_max_packet_size;
+
+    /* The interface number of the HID */
+    int interface;
+
+    /* Indexes of Strings */
+    int manufacturer_index;
+    int product_index;
+    int serial_index;
+
+    /* Whether blocking reads are used */
+    int blocking; /* boolean */
+
+    /* Read thread objects */
+    pthread_t thread;
+    pthread_mutex_t mutex; /* Protects input_reports */
+    pthread_cond_t condition;
+    pthread_barrier_t barrier; /* Ensures correct startup sequence */
+    int shutdown_thread;
+    int cancelled;
+    struct libusb_transfer* transfer;
+
+    /* List of received input reports. */
+    struct input_report* input_reports;
+};
diff --git a/src/DebugToolDrivers/USB/Interface.cpp b/src/DebugToolDrivers/USB/Interface.cpp
new file mode 100644
index 00000000..b0345d94
--- /dev/null
+++ b/src/DebugToolDrivers/USB/Interface.cpp
@@ -0,0 +1,150 @@
+#include <libusb-1.0/libusb.h>
+#include <chrono>
+#include <thread>
+
+#include "Interface.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::Usb;
+using namespace Bloom::Exceptions;
+
+
+void Interface::init() {
+    libusb_device_descriptor deviceDescriptor = {};
+    auto deviceHandle = this->getLibUsbDeviceHandle();
+    auto libUsbDevice = this->getUSBDevice();
+    int libUsbStatusCode;
+
+    if (libUsbDevice == nullptr) {
+        throw Exception("Cannot open USB device without libusb device pointer.");
+    }
+
+    if (deviceHandle == nullptr) {
+        // Obtain a device handle from libusb
+        if ((libUsbStatusCode = libusb_open(libUsbDevice, &deviceHandle)) < 0) {
+            throw Exception("Failed to open USB device - error code "
+                                         + std::to_string(libUsbStatusCode) + " returned.");
+        }
+    }
+
+    if ((libUsbStatusCode = libusb_get_device_descriptor(libUsbDevice, &deviceDescriptor))) {
+        throw Exception("Failed to obtain USB device descriptor - error code "
+                                     + std::to_string(libUsbStatusCode) + " returned.");
+    }
+
+    this->setLibUsbDeviceHandle(deviceHandle);
+    this->setInitialised(true);
+}
+
+void Interface::setConfiguration(int configIndex) {
+    libusb_config_descriptor* configDescriptor = {};
+    int libUsbStatusCode;
+
+    if ((libUsbStatusCode = libusb_get_config_descriptor(this->getUSBDevice(), 0, &configDescriptor))) {
+        throw Exception("Failed to obtain USB configuration descriptor - error code "
+                            + std::to_string(libUsbStatusCode) + " returned.");
+    }
+
+    if ((libUsbStatusCode = libusb_set_configuration(this->getLibUsbDeviceHandle(), configDescriptor->bConfigurationValue))) {
+        throw Exception("Failed to set USB configuration - error code "
+                            + std::to_string(libUsbStatusCode) + " returned.");
+    }
+
+    libusb_free_config_descriptor(configDescriptor);
+}
+
+void Interface::close() {
+    auto deviceHandle = this->getLibUsbDeviceHandle();
+    this->release();
+
+    if (deviceHandle != nullptr) {
+        libusb_close(deviceHandle);
+        this->setLibUsbDeviceHandle(nullptr);
+    }
+
+    this->setInitialised(false);
+}
+
+void Interface::claim() {
+    int interfaceNumber = this->getNumber();
+    int libUsbStatusCode = 0;
+
+    this->detachKernelDriver();
+
+    if (libusb_claim_interface(this->getLibUsbDeviceHandle(), interfaceNumber) != 0) {
+        throw Exception("Failed to claim interface {" + std::to_string(interfaceNumber) + "} on USB device\n");
+    }
+
+    this->setClaimed(true);
+}
+
+void Interface::detachKernelDriver() {
+    int interfaceNumber = this->getNumber();
+    int libUsbStatusCode;
+
+    if ((libUsbStatusCode = libusb_kernel_driver_active(this->getLibUsbDeviceHandle(), interfaceNumber)) != 0) {
+        if (libUsbStatusCode == 1) {
+            // A kernel driver is active on this interface. Attempt to detach it
+            if (libusb_detach_kernel_driver(this->getLibUsbDeviceHandle(), interfaceNumber) != 0) {
+                throw Exception("Failed to detach kernel driver from interface " +
+                    std::to_string(interfaceNumber) + "\n");
+            }
+        } else {
+            throw Exception("Failed to check for active kernel driver on USB interface.");
+        }
+    }
+}
+
+void Interface::release() {
+    if (this->isClaimed()) {
+        if (libusb_release_interface(this->getLibUsbDeviceHandle(), this->getNumber()) != 0) {
+            throw Exception("Failed to release interface {" + std::to_string(this->getNumber()) + "} on USB device\n");
+        }
+
+        this->setClaimed(false);
+    }
+}
+
+int Interface::read(unsigned char* buffer, unsigned char endPoint, size_t length, size_t timeout) {
+    int totalTransferred = 0;
+    int transferred = 0;
+    int libUsbStatusCode = 0;
+
+    while (length > totalTransferred) {
+        libUsbStatusCode = libusb_interrupt_transfer(
+                this->getLibUsbDeviceHandle(),
+                endPoint,
+                buffer,
+                static_cast<int>(length),
+                &transferred,
+                static_cast<unsigned int>(timeout)
+        );
+
+        if (libUsbStatusCode != 0 && libUsbStatusCode != -7) {
+            throw Exception("Failed to read from USB device. Error code returned: " + std::to_string(libUsbStatusCode));
+        }
+
+        totalTransferred += transferred;
+    }
+
+    return transferred;
+}
+
+void Interface::write(unsigned char* buffer, unsigned char endPoint, int length) {
+    int transferred = 0;
+    int libUsbStatusCode = 0;
+
+    libUsbStatusCode = libusb_interrupt_transfer(
+        this->getLibUsbDeviceHandle(),
+        endPoint,
+        buffer,
+        length,
+        &transferred,
+        0
+    );
+
+    if (libUsbStatusCode != 0) {
+        throw Exception("Failed to read from USB device. Error code returned: " + std::to_string(libUsbStatusCode));
+    }
+}
diff --git a/src/DebugToolDrivers/USB/Interface.hpp b/src/DebugToolDrivers/USB/Interface.hpp
new file mode 100644
index 00000000..2cd3f043
--- /dev/null
+++ b/src/DebugToolDrivers/USB/Interface.hpp
@@ -0,0 +1,130 @@
+#pragma once
+
+#include <cstdint>
+#include <libusb-1.0/libusb.h>
+#include <string>
+
+#include "UsbDevice.hpp"
+
+namespace Bloom::Usb
+{
+    class Interface
+    {
+    private:
+        libusb_device* USBDevice = nullptr;
+        std::uint16_t vendorId = 0;
+        std::uint16_t productId = 0;
+
+        /**
+         * With libusb, we can only claim a single USB interface per device handle. For this reason,
+         * device handles are stored against the interface. Each interface must obtain a new handle before
+         * claiming.
+         */
+        libusb_device_handle* libUsbDeviceHandle = nullptr;
+        std::uint8_t number = 0;
+        std::string name = "";
+        bool initialised = false;
+        bool claimed = false;
+
+        void setInitialised(bool initialised) {
+            this->initialised = initialised;
+        }
+
+    protected:
+        void setClaimed(bool claimed) {
+            this->claimed = claimed;
+        }
+
+    public:
+        explicit Interface(const std::uint8_t& interfaceNumber = 0) {
+            this->setNumber(interfaceNumber);
+        }
+
+        libusb_device* getUSBDevice() const {
+            return this->USBDevice;
+        }
+
+        void setUSBDevice(libusb_device* USBDevice) {
+            this->USBDevice = USBDevice;
+        }
+
+        libusb_device_handle* getLibUsbDeviceHandle() const {
+            return this->libUsbDeviceHandle;
+        }
+
+        void setLibUsbDeviceHandle(libusb_device_handle* libUsbDeviceHandle) {
+            this->libUsbDeviceHandle = libUsbDeviceHandle;
+        }
+
+        std::uint8_t getNumber() const {
+            return this->number;
+        }
+
+        void setNumber(std::uint8_t number) {
+            this->number = number;
+        }
+
+        const std::string& getName() const {
+            return this->name;
+        }
+
+        void setName(const std::string& name) {
+            this->name = name;
+        }
+
+        bool isClaimed() {
+            return this->claimed;
+        }
+
+        bool isInitialised() {
+            return this->initialised;
+        }
+
+        std::uint16_t getVendorId() const {
+            return this->vendorId;
+        }
+
+        void setVendorId(std::uint16_t vendorId) {
+            this->vendorId = vendorId;
+        }
+
+        std::uint16_t getProductId() const {
+            return this->productId;
+        }
+
+        void setProductId(std::uint16_t productId) {
+            this->productId = productId;
+        }
+
+        /**
+         * Attempts to obtain a device descriptor and device handle via libusb.
+         */
+        virtual void init();
+
+        virtual void setConfiguration(int configIndex);
+
+        /**
+         * Releases the interface and closes the device descriptor.
+         */
+        virtual void close();
+
+        /**
+         * Attempts to claim the interface
+         */
+        void claim();
+        void detachKernelDriver();
+        void release();
+
+        /**
+         * @TODO Remove or refactor these (read() and write()) - they're not currently used
+         *
+         * @param buffer
+         * @param endPoint
+         * @param length
+         * @param timeout
+         * @return
+         */
+        virtual int read(unsigned char* buffer, unsigned char endPoint, std::size_t length, std::size_t timeout);
+        virtual void write(unsigned char* buffer, unsigned char endPoint, int length);
+    };
+}
diff --git a/src/DebugToolDrivers/USB/UsbDevice.cpp b/src/DebugToolDrivers/USB/UsbDevice.cpp
new file mode 100644
index 00000000..08184bf3
--- /dev/null
+++ b/src/DebugToolDrivers/USB/UsbDevice.cpp
@@ -0,0 +1,77 @@
+#include <cstdint>
+#include <filesystem>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <unistd.h>
+#include <linux/usbdevice_fs.h>
+#include <libusb-1.0/libusb.h>
+
+#include "UsbDevice.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using Bloom::Usb::UsbDevice;
+using namespace Bloom::Exceptions;
+
+std::vector<libusb_device*> UsbDevice::findMatchingDevices(
+    std::optional<std::uint16_t> vendorId, std::optional<std::uint16_t> productId
+) {
+    auto libUsbContext = this->libUsbContext;
+    libusb_device** devices = nullptr;
+    libusb_device* device;
+    std::vector<libusb_device*> matchedDevices;
+    ssize_t i = 0, libUsbStatusCode;
+
+    auto vendorIdToMatch = vendorId.value_or(this->vendorId);
+    auto productIdToMatch = productId.value_or(this->productId);
+
+    if ((libUsbStatusCode = libusb_get_device_list(libUsbContext, &devices)) < 0) {
+        throw Exception("Failed to retrieve USB devices - return code: '" + std::to_string(libUsbStatusCode)
+            + "'");
+    }
+
+    while ((device = devices[i++]) != nullptr) {
+        struct libusb_device_descriptor desc = {};
+
+        if ((libUsbStatusCode = libusb_get_device_descriptor(device, &desc)) < 0) {
+            Logger::warning("Failed to retrieve USB device descriptor - return code: '"
+                                         + std::to_string(libUsbStatusCode) + "'");
+            continue;
+        }
+
+        if (desc.idVendor == vendorIdToMatch && desc.idProduct == productIdToMatch) {
+            matchedDevices.push_back(device);
+        }
+    }
+
+    libusb_free_device_list(devices, 1);
+    return matchedDevices;
+}
+
+void UsbDevice::init()
+{
+    libusb_init(&this->libUsbContext);
+//    libusb_set_option(this->libUsbContext, LIBUSB_OPTION_LOG_LEVEL, LIBUSB_LOG_LEVEL_NONE);
+    auto devices = this->findMatchingDevices();
+
+    if (devices.empty()) {
+        throw Exception("Failed to find USB device with matching vendor & product ID.");
+
+    } else if (devices.size() > 1) {
+        // TODO: implement support for multiple devices (maybe via serial number?)
+        throw Exception("Multiple devices of matching vendor & product ID found.\n"
+                                 "Yes, as a program I really am too stupid to figure out what to do "
+                                 "here, so I'm just going to quit.\n Please ensure that only one debug tool "
+                                 "is connected and then try again.");
+    }
+
+    // For now, just use the first device found.
+    this->setLibUsbDevice(devices.front());
+}
+
+void UsbDevice::close()
+{
+    if (this->libUsbContext != nullptr) {
+        libusb_exit(this->libUsbContext);
+    }
+}
diff --git a/src/DebugToolDrivers/USB/UsbDevice.hpp b/src/DebugToolDrivers/USB/UsbDevice.hpp
new file mode 100644
index 00000000..22519c18
--- /dev/null
+++ b/src/DebugToolDrivers/USB/UsbDevice.hpp
@@ -0,0 +1,54 @@
+#pragma once
+
+#include <cstdint>
+#include <memory>
+#include <vector>
+#include <optional>
+#include <libusb-1.0/libusb.h>
+
+#include "src/DebugToolDrivers/DebugTool.hpp"
+
+namespace Bloom::Usb
+{
+    class UsbDevice
+    {
+    private:
+        libusb_context* libUsbContext = nullptr;
+        libusb_device* libUsbDevice = nullptr;
+        std::uint16_t vendorId;
+        std::uint16_t productId;
+
+        std::vector<libusb_device*> findMatchingDevices(
+            std::optional<std::uint16_t> vendorId = std::nullopt, std::optional<std::uint16_t> productId = std::nullopt
+        );
+
+    protected:
+        void close();
+
+    public:
+        void init();
+
+        UsbDevice(std::uint16_t vendorId, std::uint16_t productId) {
+            this->vendorId = vendorId;
+            this->productId = productId;
+        };
+
+        ~UsbDevice() = default;
+
+        [[nodiscard]] libusb_device* getLibUsbDevice() const {
+            return this->libUsbDevice;
+        }
+
+        void setLibUsbDevice(libusb_device* libUsbDevice) {
+            this->libUsbDevice = libUsbDevice;
+        }
+
+        std::uint16_t getVendorId() const {
+            return this->vendorId;
+        }
+
+        std::uint16_t getProductId() const {
+            return this->productId;
+        }
+    };
+}
diff --git a/src/EventManager/EventListener.cpp b/src/EventManager/EventListener.cpp
new file mode 100644
index 00000000..2aedd4c1
--- /dev/null
+++ b/src/EventManager/EventListener.cpp
@@ -0,0 +1,109 @@
+#include <sys/eventfd.h>
+#include "EventListener.hpp"
+
+using namespace Bloom;
+
+std::set<std::string> EventListener::getRegisteredEventTypeNames() {
+    return this->registeredEventTypes.getValue();
+}
+
+void EventListener::clearAllCallbacks() {
+    auto lock = this->eventTypeToCallbacksMapping.acquireLock();
+    this->eventTypeToCallbacksMapping.getReference().clear();
+}
+
+void EventListener::registerEvent(GenericEventPointer event) {
+    auto eventName = event->getName();
+    Logger::debug("Event \"" + eventName + "\" (" + std::to_string(event->id)
+    + ") registered for listener " + std::to_string(this->id));
+    auto queueLock = this->eventQueueByEventType.acquireLock();
+    auto& eventQueueByType = this->eventQueueByEventType.getReference();
+
+    if (!eventQueueByType.contains(eventName)) {
+        eventQueueByType.insert(
+            std::pair<std::string, std::queue<GenericEventPointer>>(
+                eventName,
+                std::queue<GenericEventPointer>()
+            )
+        );
+    }
+
+    eventQueueByType[eventName].push(event);
+    this->eventQueueByEventTypeCV.notify_all();
+
+    if (this->interruptEventNotifier != nullptr) {
+        this->interruptEventNotifier->notify();
+    }
+}
+
+std::vector<GenericEventPointer> EventListener::getEvents() {
+    auto queueLock = this->eventQueueByEventType.acquireLock();
+    auto& eventQueueByType = this->eventQueueByEventType.getReference();
+    std::vector<GenericEventPointer> output;
+
+    for (auto& eventQueue: eventQueueByType) {
+        if (eventQueue.second.size() > 0) {
+            output.push_back(eventQueue.second.front());
+            eventQueue.second.pop();
+        }
+    }
+
+    std::sort(output.begin(), output.end(), [](GenericEventPointer a, GenericEventPointer b) {
+        return a->id < b->id;
+    });
+
+    return output;
+}
+
+void EventListener::dispatchEvent(GenericEventPointer event) {
+    auto eventName = event->getName();
+    Logger::debug("Dispatching event " + eventName + ".");
+    // Dispatch the event to all registered handlers
+    auto mappingLock = this->eventTypeToCallbacksMapping.acquireLock();
+    auto& callbacks = this->eventTypeToCallbacksMapping.getReference().find(eventName)->second;
+    mappingLock.unlock();
+
+    for (auto& callback : callbacks) {
+        callback(event);
+    }
+}
+
+void EventListener::dispatchCurrentEvents() {
+    auto events = this->getEvents();
+
+    for (auto const& event: events) {
+        dispatchEvent(event);
+    }
+}
+
+void EventListener::waitAndDispatch(int msTimeout) {
+    auto queueLock = this->eventQueueByEventType.acquireLock();
+    auto& eventQueueByType = this->eventQueueByEventType.getReference();
+    auto registeredEventTypes = this->getRegisteredEventTypeNames();
+    std::optional<GenericEventPointer> event;
+
+    auto eventsFound = [&registeredEventTypes, &event, &eventQueueByType]() -> bool {
+        for (auto& eventQueue: eventQueueByType) {
+            if (registeredEventTypes.find(eventQueue.first) != registeredEventTypes.end()
+                && eventQueue.second.size() > 0
+            ) {
+                return true;
+            }
+        }
+        return false;
+    };
+
+    if (msTimeout > 0) {
+        this->eventQueueByEventTypeCV.wait_for(queueLock, std::chrono::milliseconds(msTimeout), eventsFound);
+    } else {
+        this->eventQueueByEventTypeCV.wait(queueLock, eventsFound);
+    }
+
+    /*
+     * We don't want the dispatch to block other threads from registering more events. We don't need the
+     * lock anymore so it's fine to release it here.
+     */
+    queueLock.unlock();
+
+    this->dispatchCurrentEvents();
+}
diff --git a/src/EventManager/EventListener.hpp b/src/EventManager/EventListener.hpp
new file mode 100644
index 00000000..3f6604dd
--- /dev/null
+++ b/src/EventManager/EventListener.hpp
@@ -0,0 +1,330 @@
+#pragma once
+
+#include <string>
+#include <map>
+#include <functional>
+#include <queue>
+#include <memory>
+#include <variant>
+#include <optional>
+#include <mutex>
+#include <iostream>
+#include <condition_variable>
+#include <set>
+
+#include "src/EventManager/Events/Events.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Helpers/SyncSafe.hpp"
+#include "src/Helpers/EventNotifier.hpp"
+
+namespace Bloom
+{
+    using namespace Events;
+
+    /**
+     * The EventListener allows specific threads the ability to handle any events, from other threads, that
+     * are of interest.
+     *
+     * Usage is fairly simple:
+     *  - Thread A creates an instance to EventListener.
+     *  - Thread A registers callbacks for specific event types via EventListener::registerCallbackForEventType().
+     *  - Thread A waits for events via EventListener::waitAndDispatch() (or similar methods).
+     *  - Thread B triggers an event of a type that Thread A registered a callback for.
+     *  - Thread A is woken and the triggered event is dispatched to the registered callbacks for the event type.
+     *
+     * Events are distributed with shared pointers to const event objects, as each registered handler will own
+     * the memory (but should never make any changes to it, hence the const state). Once the final handler has
+     * processed the event, the shared pointer reference count will reach 0 and the event object will be destroyed.
+     * The type of object within the shared pointers will match that of the specific event type, once it reaches the
+     * callback functions. We do this by downcasting the events before we dispatch them to the callback functions.
+     *
+     * @TODO Whilst event managing should be thread safe, the same cannot be said for all of the event types.
+     *       We need to ensure that all event types are thread safe.
+     */
+    class EventListener
+    {
+    private:
+        /**
+         * Human readable name for event listeners.
+         *
+         * TODO: This was useful during development, but may no longer be needed.
+         */
+        std::string name;
+
+        /**
+         * Each event listener is supplied an ID upon registering with the EventManager.
+         */
+        size_t id = 0;
+
+        /**
+         * Holds all events registered to this listener.
+         *
+         * Events are grouped by event type name, and removed from their queue just *before* the dispatching to
+         * registered handlers begins.
+         */
+        SyncSafe<std::map<std::string, std::queue<GenericEventPointer>>> eventQueueByEventType;
+        std::condition_variable eventQueueByEventTypeCV;
+
+        /**
+         * A mapping of event type names to a vector of callback functions. Events will be dispatched to these
+         * callback functions, during a call to EventListener::waiteAndDispatch().
+         *
+         * Each callback will be passed an std::shared_ptr<const EventType> of the event (we downcast the events in
+         * EventListener::waiteAndDispatch() before dispatching them).
+         */
+        SyncSafe<std::map<std::string, std::vector<std::function<void(GenericEventPointer)>>>> eventTypeToCallbacksMapping;
+        SyncSafe<std::set<std::string>> registeredEventTypes;
+
+        std::shared_ptr<EventNotifier> interruptEventNotifier = nullptr;
+
+        std::vector<GenericEventPointer> getEvents();
+
+    public:
+        explicit EventListener(const std::string& name) : name(name) {};
+
+        void setId(size_t id) {
+            this->id = id;
+        };
+
+        size_t getId() const {
+            return this->id;
+        };
+
+        /**
+         * Generates a list of event types names currently registered in the listener.
+         *
+         * @return
+         */
+        std::set<std::string> getRegisteredEventTypeNames();
+
+        /**
+         * Registers an event with the event listener
+         *
+         * @param event
+         */
+        void registerEvent(GenericEventPointer event);
+
+        void setInterruptEventNotifier(std::shared_ptr<EventNotifier> interruptEventNotifier) {
+            this->interruptEventNotifier = interruptEventNotifier;
+        }
+
+        /**
+         * Registers a callback function for an event type. The callback function will be
+         * invoked upon an event of type EventType being dispatched to the listener.
+         *
+         * @tparam EventType
+         * @param callback
+         */
+        template<class EventType>
+        void registerCallbackForEventType(std::function<void(std::shared_ptr<const EventType>)> callback) {
+            // We encapsulate the callback in a lambda to handle the downcasting.
+            std::function<void(GenericEventPointer)> parentCallback =
+                [callback] (GenericEventPointer event) {
+                    // Downcast the event to the expected type
+                    callback(std::dynamic_pointer_cast<const EventType>(event));
+                }
+            ;
+
+            auto mappingLock = this->eventTypeToCallbacksMapping.acquireLock();
+            auto& mapping = this->eventTypeToCallbacksMapping.getReference();
+
+            if (mapping.find(EventType::name) == mapping.end()) {
+                /*
+                 * Multiple callbacks can be registered for a single event type.
+                 *
+                 * We have no callbacks for this event type registered in this listener, so setup
+                 * the type name to callback vector mapping.
+                 */
+                mapping.insert(
+                    std::pair<std::string, std::vector<std::function<void(GenericEventPointer)>>>(
+                        EventType::name,
+                        std::vector<std::function<void(GenericEventPointer)>>()
+                    )
+                );
+            }
+
+            mapping[EventType::name].push_back(parentCallback);
+            auto registeredEventTypesLock = this->registeredEventTypes.acquireLock();
+            this->registeredEventTypes.getReference().insert(EventType::name);
+        }
+
+        /**
+         * Waits for an event (of type EventTypeA, EventTypeB or EventTypeC) to be dispatched to the listener.
+         * Then returns the event object. If timeout is reached, an std::nullopt object will be returned.
+         *
+         * @tparam EventType
+         * @param timeout
+         *  Millisecond duration to wait for an event to be dispatched to the listener.
+         *  A value of std::nullopt will disable the timeout, meaning the function will block until the appropriate
+         *  event has been dispatched.
+         *
+         * @param correlationId
+         *  If a correlation ID is provided, this function will ignore any events that do not contain a matching
+         *  correlation ID.
+         *
+         * @return
+         *  If only one event type is passed (EventTypeA), an std::optional will be returned, carrying an
+         *  event pointer to that event type (or std::nullopt if timeout was reached). If numerous event types are
+         *  passed, an std::optional will carry an std::variant of the event pointers to the passed event types
+         *  (or std::nullopt if timeout was reached).
+         */
+        template<class EventTypeA, class EventTypeB = EventTypeA, class EventTypeC = EventTypeB>
+        auto waitForEvent(
+            std::optional<std::chrono::milliseconds> timeout = std::nullopt,
+            std::optional<int> correlationId = std::nullopt
+        ) {
+            // Different return types, depending on how many event type arguments are passed in.
+            using MonoType = std::optional<EventPointer<EventTypeA>>;
+            using BiVariantType = std::optional<
+                std::variant<
+                    std::monostate,
+                    EventPointer<EventTypeA>,
+                    EventPointer<EventTypeB>
+                >
+            >;
+            using TriVariantType = std::optional<
+                std::variant<
+                    std::monostate,
+                    EventPointer<EventTypeA>,
+                    EventPointer<EventTypeB>,
+                    EventPointer<EventTypeC>
+                >
+            >;
+            using ReturnType = typename std::conditional<
+                !std::is_same_v<EventTypeA, EventTypeB> && !std::is_same_v<EventTypeB, EventTypeC>,
+                TriVariantType,
+                typename std::conditional<!std::is_same_v<EventTypeA, EventTypeB>,
+                    BiVariantType,
+                    MonoType
+                >::type
+            >::type;
+
+            ReturnType output = std::nullopt;
+
+            auto queueLock = this->eventQueueByEventType.acquireLock();
+            auto& eventQueueByType = this->eventQueueByEventType.getReference();
+
+            auto eventTypeNames = std::set<std::string>({EventTypeA::name});
+            auto eventTypeNamesToDeRegister = std::set<std::string>();
+
+            if constexpr (!std::is_same_v<EventTypeA, EventTypeB>) {
+                static_assert(std::is_base_of_v<Event, EventTypeB>, "All event types must be derived from the Event base class.");
+                eventTypeNames.insert(EventTypeB::name);
+            }
+
+            if constexpr (!std::is_same_v<EventTypeB, EventTypeC>) {
+                static_assert(std::is_base_of_v<Event, EventTypeC>, "All event types must be derived from the Event base class.");
+                eventTypeNames.insert(EventTypeC::name);
+            }
+
+            {
+                auto registeredEventTypesLock = this->registeredEventTypes.acquireLock();
+                auto& registeredEventTypes = this->registeredEventTypes.getReference();
+
+                for (const auto& eventTypeName : eventTypeNames) {
+                    if (registeredEventTypes.find(eventTypeName) == registeredEventTypes.end()) {
+                        registeredEventTypes.insert(eventTypeName);
+                        eventTypeNamesToDeRegister.insert(eventTypeName);
+                    }
+                }
+            }
+
+            GenericEventPointer foundEvent = nullptr;
+            auto eventsFound = [&eventTypeNames, &eventQueueByType, &correlationId, &foundEvent]() -> bool {
+                for (const auto& eventTypeName : eventTypeNames) {
+                    if (eventQueueByType.find(eventTypeName) != eventQueueByType.end()
+                        && eventQueueByType.find(eventTypeName)->second.size() > 0
+                    ) {
+                        auto& queue = eventQueueByType.find(eventTypeName)->second;
+                        while (queue.size() > 0) {
+                            auto event = queue.front();
+
+                            if (!correlationId.has_value()
+                                || (event->correlationId.has_value() && event->correlationId == correlationId)
+                            ) {
+                                foundEvent = event;
+                                queue.pop();
+                                return true;
+                            }
+
+                            // Events that match in type but not correlation ID are disregarded
+                            queue.pop();
+                        }
+                    }
+                }
+
+                return false;
+            };
+
+            if (timeout.has_value()) {
+                this->eventQueueByEventTypeCV.wait_for(queueLock, timeout.value(), eventsFound);
+
+            } else {
+                this->eventQueueByEventTypeCV.wait(queueLock, eventsFound);
+            }
+
+            if (!eventTypeNamesToDeRegister.empty()) {
+                auto registeredEventTypesLock = this->registeredEventTypes.acquireLock();
+                auto& registeredEventTypes = this->registeredEventTypes.getReference();
+
+                for (const auto& eventTypeName : eventTypeNamesToDeRegister) {
+                    registeredEventTypes.erase(eventTypeName);
+                }
+            }
+
+            if (foundEvent != nullptr) {
+                // If we're looking for multiple event types, use an std::variant.
+                if constexpr (!std::is_same_v<EventTypeA, EventTypeB> || !std::is_same_v<EventTypeB, EventTypeC>) {
+                    if (foundEvent->getName() == EventTypeA::name) {
+                        output = std::optional<typename decltype(output)::value_type>(std::dynamic_pointer_cast<const EventTypeA>(foundEvent));
+
+                    } else if constexpr (!std::is_same_v<EventTypeA, EventTypeB>) {
+                        if (foundEvent->getName() == EventTypeB::name) {
+                            output = std::optional<typename decltype(output)::value_type>(std::dynamic_pointer_cast<const EventTypeB>(foundEvent));
+                        }
+                    }
+
+                    if constexpr (!std::is_same_v<EventTypeB, EventTypeC>) {
+                        if (foundEvent->getName() == EventTypeC::name) {
+                            output = std::optional<typename decltype(output)::value_type>(std::dynamic_pointer_cast<const EventTypeC>(foundEvent));
+                        }
+                    }
+
+                } else {
+                    if (foundEvent->getName() == EventTypeA::name) {
+                        output = std::dynamic_pointer_cast<const EventTypeA>(foundEvent);
+                    }
+                }
+            }
+
+            return output;
+        }
+
+        /**
+         * Waits for new events with types that have been registered with registerCallbackForEventType() and dispatches
+         * any events to their appropriate registered callback handlers.
+         *
+         * This method will return after one event has been handled.
+         */
+        void waitAndDispatch(int msTimeout = 0);
+
+        void dispatchEvent(GenericEventPointer event);
+
+        void dispatchCurrentEvents();
+
+        /**
+         * Removes all callbacks registered for the event listener.
+         */
+        void clearAllCallbacks();
+    };
+
+    /**
+     * Every component within Bloom that requires access to events will possess an instance to the EventListener class.
+     * At some point (usually at component initialisation), the event listener will be registered with the EventManager,
+     * using EventManager::registerListener(). Upon registering the listener, the EventManager obtains partial ownership
+     * of the event listener.
+     *
+     * In other words, event listeners are managed by numerous entities and that's why we use a shared_ptr here.
+     */
+    using EventListenerPointer = std::shared_ptr<EventListener>;
+}
diff --git a/src/EventManager/EventManager.cpp b/src/EventManager/EventManager.cpp
new file mode 100644
index 00000000..9c67f867
--- /dev/null
+++ b/src/EventManager/EventManager.cpp
@@ -0,0 +1,26 @@
+#include "EventManager.hpp"
+
+using namespace Bloom;
+
+void EventManager::registerListener(std::shared_ptr<EventListener> listener) {
+    auto registerListenersLock = std::unique_lock(this->registerListenerMutex);
+    size_t newId = this->registeredListeners.size() + 1;
+
+    this->registeredListeners.insert(std::pair<size_t, std::shared_ptr<EventListener>>(newId, listener));
+    listener->setId(newId);
+}
+
+void EventManager::deregisterListener(size_t listenerId) {
+    auto registerListenersLock = std::unique_lock(this->registerListenerMutex);
+    this->registeredListeners.erase(listenerId);
+}
+
+void EventManager::triggerEvent(std::shared_ptr<const Events::Event> event) {
+    auto registerListenersLock = std::unique_lock(this->registerListenerMutex);
+    for(auto const& [listenerId, listener] : this->registeredListeners) {
+        auto registeredEventTypes = listener->getRegisteredEventTypeNames();
+        if (registeredEventTypes.find(event->getName()) != registeredEventTypes.end()) {
+            listener->registerEvent(event);
+        }
+    }
+}
diff --git a/src/EventManager/EventManager.hpp b/src/EventManager/EventManager.hpp
new file mode 100644
index 00000000..14b6c809
--- /dev/null
+++ b/src/EventManager/EventManager.hpp
@@ -0,0 +1,32 @@
+#pragma once
+
+#include <string>
+#include <map>
+#include <mutex>
+#include "Events/Events.hpp"
+#include "EventListener.hpp"
+
+namespace Bloom
+{
+    class EventManager
+    {
+    private:
+        /**
+         * A mapping of listener IDs to registered listeners. Each registered listener is given an interger ID.
+         */
+        std::map<size_t, std::shared_ptr<EventListener>> registeredListeners;
+        std::mutex registerListenerMutex;
+
+    public:
+        /**
+         * Generates a new registered listener.
+         *
+         * @param listenerName
+         */
+        void registerListener(std::shared_ptr<EventListener> listener);
+        void deregisterListener(size_t listenerId);
+
+        void triggerEvent(GenericEventPointer event);
+    };
+
+}
diff --git a/src/EventManager/Events/BreakpointRemovedOnTarget.hpp b/src/EventManager/Events/BreakpointRemovedOnTarget.hpp
new file mode 100644
index 00000000..81c6b1c9
--- /dev/null
+++ b/src/EventManager/Events/BreakpointRemovedOnTarget.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class BreakpointRemovedOnTarget: public Event
+    {
+    public:
+        static inline const std::string name = "BreakpointRemovedOnTarget";
+
+        std::string getName() const override {
+            return BreakpointRemovedOnTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/BreakpointSetOnTarget.hpp b/src/EventManager/Events/BreakpointSetOnTarget.hpp
new file mode 100644
index 00000000..cab75bc9
--- /dev/null
+++ b/src/EventManager/Events/BreakpointSetOnTarget.hpp
@@ -0,0 +1,17 @@
+#pragma once
+
+#include <set>
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class BreakpointSetOnTarget: public Event
+    {
+    public:
+        static inline const std::string name = "BreakpointSetOnTarget";
+
+        std::string getName() const override {
+            return BreakpointSetOnTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/DebugServerStateChanged.hpp b/src/EventManager/Events/DebugServerStateChanged.hpp
new file mode 100644
index 00000000..ddb690b9
--- /dev/null
+++ b/src/EventManager/Events/DebugServerStateChanged.hpp
@@ -0,0 +1,25 @@
+#pragma once
+
+#include <src/Helpers/Thread.hpp>
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class DebugServerStateChanged: public Event
+    {
+    private:
+        ThreadState state;
+    public:
+        DebugServerStateChanged(ThreadState state) : state(state) {};
+
+        static inline const std::string name = "DebugServerStateChanged";
+
+        std::string getName() const override {
+            return DebugServerStateChanged::name;
+        }
+
+        ThreadState getState() const {
+            return this->state;
+        }
+    };
+}
diff --git a/src/EventManager/Events/DebugSessionFinished.hpp b/src/EventManager/Events/DebugSessionFinished.hpp
new file mode 100644
index 00000000..b7e2f1c7
--- /dev/null
+++ b/src/EventManager/Events/DebugSessionFinished.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class DebugSessionFinished: public Event
+    {
+    public:
+        static inline const std::string name = "DebugSessionFinished";
+
+        std::string getName() const override {
+            return DebugSessionFinished::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/DebugSessionStarted.hpp b/src/EventManager/Events/DebugSessionStarted.hpp
new file mode 100644
index 00000000..9639d5c9
--- /dev/null
+++ b/src/EventManager/Events/DebugSessionStarted.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class DebugSessionStarted: public Event
+    {
+    public:
+        static inline const std::string name = "DebugSessionStarted";
+
+        std::string getName() const override {
+            return DebugSessionStarted::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/Event.hpp b/src/EventManager/Events/Event.hpp
new file mode 100644
index 00000000..062eec2f
--- /dev/null
+++ b/src/EventManager/Events/Event.hpp
@@ -0,0 +1,34 @@
+#pragma once
+
+#include <string>
+#include <memory>
+#include <atomic>
+#include <optional>
+
+#include "src/Helpers/DateTime.hpp"
+
+namespace Bloom::Events
+{
+    static_assert(std::atomic<int>::is_always_lock_free);
+
+    class Event
+    {
+    private:
+        QDateTime createdTimestamp = DateTime::currentDateTime();
+        static inline std::atomic<int> lastEventId = 0;
+
+    public:
+        int id = ++(this->lastEventId);
+        std::optional<int> correlationId;
+
+        static inline const std::string name = "GenericEvent";
+
+        virtual std::string getName() const {
+            return Event::name;
+        }
+
+        long getCreatedEpochTimestamp() const {
+            return this->createdTimestamp.toMSecsSinceEpoch();
+        }
+    };
+}
diff --git a/src/EventManager/Events/Events.hpp b/src/EventManager/Events/Events.hpp
new file mode 100644
index 00000000..1d6cd1fe
--- /dev/null
+++ b/src/EventManager/Events/Events.hpp
@@ -0,0 +1,49 @@
+#pragma once
+
+#include <memory>
+
+#include "Event.hpp"
+#include "StopTargetExecution.hpp"
+#include "ResumeTargetExecution.hpp"
+#include "ResetTarget.hpp"
+#include "DebugSessionStarted.hpp"
+#include "DebugSessionFinished.hpp"
+#include "TargetControllerStateChanged.hpp"
+#include "TargetControllerStopped.hpp"
+#include "ShutdownTargetController.hpp"
+#include "TargetControllerErrorOccurred.hpp"
+#include "ShutdownApplication.hpp"
+#include "DebugServerStateChanged.hpp"
+#include "ShutdownDebugServer.hpp"
+#include "RetrieveRegistersFromTarget.hpp"
+#include "RegistersRetrievedFromTarget.hpp"
+#include "WriteRegistersToTarget.hpp"
+#include "RegistersWrittenToTarget.hpp"
+#include "TargetExecutionResumed.hpp"
+#include "TargetExecutionStopped.hpp"
+#include "RetrieveMemoryFromTarget.hpp"
+#include "MemoryRetrievedFromTarget.hpp"
+#include "WriteMemoryToTarget.hpp"
+#include "MemoryWrittenToTarget.hpp"
+#include "SetBreakpointOnTarget.hpp"
+#include "RemoveBreakpointOnTarget.hpp"
+#include "BreakpointSetOnTarget.hpp"
+#include "BreakpointRemovedOnTarget.hpp"
+#include "StepTargetExecution.hpp"
+#include "SetProgramCounterOnTarget.hpp"
+#include "ProgramCounterSetOnTarget.hpp"
+#include "ExtractTargetDescriptor.hpp"
+#include "TargetDescriptorExtracted.hpp"
+#include "InsightStateChanged.hpp"
+#include "RetrieveTargetPinStates.hpp"
+#include "TargetPinStatesRetrieved.hpp"
+#include "SetTargetPinState.hpp"
+#include "TargetIoPortsUpdated.hpp"
+
+namespace Bloom::Events
+{
+    template <class EventType>
+    using EventPointer = std::shared_ptr<const EventType>;
+
+    using GenericEventPointer = EventPointer<Event>;
+}
diff --git a/src/EventManager/Events/ExtractTargetDescriptor.hpp b/src/EventManager/Events/ExtractTargetDescriptor.hpp
new file mode 100644
index 00000000..04c744ac
--- /dev/null
+++ b/src/EventManager/Events/ExtractTargetDescriptor.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ExtractTargetDescriptor: public Event
+    {
+    public:
+        static inline const std::string name = "ExtractTargetDescriptor";
+
+        std::string getName() const override {
+            return ExtractTargetDescriptor::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/InsightStateChanged.hpp b/src/EventManager/Events/InsightStateChanged.hpp
new file mode 100644
index 00000000..da585f58
--- /dev/null
+++ b/src/EventManager/Events/InsightStateChanged.hpp
@@ -0,0 +1,27 @@
+#pragma once
+
+#include "Event.hpp"
+#include "src/Helpers/Thread.hpp"
+
+namespace Bloom::Events
+{
+    class InsightStateChanged: public Event
+    {
+    private:
+        ThreadState state;
+    public:
+        InsightStateChanged(ThreadState state) : state(state) {
+
+        };
+
+        static inline const std::string name = "InsightStateChanged";
+
+        std::string getName() const override {
+            return InsightStateChanged::name;
+        }
+
+        ThreadState getState() const {
+            return this->state;
+        }
+    };
+}
diff --git a/src/EventManager/Events/MemoryRetrievedFromTarget.hpp b/src/EventManager/Events/MemoryRetrievedFromTarget.hpp
new file mode 100644
index 00000000..98a34b95
--- /dev/null
+++ b/src/EventManager/Events/MemoryRetrievedFromTarget.hpp
@@ -0,0 +1,21 @@
+#pragma once
+
+#include <vector>
+
+#include "Event.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::Events
+{
+    using Targets::TargetMemoryBuffer;
+    class MemoryRetrievedFromTarget: public Event
+    {
+    public:
+        static inline const std::string name = "MemoryRetrievedFromTarget";
+        TargetMemoryBuffer data;
+
+        std::string getName() const override {
+            return MemoryRetrievedFromTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/MemoryWrittenToTarget.hpp b/src/EventManager/Events/MemoryWrittenToTarget.hpp
new file mode 100644
index 00000000..e6f1494f
--- /dev/null
+++ b/src/EventManager/Events/MemoryWrittenToTarget.hpp
@@ -0,0 +1,21 @@
+#pragma once
+
+#include "Event.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::Events
+{
+    using Bloom::Targets::TargetMemoryBuffer;
+
+    class MemoryWrittenToTarget: public Event
+    {
+    public:
+        static inline const std::string name = "MemoryWrittenToTarget";
+
+        std::string getName() const override {
+            return MemoryWrittenToTarget::name;
+        }
+
+        MemoryWrittenToTarget() = default;
+    };
+}
diff --git a/src/EventManager/Events/ProgramCounterSetOnTarget.hpp b/src/EventManager/Events/ProgramCounterSetOnTarget.hpp
new file mode 100644
index 00000000..00a0e9db
--- /dev/null
+++ b/src/EventManager/Events/ProgramCounterSetOnTarget.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ProgramCounterSetOnTarget: public Event
+    {
+    public:
+        static inline const std::string name = "ProgramCounterSetOnTarget";
+
+        std::string getName() const override {
+            return ProgramCounterSetOnTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/RegistersRetrievedFromTarget.hpp b/src/EventManager/Events/RegistersRetrievedFromTarget.hpp
new file mode 100644
index 00000000..61d43e61
--- /dev/null
+++ b/src/EventManager/Events/RegistersRetrievedFromTarget.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <vector>
+
+#include "Event.hpp"
+#include "src/Targets/TargetRegister.hpp"
+
+namespace Bloom::Events
+{
+    using Targets::TargetRegisters;
+
+    class RegistersRetrievedFromTarget: public Event
+    {
+    public:
+        static inline const std::string name = "RegistersRetrievedFromTarget";
+        TargetRegisters registers;
+
+        std::string getName() const override {
+            return RegistersRetrievedFromTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/RegistersWrittenToTarget.hpp b/src/EventManager/Events/RegistersWrittenToTarget.hpp
new file mode 100644
index 00000000..58a6cdb9
--- /dev/null
+++ b/src/EventManager/Events/RegistersWrittenToTarget.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include <set>
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class RegistersWrittenToTarget: public Event
+    {
+    public:
+        static inline const std::string name = "RegistersWrittenToTarget";
+
+        std::string getName() const override {
+            return RegistersWrittenToTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/RemoveBreakpointOnTarget.hpp b/src/EventManager/Events/RemoveBreakpointOnTarget.hpp
new file mode 100644
index 00000000..c50a3fc9
--- /dev/null
+++ b/src/EventManager/Events/RemoveBreakpointOnTarget.hpp
@@ -0,0 +1,23 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/TargetBreakpoint.hpp"
+
+namespace Bloom::Events
+{
+    using Targets::TargetBreakpoint;
+
+    class RemoveBreakpointOnTarget: public Event
+    {
+    public:
+        static inline const std::string name = "RemoveBreakpointOnTarget";
+        std::uint32_t address;
+        TargetBreakpoint breakpoint;
+
+        std::string getName() const override {
+            return RemoveBreakpointOnTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/ResetTarget.hpp b/src/EventManager/Events/ResetTarget.hpp
new file mode 100644
index 00000000..368c66ac
--- /dev/null
+++ b/src/EventManager/Events/ResetTarget.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ResetTarget: public Event
+    {
+    public:
+        static inline const std::string name = "ResetTargetEvent";
+
+        std::string getName() const override {
+            return ResetTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/ResumeTargetExecution.hpp b/src/EventManager/Events/ResumeTargetExecution.hpp
new file mode 100644
index 00000000..8f403dba
--- /dev/null
+++ b/src/EventManager/Events/ResumeTargetExecution.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ResumeTargetExecution: public Event
+    {
+    public:
+        static inline const std::string name = "ResumeTargetExecutionEvent";
+        std::optional<std::uint32_t> fromProgramCounter;
+
+        std::string getName() const override {
+            return ResumeTargetExecution::name;
+        }
+
+        ResumeTargetExecution() = default;
+        ResumeTargetExecution(std::uint32_t fromProgramCounter) : fromProgramCounter(fromProgramCounter) {};
+    };
+}
diff --git a/src/EventManager/Events/RetrieveMemoryFromTarget.hpp b/src/EventManager/Events/RetrieveMemoryFromTarget.hpp
new file mode 100644
index 00000000..84373d68
--- /dev/null
+++ b/src/EventManager/Events/RetrieveMemoryFromTarget.hpp
@@ -0,0 +1,24 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::Events
+{
+    using Targets::TargetMemoryType;
+
+    class RetrieveMemoryFromTarget: public Event
+    {
+    public:
+        static inline const std::string name = "RetrieveMemoryFromTarget";
+        TargetMemoryType memoryType = TargetMemoryType::RAM;
+        std::uint32_t startAddress;
+        std::uint32_t bytes;
+
+        std::string getName() const override {
+            return RetrieveMemoryFromTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/RetrieveRegistersFromTarget.hpp b/src/EventManager/Events/RetrieveRegistersFromTarget.hpp
new file mode 100644
index 00000000..ae6f8b48
--- /dev/null
+++ b/src/EventManager/Events/RetrieveRegistersFromTarget.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <set>
+
+#include "Event.hpp"
+#include "src/Targets/TargetRegister.hpp"
+
+namespace Bloom::Events
+{
+    using Bloom::Targets::TargetRegisterDescriptors;
+
+    class RetrieveRegistersFromTarget: public Event
+    {
+    public:
+        static inline const std::string name = "RetrieveRegistersFromTarget";
+        TargetRegisterDescriptors descriptors;
+
+        std::string getName() const override {
+            return RetrieveRegistersFromTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/RetrieveTargetPinStates.hpp b/src/EventManager/Events/RetrieveTargetPinStates.hpp
new file mode 100644
index 00000000..99849d98
--- /dev/null
+++ b/src/EventManager/Events/RetrieveTargetPinStates.hpp
@@ -0,0 +1,19 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class RetrieveTargetPinStates: public Event
+    {
+    public:
+        static inline const std::string name = "RetrieveTargetPinStates";
+        int variantId;
+
+        std::string getName() const override {
+            return RetrieveTargetPinStates::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/SetBreakpointOnTarget.hpp b/src/EventManager/Events/SetBreakpointOnTarget.hpp
new file mode 100644
index 00000000..16dce3c2
--- /dev/null
+++ b/src/EventManager/Events/SetBreakpointOnTarget.hpp
@@ -0,0 +1,23 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/TargetBreakpoint.hpp"
+
+namespace Bloom::Events
+{
+    using Targets::TargetBreakpoint;
+
+    class SetBreakpointOnTarget: public Event
+    {
+    public:
+        static inline const std::string name = "SetBreakpointOnTarget";
+        std::uint32_t address;
+        TargetBreakpoint breakpoint;
+
+        std::string getName() const override {
+            return SetBreakpointOnTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/SetProgramCounterOnTarget.hpp b/src/EventManager/Events/SetProgramCounterOnTarget.hpp
new file mode 100644
index 00000000..1f319e6f
--- /dev/null
+++ b/src/EventManager/Events/SetProgramCounterOnTarget.hpp
@@ -0,0 +1,17 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class SetProgramCounterOnTarget: public Event
+    {
+    public:
+        static inline const std::string name = "SetProgramCounterOnTarget";
+        std::uint32_t address;
+
+        std::string getName() const override {
+            return SetProgramCounterOnTarget::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/SetTargetPinState.hpp b/src/EventManager/Events/SetTargetPinState.hpp
new file mode 100644
index 00000000..08b1778d
--- /dev/null
+++ b/src/EventManager/Events/SetTargetPinState.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/TargetPinDescriptor.hpp"
+
+namespace Bloom::Events
+{
+    class SetTargetPinState: public Event
+    {
+    public:
+        static inline const std::string name = "SetTargetPinState";
+        int variantId;
+        Targets::TargetPinDescriptor pinDescriptor;
+        Targets::TargetPinState pinState;
+
+        std::string getName() const override {
+            return SetTargetPinState::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/ShutdownApplication.hpp b/src/EventManager/Events/ShutdownApplication.hpp
new file mode 100644
index 00000000..1cf2b882
--- /dev/null
+++ b/src/EventManager/Events/ShutdownApplication.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ShutdownApplication: public Event
+    {
+    public:
+        static inline const std::string name = "ShutdownApplicationEvent";
+
+        std::string getName() const override {
+            return ShutdownApplication::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/ShutdownDebugServer.hpp b/src/EventManager/Events/ShutdownDebugServer.hpp
new file mode 100644
index 00000000..470b8e07
--- /dev/null
+++ b/src/EventManager/Events/ShutdownDebugServer.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ShutdownDebugServer: public Event
+    {
+    public:
+        static inline const std::string name = "ShutdownDebugServer";
+
+        std::string getName() const override {
+            return ShutdownDebugServer::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/ShutdownTargetController.hpp b/src/EventManager/Events/ShutdownTargetController.hpp
new file mode 100644
index 00000000..2618c661
--- /dev/null
+++ b/src/EventManager/Events/ShutdownTargetController.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class ShutdownTargetController: public Event
+    {
+    public:
+        static inline const std::string name = "ShutdownTargetControllerEvent";
+
+        std::string getName() const override {
+            return ShutdownTargetController::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/StepTargetExecution.hpp b/src/EventManager/Events/StepTargetExecution.hpp
new file mode 100644
index 00000000..86ab4ace
--- /dev/null
+++ b/src/EventManager/Events/StepTargetExecution.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class StepTargetExecution: public Event
+    {
+    public:
+        static inline const std::string name = "StepTargetExecution";
+        std::optional<std::uint32_t> fromProgramCounter;
+
+        std::string getName() const override {
+            return StepTargetExecution::name;
+        }
+
+        StepTargetExecution() = default;
+        StepTargetExecution(std::uint32_t fromProgramCounter) : fromProgramCounter(fromProgramCounter) {};
+    };
+}
diff --git a/src/EventManager/Events/StopTargetExecution.hpp b/src/EventManager/Events/StopTargetExecution.hpp
new file mode 100644
index 00000000..d1440d9e
--- /dev/null
+++ b/src/EventManager/Events/StopTargetExecution.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class StopTargetExecution: public Event
+    {
+    public:
+        static inline const std::string name = "StopTargetEvent";
+
+        std::string getName() const override {
+            return StopTargetExecution::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetControllerErrorOccurred.hpp b/src/EventManager/Events/TargetControllerErrorOccurred.hpp
new file mode 100644
index 00000000..7ca9dd21
--- /dev/null
+++ b/src/EventManager/Events/TargetControllerErrorOccurred.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class TargetControllerErrorOccurred: public Event
+    {
+    public:
+        static inline const std::string name = "TargetControllerErrorOccurred";
+
+        TargetControllerErrorOccurred() = default;
+
+        std::string getName() const override {
+            return TargetControllerErrorOccurred::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetControllerStateChanged.hpp b/src/EventManager/Events/TargetControllerStateChanged.hpp
new file mode 100644
index 00000000..5b3bbeca
--- /dev/null
+++ b/src/EventManager/Events/TargetControllerStateChanged.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include "Event.hpp"
+#include "src/Helpers/Thread.hpp"
+
+namespace Bloom::Events
+{
+
+    class TargetControllerStateChanged: public Event
+    {
+    private:
+        ThreadState state;
+    public:
+        TargetControllerStateChanged(ThreadState state) : state(state) {
+
+        };
+
+        static inline const std::string name = "TargetControllerStateChanged";
+
+        std::string getName() const override {
+            return TargetControllerStateChanged::name;
+        }
+
+        ThreadState getState() const {
+            return this->state;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetControllerStopped.hpp b/src/EventManager/Events/TargetControllerStopped.hpp
new file mode 100644
index 00000000..669b69e8
--- /dev/null
+++ b/src/EventManager/Events/TargetControllerStopped.hpp
@@ -0,0 +1,21 @@
+#pragma once
+
+#include <src/Exceptions/Exception.hpp>
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class TargetControllerStopped: public Event
+    {
+    private:
+        bool stoppedAbruptly = false;
+        std::optional<Exceptions::Exception> caughtException;
+
+    public:
+        static inline const std::string name = "TargetControllerStoppedEvent";
+
+        std::string getName() const override {
+            return TargetControllerStopped::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetDescriptorExtracted.hpp b/src/EventManager/Events/TargetDescriptorExtracted.hpp
new file mode 100644
index 00000000..1469c40c
--- /dev/null
+++ b/src/EventManager/Events/TargetDescriptorExtracted.hpp
@@ -0,0 +1,20 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/TargetDescriptor.hpp"
+
+namespace Bloom::Events
+{
+    class TargetDescriptorExtracted: public Event
+    {
+    public:
+        static inline const std::string name = "TargetDescriptorExtracted";
+        Targets::TargetDescriptor targetDescriptor;
+
+        std::string getName() const override {
+            return TargetDescriptorExtracted::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetExecutionResumed.hpp b/src/EventManager/Events/TargetExecutionResumed.hpp
new file mode 100644
index 00000000..39d593d8
--- /dev/null
+++ b/src/EventManager/Events/TargetExecutionResumed.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class TargetExecutionResumed: public Event
+    {
+    public:
+        static inline const std::string name = "TargetExecutionResumed";
+
+        TargetExecutionResumed() = default;
+
+        std::string getName() const override {
+            return TargetExecutionResumed::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetExecutionStopped.hpp b/src/EventManager/Events/TargetExecutionStopped.hpp
new file mode 100644
index 00000000..219d900f
--- /dev/null
+++ b/src/EventManager/Events/TargetExecutionStopped.hpp
@@ -0,0 +1,26 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/Target.hpp"
+
+namespace Bloom::Events
+{
+    using Targets::TargetBreakCause;
+
+    class TargetExecutionStopped: public Event
+    {
+    public:
+        static inline const std::string name = "TargetExecutionStopped";
+        std::uint32_t programCounter;
+        TargetBreakCause breakCause;
+
+        TargetExecutionStopped(std::uint32_t programCounter, TargetBreakCause breakCause) :
+        programCounter(programCounter), breakCause(breakCause) {}
+
+        std::string getName() const override {
+            return TargetExecutionStopped::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetIoPortsUpdated.hpp b/src/EventManager/Events/TargetIoPortsUpdated.hpp
new file mode 100644
index 00000000..eb5bd7b9
--- /dev/null
+++ b/src/EventManager/Events/TargetIoPortsUpdated.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include <string>
+
+#include "Event.hpp"
+
+namespace Bloom::Events
+{
+    class TargetIoPortsUpdated: public Event
+    {
+    public:
+        static inline const std::string name = "TargetIoPortsUpdated";
+
+        std::string getName() const override {
+            return TargetIoPortsUpdated::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/TargetPinStatesRetrieved.hpp b/src/EventManager/Events/TargetPinStatesRetrieved.hpp
new file mode 100644
index 00000000..2dd7d52d
--- /dev/null
+++ b/src/EventManager/Events/TargetPinStatesRetrieved.hpp
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <cstdint>
+#include <map>
+
+#include "Event.hpp"
+#include "src/Targets/TargetPinDescriptor.hpp"
+
+namespace Bloom::Events
+{
+    class TargetPinStatesRetrieved: public Event
+    {
+    public:
+        static inline const std::string name = "TargetPinStatesRetrieved";
+        int variantId;
+        std::map<int, Targets::TargetPinState> pinSatesByNumber;
+
+        std::string getName() const override {
+            return TargetPinStatesRetrieved::name;
+        }
+    };
+}
diff --git a/src/EventManager/Events/WriteMemoryToTarget.hpp b/src/EventManager/Events/WriteMemoryToTarget.hpp
new file mode 100644
index 00000000..c2bbb384
--- /dev/null
+++ b/src/EventManager/Events/WriteMemoryToTarget.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include <cstdint>
+
+#include "Event.hpp"
+#include "src/Targets/TargetMemory.hpp"
+
+namespace Bloom::Events
+{
+    using Bloom::Targets::TargetMemoryBuffer;
+
+    class WriteMemoryToTarget: public Event
+    {
+    public:
+        static inline const std::string name = "WriteMemoryToTarget";
+        TargetMemoryType memoryType;
+        std::uint32_t startAddress;
+        TargetMemoryBuffer buffer;
+
+        std::string getName() const override {
+            return WriteMemoryToTarget::name;
+        }
+
+        WriteMemoryToTarget() = default;
+        WriteMemoryToTarget(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer)
+        : memoryType(memoryType), startAddress(startAddress), buffer(buffer) {};
+    };
+}
diff --git a/src/EventManager/Events/WriteRegistersToTarget.hpp b/src/EventManager/Events/WriteRegistersToTarget.hpp
new file mode 100644
index 00000000..ccb7e94c
--- /dev/null
+++ b/src/EventManager/Events/WriteRegistersToTarget.hpp
@@ -0,0 +1,25 @@
+#pragma once
+
+#include <set>
+
+#include "Event.hpp"
+#include "src/Targets/TargetRegister.hpp"
+
+namespace Bloom::Events
+{
+    using Bloom::Targets::TargetRegister;
+
+    class WriteRegistersToTarget: public Event
+    {
+    public:
+        static inline const std::string name = "WriteRegistersToTarget";
+        TargetRegisters registers;
+
+        std::string getName() const override {
+            return WriteRegistersToTarget::name;
+        }
+
+        WriteRegistersToTarget() = default;
+        WriteRegistersToTarget(const TargetRegisters& registers) : registers(registers) {};
+    };
+}
diff --git a/src/Exceptions/DebugServerInterrupted.hpp b/src/Exceptions/DebugServerInterrupted.hpp
new file mode 100644
index 00000000..3abe1069
--- /dev/null
+++ b/src/Exceptions/DebugServerInterrupted.hpp
@@ -0,0 +1,12 @@
+#pragma once
+
+#include "Exception.hpp"
+namespace Bloom::Exceptions
+{
+    class DebugServerInterrupted: public Exception
+    {
+    public:
+        explicit DebugServerInterrupted() = default;
+
+    };
+}
diff --git a/src/Exceptions/DeviceCommunicationFailure.hpp b/src/Exceptions/DeviceCommunicationFailure.hpp
new file mode 100644
index 00000000..3c050a66
--- /dev/null
+++ b/src/Exceptions/DeviceCommunicationFailure.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include "Exception.hpp"
+
+namespace Bloom::Exceptions
+{
+    class DeviceCommunicationFailure: public Exception
+    {
+    public:
+        explicit DeviceCommunicationFailure(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit DeviceCommunicationFailure(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+    };
+}
diff --git a/src/Exceptions/Exception.hpp b/src/Exceptions/Exception.hpp
new file mode 100644
index 00000000..6e317d13
--- /dev/null
+++ b/src/Exceptions/Exception.hpp
@@ -0,0 +1,30 @@
+#pragma once
+
+#include <stdexcept>
+namespace Bloom::Exceptions
+{
+    class Exception: public std::runtime_error
+    {
+    protected:
+        std::string message;
+
+    public:
+        explicit Exception() : std::runtime_error("") {}
+
+        explicit Exception(const std::string& message) : std::runtime_error(message.c_str()) {
+            this->message = message;
+        }
+
+        explicit Exception(const char* message) : std::runtime_error(message) {
+            this->message = std::string(message);
+        }
+
+        const char* what() const noexcept override {
+            return this->message.c_str();
+        }
+
+        std::string getMessage() const {
+            return this->message;
+        }
+    };
+}
\ No newline at end of file
diff --git a/src/Exceptions/InvalidConfig.hpp b/src/Exceptions/InvalidConfig.hpp
new file mode 100644
index 00000000..e43e0ea1
--- /dev/null
+++ b/src/Exceptions/InvalidConfig.hpp
@@ -0,0 +1,17 @@
+#pragma once
+
+#include "Exception.hpp"
+namespace Bloom::Exceptions
+{
+    class InvalidConfig: public Exception
+    {
+    public:
+        explicit InvalidConfig(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit InvalidConfig(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+    };
+}
diff --git a/src/Exceptions/TargetControllerStartupFailure.hpp b/src/Exceptions/TargetControllerStartupFailure.hpp
new file mode 100644
index 00000000..343306ef
--- /dev/null
+++ b/src/Exceptions/TargetControllerStartupFailure.hpp
@@ -0,0 +1,17 @@
+#pragma once
+
+#include "Exception.hpp"
+namespace Bloom::Exceptions
+{
+    class TargetControllerStartupFailure: public Exception
+    {
+    public:
+        explicit TargetControllerStartupFailure(const std::string& message) : Exception(message) {
+            this->message = message;
+        }
+
+        explicit TargetControllerStartupFailure(const char* message) : Exception(message) {
+            this->message = std::string(message);
+        }
+    };
+}
diff --git a/src/Generated/resources.cpp b/src/Generated/resources.cpp
new file mode 100644
index 00000000..d29e850b
--- /dev/null
+++ b/src/Generated/resources.cpp
@@ -0,0 +1,1018 @@
+/****************************************************************************
+** Resource object code
+**
+** Created by: The Resource Compiler for Qt version 5.12.8
+**
+** WARNING! All changes made in this file will be lost!
+*****************************************************************************/
+
+static const unsigned char qt_resource_data[] = {
+  // /home/nav/Projects/Bloom/resources/help.txt
+  0x0,0x0,0x2,0x46,
+  0x41,
+  0x20,0x4c,0x69,0x6e,0x75,0x78,0x2d,0x62,0x61,0x73,0x65,0x64,0x20,0x64,0x65,0x62,
+  0x75,0x67,0x20,0x69,0x6e,0x74,0x65,0x72,0x66,0x61,0x63,0x65,0x20,0x66,0x6f,0x72,
+  0x20,0x65,0x6d,0x62,0x65,0x64,0x64,0x65,0x64,0x20,0x73,0x79,0x73,0x74,0x65,0x6d,
+  0x73,0x20,0x64,0x65,0x76,0x65,0x6c,0x6f,0x70,0x6d,0x65,0x6e,0x74,0x2e,0xa,0xa,
+  0x55,0x73,0x61,0x67,0x65,0x3a,0xa,0x20,0x20,0x62,0x6c,0x6f,0x6f,0x6d,0x20,0x5b,
+  0x45,0x4e,0x56,0x49,0x52,0x4f,0x4e,0x4d,0x45,0x4e,0x54,0x5f,0x4e,0x41,0x4d,0x45,
+  0x2f,0x43,0x4f,0x4d,0x4d,0x41,0x4e,0x44,0x5d,0xa,0xa,0x49,0x66,0x20,0x6e,0x6f,
+  0x20,0x65,0x6e,0x76,0x69,0x72,0x6f,0x6e,0x6d,0x65,0x6e,0x74,0x20,0x6e,0x61,0x6d,
+  0x65,0x20,0x6f,0x72,0x20,0x63,0x6f,0x6d,0x6d,0x61,0x6e,0x64,0x20,0x69,0x73,0x20,
+  0x70,0x72,0x6f,0x76,0x69,0x64,0x65,0x64,0x2c,0x20,0x42,0x6c,0x6f,0x6f,0x6d,0x20,
+  0x77,0x69,0x6c,0x6c,0x20,0x66,0x61,0x6c,0x6c,0x62,0x61,0x63,0x6b,0x20,0x74,0x6f,
+  0x20,0x74,0x68,0x65,0x20,0x65,0x6e,0x76,0x69,0x72,0x6f,0x6e,0x6d,0x65,0x6e,0x74,
+  0x20,0x6e,0x61,0x6d,0x65,0x64,0x20,0x22,0x64,0x65,0x66,0x61,0x75,0x6c,0x74,0x22,
+  0x2e,0xa,0x49,0x66,0x20,0x6e,0x6f,0x20,0x73,0x75,0x63,0x68,0x20,0x65,0x6e,0x76,
+  0x69,0x72,0x6f,0x6e,0x6d,0x65,0x6e,0x74,0x20,0x65,0x78,0x69,0x73,0x74,0x73,0x2c,
+  0x20,0x42,0x6c,0x6f,0x6f,0x6d,0x20,0x77,0x69,0x6c,0x6c,0x20,0x65,0x78,0x69,0x74,
+  0x2e,0xa,0xa,0x43,0x6f,0x6d,0x6d,0x61,0x6e,0x64,0x73,0x3a,0xa,0x20,0x20,0x2d,
+  0x2d,0x68,0x65,0x6c,0x70,0x2c,0x20,0x2d,0x68,0x20,0x20,0x20,0x20,0x20,0x20,0x44,
+  0x69,0x73,0x70,0x6c,0x61,0x79,0x73,0x20,0x74,0x68,0x69,0x73,0x20,0x68,0x65,0x6c,
+  0x70,0x20,0x74,0x65,0x78,0x74,0x2e,0xa,0x20,0x20,0x2d,0x2d,0x76,0x65,0x72,0x73,
+  0x69,0x6f,0x6e,0x2c,0x20,0x2d,0x76,0x20,0x20,0x20,0x44,0x69,0x73,0x70,0x6c,0x61,
+  0x79,0x73,0x20,0x74,0x68,0x65,0x20,0x63,0x75,0x72,0x72,0x65,0x6e,0x74,0x20,0x76,
+  0x65,0x72,0x73,0x69,0x6f,0x6e,0x20,0x6e,0x75,0x6d,0x62,0x65,0x72,0x2e,0xa,0x20,
+  0x20,0x69,0x6e,0x69,0x74,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
+  0x20,0x43,0x72,0x65,0x61,0x74,0x65,0x73,0x20,0x61,0x20,0x6e,0x65,0x77,0x20,0x42,
+  0x6c,0x6f,0x6f,0x6d,0x20,0x70,0x72,0x6f,0x6a,0x65,0x63,0x74,0x20,0x63,0x6f,0x6e,
+  0x66,0x69,0x67,0x75,0x72,0x61,0x74,0x69,0x6f,0x6e,0x20,0x66,0x69,0x6c,0x65,0x20,
+  0x28,0x62,0x6c,0x6f,0x6f,0x6d,0x2e,0x6a,0x73,0x6f,0x6e,0x29,0x20,0x69,0x6e,0x20,
+  0x74,0x68,0x65,0x20,0x77,0x6f,0x72,0x6b,0x69,0x6e,0x67,0x20,0x64,0x69,0x72,0x65,
+  0x63,0x74,0x6f,0x72,0x79,0x2e,0xa,0xa,0x46,0x6f,0x72,0x20,0x6d,0x6f,0x72,0x65,
+  0x20,0x69,0x6e,0x66,0x6f,0x72,0x6d,0x61,0x74,0x69,0x6f,0x6e,0x20,0x6f,0x6e,0x20,
+  0x67,0x65,0x74,0x74,0x69,0x6e,0x67,0x20,0x73,0x74,0x61,0x72,0x74,0x65,0x64,0x20,
+  0x77,0x69,0x74,0x68,0x20,0x42,0x6c,0x6f,0x6f,0x6d,0x2c,0x20,0x70,0x6c,0x65,0x61,
+  0x73,0x65,0x20,0x76,0x69,0x73,0x69,0x74,0x20,0x68,0x74,0x74,0x70,0x73,0x3a,0x2f,
+  0x2f,0x62,0x6c,0x6f,0x6f,0x6d,0x2e,0x6f,0x73,0x63,0x69,0x6c,0x6c,0x61,0x74,0x65,
+  0x2e,0x69,0x6f,0x2f,0x67,0x65,0x74,0x74,0x69,0x6e,0x67,0x2d,0x73,0x74,0x61,0x72,
+  0x74,0x65,0x64,0x2e,0xa,
+    // /home/nav/Projects/Bloom/resources/bloom.template.json
+  0x0,0x0,0x1,0x1a,
+  0x7b,
+  0xa,0x20,0x20,0x22,0x65,0x6e,0x76,0x69,0x72,0x6f,0x6e,0x6d,0x65,0x6e,0x74,0x73,
+  0x22,0x3a,0x20,0x7b,0xa,0x20,0x20,0x20,0x20,0x22,0x64,0x65,0x66,0x61,0x75,0x6c,
+  0x74,0x22,0x3a,0x20,0x7b,0xa,0x20,0x20,0x20,0x20,0x20,0x20,0x22,0x64,0x65,0x62,
+  0x75,0x67,0x54,0x6f,0x6f,0x6c,0x4e,0x61,0x6d,0x65,0x22,0x3a,0x20,0x22,0x61,0x74,
+  0x6d,0x65,0x6c,0x2d,0x69,0x63,0x65,0x22,0x2c,0xa,0xa,0x20,0x20,0x20,0x20,0x20,
+  0x20,0x22,0x74,0x61,0x72,0x67,0x65,0x74,0x22,0x3a,0x20,0x7b,0xa,0x20,0x20,0x20,
+  0x20,0x20,0x20,0x20,0x20,0x22,0x6e,0x61,0x6d,0x65,0x22,0x3a,0x20,0x22,0x61,0x76,
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+    // /home/nav/Projects/Bloom/src/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui
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+    // /home/nav/Projects/Bloom/src/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui
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+    // /home/nav/Projects/Bloom/src/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss
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+    // /home/nav/Projects/Bloom/src/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss
+  0x0,0x0,0x1,0x8d,
+  0x2a,
+  0x20,0x7b,0xa,0x20,0x20,0x20,0x20,0x63,0x6f,0x6c,0x6f,0x72,0x3a,0x20,0x23,0x63,
+  0x32,0x63,0x34,0x63,0x36,0x3b,0xa,0x20,0x20,0x20,0x20,0x66,0x6f,0x6e,0x74,0x2d,
+  0x66,0x61,0x6d,0x69,0x6c,0x79,0x3a,0x20,0x27,0x55,0x62,0x75,0x6e,0x74,0x75,0x27,
+  0x2c,0x20,0x73,0x61,0x6e,0x73,0x2d,0x73,0x65,0x72,0x69,0x66,0x3b,0xa,0x7d,0xa,
+  0xa,0x51,0x4d,0x61,0x69,0x6e,0x57,0x69,0x6e,0x64,0x6f,0x77,0x20,0x7b,0xa,0x20,
+  0x20,0x20,0x20,0x62,0x61,0x63,0x6b,0x67,0x72,0x6f,0x75,0x6e,0x64,0x2d,0x63,0x6f,
+  0x6c,0x6f,0x72,0x3a,0x20,0x23,0x33,0x43,0x33,0x46,0x34,0x31,0x3b,0xa,0x7d,0xa,
+  0xa,0xa,0x23,0x62,0x6c,0x6f,0x6f,0x6d,0x2d,0x69,0x63,0x6f,0x6e,0x20,0x7b,0xa,
+  0x20,0x20,0x20,0x20,0x6d,0x69,0x6e,0x2d,0x68,0x65,0x69,0x67,0x68,0x74,0x3a,0x20,
+  0x31,0x35,0x30,0x70,0x78,0x3b,0xa,0x20,0x20,0x20,0x20,0x6d,0x69,0x6e,0x2d,0x77,
+  0x69,0x64,0x74,0x68,0x3a,0x20,0x31,0x35,0x30,0x70,0x78,0x3b,0xa,0x20,0x20,0x20,
+  0x20,0x6d,0x61,0x78,0x2d,0x68,0x65,0x69,0x67,0x68,0x74,0x3a,0x20,0x31,0x35,0x30,
+  0x70,0x78,0x3b,0xa,0x20,0x20,0x20,0x20,0x6d,0x61,0x78,0x2d,0x77,0x69,0x64,0x74,
+  0x68,0x3a,0x20,0x31,0x35,0x30,0x70,0x78,0x3b,0xa,0x20,0x20,0x20,0x20,0x69,0x6d,
+  0x61,0x67,0x65,0x3a,0x20,0x75,0x72,0x6c,0x28,0x22,0x3a,0x2f,0x63,0x6f,0x6d,0x70,
+  0x69,0x6c,0x65,0x64,0x2f,0x49,0x6e,0x73,0x69,0x67,0x68,0x74,0x2f,0x55,0x73,0x65,
+  0x72,0x49,0x6e,0x74,0x65,0x72,0x66,0x61,0x63,0x65,0x73,0x2f,0x49,0x6e,0x73,0x69,
+  0x67,0x68,0x74,0x57,0x69,0x6e,0x64,0x6f,0x77,0x2f,0x49,0x6d,0x61,0x67,0x65,0x73,
+  0x2f,0x42,0x6c,0x6f,0x6f,0x6d,0x49,0x63,0x6f,0x6e,0x2e,0x73,0x76,0x67,0x22,0x29,
+  0x3b,0xa,0x20,0x20,0x20,0x20,0x69,0x6d,0x61,0x67,0x65,0x2d,0x70,0x6f,0x73,0x69,
+  0x74,0x69,0x6f,0x6e,0x3a,0x20,0x63,0x65,0x6e,0x74,0x65,0x72,0x3b,0xa,0x7d,0xa,
+  0xa,0x23,0x61,0x75,0x74,0x68,0x6f,0x72,0x2d,0x6c,0x61,0x62,0x65,0x6c,0x20,0x7b,
+  0xa,0x20,0x20,0x20,0x20,0x66,0x6f,0x6e,0x74,0x2d,0x73,0x69,0x7a,0x65,0x3a,0x20,
+  0x31,0x34,0x70,0x78,0x3b,0xa,0x20,0x20,0x20,0x20,0x63,0x6f,0x6c,0x6f,0x72,0x3a,
+  0x20,0x23,0x61,0x64,0x61,0x64,0x62,0x31,0x3b,0xa,0xa,0x7d,
+  
+};
+
+static const unsigned char qt_resource_name[] = {
+  // compiled
+  0x0,0x8,
+  0x6,0x47,0xf,0xf4,
+  0x0,0x63,
+  0x0,0x6f,0x0,0x6d,0x0,0x70,0x0,0x69,0x0,0x6c,0x0,0x65,0x0,0x64,
+    // Insight
+  0x0,0x7,
+  0x0,0x59,0xfd,0x54,
+  0x0,0x49,
+  0x0,0x6e,0x0,0x73,0x0,0x69,0x0,0x67,0x0,0x68,0x0,0x74,
+    // resources
+  0x0,0x9,
+  0xa,0x6c,0x78,0x43,
+  0x0,0x72,
+  0x0,0x65,0x0,0x73,0x0,0x6f,0x0,0x75,0x0,0x72,0x0,0x63,0x0,0x65,0x0,0x73,
+    // help.txt
+  0x0,0x8,
+  0xc,0x33,0x56,0x34,
+  0x0,0x68,
+  0x0,0x65,0x0,0x6c,0x0,0x70,0x0,0x2e,0x0,0x74,0x0,0x78,0x0,0x74,
+    // bloom.template.json
+  0x0,0x13,
+  0xb,0xd4,0x81,0x7e,
+  0x0,0x62,
+  0x0,0x6c,0x0,0x6f,0x0,0x6f,0x0,0x6d,0x0,0x2e,0x0,0x74,0x0,0x65,0x0,0x6d,0x0,0x70,0x0,0x6c,0x0,0x61,0x0,0x74,0x0,0x65,0x0,0x2e,0x0,0x6a,0x0,0x73,
+  0x0,0x6f,0x0,0x6e,
+    // UserInterfaces
+  0x0,0xe,
+  0xf,0x2,0x65,0xa3,
+  0x0,0x55,
+  0x0,0x73,0x0,0x65,0x0,0x72,0x0,0x49,0x0,0x6e,0x0,0x74,0x0,0x65,0x0,0x72,0x0,0x66,0x0,0x61,0x0,0x63,0x0,0x65,0x0,0x73,
+    // InsightWindow
+  0x0,0xd,
+  0x9,0x6f,0xb1,0xc7,
+  0x0,0x49,
+  0x0,0x6e,0x0,0x73,0x0,0x69,0x0,0x67,0x0,0x68,0x0,0x74,0x0,0x57,0x0,0x69,0x0,0x6e,0x0,0x64,0x0,0x6f,0x0,0x77,
+    // Stylesheets
+  0x0,0xb,
+  0xc,0x2b,0x3c,0xf3,
+  0x0,0x53,
+  0x0,0x74,0x0,0x79,0x0,0x6c,0x0,0x65,0x0,0x73,0x0,0x68,0x0,0x65,0x0,0x65,0x0,0x74,0x0,0x73,
+    // Images
+  0x0,0x6,
+  0x5,0x3,0x7d,0xc3,
+  0x0,0x49,
+  0x0,0x6d,0x0,0x61,0x0,0x67,0x0,0x65,0x0,0x73,
+    // TargetWidgets
+  0x0,0xd,
+  0x8,0xeb,0x64,0xf3,
+  0x0,0x54,
+  0x0,0x61,0x0,0x72,0x0,0x67,0x0,0x65,0x0,0x74,0x0,0x57,0x0,0x69,0x0,0x64,0x0,0x67,0x0,0x65,0x0,0x74,0x0,0x73,
+    // UiFiles
+  0x0,0x7,
+  0xb,0xdd,0x2,0x63,
+  0x0,0x55,
+  0x0,0x69,0x0,0x46,0x0,0x69,0x0,0x6c,0x0,0x65,0x0,0x73,
+    // AboutWindow.ui
+  0x0,0xe,
+  0x6,0x6f,0xcf,0xd9,
+  0x0,0x41,
+  0x0,0x62,0x0,0x6f,0x0,0x75,0x0,0x74,0x0,0x57,0x0,0x69,0x0,0x6e,0x0,0x64,0x0,0x6f,0x0,0x77,0x0,0x2e,0x0,0x75,0x0,0x69,
+    // InsightWindow.ui
+  0x0,0x10,
+  0xb,0x1d,0xc8,0x59,
+  0x0,0x49,
+  0x0,0x6e,0x0,0x73,0x0,0x69,0x0,0x67,0x0,0x68,0x0,0x74,0x0,0x57,0x0,0x69,0x0,0x6e,0x0,0x64,0x0,0x6f,0x0,0x77,0x0,0x2e,0x0,0x75,0x0,0x69,
+    // DIP
+  0x0,0x3,
+  0x0,0x0,0x48,0xe0,
+  0x0,0x44,
+  0x0,0x49,0x0,0x50,
+    // DualInlinePackage.qss
+  0x0,0x15,
+  0xe,0xdb,0xb2,0x43,
+  0x0,0x44,
+  0x0,0x75,0x0,0x61,0x0,0x6c,0x0,0x49,0x0,0x6e,0x0,0x6c,0x0,0x69,0x0,0x6e,0x0,0x65,0x0,0x50,0x0,0x61,0x0,0x63,0x0,0x6b,0x0,0x61,0x0,0x67,0x0,0x65,
+  0x0,0x2e,0x0,0x71,0x0,0x73,0x0,0x73,
+    // refresh.svg
+  0x0,0xb,
+  0xc,0x6a,0x21,0xc7,
+  0x0,0x72,
+  0x0,0x65,0x0,0x66,0x0,0x72,0x0,0x65,0x0,0x73,0x0,0x68,0x0,0x2e,0x0,0x73,0x0,0x76,0x0,0x67,
+    // RAM.svg
+  0x0,0x7,
+  0x6,0x60,0x5a,0x67,
+  0x0,0x52,
+  0x0,0x41,0x0,0x4d,0x0,0x2e,0x0,0x73,0x0,0x76,0x0,0x67,
+    // BloomIcon.svg
+  0x0,0xd,
+  0xc,0x4d,0x98,0x7,
+  0x0,0x42,
+  0x0,0x6c,0x0,0x6f,0x0,0x6f,0x0,0x6d,0x0,0x49,0x0,0x63,0x0,0x6f,0x0,0x6e,0x0,0x2e,0x0,0x73,0x0,0x76,0x0,0x67,
+    // refresh-disabled.svg
+  0x0,0x14,
+  0xa,0xb5,0x6f,0x67,
+  0x0,0x72,
+  0x0,0x65,0x0,0x66,0x0,0x72,0x0,0x65,0x0,0x73,0x0,0x68,0x0,0x2d,0x0,0x64,0x0,0x69,0x0,0x73,0x0,0x61,0x0,0x62,0x0,0x6c,0x0,0x65,0x0,0x64,0x0,0x2e,
+  0x0,0x73,0x0,0x76,0x0,0x67,
+    // InsightWindow.qss
+  0x0,0x11,
+  0x1,0xdc,0x87,0xc3,
+  0x0,0x49,
+  0x0,0x6e,0x0,0x73,0x0,0x69,0x0,0x67,0x0,0x68,0x0,0x74,0x0,0x57,0x0,0x69,0x0,0x6e,0x0,0x64,0x0,0x6f,0x0,0x77,0x0,0x2e,0x0,0x71,0x0,0x73,0x0,0x73,
+  
+    // AboutWindow.qss
+  0x0,0xf,
+  0x6,0xfc,0xfe,0x63,
+  0x0,0x41,
+  0x0,0x62,0x0,0x6f,0x0,0x75,0x0,0x74,0x0,0x57,0x0,0x69,0x0,0x6e,0x0,0x64,0x0,0x6f,0x0,0x77,0x0,0x2e,0x0,0x71,0x0,0x73,0x0,0x73,
+  
+};
+
+static const unsigned char qt_resource_struct[] = {
+  // :
+  0x0,0x0,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x1,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled
+  0x0,0x0,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x2,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight
+  0x0,0x0,0x0,0x16,0x0,0x2,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x6,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/resources
+  0x0,0x0,0x0,0x2a,0x0,0x2,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0x4,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/resources/bloom.template.json
+  0x0,0x0,0x0,0x58,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0x2,0x4a,
+0x0,0x0,0x1,0x78,0x79,0xc5,0xd5,0xc8,
+  // :/compiled/resources/help.txt
+  0x0,0x0,0x0,0x42,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x0,
+0x0,0x0,0x1,0x78,0x87,0xd2,0x36,0xe4,
+  // :/compiled/Insight/UserInterfaces
+  0x0,0x0,0x0,0x84,0x0,0x2,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x7,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow
+  0x0,0x0,0x0,0xa6,0x0,0x2,0x0,0x0,0x0,0x4,0x0,0x0,0x0,0x8,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Images
+  0x0,0x0,0x0,0xe2,0x0,0x2,0x0,0x0,0x0,0x4,0x0,0x0,0x0,0x13,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/TargetWidgets
+  0x0,0x0,0x0,0xf4,0x0,0x2,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x10,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/UiFiles
+  0x0,0x0,0x1,0x14,0x0,0x2,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0xe,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets
+  0x0,0x0,0x0,0xc6,0x0,0x2,0x0,0x0,0x0,0x2,0x0,0x0,0x0,0xc,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss
+  0x0,0x0,0x2,0x2a,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x29,0x4b,
+0x0,0x0,0x1,0x78,0x9e,0x54,0x8a,0x3c,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss
+  0x0,0x0,0x2,0x52,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0x2c,0xac,
+0x0,0x0,0x1,0x78,0x9e,0x14,0x65,0xe4,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui
+  0x0,0x0,0x1,0x28,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x3,0x68,
+0x0,0x0,0x1,0x78,0x9e,0x1a,0x16,0xf4,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui
+  0x0,0x0,0x1,0x4a,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x5,0x7c,
+0x0,0x0,0x1,0x78,0x9e,0x54,0xd9,0x80,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP
+  0x0,0x0,0x1,0x70,0x0,0x2,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x11,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets
+  0x0,0x0,0x0,0xc6,0x0,0x2,0x0,0x0,0x0,0x1,0x0,0x0,0x0,0x12,
+0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss
+  0x0,0x0,0x1,0x7c,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0xa,0xd0,
+0x0,0x0,0x1,0x78,0x7a,0x53,0x7f,0xed,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Images/RAM.svg
+  0x0,0x0,0x1,0xc8,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x13,0xfa,
+0x0,0x0,0x1,0x78,0xa,0x31,0xaf,0x21,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg
+  0x0,0x0,0x1,0xfc,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0x21,0x2e,
+0x0,0x0,0x1,0x78,0x61,0xb7,0xd,0x19,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg
+  0x0,0x0,0x1,0xdc,0x0,0x1,0x0,0x0,0x0,0x1,0x0,0x0,0x18,0x59,
+0x0,0x0,0x1,0x78,0x9d,0xba,0x34,0xe6,
+  // :/compiled/Insight/UserInterfaces/InsightWindow/Images/refresh.svg
+  0x0,0x0,0x1,0xac,0x0,0x0,0x0,0x0,0x0,0x1,0x0,0x0,0xc,0x82,
+0x0,0x0,0x1,0x78,0x5b,0x19,0xd5,0xd9,
+
+};
+
+#ifdef QT_NAMESPACE
+#  define QT_RCC_PREPEND_NAMESPACE(name) ::QT_NAMESPACE::name
+#  define QT_RCC_MANGLE_NAMESPACE0(x) x
+#  define QT_RCC_MANGLE_NAMESPACE1(a, b) a##_##b
+#  define QT_RCC_MANGLE_NAMESPACE2(a, b) QT_RCC_MANGLE_NAMESPACE1(a,b)
+#  define QT_RCC_MANGLE_NAMESPACE(name) QT_RCC_MANGLE_NAMESPACE2( \
+        QT_RCC_MANGLE_NAMESPACE0(name), QT_RCC_MANGLE_NAMESPACE0(QT_NAMESPACE))
+#else
+#   define QT_RCC_PREPEND_NAMESPACE(name) name
+#   define QT_RCC_MANGLE_NAMESPACE(name) name
+#endif
+
+#ifdef QT_NAMESPACE
+namespace QT_NAMESPACE {
+#endif
+
+bool qRegisterResourceData(int, const unsigned char *, const unsigned char *, const unsigned char *);
+
+bool qUnregisterResourceData(int, const unsigned char *, const unsigned char *, const unsigned char *);
+
+#ifdef QT_NAMESPACE
+}
+#endif
+
+int QT_RCC_MANGLE_NAMESPACE(qInitResources)();
+int QT_RCC_MANGLE_NAMESPACE(qInitResources)()
+{
+    QT_RCC_PREPEND_NAMESPACE(qRegisterResourceData)
+        (0x2, qt_resource_struct, qt_resource_name, qt_resource_data);
+    return 1;
+}
+
+int QT_RCC_MANGLE_NAMESPACE(qCleanupResources)();
+int QT_RCC_MANGLE_NAMESPACE(qCleanupResources)()
+{
+    QT_RCC_PREPEND_NAMESPACE(qUnregisterResourceData)
+       (0x2, qt_resource_struct, qt_resource_name, qt_resource_data);
+    return 1;
+}
+
+namespace {
+   struct initializer {
+       initializer() { QT_RCC_MANGLE_NAMESPACE(qInitResources)(); }
+       ~initializer() { QT_RCC_MANGLE_NAMESPACE(qCleanupResources)(); }
+   } dummy;
+}
diff --git a/src/Helpers/BiMap.hpp b/src/Helpers/BiMap.hpp
new file mode 100644
index 00000000..9a50345a
--- /dev/null
+++ b/src/Helpers/BiMap.hpp
@@ -0,0 +1,71 @@
+#pragma once
+
+#include <memory>
+#include <map>
+
+namespace Bloom
+{
+    /**
+     * Simple bidirectional map
+     *
+     * This should only be used for small maps, with small elements (enums, string literals, etc).
+     *
+     * TODO: This needs some work - was written as a quick implementation with minimal requirements.
+     * TODO: Add support for inserting/deleting elements (outside of construction).
+     *
+     * @tparam TypeA
+     * @tparam TypeB
+     */
+    template<typename TypeA, typename TypeB>
+    class BiMap
+    {
+    private:
+        std::unordered_map<TypeA, TypeB> map;
+        std::unordered_map<TypeB, typename std::unordered_map<TypeA, TypeB>::iterator> flippedMap;
+
+    public:
+        BiMap(std::initializer_list<std::pair<TypeA, TypeB>> elements) {
+            for (auto it = elements.begin(); it != elements.end(); ++it) {
+                auto insertResultPair = this->map.insert(std::pair<TypeA, TypeB>{it->first, it->second});
+                this->flippedMap.insert(
+                    std::pair<TypeB, typename std::unordered_map<TypeA, TypeB>::iterator>{
+                        it->second,
+                        insertResultPair.first
+                    }
+                );
+            }
+        }
+
+        bool contains(TypeA key) const {
+            return this->map.find(key) != this->map.end();
+        }
+
+        bool contains(TypeB key) const {
+            return this->flippedMap.find(key) != this->flippedMap.end();
+        }
+
+        std::optional<TypeB> valueAt(TypeA key) const {
+            std::optional<TypeB> output;
+
+            if (this->contains(key)) {
+                output = this->map.find(key)->second;
+            }
+
+            return output;
+        }
+
+        std::optional<TypeA> valueAt(TypeB key) const {
+            std::optional<TypeA> output;
+
+            if (this->contains(key)) {
+                output = this->flippedMap.find(key)->second->first;
+            }
+
+            return output;
+        }
+
+        std::unordered_map<TypeA, TypeB> getMap() {
+            return this->map;
+        }
+    };
+}
\ No newline at end of file
diff --git a/src/Helpers/DateTime.hpp b/src/Helpers/DateTime.hpp
new file mode 100644
index 00000000..03dae083
--- /dev/null
+++ b/src/Helpers/DateTime.hpp
@@ -0,0 +1,42 @@
+#pragma once
+
+#include <mutex>
+#include <QDateTime>
+
+namespace Bloom
+{
+    /**
+     * Some (maybe all) QDateTime static functions are not thread-safe and thus can result in data races.
+     * This trivial helper class wraps some of these functions and employs a mutex to prevent data races.
+     */
+    class DateTime
+    {
+    private:
+        static inline std::mutex currentDateTimeMutex;
+
+    public:
+        /**
+         * The QDateTime::currentDateTime() static function is not thread-safe. This may be caused by the
+         * underlying interfacing with the system clock.
+         *
+         * @return
+         */
+        static QDateTime currentDateTime() {
+            auto lock = std::unique_lock(DateTime::currentDateTimeMutex);
+            return QDateTime::currentDateTime();
+        }
+
+        /**
+         * The QDateTime::timeZoneAbbreviation() is a non-static member function but it may still interface with the
+         * system clock. This can result in race conditions when called simultaneously to QDateTime::currentDateTime(),
+         * and so any calls to it must require possession of the mutex.
+         *
+         * @param dateTime
+         * @return
+         */
+        static QString getTimeZoneAbbreviation(const QDateTime& dateTime) {
+            auto lock = std::unique_lock(DateTime::currentDateTimeMutex);
+            return dateTime.timeZoneAbbreviation();
+        }
+    };
+}
\ No newline at end of file
diff --git a/src/Helpers/EventNotifier.hpp b/src/Helpers/EventNotifier.hpp
new file mode 100644
index 00000000..2fb1871a
--- /dev/null
+++ b/src/Helpers/EventNotifier.hpp
@@ -0,0 +1,65 @@
+#pragma once
+
+#include <sys/eventfd.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "src/Exceptions/Exception.hpp"
+
+namespace Bloom
+{
+    using namespace Exceptions;
+
+    /**
+     * The EventNotifier class provides a means to interrupt a thread that is blocked by an IO call.
+     *
+     * It's implementation is rather simple: It uses a Linux event file descriptor (sys/eventfd.h), which should be used
+     * along side epoll() to interrupt a blocking call that is waiting on the epoll file descriptor.
+     *
+     * The EventListener can hold an instance to EventNotifier, where it will invoke EventNotifier::notify() everytime
+     * a new event is registered on the listener.
+     *
+     * @TODO: This could do with some cleaning. It's a bit hacky. Also, maybe add the ability to register the event
+     *        file descriptor to an epoll instance within a public method (instead of relying on the caller to do this
+     *        themselves via EventNotifier::getFileDescriptor()).
+     */
+    class EventNotifier
+    {
+    private:
+        int fileDescriptor = -1;
+
+    public:
+        EventNotifier() = default;
+
+        void init() {
+            this->fileDescriptor = ::eventfd(0, EFD_NONBLOCK);
+
+            if (this->fileDescriptor < -1) {
+                throw Exception("Failed to create new eventfd object - error number: " + std::to_string(errno));
+            }
+        }
+
+        int getFileDescriptor() {
+            return this->fileDescriptor;
+        }
+
+        void notify() {
+            if (::eventfd_write(this->fileDescriptor, 1) < 0) {
+                throw Exception("Failed to increment eventfd counter - error number: " + std::to_string(errno));
+            }
+        }
+
+        void clear() {
+            eventfd_t counter;
+            if (::eventfd_read(this->fileDescriptor, &counter) < 0 && errno != EAGAIN) {
+                throw Exception("Failed to clear EventNotifier object - eventfd_read failed - error number: "
+                                + std::to_string(errno));
+            }
+        }
+
+        void close() {
+            ::close(this->fileDescriptor);
+        }
+    };
+}
\ No newline at end of file
diff --git a/src/Helpers/SyncSafe.hpp b/src/Helpers/SyncSafe.hpp
new file mode 100644
index 00000000..b4064a3d
--- /dev/null
+++ b/src/Helpers/SyncSafe.hpp
@@ -0,0 +1,55 @@
+#pragma once
+
+#include <mutex>
+
+namespace Bloom
+{
+    /**
+     * Template for synchronization safe types.
+     *
+     * Just a convenient template that allows us to create thread safe types without having to write
+     * the bloat of mutexes, unique_locks, etc etc.
+     *
+     * @TODO Might be an idea to use an off-the-shelf solution for this, as there are a few available.
+     *
+     * @tparam Type
+     */
+    template<typename Type>
+    class SyncSafe
+    {
+    private:
+        std::mutex mutex;
+        Type value;
+    public:
+        SyncSafe() = default;
+
+        explicit SyncSafe(Type value): value(value) {
+        };
+
+        void setValue(Type value) {
+            auto lock = std::unique_lock(this->mutex);
+            this->value = value;
+        };
+
+        Type getValue() {
+            auto lock = std::unique_lock(this->mutex);
+            return this->value;
+        };
+
+        Type& getReference() {
+            return this->value;
+        };
+
+        void lock() {
+            this->mutex.lock();
+        };
+
+        void unlock() {
+            this->mutex.unlock();
+        };
+
+        std::unique_lock<std::mutex> acquireLock() {
+            return std::unique_lock(this->mutex);
+        };
+    };
+}
\ No newline at end of file
diff --git a/src/Helpers/Thread.hpp b/src/Helpers/Thread.hpp
new file mode 100644
index 00000000..eada3da9
--- /dev/null
+++ b/src/Helpers/Thread.hpp
@@ -0,0 +1,50 @@
+#pragma once
+
+#include <csignal>
+#include <cassert>
+
+#include "SyncSafe.hpp"
+
+namespace Bloom
+{
+    enum class ThreadState
+    {
+        UNINITIALISED,
+        READY,
+        STOPPED,
+        STARTING,
+        SHUTDOWN_INITIATED,
+    };
+
+    class Thread
+    {
+    private:
+        SyncSafe<ThreadState> state = SyncSafe<ThreadState>(ThreadState::UNINITIALISED);
+
+    protected:
+        virtual void setState(ThreadState state) {
+            this->state.setValue(state);
+        };
+
+        /**
+         * Disables signal interrupts on current thread.
+         */
+        void blockAllSignalsOnCurrentThread() {
+            sigset_t set = {};
+            sigfillset(&set);
+            sigprocmask(SIG_SETMASK, &set, NULL);
+        };
+
+        void setName(std::string name) {
+            // POSIX thread names cannot exceed 16 characters, including the terminating null byte.
+            assert(name.size() <= 15);
+
+            pthread_setname_np(pthread_self(), name.c_str());
+        }
+
+    public:
+        virtual ThreadState getState() {
+            return this->state.getValue();
+        };
+    };
+}
\ No newline at end of file
diff --git a/src/Insight/Insight.cpp b/src/Insight/Insight.cpp
new file mode 100644
index 00000000..ec9d44e8
--- /dev/null
+++ b/src/Insight/Insight.cpp
@@ -0,0 +1,144 @@
+#include <thread>
+#include <typeindex>
+#include <QTimer>
+
+#include "Insight.hpp"
+#include "InsightWorker.hpp"
+#include "src/Application.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/Targets/TargetState.hpp"
+
+using namespace Bloom;
+using namespace Exceptions;
+
+void Insight::run() {
+    try {
+        this->startup();
+
+        this->workerThread->start();
+        this->setState(ThreadState::READY);
+        Logger::info("Insight ready");
+        this->application->exec();
+
+    } catch (const Exception& exception) {
+        Logger::error("Insight encountered a fatal error. See below for errors:");
+        Logger::error(exception.getMessage());
+
+    } catch (const std::exception& exception) {
+        Logger::error("Insight encountered a fatal error. See below for errors:");
+        Logger::error(std::string(exception.what()));
+    }
+
+    this->shutdown();
+}
+
+void Insight::startup() {
+    Logger::info("Starting Insight");
+    this->setState(ThreadState::STARTING);
+    this->eventManager.registerListener(this->eventListener);
+
+    this->eventListener->registerCallbackForEventType<ShutdownApplication>(
+        std::bind(&Insight::onShutdownApplicationEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<TargetControllerStateChanged>(
+        std::bind(&Insight::onTargetControllerStateChangedEvent, this, std::placeholders::_1)
+    );
+
+    auto targetDescriptor = this->getTargetDescriptor();
+
+    std::string qtAppName = "Bloom";
+    char* appArguments[] = {qtAppName.data()};
+    auto appArgCount = 1;
+//        QCoreApplication::addLibraryPath(QString::fromStdString(Application::getApplicationDirPath() + "/plugins"));
+    QCoreApplication::setAttribute(Qt::AA_ShareOpenGLContexts, true);
+
+    this->application = new QApplication(appArgCount, appArguments);
+    this->application->setQuitOnLastWindowClosed(true);
+    qRegisterMetaType<Bloom::Targets::TargetPinDescriptor>();
+    qRegisterMetaType<Bloom::Targets::TargetPinState>();
+    qRegisterMetaType<Bloom::Targets::TargetState>();
+    qRegisterMetaType<std::map<int, Bloom::Targets::TargetPinState>>();
+
+    this->mainWindow.init(*(this->application), targetDescriptor);
+    this->mainWindow.show();
+
+    /*
+     * We can't run our own event loop here - we have to use Qt's event loop. But we still need to be able to
+     * process our events. To address this, we use a QTimer to dispatch our events on an interval.
+     *
+     * This allows us to use Qt's event loop whilst still being able to process our own events.
+     */
+    auto eventDispatchTimer = new QTimer(this->application);
+    connect(eventDispatchTimer, &QTimer::timeout, this, &Insight::dispatchEvents);
+    eventDispatchTimer->start(100);
+
+    // Prepare worker thread
+    auto worker = new InsightWorker(this->eventManager);
+    this->workerThread = new QThread();
+    this->workerThread->setObjectName("IW");
+    worker->moveToThread(this->workerThread);
+    connect(this->workerThread, &QThread::started, worker, &InsightWorker::startup);
+    connect(this->workerThread, &QThread::finished, worker, &QObject::deleteLater);
+    connect(this->workerThread, &QThread::finished, this->workerThread, &QThread::deleteLater);
+
+    connect(worker, &InsightWorker::targetStateUpdated, &(this->mainWindow), &InsightWindow::onTargetStateUpdate);
+    connect(worker, &InsightWorker::targetProgramCounterUpdated, &(this->mainWindow), &InsightWindow::onTargetProgramCounterUpdate);
+    connect(worker, &InsightWorker::targetPinStatesUpdated, &(this->mainWindow), &InsightWindow::onTargetPinStatesUpdate);
+    connect(worker, &InsightWorker::targetIoPortsUpdated, &(this->mainWindow), &InsightWindow::onTargetIoPortsUpdate);
+    connect(&(this->mainWindow), &InsightWindow::refreshTargetPinStates, worker, &InsightWorker::requestPinStates);
+    connect(&(this->mainWindow), &InsightWindow::setTargetPinState, worker, &InsightWorker::requestPinStateUpdate);
+}
+
+Targets::TargetDescriptor Insight::getTargetDescriptor() {
+    auto extractEvent = std::make_shared<Events::ExtractTargetDescriptor>();
+    this->eventManager.triggerEvent(extractEvent);
+    auto responseEvent = this->eventListener->waitForEvent<
+        Events::TargetDescriptorExtracted,
+        Events::TargetControllerErrorOccurred
+    >(std::chrono::milliseconds(5000), extractEvent->id);
+
+    if (!responseEvent.has_value()
+        || !std::holds_alternative<EventPointer<Events::TargetDescriptorExtracted>>(responseEvent.value())
+        ) {
+        throw Exception("Unexpected response from TargetController");
+    }
+
+    auto descriptorExtracted = std::get<EventPointer<Events::TargetDescriptorExtracted>>(responseEvent.value());
+    return descriptorExtracted->targetDescriptor;
+}
+
+void Insight::shutdown() {
+    if (this->getState() == ThreadState::STOPPED) {
+        return;
+    }
+
+    Logger::info("Shutting down Insight");
+    this->mainWindow.close();
+
+    if (this->workerThread != nullptr && this->workerThread->isRunning()) {
+        this->workerThread->quit();
+    }
+
+    if (this->application != nullptr) {
+        this->application->exit(0);
+    }
+
+    this->setState(ThreadState::STOPPED);
+}
+
+void Insight::onShutdownApplicationEvent(EventPointer<ShutdownApplication>) {
+    /*
+     * Once Insight shuts down, control of the main thread will be returned to Application::run(), which
+     * will pickup the ShutdownApplication event and proceed with the shutdown.
+     */
+    this->shutdown();
+}
+
+void Insight::onTargetControllerStateChangedEvent(EventPointer<TargetControllerStateChanged> event) {
+    if (event->getState() == ThreadState::STOPPED) {
+        // Something horrible has happened with the TargetController - Insight is useless without the TargetController
+        this->shutdown();
+    }
+}
diff --git a/src/Insight/Insight.hpp b/src/Insight/Insight.hpp
new file mode 100644
index 00000000..b6161a10
--- /dev/null
+++ b/src/Insight/Insight.hpp
@@ -0,0 +1,92 @@
+#pragma once
+
+#include <QtCore>
+#include <QApplication>
+
+#include "UserInterfaces/InsightWindow/InsightWindow.hpp"
+#include "src/Helpers/Thread.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "src/EventManager/EventManager.hpp"
+#include "src/EventManager/EventListener.hpp"
+#include "src/Targets/TargetDescriptor.hpp"
+
+namespace Bloom
+{
+    /**
+     * The Insight component provides a GUI for insight into the target's GPIO state.
+     * Insight relies heavily on the Qt framework - it's practically a small Qt application. Each supported target
+     * package variant implements a custom Qt widget that presents the user with the current state of the target's GPIO
+     * pins, as well as the ability to manipulate the pin states of output pins by clicking on them.
+     *
+     * The Insight component occupies the Bloom's main thread. See Application::run() for more.
+     */
+    class Insight: public QObject, public Thread
+    {
+    Q_OBJECT
+    private:
+        ApplicationConfig applicationConfig;
+        EnvironmentConfig environmentConfig;
+
+        EventManager& eventManager;
+        EventListenerPointer eventListener = std::make_shared<EventListener>("InsightEventListener");
+
+        QApplication* application = nullptr;
+        InsightWindow mainWindow;
+
+        /**
+         * Insight consists of two threads - the main thread where the main Qt event loop runs (for the GUI), and
+         * a single worker thread to handle any blocking/time-expensive operations.
+         */
+        QThread* workerThread;
+
+        void startup();
+
+        Targets::TargetDescriptor getTargetDescriptor();
+
+    public:
+        Insight(EventManager& eventManager): eventManager(eventManager) {};
+
+        void setApplicationConfig(const ApplicationConfig& applicationConfig) {
+            this->applicationConfig = applicationConfig;
+        }
+
+        void setEnvironmentConfig(const EnvironmentConfig& environmentConfig) {
+            this->environmentConfig = environmentConfig;
+        }
+
+        /**
+         * Entry point for Insight.
+         */
+        void run();
+
+        /**
+         * Shuts down Insight. Called when the user closes the Insight window.
+         */
+        void shutdown();
+
+        /**
+         * Because Insight occupies the main thread, it must handle any application shutdown requests.
+         *
+         * @param event
+         */
+        void onShutdownApplicationEvent(EventPointer<ShutdownApplication> event);
+
+        /**
+         * If the something horrible was to happen and the TC dies unexpectedly, Insight will shutdown in response.
+         *
+         * @param event
+         */
+        void onTargetControllerStateChangedEvent(EventPointer<TargetControllerStateChanged> event);
+
+        /**
+         * Dispatches any events currently in the queue.
+         *
+         * Because Insight is effectively a Qt application, we cannot use our own event loop. We must use Qt's event
+         * loop. We do this by utilizing a QTimer instance to call this method on an interval.
+         * See Insight::startup() for more.
+         */
+        void dispatchEvents() {
+            this->eventListener->dispatchCurrentEvents();
+        };
+    };
+}
diff --git a/src/Insight/InsightWorker.cpp b/src/Insight/InsightWorker.cpp
new file mode 100644
index 00000000..bf9dbcdb
--- /dev/null
+++ b/src/Insight/InsightWorker.cpp
@@ -0,0 +1,86 @@
+#include <thread>
+#include <filesystem>
+#include <typeindex>
+#include <QObject>
+#include <QTimer>
+
+#include "src/Application.hpp"
+#include "InsightWorker.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Helpers/Thread.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+
+using namespace Bloom;
+using namespace Exceptions;
+
+void InsightWorker::startup() {
+    Logger::debug("Starting InsightWorker thread");
+    this->eventManager.registerListener(this->eventListener);
+
+    this->eventListener->registerCallbackForEventType<TargetExecutionStopped>(
+        std::bind(&InsightWorker::onTargetStoppedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<TargetExecutionResumed>(
+        std::bind(&InsightWorker::onTargetResumedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<TargetPinStatesRetrieved>(
+        std::bind(&InsightWorker::onTargetPinStatesRetrievedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<TargetIoPortsUpdated>(
+        std::bind(&InsightWorker::onTargetIoPortsUpdatedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventDispatchTimer = new QTimer(this);
+    QTimer::connect(this->eventDispatchTimer, &QTimer::timeout, this, &InsightWorker::dispatchEvents);
+    this->eventDispatchTimer->start(50);
+
+    this->eventManager.triggerEvent(
+        std::make_shared<Events::InsightStateChanged>(ThreadState::READY)
+    );
+}
+
+void InsightWorker::requestPinStates(int variantId) {
+    auto requestEvent = std::make_shared<Events::RetrieveTargetPinStates>();
+    requestEvent->variantId = variantId;
+
+    this->eventManager.triggerEvent(requestEvent);
+}
+
+void InsightWorker::requestPinStateUpdate(
+    int variantId,
+    Bloom::Targets::TargetPinDescriptor pinDescriptor,
+    Bloom::Targets::TargetPinState pinState
+) {
+    auto updateEvent = std::make_shared<Events::SetTargetPinState>();
+    updateEvent->variantId = variantId;
+    updateEvent->pinDescriptor = pinDescriptor;
+    updateEvent->pinState = pinState;
+
+    this->eventManager.triggerEvent(updateEvent);
+}
+
+void InsightWorker::onTargetStoppedEvent(EventPointer<TargetExecutionStopped> event) {
+    auto resumedEvent = this->eventListener->waitForEvent<TargetExecutionResumed>(std::chrono::milliseconds(650));
+
+    if (!resumedEvent.has_value()) {
+        emit this->targetStateUpdated(TargetState::STOPPED);
+        emit this->targetProgramCounterUpdated(event->programCounter);
+    }
+}
+
+void InsightWorker::onTargetResumedEvent(EventPointer<TargetExecutionResumed> event) {
+    emit this->targetStateUpdated(TargetState::RUNNING);
+}
+
+void InsightWorker::onTargetPinStatesRetrievedEvent(EventPointer<TargetPinStatesRetrieved> event) {
+    emit this->targetPinStatesUpdated(event->variantId, event->pinSatesByNumber);
+}
+
+void InsightWorker::onTargetIoPortsUpdatedEvent(EventPointer<TargetIoPortsUpdated> event) {
+    emit this->targetIoPortsUpdated();
+}
+
+
diff --git a/src/Insight/InsightWorker.hpp b/src/Insight/InsightWorker.hpp
new file mode 100644
index 00000000..3ffa5998
--- /dev/null
+++ b/src/Insight/InsightWorker.hpp
@@ -0,0 +1,58 @@
+#pragma once
+
+#include <QtCore>
+#include <QApplication>
+
+#include "UserInterfaces/InsightWindow/InsightWindow.hpp"
+#include "src/Helpers/Thread.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "src/EventManager/EventManager.hpp"
+#include "src/EventManager/EventListener.hpp"
+
+namespace Bloom
+{
+    using namespace Events;
+    using Targets::TargetState;
+
+    /**
+     * The InsightWorker runs on a separate thread to the main GUI thread. Its purpose is to handle any
+     * blocking/time-expensive operations.
+     */
+    class InsightWorker: public QObject
+    {
+    Q_OBJECT
+    private:
+        EventManager& eventManager;
+        EventListenerPointer eventListener = std::make_shared<EventListener>("InsightWorkerEventListener");
+
+        QTimer* eventDispatchTimer = nullptr;
+
+        void onTargetStoppedEvent(EventPointer<TargetExecutionStopped> event);
+        void onTargetResumedEvent(EventPointer<TargetExecutionResumed> event);
+        void onTargetPinStatesRetrievedEvent(EventPointer<TargetPinStatesRetrieved> event);
+        void onTargetIoPortsUpdatedEvent(EventPointer<TargetIoPortsUpdated> event);
+
+    public:
+        InsightWorker(EventManager& eventManager): eventManager(eventManager) {};
+
+        void dispatchEvents() {
+            this->eventListener->dispatchCurrentEvents();
+        }
+
+    public slots:
+        void startup();
+        void requestPinStates(int variantId);
+        void requestPinStateUpdate(
+            int variantId,
+            Bloom::Targets::TargetPinDescriptor pinDescriptor,
+            Bloom::Targets::TargetPinState pinState
+        );
+
+    signals:
+        void targetStateUpdated(Bloom::Targets::TargetState newState);
+        void targetProgramCounterUpdated(quint32 programCounter);
+        void targetPinStatesUpdated(int variantId, Bloom::Targets::TargetPinStateMappingType pinStatesByNumber);
+        void targetIoPortsUpdated();
+
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/AboutWindow.cpp b/src/Insight/UserInterfaces/InsightWindow/AboutWindow.cpp
new file mode 100644
index 00000000..e121806c
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/AboutWindow.cpp
@@ -0,0 +1,35 @@
+#include <QtUiTools>
+#include <src/Exceptions/Exception.hpp>
+
+#include "AboutWindow.hpp"
+#include "TargetWidgets/DIP/DualInlinePackageWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Application.hpp"
+
+using namespace Bloom;
+using namespace InsightTargetWidgets;
+using namespace Exceptions;
+
+AboutWindow::AboutWindow(QWidget* parent): QObject(parent) {
+    auto aboutWindowUiFile = QFile(":/compiled/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui");
+    auto aboutWindowStylesheet = QFile(":/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss");
+
+    if (!aboutWindowUiFile.open(QFile::ReadOnly)) {
+        throw Exception("Failed to open AboutWindow UI file");
+    }
+
+    if (!aboutWindowStylesheet.open(QFile::ReadOnly)) {
+        throw Exception("Failed to open AboutWindow QSS file");
+    }
+
+    auto uiLoader = QUiLoader();
+    this->windowWidget = uiLoader.load(&aboutWindowUiFile, parent);
+    this->windowWidget->setStyleSheet(aboutWindowStylesheet.readAll());
+    this->windowWidget->setFixedSize(400, 300);
+
+    auto versionLabel = this->windowWidget->findChild<QLabel*>("version-label");
+
+    if (versionLabel != nullptr) {
+        versionLabel->setText("Bloom v" + QString::fromStdString(Application::VERSION_STR));
+    }
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/AboutWindow.hpp b/src/Insight/UserInterfaces/InsightWindow/AboutWindow.hpp
new file mode 100644
index 00000000..de62acaf
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/AboutWindow.hpp
@@ -0,0 +1,28 @@
+#pragma once
+
+#include <QtCore>
+#include <QMainWindow>
+#include <QtUiTools/QtUiTools>
+#include <memory>
+
+namespace Bloom
+{
+    class AboutWindow: public QObject
+    {
+    Q_OBJECT
+    private:
+        QWidget* windowWidget = nullptr;
+
+    public:
+        AboutWindow(QWidget* parent);
+
+        void show() {
+            if (this->windowWidget != nullptr) {
+                this->windowWidget->move(
+                    this->windowWidget->parentWidget()->geometry().center() - this->windowWidget->rect().center()
+                );
+                this->windowWidget->show();
+            }
+        }
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg b/src/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg
new file mode 100644
index 00000000..3b1edacf
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg
@@ -0,0 +1,494 @@
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diff --git a/src/Insight/UserInterfaces/InsightWindow/Images/RAM.svg b/src/Insight/UserInterfaces/InsightWindow/Images/RAM.svg
new file mode 100644
index 00000000..f42ef82c
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/Images/RAM.svg
@@ -0,0 +1,127 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<svg
+   xmlns:dc="http://purl.org/dc/elements/1.1/"
+   xmlns:cc="http://creativecommons.org/ns#"
+   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+   xmlns:svg="http://www.w3.org/2000/svg"
+   xmlns="http://www.w3.org/2000/svg"
+   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+   width="25"
+   height="25"
+   viewBox="0 0 6.6145832 6.6145832"
+   version="1.1"
+   id="svg1576"
+   inkscape:version="1.0.1 (1.0.1+r75)"
+   sodipodi:docname="RAM.svg">
+  <defs
+     id="defs1570" />
+  <sodipodi:namedview
+     id="base"
+     pagecolor="#3c3f41"
+     bordercolor="#666666"
+     borderopacity="1.0"
+     inkscape:pageopacity="1"
+     inkscape:pageshadow="2"
+     inkscape:zoom="32"
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+     units="px"
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+     inkscape:window-maximized="1" />
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+         rdf:about="">
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+        <dc:type
+           rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+        <dc:title></dc:title>
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+  <g
+     inkscape:label="Body"
+     inkscape:groupmode="layer"
+     id="layer1"
+     style="display:inline;opacity:1">
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+       style="opacity:1;fill:#cccccc;fill-opacity:0;stroke:none;stroke-width:0.033241;stroke-opacity:0.462745"
+       id="rect1580"
+       width="3.31515"
+       height="3.8507297"
+       x="1.3077724"
+       y="1.3337646" />
+    <rect
+       style="opacity:1;fill:#cccccc;fill-opacity:0;stroke:none;stroke-width:0.033241;stroke-opacity:0.462745"
+       id="rect1582"
+       width="1.9564158"
+       height="2.2731953"
+       x="2.4013965"
+       y="1.82679" />
+    <rect
+       style="opacity:1;fill:#afb1b3;fill-opacity:1;stroke:#3c3f41;stroke-width:0.246372;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;image-rendering:auto"
+       id="rect1584"
+       width="1.9841725"
+       height="3.8165693"
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+       y="-5.2069626"
+       transform="rotate(90)" />
+  </g>
+</svg>
diff --git a/src/Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg b/src/Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg
new file mode 100644
index 00000000..51d5392a
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg
@@ -0,0 +1,63 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<svg
+   xmlns:dc="http://purl.org/dc/elements/1.1/"
+   xmlns:cc="http://creativecommons.org/ns#"
+   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+   xmlns:svg="http://www.w3.org/2000/svg"
+   xmlns="http://www.w3.org/2000/svg"
+   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+   width="30"
+   height="30"
+   viewBox="0 0 30 30"
+   version="1.1"
+   id="svg2664"
+   sodipodi:docname="refresh-disabled.svg"
+   inkscape:version="1.0.1 (1.0.1+r75)"
+   style="opacity:1">
+  <metadata
+     id="metadata2670">
+    <rdf:RDF>
+      <cc:Work
+         rdf:about="">
+        <dc:format>image/svg+xml</dc:format>
+        <dc:type
+           rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+        <dc:title />
+      </cc:Work>
+    </rdf:RDF>
+  </metadata>
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+     id="defs2668" />
+  <sodipodi:namedview
+     pagecolor="#3c3f41"
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+     inkscape:groupmode="layer"
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+       style="opacity:1;fill:#a6a8ab;fill-opacity:1" />
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diff --git a/src/Insight/UserInterfaces/InsightWindow/Images/refresh.svg b/src/Insight/UserInterfaces/InsightWindow/Images/refresh.svg
new file mode 100644
index 00000000..a313c218
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/Images/refresh.svg
@@ -0,0 +1,56 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<svg
+   xmlns:dc="http://purl.org/dc/elements/1.1/"
+   xmlns:cc="http://creativecommons.org/ns#"
+   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+   xmlns:svg="http://www.w3.org/2000/svg"
+   xmlns="http://www.w3.org/2000/svg"
+   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+   width="30"
+   height="30"
+   viewBox="0 0 30 30"
+   version="1.1"
+   id="svg2664"
+   sodipodi:docname="refresh.svg"
+   inkscape:version="1.0.1 (1.0.1+r75)">
+  <metadata
+     id="metadata2670">
+    <rdf:RDF>
+      <cc:Work
+         rdf:about="">
+        <dc:format>image/svg+xml</dc:format>
+        <dc:type
+           rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+        <dc:title />
+      </cc:Work>
+    </rdf:RDF>
+  </metadata>
+  <defs
+     id="defs2668" />
+  <sodipodi:namedview
+     pagecolor="#3c3f41"
+     bordercolor="#666666"
+     borderopacity="1"
+     objecttolerance="10"
+     gridtolerance="10"
+     guidetolerance="10"
+     inkscape:pageopacity="0"
+     inkscape:pageshadow="2"
+     inkscape:window-width="2560"
+     inkscape:window-height="1353"
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+     showgrid="false"
+     inkscape:zoom="29.698485"
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+     inkscape:cy="16.338347"
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+     inkscape:window-y="24"
+     inkscape:window-maximized="1"
+     inkscape:current-layer="svg2664"
+     inkscape:document-rotation="0" />
+  <path
+     d="M 12,15 7.537,19.969 3,15 h 3 c 0,-4.97 4.03,-9 9,-9 2.395,0 4.565,0.942 6.179,2.468 l -2.004,2.231 C 18.094,9.649 16.622,9 15,9 11.691,9 9,11.691 9,15 Z M 22.463,10.031 18,15 h 3 c 0,3.309 -2.691,6 -6,6 -1.623,0 -3.094,-0.65 -4.175,-1.699 L 8.821,21.532 C 10.434,23.058 12.605,24 15,24 c 4.97,0 9,-4.03 9,-9 h 3 z"
+     id="path2662"
+     style="fill:#a6a8ab;fill-opacity:1" />
+</svg>
diff --git a/src/Insight/UserInterfaces/InsightWindow/InsightWindow.cpp b/src/Insight/UserInterfaces/InsightWindow/InsightWindow.cpp
new file mode 100644
index 00000000..53c46fea
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/InsightWindow.cpp
@@ -0,0 +1,264 @@
+#include <QtUiTools>
+#include <QtSvg/QtSvg>
+
+#include "InsightWindow.hpp"
+#include "AboutWindow.hpp"
+#include "TargetWidgets/DIP/DualInlinePackageWidget.hpp"
+#include "TargetWidgets/QFP/QuadFlatPackageWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "src/Targets/TargetDescriptor.hpp"
+
+using namespace Bloom;
+using namespace Exceptions;
+using Targets::TargetDescriptor;
+using Targets::TargetVariant;
+using Targets::TargetPackage;
+
+
+void InsightWindow::init(QApplication& application, TargetDescriptor targetDescriptor) {
+    this->targetDescriptor = targetDescriptor;
+
+    auto mainWindowUiFile = QFile(":/compiled/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui");
+    auto mainWindowStylesheet = QFile(":/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss");
+
+    if (!mainWindowUiFile.open(QFile::ReadOnly)) {
+        throw Exception("Failed to open InsightWindow UI file");
+    }
+
+    if (!mainWindowStylesheet.open(QFile::ReadOnly)) {
+        throw Exception("Failed to open InsightWindow stylesheet file");
+    }
+
+    auto uiLoader = QUiLoader(this);
+    this->mainWindowWidget = uiLoader.load(&mainWindowUiFile);
+    this->mainWindowWidget->setStyleSheet(mainWindowStylesheet.readAll());
+
+    application.setWindowIcon(QIcon(":/compiled/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg"));
+    this->ioContainerWidget = this->mainWindowWidget->findChild<QWidget*>("io-container");
+    this->ioUnavailableWidget = this->mainWindowWidget->findChild<QWidget*>("io-inspection-unavailable");
+    this->mainMenuBar = this->mainWindowWidget->findChild<QMenuBar*>("menu-bar");
+
+    auto fileMenu = this->mainMenuBar->findChild<QMenu*>("file-menu");
+    auto helpMenu = this->mainMenuBar->findChild<QMenu*>("help-menu");
+    auto quitAction = fileMenu->findChild<QAction*>("close-insight");
+    auto openReportIssuesUrlAction = helpMenu->findChild<QAction*>("open-report-issues-url");
+    auto openAboutWindowAction = helpMenu->findChild<QAction*>("open-about-dialogue");
+
+    connect(quitAction, &QAction::triggered, this, &InsightWindow::close);
+    connect(openReportIssuesUrlAction, &QAction::triggered, this, &InsightWindow::openReportIssuesUrl);
+    connect(openAboutWindowAction, &QAction::triggered, this, &InsightWindow::openAboutWindow);
+
+    this->header = this->mainWindowWidget->findChild<QWidget*>("header");
+    this->refreshIoInspectionButton = this->header->findChild<QToolButton*>("refresh-io-inspection-btn");
+
+    connect(this->refreshIoInspectionButton, &QToolButton::clicked, this, [this] {
+        if (this->targetState == TargetState::STOPPED && this->selectedVariant != nullptr) {
+            this->toggleUi(true);
+            emit this->refreshTargetPinStates(this->selectedVariant->id);
+        }
+    });
+
+    this->footer = this->mainWindowWidget->findChild<QWidget*>("footer");
+    auto targetNameLabel = this->footer->findChild<QLabel*>("target-name");
+    auto targetIdLabel = this->footer->findChild<QLabel*>("target-id");
+    this->targetStatusLabel = this->footer->findChild<QLabel*>("target-state");
+    this->programCounterValueLabel = this->footer->findChild<QLabel*>("target-program-counter-value");
+    targetNameLabel->setText(QString::fromStdString(this->targetDescriptor.name));
+    targetIdLabel->setText("0x" + QString::fromStdString(this->targetDescriptor.id).remove("0x").toUpper());
+
+    this->variantMenu = this->footer->findChild<QMenu*>("target-variant-menu");
+
+    for (const auto& targetVariant: this->targetDescriptor.variants) {
+        auto variantAction = new QAction(this->variantMenu);
+        variantAction->setText(
+            QString::fromStdString(targetVariant.name + " (" + targetVariant.packageName + ")")
+        );
+
+        if (this->isVariantSupported(targetVariant)) {
+            connect(
+                variantAction,
+                &QAction::triggered,
+                this,
+                [this, &targetVariant] {
+                    this->selectVariant(&targetVariant);
+                }
+            );
+
+        } else {
+            variantAction->setEnabled(false);
+            variantAction->setText(variantAction->text() + " (unsupported)");
+
+        };
+
+        this->variantMenu->addAction(variantAction);
+    }
+
+    std::copy_if(
+        this->targetDescriptor.variants.begin(),
+        this->targetDescriptor.variants.end(),
+        std::back_inserter(this->supportedVariants),
+        [this](auto variant) {
+            return this->isVariantSupported(variant);
+        }
+    );
+
+    Logger::debug("Number of target variants supported by Insight: " + std::to_string(supportedVariants.size()));
+
+    if (!supportedVariants.empty()) {
+        this->selectVariant(&supportedVariants.front());
+
+    } else {
+        if (this->targetDescriptor.variants.empty()) {
+            this->variantMenu->parentWidget()->hide();
+        }
+
+        this->ioUnavailableWidget->show();
+    }
+}
+
+void InsightWindow::selectVariant(const TargetVariant* variant) {
+    if (!this->isVariantSupported(*variant)) {
+        Logger::error("Attempted to select unsupported target variant.");
+        return;
+    }
+
+    if (this->selectedVariant != nullptr && this->selectedVariant->id == variant->id) {
+        return;
+    }
+
+    if (this->targetPackageWidget != nullptr) {
+        this->targetPackageWidget->hide();
+        this->targetPackageWidget->deleteLater();
+    }
+
+    this->selectedVariant = variant;
+    this->variantMenu->setTitle(QString::fromStdString(variant->name + " (" + variant->packageName + ")"));
+
+    if (variant->package == TargetPackage::DIP) {
+        this->targetPackageWidget = new InsightTargetWidgets::Dip::DualInlinePackageWidget(
+            *variant,
+            this,
+            this->ioContainerWidget
+        );
+
+    } else if (variant->package == TargetPackage::QFP) {
+        this->targetPackageWidget = new InsightTargetWidgets::Qfp::QuadFlatPackageWidget(
+            *variant,
+            this,
+            this->ioContainerWidget
+        );
+    }
+
+    if (this->targetPackageWidget != nullptr) {
+        if (this->targetState == TargetState::STOPPED) {
+            this->toggleUi(true);
+            emit this->refreshTargetPinStates(variant->id);
+        }
+
+        this->targetPackageWidget->show();
+    }
+}
+
+void InsightWindow::show() {
+    this->mainWindowWidget->activateWindow();
+    this->mainWindowWidget->show();
+}
+
+void InsightWindow::close() {
+    if (this->mainWindowWidget != nullptr) {
+        this->mainWindowWidget->close();
+    }
+}
+
+bool InsightWindow::isVariantSupported(const TargetVariant& variant) {
+    if (variant.package == TargetPackage::DIP) {
+        // All DIP variants must have a pin count that is a multiple of two
+        if (variant.pinDescriptorsByNumber.size() % 2 == 0) {
+            return true;
+        }
+    }
+
+    if (variant.package == TargetPackage::QFP) {
+        // All QFP variants must have a pin count that is a multiple of four
+        if (variant.pinDescriptorsByNumber.size() % 4 == 0) {
+            return true;
+        }
+    }
+
+    return false;
+}
+
+void InsightWindow::openReportIssuesUrl() {
+    QDesktopServices::openUrl(QUrl("https://bloom.oscillate.io/report-issue"));
+}
+
+void InsightWindow::openAboutWindow() {
+    if (this->aboutWindowWidget == nullptr) {
+        this->aboutWindowWidget = new AboutWindow(this->mainWindowWidget);
+    }
+
+    this->aboutWindowWidget->show();
+}
+
+void InsightWindow::onTargetStateUpdate(TargetState newState) {
+    this->targetState = newState;
+
+    if (newState == TargetState::RUNNING) {
+        this->targetStatusLabel->setText("Running");
+        this->programCounterValueLabel->setText("-");
+        this->toggleUi(true);
+
+    } else if (newState == TargetState::STOPPED) {
+        this->targetStatusLabel->setText("Stopped");
+
+        if (this->selectedVariant != nullptr) {
+            emit this->refreshTargetPinStates(this->selectedVariant->id);
+        }
+
+    } else {
+        this->targetStatusLabel->setText("Unknown");
+    }
+}
+
+void InsightWindow::onTargetProgramCounterUpdate(quint32 programCounter) {
+    this->programCounterValueLabel->setText(
+        "0x" + QString::number(programCounter, 16).toUpper() + " (" + QString::number(programCounter) + ")"
+    );
+}
+
+void InsightWindow::onTargetIoPortsUpdate() {
+    if (this->targetState == TargetState::STOPPED && this->selectedVariant != nullptr) {
+        emit this->refreshTargetPinStates(this->selectedVariant->id);
+    }
+}
+
+void InsightWindow::onTargetPinStatesUpdate(int variantId, Bloom::Targets::TargetPinStateMappingType pinStatesByNumber) {
+    if (this->targetPackageWidget != nullptr
+        && this->selectedVariant != nullptr
+        && this->selectedVariant->id == variantId
+    ) {
+        this->targetPackageWidget->updatePinStates(pinStatesByNumber);
+        if (this->uiDisabled) {
+            this->toggleUi(false);
+
+        } else {
+            this->targetPackageWidget->repaint();
+        }
+    }
+}
+
+void InsightWindow::togglePinIoState(TargetPinWidget* pinWidget) {
+    auto pinState = pinWidget->getPinState();
+
+    // Currently, we only allow users to toggle the IO state of output pins
+    if (pinState.has_value()
+        && pinState.value().ioDirection == TargetPinState::IoDirection::OUTPUT
+        && this->selectedVariant != nullptr
+    ) {
+        auto& pinDescriptor = pinWidget->getPinDescriptor();
+        pinState.value().ioState = (pinState.value().ioState == TargetPinState::IoState::HIGH) ?
+            TargetPinState::IoState::LOW : TargetPinState::IoState::HIGH;
+        emit this->setTargetPinState(this->selectedVariant->id, pinDescriptor, pinState.value());
+    }
+}
\ No newline at end of file
diff --git a/src/Insight/UserInterfaces/InsightWindow/InsightWindow.hpp b/src/Insight/UserInterfaces/InsightWindow/InsightWindow.hpp
new file mode 100644
index 00000000..7bed5206
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/InsightWindow.hpp
@@ -0,0 +1,97 @@
+#pragma once
+
+#include <QtCore>
+#include <QMainWindow>
+#include <QtUiTools/QtUiTools>
+#include <memory>
+#include <optional>
+#include <src/Logger/Logger.hpp>
+
+#include "AboutWindow.hpp"
+#include "TargetWidgets/TargetPackageWidget.hpp"
+#include "src/Targets/TargetState.hpp"
+#include "src/Targets/TargetDescriptor.hpp"
+#include "src/Targets/TargetVariant.hpp"
+
+namespace Bloom
+{
+    using InsightTargetWidgets::TargetPackageWidget;
+    using InsightTargetWidgets::TargetPinWidget;
+
+    using Targets::TargetDescriptor;
+    using Targets::TargetVariant;
+    using Targets::TargetPackage;
+    using Targets::TargetState;
+    using Targets::TargetPinState;
+
+    class InsightWindow: public QObject
+    {
+    Q_OBJECT
+    private:
+        TargetDescriptor targetDescriptor;
+        TargetState targetState = TargetState::UNKNOWN;
+
+        QWidget* mainWindowWidget = nullptr;
+        AboutWindow* aboutWindowWidget = nullptr;
+        QMenuBar* mainMenuBar = nullptr;
+        QMenu* variantMenu = nullptr;
+
+        QWidget* header = nullptr;
+        QToolButton* refreshIoInspectionButton = nullptr;
+
+        QWidget* ioContainerWidget = nullptr;
+        QWidget* ioUnavailableWidget = nullptr;
+        TargetPackageWidget* targetPackageWidget = nullptr;
+
+        QWidget* footer = nullptr;
+        QLabel* targetStatusLabel = nullptr;
+        QLabel* programCounterValueLabel = nullptr;
+
+        std::vector<TargetVariant> supportedVariants;
+        const TargetVariant* selectedVariant = nullptr;
+        bool uiDisabled = false;
+
+        bool isVariantSupported(const TargetVariant& variant);
+
+        void selectVariant(const TargetVariant* variant);
+
+        void toggleUi(bool disable) {
+            this->uiDisabled = disable;
+
+            if (this->refreshIoInspectionButton != nullptr) {
+                this->refreshIoInspectionButton->setDisabled(disable);
+                this->refreshIoInspectionButton->repaint();
+            }
+
+            if (this->ioContainerWidget != nullptr) {
+                this->ioContainerWidget->setDisabled(disable);
+                this->ioContainerWidget->repaint();
+            }
+        }
+
+    public:
+        InsightWindow() = default;
+
+        void init(QApplication& application, Targets::TargetDescriptor targetDescriptor);
+
+        void show();
+
+    public slots:
+        void onTargetPinStatesUpdate(int variantId, Bloom::Targets::TargetPinStateMappingType pinStatesByNumber);
+        void onTargetStateUpdate(TargetState newState);
+        void onTargetProgramCounterUpdate(quint32 programCounter);
+        void onTargetIoPortsUpdate();
+        void close();
+        void openReportIssuesUrl();
+        void openAboutWindow();
+        void togglePinIoState(TargetPinWidget* pinWidget);
+
+    signals:
+        void refreshTargetPinStates(int variantId);
+        void setTargetPinState(
+            int variantId,
+            Bloom::Targets::TargetPinDescriptor pinDescriptor,
+            Bloom::Targets::TargetPinState pinState
+        );
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss b/src/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss
new file mode 100644
index 00000000..c560033d
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss
@@ -0,0 +1,24 @@
+* {
+    color: #c2c4c6;
+    font-family: 'Ubuntu', sans-serif;
+}
+
+QMainWindow {
+    background-color: #3C3F41;
+}
+
+
+#bloom-icon {
+    min-height: 150px;
+    min-width: 150px;
+    max-height: 150px;
+    max-width: 150px;
+    image: url(":/compiled/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg");
+    image-position: center;
+}
+
+#author-label {
+    font-size: 14px;
+    color: #adadb1;
+
+}
\ No newline at end of file
diff --git a/src/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss b/src/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss
new file mode 100644
index 00000000..e809fb52
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss
@@ -0,0 +1,190 @@
+* {
+    color: #c2c4c6;
+    font-family: 'Ubuntu', sans-serif;
+}
+
+QMainWindow {
+    background-color: #3C3F41;
+}
+
+#header {
+    position: relative;
+    background-color: transparent;
+    max-height: 25px;
+    width: auto;
+    border-top: 1px solid #515151;
+    border-bottom: 1px solid #515151;
+}
+
+QMenuBar::item {
+    position: relative;
+    margin: 0;
+    top: 0;
+    padding-top: 0;
+    padding-bottom: 1px;
+    padding-right: 4px;
+    padding-left: 4px;
+    background-color: transparent;
+    float: left;
+    font-size: 14px;
+    border: none;
+}
+
+QMenuBar::item:pressed {
+    background-color: #2F65CA;
+}
+
+QMenuBar {
+    border: none;
+    margin: 0;
+    padding: 0;
+    min-height: 24px;
+    background-color: transparent;
+    spacing: 0;
+    color: #c2c4c6;
+    font-size: 14px;
+}
+
+QMenu {
+    margin: 0;
+    padding: 0;
+    background-color: #3C3F41;
+    color: #c2c4c6;
+    border: 1px solid #515151;
+    min-width: 200px;
+    font-size: 14px;
+}
+
+QMenu::item {
+    padding: 4px 5px 4px 25px;
+    min-width: 200px;
+}
+
+QMenu::item:selected {
+    background-color: #2F65CA;
+}
+
+QMenu::item:disabled {
+    color: #808484;
+}
+
+QMenu#help-menu::separator {
+    border-top: 1px solid #515151;
+    height: 1px;
+    margin: 1px 0;
+}
+
+#rhSideBar {
+    max-width: 25px;
+    background-color: transparent;
+    height: auto;
+    border-left: 1px solid #515151;
+    text-align: right;
+}
+
+#rhSideBar #inspectRamBtn {
+    position: relative;
+    max-width: 25px;
+    height: 25px;
+    color: #000;
+    border: none;
+    qproperty-icon: url(":/compiled/Insight/UserInterfaces/InsightWindow/Images/RAM.svg");
+    icon-size: 25px;
+}
+
+#rhSideBar #inspectRamBtn:hover {
+    background-color: #343536;
+    border: none;
+
+}
+
+#header-tool-bar {
+    min-height: 25px;
+    min-width: 100%;
+}
+
+#header-tool-bar QToolButton {
+    background-color: transparent;
+    max-width: 25px;
+    max-height: 21px;
+    border: none;
+    padding: 0;
+    margin-top: 3px;
+    margin-bottom: 3px;
+    margin-left: 2px;
+}
+
+#header-tool-bar QToolButton:hover {
+    background-color: #505353;
+    border: none;
+    padding: 0;
+}
+
+QToolTip {
+    background-color: #474949;
+    border: 1px solid #616365;
+    color: #c2c4c6;
+    padding: 1px 2px;
+    font-size: 13px;
+}
+
+
+#footer {
+    position: relative;
+    background-color: transparent;
+    padding: 0 3px 0 30px;
+    max-height: 25px;
+    width: auto;
+    border-top: 1px solid #515151;
+
+}
+
+#footer QLabel,
+#target-variant-menu-bar,
+#footer QMenu::item {
+    font-size: 14px;
+}
+
+#target-variant-menu-bar::item {
+    padding: 0 10px 0 4px;
+    border-left: 1px solid #515151;
+    margin-bottom: 0;
+}
+
+#target-variant-menu-bar::item:selected {
+    background-color: #4d4e50;
+}
+
+#footer QLabel {
+    margin-left: 3px;
+}
+
+#target-program-counter-value {
+    border-color: #515151;
+    border-style: solid;
+    border-width: 0 1px 0 0;
+    padding-right: 5px;
+    margin-right: 3px;
+}
+
+#target-name {
+    max-width: 200px;
+    padding-right: 0;
+    margin-right: 0;
+}
+
+#target-id {
+    margin-right: 6px;
+}
+
+#target-variant-menu-bar {
+    min-height: 25px;
+}
+
+#footer QLayoutItem {
+    max-width: 100px;
+}
+
+#target-variant-menu::item {
+    padding: 4px 10px 4px 10px;
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.cpp
new file mode 100644
index 00000000..4f05ca52
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.cpp
@@ -0,0 +1,70 @@
+#include <QPainter>
+#include <cmath>
+
+#include "BodyWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Dip;
+using namespace Bloom::Exceptions;
+
+void BodyWidget::paintEvent(QPaintEvent* event) {
+    auto painter = QPainter(this);
+    this->drawWidget(painter);
+}
+
+void BodyWidget::drawWidget(QPainter& painter) {
+    auto parentWidget = this->parentWidget();
+
+    if (parentWidget == nullptr) {
+        throw Exception("BodyWidget requires a parent widget");
+    }
+
+    painter.setRenderHints(QPainter::RenderHint::Antialiasing | QPainter::RenderHint::SmoothPixmapTransform, true);
+
+    // Draw target body
+//    auto targetBodyColor = QColor("#AFB1B3");
+    auto targetBodyColor = this->getBodyColor();
+    auto backgroundColor = QColor("#3C3F41");
+
+    if (!this->isEnabled()) {
+        targetBodyColor.setAlpha(this->getDisableAlphaLevel());
+    }
+
+    painter.setPen(Qt::PenStyle::NoPen);
+    painter.setBrush(targetBodyColor);
+    auto parentContainerWidth = parentWidget->width();
+//    this->setFixedSize(parentContainerWidth, parentContainerHeight);
+    auto targetBodyHeight = 150;
+    auto targetBodyWidth = parentContainerWidth;
+
+    this->setFixedSize(targetBodyWidth, targetBodyHeight);
+    auto targetBodyPoint = QPoint(
+        0,
+        0
+    );
+
+    painter.drawRect(
+        targetBodyPoint.x(),
+        targetBodyPoint.y(),
+        targetBodyWidth,
+        targetBodyHeight
+    );
+
+    painter.setPen(Qt::PenStyle::NoPen);
+    painter.setBrush(backgroundColor);
+    painter.drawEllipse(QRectF(
+        targetBodyPoint.x() + 10,
+        targetBodyPoint.y() + (targetBodyHeight - 30),
+        20,
+        20
+    ));
+
+    painter.drawEllipse(QRectF(
+        targetBodyPoint.x() - 15,
+        targetBodyPoint.y() + (targetBodyHeight / 2) - 15,
+        30,
+        30
+    ));
+}
+
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.hpp
new file mode 100644
index 00000000..a064d503
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/BodyWidget.hpp
@@ -0,0 +1,42 @@
+#pragma once
+
+#include <QWidget>
+
+namespace Bloom::InsightTargetWidgets::Dip
+{
+    class BodyWidget: public QWidget
+    {
+    Q_OBJECT
+    Q_PROPERTY(QColor bodyColor READ getBodyColor WRITE setBodyColor DESIGNABLE true)
+    Q_PROPERTY(int disableAlphaLevel READ getDisableAlphaLevel WRITE setDisableAlphaLevel DESIGNABLE true)
+
+    private:
+        QColor bodyColor = QColor("#AFB1B3");
+        int disableAlphaLevel = 100;
+
+    protected:
+        void paintEvent(QPaintEvent* event);
+        void drawWidget(QPainter& painter);
+
+    public:
+        BodyWidget(QWidget* parent): QWidget(parent) {
+            this->setObjectName("target-body");
+        }
+
+        QColor getBodyColor() const {
+            return this->bodyColor;
+        }
+
+        void setBodyColor(QColor color) {
+            this->bodyColor = color;
+        }
+
+        int getDisableAlphaLevel() const {
+            return this->disableAlphaLevel;
+        }
+
+        void setDisableAlphaLevel(int level) {
+            this->disableAlphaLevel = level;
+        }
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.cpp
new file mode 100644
index 00000000..eaed7f0f
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.cpp
@@ -0,0 +1,119 @@
+#include <QPainter>
+#include <QVBoxLayout>
+#include <QHBoxLayout>
+#include <vector>
+#include <QEvent>
+#include <QFile>
+
+#include "../../InsightWindow.hpp"
+#include "DualInlinePackageWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "PinWidget.hpp"
+#include "BodyWidget.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Dip;
+using namespace Bloom::Exceptions;
+
+DualInlinePackageWidget::DualInlinePackageWidget(const TargetVariant& targetVariant, QObject* insightWindowObj, QWidget* parent):
+TargetPackageWidget(targetVariant, insightWindowObj, parent) {
+    auto stylesheetFile = QFile("/home/nav/Projects/Bloom/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss");
+    stylesheetFile.open(QFile::ReadOnly);
+    this->setStyleSheet(stylesheetFile.readAll());
+
+    this->pinWidgets.reserve(targetVariant.pinDescriptorsByNumber.size());
+    this->layout = new QVBoxLayout();
+    this->layout->setSpacing(8);
+    this->layout->setMargin(0);
+
+    this->topPinLayout = new QHBoxLayout();
+    this->topPinLayout->setSpacing(8);
+    this->topPinLayout->setDirection(QBoxLayout::Direction::RightToLeft);
+    this->bottomPinLayout = new QHBoxLayout();
+    this->bottomPinLayout->setSpacing(8);
+
+    auto insightWindow = qobject_cast<InsightWindow*>(insightWindowObj);
+    assert(insightWindow != nullptr);
+
+    for (const auto& [targetPinNumber, targetPinDescriptor]: targetVariant.pinDescriptorsByNumber) {
+        auto pinWidget = new PinWidget(this, targetPinDescriptor, targetVariant);
+        this->pinWidgets.push_back(pinWidget);
+
+        if (targetPinNumber <= (targetVariant.pinDescriptorsByNumber.size() / 2)) {
+            this->bottomPinLayout->addWidget(pinWidget, 0, Qt::AlignmentFlag::AlignHCenter);
+        } else {
+            this->topPinLayout->addWidget(pinWidget, 0, Qt::AlignmentFlag::AlignRight);
+        }
+
+        connect(pinWidget, &TargetPinWidget::toggleIoState, insightWindow, &InsightWindow::togglePinIoState);
+    }
+
+    this->layout->addLayout(this->topPinLayout);
+    this->bodyWidget = new BodyWidget(this);
+    this->layout->addWidget(this->bodyWidget);
+    this->layout->addLayout(this->bottomPinLayout);
+    this->setLayout(this->layout);
+
+    auto insightWindowWidget = this->window();
+    assert(insightWindowWidget != nullptr);
+
+    insightWindowWidget->setMinimumHeight(500);
+    insightWindowWidget->setMinimumWidth(1000);
+}
+
+void DualInlinePackageWidget::paintEvent(QPaintEvent* event) {
+//    Logger::debug("Drawing main package widget");
+
+    auto painter = QPainter(this);
+    this->drawWidget(painter);
+}
+
+void DualInlinePackageWidget::resizeEvent(QResizeEvent* event) {
+//    Logger::debug("RESIZE EVENT");
+}
+
+void DualInlinePackageWidget::drawWidget(QPainter& painter) {
+    auto parentWidget = this->parentWidget();
+
+    if (parentWidget == nullptr) {
+        throw Exception("DualInlinePackageWidget requires a parent widget");
+    }
+
+    auto parentContainerHeight = parentWidget->height();
+    auto parentContainerWidth = parentWidget->width();
+
+    auto width = ((PinWidget::MINIMUM_WIDTH + 8) * static_cast<int>(this->pinWidgets.size() / 2)) + 46;
+
+    this->topPinLayout->setGeometry(QRect(0, 0, width, PinWidget::MAXIMUM_HEIGHT));
+    auto bodyGeometry = QRect(0, this->topPinLayout->geometry().height() + 8, width, this->bodyWidget->height());
+    this->bodyWidget->setGeometry(bodyGeometry);
+    this->bottomPinLayout->setGeometry(
+        QRect(
+            0,
+            bodyGeometry.top() + bodyGeometry.height() + 8,
+            width,
+            PinWidget::MAXIMUM_HEIGHT
+        )
+    );
+    this->topPinLayout->setContentsMargins(
+        static_cast<int>(width * 0.04),
+        0,
+        static_cast<int>(width * 0.04),
+        0
+    );
+    this->bottomPinLayout->setContentsMargins(
+        static_cast<int>(width * 0.04),
+        0,
+        static_cast<int>(width * 0.04),
+        0
+    );
+
+    auto height = (PinWidget::MAXIMUM_HEIGHT * 2) + bodyGeometry.height() + (8 * 3);
+    this->setGeometry(
+        (parentContainerWidth / 2) - (width / 2),
+        (parentContainerHeight / 2) - (height / 2),
+        width,
+        height
+    );
+}
+
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.hpp
new file mode 100644
index 00000000..f2ec1fb0
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/DualInlinePackageWidget.hpp
@@ -0,0 +1,37 @@
+#pragma once
+
+#include <QWidget>
+#include <vector>
+#include <QHBoxLayout>
+#include <QVBoxLayout>
+
+#include "../TargetPackageWidget.hpp"
+#include "PinWidget.hpp"
+#include "BodyWidget.hpp"
+#include "src/Targets/TargetVariant.hpp"
+
+namespace Bloom::InsightTargetWidgets::Dip
+{
+    using Targets::TargetVariant;
+
+    /**
+     * The DualInlinePackageWidget implements a custom Qt widget for the Dual-inline package target variants.
+     */
+    class DualInlinePackageWidget: public TargetPackageWidget
+    {
+    Q_OBJECT
+    private:
+        QVBoxLayout* layout = nullptr;
+        QHBoxLayout* topPinLayout = nullptr;
+        QHBoxLayout* bottomPinLayout = nullptr;
+        BodyWidget* bodyWidget = nullptr;
+
+    protected:
+        void paintEvent(QPaintEvent* event);
+        void resizeEvent(QResizeEvent* event);
+        void drawWidget(QPainter& painter);
+
+    public:
+        DualInlinePackageWidget(const TargetVariant& targetVariant, QObject* insightWindowObj, QWidget* parent);
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.cpp
new file mode 100644
index 00000000..2abc9ad9
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.cpp
@@ -0,0 +1,91 @@
+#include <QPainter>
+#include <QLayout>
+#include <cmath>
+#include <QEvent>
+#include <QMenu>
+#include <QContextMenuEvent>
+
+#include "PinBodyWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Dip;
+using namespace Bloom::Exceptions;
+
+void PinBodyWidget::paintEvent(QPaintEvent* event) {
+    auto painter = QPainter(this);
+    this->drawWidget(painter);
+}
+
+bool PinBodyWidget::event(QEvent* event)
+{
+    if (this->isEnabled() && this->pinState.has_value() && this->pinState->ioDirection == TargetPinState::IoDirection::OUTPUT) {
+        switch (event->type()) {
+            case QEvent::Enter: {
+                this->hoverActive = true;
+                this->repaint();
+                break;
+            }
+            case QEvent::Leave: {
+                this->hoverActive = false;
+                this->repaint();
+                break;
+            }
+            default: {
+                break;
+            }
+        }
+    }
+
+    return QWidget::event(event);
+}
+
+void PinBodyWidget::drawWidget(QPainter& painter) {
+    auto parentWidget = this->parentWidget();
+
+    if (parentWidget == nullptr) {
+        Logger::error("PinBodyWidget requires a parent widget");
+    }
+
+    painter.setRenderHints(QPainter::RenderHint::Antialiasing | QPainter::RenderHint::SmoothPixmapTransform, true);
+    auto pinWidth = PinBodyWidget::WIDTH;
+    auto pinHeight = PinBodyWidget::HEIGHT;
+    this->setFixedSize(pinWidth, pinHeight);
+
+    auto pinColor = this->getBodyColor();
+
+    if (this->pinDescriptor.type == TargetPinType::VCC) {
+        pinColor = QColor("#ff3d43");
+
+    } else if (this->pinDescriptor.type == TargetPinType::GND) {
+        pinColor = QColor("#575757");
+    }
+
+    if (this->pinState.has_value()) {
+        if (this->pinState->ioState.has_value()
+            && this->pinState->ioDirection.has_value()
+            && this->pinState->ioState.value() == TargetPinState::IoState::HIGH
+        ) {
+            pinColor = this->pinState->ioDirection.value() == TargetPinState::IoDirection::OUTPUT ?
+                QColor("#3D7F96") : QColor("#A47E3E");
+        }
+    }
+
+    if (!this->hoverActive) {
+        pinColor.setAlpha(225);
+    }
+
+    if (!this->isEnabled()) {
+        pinColor.setAlpha(this->getDisableAlphaLevel());
+    }
+
+    painter.setPen(Qt::PenStyle::NoPen);
+    painter.setBrush(pinColor);
+
+    painter.drawRect(
+        0,
+        0,
+        pinWidth,
+        pinHeight
+    );
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.hpp
new file mode 100644
index 00000000..6484a2ea
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinBodyWidget.hpp
@@ -0,0 +1,71 @@
+#pragma once
+
+#include <QWidget>
+#include <QMouseEvent>
+
+#include "src/Targets/TargetPinDescriptor.hpp"
+
+namespace Bloom::InsightTargetWidgets::Dip
+{
+    using Targets::TargetPinDescriptor;
+    using Targets::TargetPinType;
+    using Targets::TargetPinState;
+
+    class PinBodyWidget: public QWidget
+    {
+    Q_OBJECT
+        Q_PROPERTY(QColor bodyColor READ getBodyColor WRITE setBodyColor DESIGNABLE true)
+        Q_PROPERTY(int disableAlphaLevel READ getDisableAlphaLevel WRITE setDisableAlphaLevel DESIGNABLE true)
+
+    private:
+        TargetPinDescriptor pinDescriptor;
+        std::optional<TargetPinState> pinState;
+        QColor bodyColor = QColor("#AFB1B3");
+        int disableAlphaLevel = 100;
+
+    protected:
+        bool hoverActive = false;
+        void paintEvent(QPaintEvent* event) override;
+        void drawWidget(QPainter& painter);
+        bool event(QEvent* event) override;
+
+        void mouseReleaseEvent(QMouseEvent* event) override {
+            if (event->button() == Qt::MouseButton::LeftButton) {
+                emit this->clicked();
+            }
+            QWidget::mouseReleaseEvent(event);
+        }
+
+    public:
+        static const int WIDTH = 30;
+        static const int HEIGHT = 40;
+
+        PinBodyWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor): QWidget(parent), pinDescriptor(pinDescriptor) {
+            this->setFixedSize(PinBodyWidget::WIDTH, PinBodyWidget::HEIGHT);
+            this->setObjectName("target-pin-body");
+        }
+
+        void setPinState(const TargetPinState& pinState) {
+            this->pinState = pinState;
+        }
+
+        QColor getBodyColor() const {
+            return this->bodyColor;
+        }
+
+        void setBodyColor(QColor color) {
+            this->bodyColor = color;
+        }
+
+        int getDisableAlphaLevel() const {
+            return this->disableAlphaLevel;
+        }
+
+        void setDisableAlphaLevel(int level) {
+            this->disableAlphaLevel = level;
+        }
+
+    signals:
+        void clicked();
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.cpp
new file mode 100644
index 00000000..3f6a1228
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.cpp
@@ -0,0 +1,58 @@
+#include <QWidget>
+#include <QPainter>
+#include <QLayout>
+#include <cmath>
+#include <QEvent>
+
+#include "PinWidget.hpp"
+#include "PinBodyWidget.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Dip;
+
+PinWidget::PinWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor, const TargetVariant& targetVariant):
+    TargetPinWidget(parent, pinDescriptor, targetVariant) {
+    this->layout = new QVBoxLayout();
+    this->layout->setMargin(0);
+    this->layout->setSpacing(0);
+
+    this->bodyWidget = new PinBodyWidget(this, this->pinDescriptor);
+    bool isTopWidget = pinDescriptor.number > (targetVariant.pinDescriptorsByNumber.size() / 2);
+
+    this->layout->setAlignment(isTopWidget ? (Qt::AlignmentFlag::AlignHCenter | Qt::AlignmentFlag::AlignBottom)
+       : (Qt::AlignmentFlag::AlignHCenter | Qt::AlignmentFlag::AlignTop));
+
+    this->pinDirectionLabel = new QLabel(this);
+    this->pinDirectionLabel->setObjectName("target-pin-direction");
+    this->pinDirectionLabel->setAlignment(Qt::AlignmentFlag::AlignCenter);
+
+    this->pinNameLabel = new QLabel(this);
+    this->pinNameLabel->setObjectName("target-pin-name");
+    this->pinNameLabel->setText(QString::fromStdString(pinDescriptor.name).toUpper());
+    this->pinNameLabel->setAlignment(Qt::AlignmentFlag::AlignCenter);
+
+    this->pinNumberLabel = new QLabel(this);
+    this->pinNumberLabel->setObjectName("target-pin-number");
+    this->pinNumberLabel->setText(QString::number(pinDescriptor.number));
+    this->pinNumberLabel->setAlignment(Qt::AlignmentFlag::AlignCenter);
+
+    if (isTopWidget) {
+        this->layout->setDirection(QBoxLayout::Direction::BottomToTop);
+    }
+
+    this->layout->addWidget(this->bodyWidget);
+    this->layout->insertSpacing(1, 3);
+    this->layout->addWidget(this->pinNumberLabel);
+    this->layout->insertSpacing(3, 2);
+    this->layout->addWidget(this->pinNameLabel);
+    this->layout->insertSpacing(5, 2);
+    this->layout->addWidget(this->pinDirectionLabel);
+    this->pinNameLabel->setFixedSize(PinBodyWidget::WIDTH, PinWidget::LABEL_HEIGHT - 2);
+    this->pinNumberLabel->setFixedSize(PinBodyWidget::WIDTH, PinWidget::LABEL_HEIGHT - 2);
+
+    this->setFixedSize(PinWidget::MINIMUM_WIDTH, PinWidget::MAXIMUM_HEIGHT);
+    this->setLayout(this->layout);
+
+    connect(this->bodyWidget, &PinBodyWidget::clicked, this, &TargetPinWidget::onWidgetBodyClicked);
+}
+
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.hpp
new file mode 100644
index 00000000..5a4f51cd
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/PinWidget.hpp
@@ -0,0 +1,59 @@
+#pragma once
+
+#include <QWidget>
+#include <QLabel>
+
+#include "../TargetPinWidget.hpp"
+#include "PinBodyWidget.hpp"
+#include "src/Targets/TargetVariant.hpp"
+
+namespace Bloom::InsightTargetWidgets::Dip
+{
+    class PinWidget: public TargetPinWidget
+    {
+    Q_OBJECT
+    private:
+        QVBoxLayout* layout = nullptr;
+        QLabel* pinNumberLabel = nullptr;
+        QLabel* pinNameLabel = nullptr;
+        QLabel* pinDirectionLabel = nullptr;
+        PinBodyWidget* bodyWidget = nullptr;
+
+        void setLabelColor(QString hexColor) {
+            auto style = QString("QLabel { color: " + hexColor + "; }");
+            if (this->pinNumberLabel != nullptr) {
+//                this->pinNumberLabel->setStyleSheet(style);
+            }
+
+            if (this->pinNameLabel != nullptr) {
+                this->pinNameLabel->setStyleSheet(style);
+            }
+        }
+
+    public:
+        static const int MINIMUM_WIDTH = 30;
+        static const int MAXIMUM_LABEL_COUNT = 3;
+        static const int LABEL_HEIGHT = 20;
+        static const int MAXIMUM_HEIGHT = PinBodyWidget::HEIGHT + (PinWidget::LABEL_HEIGHT * PinWidget::MAXIMUM_LABEL_COUNT);
+
+        PinWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor, const TargetVariant& targetVariant);
+
+        virtual void updatePinState(const TargetPinState& pinState) override {
+            TargetPinWidget::updatePinState(pinState);
+
+            if (pinState.ioDirection.has_value()) {
+                this->pinDirectionLabel->setText(pinState.ioDirection.value() == TargetPinState::IoDirection::INPUT ?
+                    "IN" : "OUT");
+
+            } else {
+                this->pinDirectionLabel->setText("");
+            }
+
+            if (this->bodyWidget != nullptr) {
+                this->bodyWidget->setPinState(pinState);
+            }
+
+            this->setLabelColor(this->pinStateChanged ? "#6FA0FF" : "#a6a7aa");
+        }
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss
new file mode 100644
index 00000000..153ad9eb
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss
@@ -0,0 +1,30 @@
+#target-pin-number,
+#target-pin-number {
+    font-size: 14px;
+}
+
+#target-pin-name,
+#target-pin-direction {
+    font-size: 11px;
+}
+
+#target-pin-name {
+    color: #a6a7aa;
+}
+
+#target-pin-direction {
+    color: #8a8a8d;
+}
+
+#target-pin-number-top {
+}
+
+#target-body {
+    qproperty-bodyColor: #A6A8AB;
+    qproperty-disableAlphaLevel: 100;
+}
+
+#target-pin-body {
+    qproperty-bodyColor: #A6A8AB;
+    qproperty-disableAlphaLevel: 100;
+}
\ No newline at end of file
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.cpp
new file mode 100644
index 00000000..d030c6bd
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.cpp
@@ -0,0 +1,51 @@
+#include <QPainter>
+#include <cmath>
+
+#include "BodyWidget.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Qfp;
+
+void BodyWidget::paintEvent(QPaintEvent* event) {
+    auto painter = QPainter(this);
+    this->drawWidget(painter);
+}
+
+void BodyWidget::drawWidget(QPainter& painter) {
+    painter.setRenderHints(QPainter::RenderHint::Antialiasing | QPainter::RenderHint::SmoothPixmapTransform, true);
+
+    auto targetBodyColor = this->getBodyColor();
+    auto backgroundColor = QColor("#3C3F41");
+
+    if (!this->isEnabled()) {
+        targetBodyColor.setAlpha(this->getDisableAlphaLevel());
+    }
+
+    painter.setPen(Qt::PenStyle::NoPen);
+    painter.setBrush(targetBodyColor);
+
+    auto containerGeometry = this->geometry();
+    auto targetBodyWidth = containerGeometry.width() - 16;
+    auto targetBodyHeight = containerGeometry.height() - 16;
+
+    auto targetBodyPoint = QPoint(
+        (containerGeometry.width() / 2) - (targetBodyWidth / 2),
+        (containerGeometry.height() / 2) - (targetBodyHeight / 2)
+    );
+
+    painter.drawRect(
+        targetBodyPoint.x(),
+        targetBodyPoint.y(),
+        targetBodyWidth,
+        targetBodyHeight
+    );
+
+    painter.setBrush(backgroundColor);
+    painter.drawEllipse(QRectF(
+        targetBodyPoint.x() + 10,
+        targetBodyPoint.y() + 10,
+        15,
+        15
+    ));
+}
+
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.hpp
new file mode 100644
index 00000000..8e865042
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/BodyWidget.hpp
@@ -0,0 +1,42 @@
+#pragma once
+
+#include <QWidget>
+
+namespace Bloom::InsightTargetWidgets::Qfp
+{
+    class BodyWidget: public QWidget
+    {
+    Q_OBJECT
+    Q_PROPERTY(QColor bodyColor READ getBodyColor WRITE setBodyColor DESIGNABLE true)
+    Q_PROPERTY(int disableAlphaLevel READ getDisableAlphaLevel WRITE setDisableAlphaLevel DESIGNABLE true)
+
+    private:
+        QColor bodyColor = QColor("#AFB1B3");
+        int disableAlphaLevel = 100;
+
+    protected:
+        void paintEvent(QPaintEvent* event);
+        void drawWidget(QPainter& painter);
+
+    public:
+        BodyWidget(QWidget* parent): QWidget(parent) {
+            this->setObjectName("target-body");
+        }
+
+        QColor getBodyColor() const {
+            return this->bodyColor;
+        }
+
+        void setBodyColor(QColor color) {
+            this->bodyColor = color;
+        }
+
+        int getDisableAlphaLevel() const {
+            return this->disableAlphaLevel;
+        }
+
+        void setDisableAlphaLevel(int level) {
+            this->disableAlphaLevel = level;
+        }
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.cpp
new file mode 100644
index 00000000..9dbb5d6e
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.cpp
@@ -0,0 +1,91 @@
+#include <QPainter>
+#include <QLayout>
+#include <cmath>
+#include <QEvent>
+#include <QMenu>
+#include <QContextMenuEvent>
+
+#include "PinBodyWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Qfp;
+using namespace Bloom::Exceptions;
+
+void PinBodyWidget::paintEvent(QPaintEvent* event) {
+    auto painter = QPainter(this);
+    this->drawWidget(painter);
+}
+
+bool PinBodyWidget::event(QEvent* event)
+{
+    if (this->isEnabled() && this->pinState.has_value() && this->pinState->ioDirection == TargetPinState::IoDirection::OUTPUT) {
+        switch (event->type()) {
+            case QEvent::Enter: {
+                this->hoverActive = true;
+                this->repaint();
+                break;
+            }
+            case QEvent::Leave: {
+                this->hoverActive = false;
+                this->repaint();
+                break;
+            }
+            default: {
+                break;
+            }
+        }
+    }
+
+    return QWidget::event(event);
+}
+
+void PinBodyWidget::drawWidget(QPainter& painter) {
+    auto parentWidget = this->parentWidget();
+
+    if (parentWidget == nullptr) {
+        Logger::error("PinBodyWidget requires a parent widget");
+    }
+
+    painter.setRenderHints(QPainter::RenderHint::Antialiasing | QPainter::RenderHint::SmoothPixmapTransform, true);
+    auto pinWidth = this->isVertical ? PinBodyWidget::WIDTH : PinBodyWidget::HEIGHT;
+    auto pinHeight = this->isVertical ? PinBodyWidget::HEIGHT : PinBodyWidget::WIDTH;
+    this->setFixedSize(pinWidth, pinHeight);
+
+    auto pinColor = this->getBodyColor();
+
+    if (this->pinDescriptor.type == TargetPinType::VCC) {
+        pinColor = QColor("#ff3d43");
+
+    } else if (this->pinDescriptor.type == TargetPinType::GND) {
+        pinColor = QColor("#575757");
+    }
+
+    if (this->pinState.has_value()) {
+        if (this->pinState->ioState.has_value()
+            && this->pinState->ioDirection.has_value()
+            && this->pinState->ioState.value() == TargetPinState::IoState::HIGH
+        ) {
+            pinColor = this->pinState->ioDirection.value() == TargetPinState::IoDirection::OUTPUT ?
+                QColor("#3D7F96") : QColor("#A47E3E");
+        }
+    }
+
+    if (!this->hoverActive) {
+        pinColor.setAlpha(225);
+    }
+
+    if (!this->isEnabled()) {
+        pinColor.setAlpha(this->getDisableAlphaLevel());
+    }
+
+    painter.setPen(Qt::PenStyle::NoPen);
+    painter.setBrush(pinColor);
+
+    painter.drawRect(
+        0,
+        0,
+        pinWidth,
+        pinHeight
+    );
+}
\ No newline at end of file
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.hpp
new file mode 100644
index 00000000..ee1e7c92
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinBodyWidget.hpp
@@ -0,0 +1,80 @@
+#pragma once
+
+#include <QWidget>
+#include <QMouseEvent>
+
+#include "src/Targets/TargetPinDescriptor.hpp"
+
+namespace Bloom::InsightTargetWidgets::Qfp
+{
+    using Targets::TargetPinDescriptor;
+    using Targets::TargetPinType;
+    using Targets::TargetPinState;
+
+    class PinBodyWidget: public QWidget
+    {
+    Q_OBJECT
+        Q_PROPERTY(QColor bodyColor READ getBodyColor WRITE setBodyColor DESIGNABLE true)
+        Q_PROPERTY(int disableAlphaLevel READ getDisableAlphaLevel WRITE setDisableAlphaLevel DESIGNABLE true)
+
+    private:
+        TargetPinDescriptor pinDescriptor;
+        std::optional<TargetPinState> pinState;
+        QColor bodyColor = QColor("#AFB1B3");
+        int disableAlphaLevel = 100;
+        bool isVertical = false;
+
+    protected:
+        bool hoverActive = false;
+        void paintEvent(QPaintEvent* event) override;
+        void drawWidget(QPainter& painter);
+        bool event(QEvent* event) override;
+
+        void mouseReleaseEvent(QMouseEvent* event) override {
+            if (event->button() == Qt::MouseButton::LeftButton) {
+                emit this->clicked();
+            }
+
+            QWidget::mouseReleaseEvent(event);
+        }
+
+    public:
+        static const int WIDTH = 30;
+        static const int HEIGHT = 40;
+
+        PinBodyWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor, bool isVertical):
+        QWidget(parent), pinDescriptor(pinDescriptor), isVertical(isVertical) {
+            this->setObjectName("target-pin-body");
+
+            if (isVertical) {
+                this->setFixedSize(PinBodyWidget::WIDTH, PinBodyWidget::HEIGHT);
+
+            } else {
+                this->setFixedSize(PinBodyWidget::HEIGHT, PinBodyWidget::WIDTH);
+            }
+        }
+
+        void setPinState(const TargetPinState& pinState) {
+            this->pinState = pinState;
+        }
+
+        QColor getBodyColor() const {
+            return this->bodyColor;
+        }
+
+        void setBodyColor(QColor color) {
+            this->bodyColor = color;
+        }
+
+        int getDisableAlphaLevel() const {
+            return this->disableAlphaLevel;
+        }
+
+        void setDisableAlphaLevel(int level) {
+            this->disableAlphaLevel = level;
+        }
+
+    signals:
+        void clicked();
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.cpp
new file mode 100644
index 00000000..6279df9d
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.cpp
@@ -0,0 +1,97 @@
+#include <QWidget>
+#include <QPainter>
+#include <QLayout>
+#include <cmath>
+#include <QEvent>
+
+#include "PinWidget.hpp"
+#include "PinBodyWidget.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Qfp;
+
+PinWidget::PinWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor, const TargetVariant& targetVariant):
+    TargetPinWidget(parent, pinDescriptor, targetVariant) {
+    this->layout = new QVBoxLayout();
+    this->layout->setMargin(0);
+    this->layout->setSpacing(0);
+
+    auto pinCountPerLayout = (targetVariant.pinDescriptorsByNumber.size() / 4);
+    this->isLeftLayout = pinDescriptor.number <= pinCountPerLayout;
+    this->isBottomLayout = pinDescriptor.number > pinCountPerLayout && pinDescriptor.number <= (pinCountPerLayout * 2);
+    this->isRightLayout = pinDescriptor.number > (pinCountPerLayout * 2) && pinDescriptor.number <= (pinCountPerLayout * 3);
+    this->isTopLayout = pinDescriptor.number > (pinCountPerLayout * 3) && pinDescriptor.number <= (pinCountPerLayout * 4);
+
+    this->bodyWidget = new PinBodyWidget(this, this->pinDescriptor, (this->isTopLayout || this->isBottomLayout));
+
+    this->pinDirectionLabel = new QLabel(this);
+    this->pinDirectionLabel->setObjectName("target-pin-direction");
+    this->pinDirectionLabel->setAlignment(Qt::AlignmentFlag::AlignCenter);
+
+    this->pinNameLabel = new QLabel(this);
+    this->pinNameLabel->setObjectName("target-pin-name");
+    auto pinName = QString::fromStdString(pinDescriptor.name).toUpper();
+    pinName.truncate(5);
+    this->pinNameLabel->setText(pinName);
+    this->pinNameLabel->setAlignment(Qt::AlignmentFlag::AlignCenter);
+
+    this->pinNumberLabel = new QLabel(this);
+    this->pinNumberLabel->setObjectName("target-pin-number");
+    auto pinNumberText = QString::number(pinDescriptor.number);
+    pinNumberText.truncate(5);
+    this->pinNumberLabel->setText(QString::number(pinDescriptor.number));
+    this->pinNumberLabel->setAlignment(Qt::AlignmentFlag::AlignCenter);
+
+    if (this->isLeftLayout) {
+        this->layout->setAlignment((Qt::AlignmentFlag::AlignVCenter | Qt::AlignmentFlag::AlignRight));
+        this->layout->setDirection(QBoxLayout::Direction::RightToLeft);
+        this->setFixedSize(PinWidget::MAXIMUM_HORIZONTAL_WIDTH, PinWidget::MAXIMUM_HORIZONTAL_HEIGHT);
+
+    } else if (this->isBottomLayout) {
+        this->layout->setAlignment(Qt::AlignmentFlag::AlignHCenter | Qt::AlignmentFlag::AlignTop);
+        this->layout->setDirection(QBoxLayout::Direction::TopToBottom);
+        this->setFixedSize(PinWidget::MAXIMUM_VERTICAL_WIDTH, PinWidget::MAXIMUM_VERTICAL_HEIGHT);
+
+    } else if (this->isRightLayout) {
+        this->layout->setAlignment((Qt::AlignmentFlag::AlignVCenter | Qt::AlignmentFlag::AlignLeft));
+        this->layout->setDirection(QBoxLayout::Direction::LeftToRight);
+        this->setFixedSize(PinWidget::MAXIMUM_HORIZONTAL_WIDTH, PinWidget::MAXIMUM_HORIZONTAL_HEIGHT);
+
+    } else if (this->isTopLayout) {
+        this->layout->setAlignment((Qt::AlignmentFlag::AlignHCenter | Qt::AlignmentFlag::AlignBottom));
+        this->layout->setDirection(QBoxLayout::Direction::BottomToTop);
+        this->setFixedSize(PinWidget::MAXIMUM_VERTICAL_WIDTH, PinWidget::MAXIMUM_VERTICAL_HEIGHT);
+    }
+
+    this->layout->addWidget(this->bodyWidget);
+    this->layout->insertSpacing(1, 3);
+
+    if (this->isLeftLayout || this->isRightLayout) {
+        auto stackedLabelLayout = new QVBoxLayout();
+        stackedLabelLayout->addWidget(this->pinNameLabel);
+        stackedLabelLayout->insertSpacing(3, 2);
+        stackedLabelLayout->addWidget(this->pinNumberLabel);
+        this->layout->insertSpacing(2, 4);
+        this->layout->addLayout(stackedLabelLayout);
+
+        // Adjust the pin name label width for horizontal pins to accommodate for pin names up to 5 characters in length
+        this->pinNameLabel->setFixedSize(PinWidget::MAXIMUM_LABEL_WIDTH + 5, PinWidget::MAXIMUM_HORIZONTAL_HEIGHT / 2);
+        this->pinNumberLabel->setFixedSize(PinWidget::MAXIMUM_LABEL_WIDTH + 5, PinWidget::MAXIMUM_HORIZONTAL_HEIGHT / 2);
+
+    } else if (this-isTopLayout || this->isBottomLayout) {
+        this->layout->addWidget(this->pinNumberLabel);
+        this->layout->insertSpacing(3, 2);
+        this->layout->addWidget(this->pinNameLabel);
+
+        this->pinNameLabel->setFixedSize(PinBodyWidget::WIDTH, PinWidget::LABEL_HEIGHT - 2);
+        this->pinNumberLabel->setFixedSize(PinBodyWidget::WIDTH, PinWidget::LABEL_HEIGHT - 2);
+    }
+
+    this->layout->insertSpacing(5, 2);
+    this->layout->addWidget(this->pinDirectionLabel);
+
+    this->setLayout(this->layout);
+
+    connect(this->bodyWidget, &PinBodyWidget::clicked, this, &TargetPinWidget::onWidgetBodyClicked);
+}
+
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.hpp
new file mode 100644
index 00000000..2e273219
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/PinWidget.hpp
@@ -0,0 +1,69 @@
+#pragma once
+
+#include <QWidget>
+#include <QLabel>
+
+#include "../TargetPinWidget.hpp"
+#include "PinBodyWidget.hpp"
+#include "src/Targets/TargetVariant.hpp"
+
+namespace Bloom::InsightTargetWidgets::Qfp
+{
+    class PinWidget: public TargetPinWidget
+    {
+    Q_OBJECT
+    private:
+        QVBoxLayout* layout = nullptr;
+        QLabel* pinNumberLabel = nullptr;
+        QLabel* pinNameLabel = nullptr;
+        QLabel* pinDirectionLabel = nullptr;
+        PinBodyWidget* bodyWidget = nullptr;
+
+        bool isLeftLayout = false;
+        bool isBottomLayout = false;
+        bool isRightLayout = false;
+        bool isTopLayout = false;
+
+        void setLabelColor(QString hexColor) {
+            auto style = QString("QLabel { color: " + hexColor + "; }");
+            if (this->pinNumberLabel != nullptr) {
+//                this->pinNumberLabel->setStyleSheet(style);
+            }
+
+            if (this->pinNameLabel != nullptr) {
+                this->pinNameLabel->setStyleSheet(style);
+            }
+        }
+
+    public:
+        static const int MAXIMUM_SPACING = 8;
+        static const int MAXIMUM_LABEL_COUNT = 3;
+        static const int LABEL_HEIGHT = 20;
+        static const int MAXIMUM_LABEL_WIDTH = PinBodyWidget::WIDTH;
+        static const int MAXIMUM_LABEL_HEIGHT = 20;
+        static const int MAXIMUM_HORIZONTAL_WIDTH = PinBodyWidget::HEIGHT + (PinWidget::MAXIMUM_LABEL_WIDTH * PinWidget::MAXIMUM_LABEL_COUNT);
+        static const int MAXIMUM_HORIZONTAL_HEIGHT = PinBodyWidget::WIDTH;
+        static const int MAXIMUM_VERTICAL_HEIGHT = PinBodyWidget::HEIGHT + (PinWidget::MAXIMUM_LABEL_HEIGHT * PinWidget::MAXIMUM_LABEL_COUNT);
+        static const int MAXIMUM_VERTICAL_WIDTH = PinBodyWidget::WIDTH;
+
+        PinWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor, const TargetVariant& targetVariant);
+
+        virtual void updatePinState(const TargetPinState& pinState) override {
+            TargetPinWidget::updatePinState(pinState);
+
+            if (pinState.ioDirection.has_value()) {
+                this->pinDirectionLabel->setText(pinState.ioDirection.value() == TargetPinState::IoDirection::INPUT ?
+                    "IN" : "OUT");
+
+            } else {
+                this->pinDirectionLabel->setText("");
+            }
+
+            if (this->bodyWidget != nullptr) {
+                this->bodyWidget->setPinState(pinState);
+            }
+
+            this->setLabelColor(this->pinStateChanged ? "#6FA0FF" : "#a6a7aa");
+        }
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.cpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.cpp
new file mode 100644
index 00000000..c1502307
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.cpp
@@ -0,0 +1,213 @@
+#include <QPainter>
+#include <QVBoxLayout>
+#include <QHBoxLayout>
+#include <vector>
+#include <QEvent>
+#include <QFile>
+
+#include "../../InsightWindow.hpp"
+#include "QuadFlatPackageWidget.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/Exception.hpp"
+#include "PinWidget.hpp"
+#include "BodyWidget.hpp"
+
+using namespace Bloom::InsightTargetWidgets::Qfp;
+using namespace Bloom::Exceptions;
+
+QuadFlatPackageWidget::QuadFlatPackageWidget(const TargetVariant& targetVariant, QObject* insightWindowObj, QWidget* parent):
+TargetPackageWidget(targetVariant, insightWindowObj, parent) {
+    assert((targetVariant.pinDescriptorsByNumber.size() % 4) == 0);
+
+    auto stylesheetFile = QFile("/home/nav/Projects/Bloom/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/Stylesheets/QuadFlatPackage.qss");
+    stylesheetFile.open(QFile::ReadOnly);
+    this->setStyleSheet(stylesheetFile.readAll());
+
+    this->pinWidgets.reserve(targetVariant.pinDescriptorsByNumber.size());
+    this->layout = new QVBoxLayout();
+    this->layout->setSpacing(0);
+    this->layout->setMargin(0);
+
+    this->horizontalLayout = new QHBoxLayout();
+    this->horizontalLayout->setSpacing(0);
+    this->horizontalLayout->setDirection(QBoxLayout::Direction::LeftToRight);
+
+    this->topPinLayout = new QHBoxLayout();
+    this->topPinLayout->setSpacing(QuadFlatPackageWidget::PIN_WIDGET_SPACING);
+    this->topPinLayout->setDirection(QBoxLayout::Direction::RightToLeft);
+
+    this->rightPinLayout = new QVBoxLayout();
+    this->rightPinLayout->setSpacing(QuadFlatPackageWidget::PIN_WIDGET_SPACING);
+    this->rightPinLayout->setDirection(QBoxLayout::Direction::BottomToTop);
+
+    this->bottomPinLayout = new QHBoxLayout();
+    this->bottomPinLayout->setSpacing(QuadFlatPackageWidget::PIN_WIDGET_SPACING);
+    this->bottomPinLayout->setDirection(QBoxLayout::Direction::LeftToRight);
+
+    this->leftPinLayout = new QVBoxLayout();
+    this->leftPinLayout->setSpacing(QuadFlatPackageWidget::PIN_WIDGET_SPACING);
+    this->leftPinLayout->setDirection(QBoxLayout::Direction::TopToBottom);
+
+    auto insightWindow = qobject_cast<InsightWindow*>(insightWindowObj);
+    assert(insightWindow != nullptr);
+
+    auto pinCountPerLayout = (targetVariant.pinDescriptorsByNumber.size() / 4);
+    for (const auto& [targetPinNumber, targetPinDescriptor]: targetVariant.pinDescriptorsByNumber) {
+        auto pinWidget = new PinWidget(this, targetPinDescriptor, targetVariant);
+        this->pinWidgets.push_back(pinWidget);
+
+        if (targetPinNumber <= pinCountPerLayout) {
+            this->leftPinLayout->addWidget(pinWidget, 0, Qt::AlignmentFlag::AlignRight);
+
+        } else if (targetPinNumber > pinCountPerLayout && targetPinNumber <= (pinCountPerLayout * 2)) {
+            this->bottomPinLayout->addWidget(pinWidget, 0, Qt::AlignmentFlag::AlignTop);
+
+        } else if (targetPinNumber > (pinCountPerLayout * 2) && targetPinNumber <= (pinCountPerLayout * 3)) {
+            this->rightPinLayout->addWidget(pinWidget, 0, Qt::AlignmentFlag::AlignLeft);
+
+        } else if (targetPinNumber > (pinCountPerLayout * 3) && targetPinNumber <= (pinCountPerLayout * 4)) {
+            this->topPinLayout->addWidget(pinWidget, 0, Qt::AlignmentFlag::AlignBottom);
+        }
+
+        connect(pinWidget, &TargetPinWidget::toggleIoState, insightWindow, &InsightWindow::togglePinIoState);
+    }
+
+    this->bodyWidget = new BodyWidget(this);
+    this->layout->addLayout(this->topPinLayout);
+    this->horizontalLayout->addLayout(this->leftPinLayout);
+    this->horizontalLayout->addWidget(this->bodyWidget);
+    this->horizontalLayout->addLayout(this->rightPinLayout);
+    this->layout->addLayout(this->horizontalLayout);
+    this->layout->addLayout(this->bottomPinLayout);
+    this->setLayout(this->layout);
+
+    auto insightWindowWidget = this->window();
+    assert(insightWindowWidget != nullptr);
+
+    insightWindowWidget->setMinimumHeight(
+        std::max(
+            500,
+            static_cast<int>((PinWidget::MAXIMUM_HORIZONTAL_HEIGHT * pinCountPerLayout)
+                + (PinWidget::MAXIMUM_VERTICAL_HEIGHT * 2)) + 300
+        )
+    );
+
+    insightWindowWidget->setMinimumWidth(
+        std::max(
+            1000,
+            static_cast<int>((PinWidget::MAXIMUM_VERTICAL_WIDTH * pinCountPerLayout)
+                + (PinWidget::MAXIMUM_VERTICAL_WIDTH * 2)) + 300
+        )
+    );
+}
+
+void QuadFlatPackageWidget::paintEvent(QPaintEvent* event) {
+    auto painter = QPainter(this);
+    this->drawWidget(painter);
+}
+
+void QuadFlatPackageWidget::drawWidget(QPainter& painter) {
+    auto parentWidget = this->parentWidget();
+    assert(parentWidget != nullptr);
+
+    auto parentContainerHeight = parentWidget->height();
+    auto parentContainerWidth = parentWidget->width();
+
+//    auto verticalPinWidgetHeight = this->topPinLayout->findChildren<PinWidget*>().front()->height();
+//    auto verticalPinWidgetWidth = this->topPinLayout->findChildren<PinWidget*>().front()->width();
+//    auto horizontalPinWidgetHeight = this->leftPinLayout->findChildren<PinWidget*>().front()->height();
+//    auto horizontalPinWidgetWidth = this->leftPinLayout->findChildren<PinWidget*>().front()->width();
+
+    auto verticalPinWidgetHeight = PinWidget::MAXIMUM_VERTICAL_HEIGHT;
+    auto verticalPinWidgetWidth = PinWidget::MAXIMUM_VERTICAL_WIDTH;
+    auto horizontalPinWidgetHeight = PinWidget::MAXIMUM_HORIZONTAL_HEIGHT;
+    auto horizontalPinWidgetWidth = PinWidget::MAXIMUM_HORIZONTAL_WIDTH;
+
+    auto pinCountPerLayout = static_cast<int>(this->pinWidgets.size() / 4);
+
+    auto width = ((horizontalPinWidgetHeight + QuadFlatPackageWidget::PIN_WIDGET_SPACING) * pinCountPerLayout
+        + QuadFlatPackageWidget::PIN_WIDGET_LAYOUT_PADDING);
+
+    auto containerWidth = width + (horizontalPinWidgetWidth * 2);
+
+    this->topPinLayout->setGeometry(QRect(
+        horizontalPinWidgetWidth,
+        0,
+        width,
+        verticalPinWidgetHeight
+    ));
+
+    this->horizontalLayout->setGeometry(QRect(
+        0,
+        verticalPinWidgetHeight,
+        containerWidth,
+        width
+    ));
+
+    this->leftPinLayout->setGeometry(QRect(
+        0,
+        verticalPinWidgetHeight,
+        horizontalPinWidgetWidth,
+        width
+    ));
+
+    this->bodyWidget->setGeometry(QRect(
+        horizontalPinWidgetWidth,
+        verticalPinWidgetHeight,
+        width,
+        width
+    ));
+
+    this->rightPinLayout->setGeometry(QRect(
+        width + horizontalPinWidgetWidth,
+        verticalPinWidgetHeight,
+        horizontalPinWidgetWidth,
+        width
+    ));
+
+    this->bottomPinLayout->setGeometry(QRect(
+        horizontalPinWidgetWidth,
+        verticalPinWidgetHeight + width,
+        width,
+        verticalPinWidgetHeight
+    ));
+
+    auto pinWidgetLayoutMargin = QuadFlatPackageWidget::PIN_WIDGET_LAYOUT_PADDING / 2;
+
+    this->topPinLayout->setContentsMargins(
+        pinWidgetLayoutMargin,
+        0,
+        pinWidgetLayoutMargin,
+        0
+    );
+
+    this->bottomPinLayout->setContentsMargins(
+        pinWidgetLayoutMargin,
+        0,
+        pinWidgetLayoutMargin,
+        0
+    );
+
+    this->leftPinLayout->setContentsMargins(
+        0,
+        pinWidgetLayoutMargin,
+        0,
+        pinWidgetLayoutMargin
+    );
+
+    this->rightPinLayout->setContentsMargins(
+        0,
+        pinWidgetLayoutMargin,
+        0,
+        pinWidgetLayoutMargin
+    );
+
+    auto containerHeight = width + (verticalPinWidgetHeight * 2);
+    this->setGeometry(
+        (parentContainerWidth / 2) - (containerWidth / 2),
+        (parentContainerHeight / 2) - (containerHeight / 2),
+        containerWidth,
+        containerHeight
+    );
+}
+
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.hpp
new file mode 100644
index 00000000..c3c841a8
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/QuadFlatPackageWidget.hpp
@@ -0,0 +1,41 @@
+#pragma once
+
+#include <QWidget>
+#include <vector>
+#include <QHBoxLayout>
+#include <QVBoxLayout>
+
+#include "../TargetPackageWidget.hpp"
+#include "PinWidget.hpp"
+#include "BodyWidget.hpp"
+#include "src/Targets/TargetVariant.hpp"
+
+namespace Bloom::InsightTargetWidgets::Qfp
+{
+    using Targets::TargetVariant;
+
+    /**
+     * QuadFlatPackageWidget implements a custom Qt widget for Quad-flat package variants.
+     */
+    class QuadFlatPackageWidget: public TargetPackageWidget
+    {
+    Q_OBJECT
+    private:
+        QVBoxLayout* layout = nullptr;
+        QHBoxLayout* horizontalLayout = nullptr;
+        QHBoxLayout* topPinLayout = nullptr;
+        QVBoxLayout* rightPinLayout = nullptr;
+        QHBoxLayout* bottomPinLayout = nullptr;
+        QVBoxLayout* leftPinLayout = nullptr;
+        BodyWidget* bodyWidget = nullptr;
+
+    protected:
+        void paintEvent(QPaintEvent* event);
+        void drawWidget(QPainter& painter);
+
+    public:
+        static const int PIN_WIDGET_LAYOUT_PADDING = 46;
+        static const int PIN_WIDGET_SPACING = 8;
+        QuadFlatPackageWidget(const TargetVariant& targetVariant, QObject* insightWindowObj, QWidget* parent);
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/Stylesheets/QuadFlatPackage.qss b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/Stylesheets/QuadFlatPackage.qss
new file mode 100644
index 00000000..d1edd0ad
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/QFP/Stylesheets/QuadFlatPackage.qss
@@ -0,0 +1,30 @@
+#target-pin-number,
+#target-pin-number {
+    font-size: 14px;
+}
+
+#target-pin-name,
+#target-pin-direction {
+    font-size: 11px;
+}
+
+#target-pin-name {
+    color: #a6a7aa;
+}
+
+#target-pin-direction {
+    color: #8a8a8d;
+}
+
+#target-pin-number {
+}
+
+#target-body {
+    qproperty-bodyColor: #A6A8AB;
+    qproperty-disableAlphaLevel: 100;
+}
+
+#target-pin-body {
+    qproperty-bodyColor: #A6A8AB;
+    qproperty-disableAlphaLevel: 100;
+}
\ No newline at end of file
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPackageWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPackageWidget.hpp
new file mode 100644
index 00000000..b9a62d6a
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPackageWidget.hpp
@@ -0,0 +1,39 @@
+#pragma once
+
+#include <QWidget>
+#include <vector>
+#include <map>
+
+#include "TargetPinWidget.hpp"
+#include "src/Targets/TargetVariant.hpp"
+#include "src/Targets/TargetDescriptor.hpp"
+
+namespace Bloom::InsightTargetWidgets
+{
+    using Targets::TargetVariant;
+    using Targets::TargetPinState;
+
+    /**
+     * Each custom target package widget should be derived from this class.
+     */
+    class TargetPackageWidget: public QWidget
+    {
+    Q_OBJECT
+    protected:
+        TargetVariant targetVariant;
+        std::vector<TargetPinWidget*> pinWidgets;
+
+    public:
+        TargetPackageWidget(const TargetVariant& targetVariant, QObject* insightWindowObj, QWidget* parent):
+        QWidget(parent), targetVariant(targetVariant) {};
+
+        virtual void updatePinStates(std::map<int, TargetPinState> pinStatesByNumber) {
+            for (auto& pinWidget : this->pinWidgets) {
+                auto pinNumber = pinWidget->getPinNumber();
+                if (pinStatesByNumber.contains(pinNumber)) {
+                    pinWidget->updatePinState(pinStatesByNumber.at(pinNumber));
+                }
+            }
+        }
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPinWidget.hpp b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPinWidget.hpp
new file mode 100644
index 00000000..31e2cc3e
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/TargetWidgets/TargetPinWidget.hpp
@@ -0,0 +1,70 @@
+#pragma once
+
+#include <QWidget>
+
+#include "src/Targets/TargetVariant.hpp"
+#include "src/Targets/TargetPinDescriptor.hpp"
+
+namespace Bloom::InsightTargetWidgets
+{
+    using Targets::TargetVariant;
+    using Targets::TargetPinDescriptor;
+    using Targets::TargetPinType;
+    using Targets::TargetPinState;
+
+    class TargetPinWidget: public QWidget
+    {
+    Q_OBJECT
+    protected:
+        TargetVariant targetVariant;
+        TargetPinDescriptor pinDescriptor;
+        std::optional<TargetPinState> pinState;
+        bool pinStateChanged = false;
+
+    public:
+        TargetPinWidget(QWidget* parent, const TargetPinDescriptor& pinDescriptor, const TargetVariant& targetVariant):
+        QWidget(parent), targetVariant(targetVariant), pinDescriptor(pinDescriptor) {
+            this->setDisabled(false);
+        };
+
+        int getPinNumber() const {
+            return this->pinDescriptor.number;
+        }
+
+        const TargetPinDescriptor& getPinDescriptor() const {
+            return this->pinDescriptor;
+        }
+
+        std::optional<TargetPinState> getPinState() const {
+            return this->pinState;
+        }
+
+        virtual void updatePinState(const TargetPinState& pinState) {
+            this->pinStateChanged = !this->pinState.has_value()
+                || this->pinState->ioState != pinState.ioState
+                || this->pinState->ioDirection != pinState.ioDirection;
+
+            this->pinState = pinState;
+        }
+
+        void setDisabled(bool disabled) {
+            if (pinDescriptor.type != TargetPinType::GND
+                && pinDescriptor.type != TargetPinType::VCC
+                && pinDescriptor.type != TargetPinType::UNKNOWN
+            ) {
+                QWidget::setDisabled(disabled);
+
+            } else {
+                QWidget::setDisabled(true);
+            }
+        }
+
+    public slots:
+        void onWidgetBodyClicked() {
+            emit this->toggleIoState(this);
+        }
+
+    signals:
+        void toggleIoState(TargetPinWidget* pinWidget);
+    };
+}
diff --git a/src/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui b/src/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui
new file mode 100644
index 00000000..81daa73a
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui
@@ -0,0 +1,62 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ui version="4.0">
+    <widget class="QMainWindow" name="about-window">
+        <property name="windowTitle"><string>About</string></property>
+        <property name="maximized"><bool>false</bool></property>
+
+        <widget class="QWidget" name="container">
+            <layout class="QVBoxLayout">
+                <item alignment="Qt::AlignHCenter">
+                    <widget class="QWidget" name="bloom-icon">
+
+                    </widget>
+                </item>
+                <item alignment="Qt::AlignHCenter">
+                    <widget class="QLabel" name="version-label">
+                        <property name="text">
+                            <string>Bloom</string>
+                        </property>
+                    </widget>
+                </item>
+                <item alignment="Qt::AlignHCenter">
+                    <widget class="QLabel" name="link-label">
+                        <property name="text">
+                            <string><![CDATA[
+                            <a style="color: #3F86A0;" href="https://bloom.oscillate.io/">https://bloom.oscillate.io/</a>
+                            ]]></string>
+                        </property>
+                        <property name="openExternalLinks">
+                            <bool>true</bool>
+                        </property>
+                    </widget>
+                </item>
+                <item alignment="Qt::AlignHCenter">
+                    <widget class="QLabel" name="author-label">
+                        <property name="text">
+                            <string>Nav Mohammed</string>
+                        </property>
+                    </widget>
+                </item>
+                <item alignment="Qt::AlignHCenter">
+                    <spacer name="vSpacer">
+                        <property name="orientation">
+                            <enum>Qt::Vertical</enum>
+                        </property>
+                    </spacer>
+                </item>
+                <item alignment="Qt::AlignHCenter">
+                    <widget class="QLabel" name="os-link-label">
+                        <property name="text">
+                            <string><![CDATA[
+                            <span>Powered by <a style="color: #3F86A0;" href="https://bloom.oscillate.io/">open-source software</a></span>
+                            ]]></string>
+                        </property>
+                        <property name="openExternalLinks">
+                            <bool>true</bool>
+                        </property>
+                    </widget>
+                </item>
+            </layout>
+        </widget>
+    </widget>
+</ui>
\ No newline at end of file
diff --git a/src/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui b/src/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui
new file mode 100644
index 00000000..2aefe7fd
--- /dev/null
+++ b/src/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui
@@ -0,0 +1,189 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ui version="4.0">
+    <widget class="QMainWindow" name="main-window">
+        <property name="minimumHeight"><number>500</number></property>
+        <property name="minimumWidth"><number>1000</number></property>
+        <property name="windowTitle"><string>Bloom</string></property>
+        <property name="maximized"><bool>false</bool></property>
+
+        <widget class="QMenuBar" name="menu-bar">
+            <property name="nativeMenuBar">
+                <bool>false</bool>
+            </property>
+
+            <widget class="QMenu" name="file-menu">
+                <property name="title"><string>File</string></property>
+                <addaction name="close-insight"/>
+                <action name="close-insight">
+                    <property name="text">
+                        <string>Exit</string>
+                    </property>
+                </action>
+            </widget>
+
+            <widget class="QMenu" name="help-menu">
+                <property name="title"><string>Help</string></property>
+                <addaction name="open-getting-started-url"/>
+                <addaction name="open-report-issues-url"/>
+                <addaction name="separator"/>
+                <addaction name="open-about-dialogue"/>
+                <action name="open-getting-started-url">
+                    <property name="text">
+                        <string>Getting Started</string>
+                    </property>
+                </action>
+                <action name="open-report-issues-url">
+                    <property name="text">
+                        <string>Report An Issue</string>
+                    </property>
+                </action>
+                <action name="open-about-dialogue">
+                    <property name="text">
+                        <string>About</string>
+                    </property>
+                </action>
+            </widget>
+
+            <addaction name="file-menu"/>
+            <addaction name="help-menu"/>
+        </widget>
+
+        <widget class="QWidget">
+            <layout class="QVBoxLayout">
+                <property name="spacing">
+                    <number>0</number>
+                </property>
+                <property name="margin">
+                    <number>0</number>
+                </property>
+                <item>
+                    <widget class="QWidget" name="header">
+                        <widget class="QToolBar" name="header-tool-bar">
+                            <widget class="QToolButton" name="refresh-io-inspection-btn">
+                                <property name="icon">
+                                    <iconset>
+                                        <disabledoff>:/compiled/Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg</disabledoff>
+                                        <normalon>:/compiled/Insight/UserInterfaces/InsightWindow/Images/refresh.svg</normalon>
+                                    </iconset>
+                                </property>
+                                <property name="toolTip">
+                                    <string>Refresh GPIO Pin States</string>
+                                </property>
+                            </widget>
+                        </widget>
+                    </widget>
+                </item>
+                <item>
+                    <widget class="QWidget" name="container">
+                        <layout class="QHBoxLayout">
+                            <property name="spacing">
+                                <number>0</number>
+                            </property>
+                            <property name="margin">
+                                <number>0</number>
+                            </property>
+                            <item>
+                                <widget class="QWidget" name="io-container">
+                                    <layout class="QHBoxLayout">
+                                        <item alignment="Qt::AlignHCenter">
+                                            <widget class="QLabel" name="io-inspection-unavailable">
+                                                <property name="visible"><bool>false</bool></property>
+                                                <property name="text">
+                                                    <string>IO inspection is not available for this target. Please report this to Bloom developers by clicking Help -> Report An Issue</string>
+                                                </property>
+                                            </widget>
+                                        </item>
+                                    </layout>
+                                </widget>
+                            </item>
+                            <!-- Target RAM inspection will be introduced in a later version -->
+<!--                            <item>-->
+<!--                                <widget class="QWidget"  name="rhSideBar">-->
+<!--                                    <property name="layoutDirection">-->
+<!--                                        <enum>Qt::RightToLeft</enum>-->
+<!--                                    </property>-->
+<!--                                    <layout class="QVBoxLayout">-->
+<!--                                        <property name="spacing">-->
+<!--                                            <number>0</number>-->
+<!--                                        </property>-->
+<!--                                        <property name="margin">-->
+<!--                                            <number>0</number>-->
+<!--                                        </property>-->
+
+<!--                                        <item alignment="Qt::AlignTop">-->
+<!--                                            <widget class="QToolButton" name="inspectRamBtn">-->
+<!--                                                <property name="toolTip">-->
+<!--                                                    <string>Inspect Target RAM</string>-->
+<!--                                                </property>-->
+<!--                                            </widget>-->
+<!--                                        </item>-->
+<!--                                    </layout>-->
+<!--                                </widget>-->
+<!--                            </item>-->
+                        </layout>
+                    </widget>
+                </item>
+                <item>
+                    <widget class="QWidget" name="footer">
+                        <layout class="QHBoxLayout" stretch="100,0,0">
+                            <property name="spacing"><number>0</number></property>
+                            <property name="margin"><number>0</number></property>
+                            <item alignment="Qt::AlignLeft">
+                                <widget class="QLabel" name="target-state">
+                                    <property name="toolTip">
+                                        <string>Target State</string>
+                                    </property>
+                                </widget>
+                            </item>
+
+                            <item alignment="Qt::AlignRight">
+                                <widget class="QLabel" name="target-program-counter-value">
+                                    <property name="text">
+                                        <string>-</string>
+                                    </property>
+                                    <property name="toolTip">
+                                        <string>Program Counter Value</string>
+                                    </property>
+                                </widget>
+                            </item>
+
+                            <item alignment="Qt::AlignRight">
+                                <widget class="QLabel" name="target-name">
+                                    <property name="toolTip">
+                                        <string>Target Name</string>
+                                    </property>
+                                </widget>
+                            </item>
+
+                            <item alignment="Qt::AlignRight">
+                                <widget class="QLabel" name="target-id">
+                                    <property name="toolTip">
+                                        <string>Target ID</string>
+                                    </property>
+                                </widget>
+                            </item>
+
+                            <item alignment="Qt::AlignRight">
+                                <widget class="QMenuBar" name="target-variant-menu-bar">
+                                    <property name="nativeMenuBar">
+                                        <bool>false</bool>
+                                    </property>
+                                    <property name="defaultUp">
+                                        <bool>true</bool>
+                                    </property>
+
+                                    <widget class="QMenu" name="target-variant-menu">
+                                        <property name="title">
+                                            <string>No supported variants available</string>
+                                        </property>
+                                    </widget>
+                                    <addaction name="target-variant-menu"/>
+                                </widget>
+                            </item>
+                        </layout>
+                    </widget>
+                </item>
+            </layout>
+        </widget>
+    </widget>
+</ui>
\ No newline at end of file
diff --git a/src/Logger/Logger.cpp b/src/Logger/Logger.cpp
new file mode 100644
index 00000000..17c3f3f0
--- /dev/null
+++ b/src/Logger/Logger.cpp
@@ -0,0 +1,66 @@
+#include <iostream>
+#include <thread>
+#include "Logger.hpp"
+
+using namespace Bloom;
+
+void Logger::log(const std::string& message, LogLevel logLevel, bool print) {
+    auto lock = std::unique_lock(Logger::logMutex);
+    auto logEntry = LogEntry(message, logLevel);
+    Logger::logEntries.push_back(logEntry);
+    auto index = Logger::logEntries.size();
+
+    if (print) {
+        // Print the timestamp and index in a green font color:
+        std::cout << "\033[32m";
+        std::cout << logEntry.timestamp.toString("yyyy-MM-dd hh:mm:ss ").toStdString() +
+            DateTime::getTimeZoneAbbreviation(logEntry.timestamp).toStdString();
+
+        if (!logEntry.threadName.empty()) {
+            std::cout << " [" << logEntry.threadName << "]";
+        }
+
+        // The index serves as an ID for each log entry. Just here for convenience when referencing specific log entries.
+        std::cout << " [" << index << "]: ";
+        std::cout << "\033[0m";
+
+        switch (logLevel) {
+            case LogLevel::ERROR: {
+                // Errors in red
+                std::cout << "\033[31m";
+                std::cout << "[ERROR] ";
+                break;
+            }
+            case LogLevel::WARNING: {
+                // Warnings in yellow
+                std::cout << "\033[33m";
+                std::cout << "[WARNING] ";
+                break;
+            }
+            case LogLevel::INFO: {
+                std::cout << "[INFO] ";
+                break;
+            }
+            case LogLevel::DEBUG: {
+                std::cout << "[DEBUG] ";
+                break;
+            }
+        }
+
+        std::cout << logEntry.message << "\033[0m" << std::endl;
+    }
+}
+
+void Logger::configure(ApplicationConfig& applicationConfig) {
+    if (applicationConfig.debugLoggingEnabled) {
+        Logger::debugPrintingEnabled = true;
+        Logger::debug("Debug log printing has been enabled.");
+    }
+}
+
+void Logger::silence() {
+    Logger::debugPrintingEnabled = false;
+    Logger::infoPrintingEnabled = false;
+    Logger::errorPrintingEnabled = false;
+    Logger::warningPrintingEnabled = false;
+}
diff --git a/src/Logger/Logger.hpp b/src/Logger/Logger.hpp
new file mode 100644
index 00000000..3c4e8f0c
--- /dev/null
+++ b/src/Logger/Logger.hpp
@@ -0,0 +1,103 @@
+#pragma once
+
+#include <memory>
+#include <map>
+#include <string>
+#include <functional>
+#include <QTimeZone>
+#include <mutex>
+
+#include "src/ApplicationConfig.hpp"
+#include "src/Helpers/DateTime.hpp"
+
+namespace Bloom
+{
+    enum class LogLevel
+    {
+        INFO = 1,
+        WARNING = 2,
+        ERROR = 3,
+        DEBUG = 4,
+    };
+
+    struct LogEntry {
+        std::string threadName;
+        std::string message;
+        LogLevel logLevel;
+        QDateTime timestamp = DateTime::currentDateTime();
+
+        LogEntry(std::string message, LogLevel logLevel): message(std::move(message)), logLevel(logLevel) {
+            // Get thread name
+            std::array<char, 16> threadNameBuf;
+
+            if (pthread_getname_np(pthread_self(), threadNameBuf.data(), threadNameBuf.size()) == 0) {
+                /*
+                 * The name of the main thread is also the name of the process, so we have to name the
+                 * main thread "Bloom" (to prevent confusion).
+                 *
+                 * We override the main thread name when printing logs, to keep the format of the thread name in the
+                 * logs consistent.
+                 */
+                this->threadName = std::string(threadNameBuf.data());
+                this->threadName = this->threadName == "Bloom" ? "MT" : this->threadName;
+            }
+        };
+    };
+
+    /**
+     * Super simple thread safe static Logger class for basic logging.
+     *
+     * TODO: Add the ability to dump the logs to a file.
+     */
+    class Logger
+    {
+    private:
+        /**
+         * We keep a record of every log entry for future processing. Maybe dumping to a file or something
+         * of that nature when a fatal error occurs.
+         */
+        static inline std::vector<LogEntry> logEntries;
+
+        static inline bool errorPrintingEnabled = true;
+        static inline bool warningPrintingEnabled = true;
+        static inline bool infoPrintingEnabled = true;
+        static inline bool debugPrintingEnabled = false;
+
+        static inline std::mutex logMutex;
+
+        static void log(const std::string& message, LogLevel logLevel, bool print);
+
+    public:
+        static void setInfoPrinting(bool enabled) {
+            Logger::infoPrintingEnabled = enabled;
+        }
+
+        static void setWarningPrinting(bool enabled) {
+            Logger::warningPrintingEnabled = enabled;
+        }
+
+        static void setErrorPrinting(bool enabled) {
+            Logger::errorPrintingEnabled = enabled;
+        }
+
+        static void info(const std::string& message) {
+            Logger::log(message, LogLevel::INFO, Logger::infoPrintingEnabled);
+        }
+
+        static void warning(const std::string& message) {
+            Logger::log(message, LogLevel::WARNING, Logger::warningPrintingEnabled);
+        }
+
+        static void error(const std::string& message) {
+            Logger::log(message, LogLevel::ERROR, Logger::errorPrintingEnabled);
+        }
+
+        static void debug(const std::string& message) {
+            Logger::log(message, LogLevel::DEBUG, Logger::debugPrintingEnabled);
+        }
+
+        static void configure(ApplicationConfig& applicationConfig);
+
+        static void silence();
+    };
+}
diff --git a/src/SignalHandler/SignalHandler.cpp b/src/SignalHandler/SignalHandler.cpp
new file mode 100644
index 00000000..2745331f
--- /dev/null
+++ b/src/SignalHandler/SignalHandler.cpp
@@ -0,0 +1,81 @@
+#include <iostream>
+#include <csignal>
+#include <QtCore>
+#include <experimental/filesystem>
+#include <thread>
+#include <src/Exceptions/Exception.hpp>
+#include <src/EventManager/Events/ShutdownTargetController.hpp>
+
+#include "src/Logger/Logger.hpp"
+#include "SignalHandler.hpp"
+
+using namespace Bloom;
+
+void SignalHandler::run() {
+    try {
+        this->startup();
+        auto signalSet = this->getRegisteredSignalSet();
+        int signalNumber = 0;
+
+        Logger::debug("SignalHandler ready");
+        while(Thread::getState() == ThreadState::READY) {
+            if (sigwait(&signalSet, &signalNumber) == 0) {
+                Logger::debug("SIGNAL " + std::to_string(signalNumber) + " received");
+                if (this->handlersMappedBySignalNum.find(signalNumber) != this->handlersMappedBySignalNum.end()) {
+                    // We have a registered handler for this signal.
+                    this->handlersMappedBySignalNum.find(signalNumber)->second();
+                }
+            }
+        }
+
+    } catch (std::exception& exception) {
+        Logger::error("SignalHandler fatal error: " + std::string(exception.what()));
+    }
+
+    Logger::debug("SignalHandler shutting down");
+    Thread::setState(ThreadState::STOPPED);
+}
+
+void SignalHandler::startup() {
+    this->setName("SH");
+    Logger::debug("Starting SignalHandler");
+    // Block all signal interrupts
+    auto signalSet = this->getRegisteredSignalSet();
+    sigprocmask(SIG_SETMASK, &signalSet, NULL);
+
+    // Register handlers here
+    this->handlersMappedBySignalNum.insert(std::pair(
+        SIGINT,
+        std::bind(&SignalHandler::triggerApplicationShutdown, this)
+    ));
+
+    this->handlersMappedBySignalNum.insert(std::pair(
+        SIGTERM,
+        std::bind(&SignalHandler::triggerApplicationShutdown, this)
+    ));
+
+    Thread::setState(ThreadState::READY);
+}
+
+sigset_t SignalHandler::getRegisteredSignalSet() const {
+    sigset_t set = {};
+    if (sigfillset(&set) == -1) {
+        throw Exceptions::Exception("sigfillset() failed - error number: " + std::to_string(errno));
+    }
+
+    return set;
+}
+
+void SignalHandler::triggerApplicationShutdown() {
+    Logger::warning("Shutdown signal received");
+    this->shutdownSignalsReceived++;
+
+    if (this->shutdownSignalsReceived > 1) {
+        // User has likely run out of patience
+        Logger::warning("Aborting immediately");
+        exit(EXIT_FAILURE);
+    }
+
+    Logger::info("Attempting clean shutdown");
+    this->eventManager.triggerEvent(std::make_shared<Events::ShutdownApplication>());
+}
diff --git a/src/SignalHandler/SignalHandler.hpp b/src/SignalHandler/SignalHandler.hpp
new file mode 100644
index 00000000..bd92e6cb
--- /dev/null
+++ b/src/SignalHandler/SignalHandler.hpp
@@ -0,0 +1,63 @@
+#pragma once
+
+#include <src/Helpers/Thread.hpp>
+#include <src/EventManager/EventManager.hpp>
+#include "src/Helpers/SyncSafe.hpp"
+#include <csignal>
+
+namespace Bloom
+{
+    class SignalHandler: public Thread
+    {
+    private:
+        EventManager& eventManager;
+
+        /**
+         * Mapping of signal numbers to functions.
+         */
+        std::map<int, std::function<void()>> handlersMappedBySignalNum;
+
+        /**
+         * Fetches all signals currently of interest to the application.
+         *
+         * Currently this just returns a set of all signals (using sigfillset())
+         *
+         * @return
+         */
+        sigset_t getRegisteredSignalSet() const;
+
+        /**
+         * We keep record of the number of shutdown signals received. See definition of triggerApplicationShutdown()
+         * for more on this.
+         */
+        int shutdownSignalsReceived = 0;
+
+    public:
+        SignalHandler(EventManager& eventManager) : eventManager(eventManager) {};
+
+        /**
+         * Entry point for SignalHandler thread.
+         */
+        void run();
+
+        /**
+         * Initiates the SignalHandler thread.
+         */
+        void startup();
+
+        /**
+         * Triggers the shutdown of the SignalHandler thread.
+         */
+        void triggerShutdown() {
+            this->setState(ThreadState::SHUTDOWN_INITIATED);
+        };
+
+        /**
+         * Handler for SIGINT, SIGTERM, etc signals.
+         *
+         * Will trigger a ShutdownApplication event to kick-off a clean shutdown or it will terminate the
+         * program immediately if numerous SIGINT signals have been received.
+         */
+        void triggerApplicationShutdown();
+    };
+}
\ No newline at end of file
diff --git a/src/TargetController/TargetController.cpp b/src/TargetController/TargetController.cpp
new file mode 100644
index 00000000..0c75acab
--- /dev/null
+++ b/src/TargetController/TargetController.cpp
@@ -0,0 +1,531 @@
+#include <thread>
+#include <filesystem>
+#include <typeindex>
+
+#include "TargetController.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/Exceptions/TargetControllerStartupFailure.hpp"
+#include "src/Application.hpp"
+
+using namespace Bloom;
+using namespace Exceptions;
+
+void TargetController::run() {
+    try {
+        this->startup();
+
+        this->setStateAndEmitEvent(ThreadState::READY);
+        Logger::debug("TargetController ready and waiting for events.");
+
+        while (this->getState() == ThreadState::READY) {
+            this->fireTargetEvents();
+            this->eventListener->waitAndDispatch(60);
+        }
+
+    } catch (const TargetControllerStartupFailure& exception) {
+        Logger::error("TargetController failed to startup. See below for errors:");
+        Logger::error(exception.getMessage());
+
+    } catch (const Exception& exception) {
+        Logger::error("The TargetController encountered a fatal error. See below for errors:");
+        Logger::error(exception.getMessage());
+
+    } catch (const std::exception& exception) {
+        Logger::error("The TargetController encountered a fatal error. See below for errors:");
+        Logger::error(std::string(exception.what()));
+    }
+
+    this->shutdown();
+}
+
+void TargetController::startup() {
+    this->setName("TC");
+    Logger::info("Starting TargetController");
+    this->setState(ThreadState::STARTING);
+    this->blockAllSignalsOnCurrentThread();
+    this->eventManager.registerListener(this->eventListener);
+
+    // Install Bloom's udev rules if not already installed
+    this->checkUdevRules();
+
+    auto debugToolName = this->environmentConfig.debugToolName;
+    auto targetName = this->environmentConfig.targetConfig.name;
+    auto supportedDebugTools = TargetController::getSupportedDebugTools();
+    auto supportedTargets = TargetController::getSupportedTargets();
+
+    if (supportedDebugTools.find(debugToolName) == supportedDebugTools.end()) {
+        throw Exceptions::InvalidConfig(
+            "Debug tool name (\"" + debugToolName + "\") not recognised. Please check your configuration!"
+        );
+    }
+
+    if (supportedTargets.find(targetName) == supportedTargets.end()) {
+        throw Exceptions::InvalidConfig(
+            "Target name (\"" + targetName + "\") not recognised. Please check your configuration!"
+        );
+    }
+
+    // Initiate debug tool and target
+    this->setDebugTool(std::move(supportedDebugTools.find(debugToolName)->second()));
+
+    Logger::info("Connecting to debug tool");
+    this->debugTool->init();
+
+    Logger::info("Debug tool connected");
+    Logger::info("Debug tool name: " + debugTool->getName());
+    Logger::info("Debug tool serial: " + debugTool->getSerialNumber());
+
+    this->setTarget(supportedTargets.find(targetName)->second());
+
+    if (!this->target->isDebugToolSupported(debugTool.get())) {
+        throw Exceptions::InvalidConfig(
+            "Debug tool (\"" + debugTool->getName() + "\") not supported " +
+                "by target (\"" + this->target->getName() + "\")."
+        );
+    }
+
+    this->target->setDebugTool(debugTool.get());
+    this->target->preActivationConfigure(this->environmentConfig.targetConfig);
+
+    Logger::info("Activating target");
+    this->target->activate();
+    Logger::info("Target activated");
+    this->target->postActivationConfigure();
+
+    while (this->target->supportsPromotion()) {
+        auto promotedTarget = this->target->promote();
+
+        if (promotedTarget == nullptr
+            || std::type_index(typeid(*promotedTarget)) == std::type_index(typeid(*this->target))
+        ) {
+            break;
+        }
+
+        this->target.reset(promotedTarget.release());
+        this->target->postPromotionConfigure();
+    }
+
+    Logger::info("Target ID: " + target->getHumanReadableId());
+    Logger::info("Target name: " + target->getName());
+
+    if (this->target->getState() == TargetState::STOPPED) {
+        this->target->run();
+    }
+
+    // Register event handlers
+    this->eventListener->registerCallbackForEventType<Events::ShutdownTargetController>(
+        std::bind(&TargetController::onShutdownTargetControllerEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::DebugSessionStarted>(
+        std::bind(&TargetController::onDebugSessionStartedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::DebugSessionFinished>(
+        std::bind(&TargetController::onDebugSessionFinishedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::ExtractTargetDescriptor>(
+        std::bind(&TargetController::onExtractTargetDescriptor, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::StopTargetExecution>(
+        std::bind(&TargetController::onStopTargetExecutionEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::StepTargetExecution>(
+        std::bind(&TargetController::onStepTargetExecutionEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::ResumeTargetExecution>(
+        std::bind(&TargetController::onResumeTargetExecutionEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::RetrieveRegistersFromTarget>(
+        std::bind(&TargetController::onReadRegistersEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::WriteRegistersToTarget>(
+        std::bind(&TargetController::onWriteRegistersEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::RetrieveMemoryFromTarget>(
+        std::bind(&TargetController::onReadMemoryEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::WriteMemoryToTarget>(
+        std::bind(&TargetController::onWriteMemoryEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::SetBreakpointOnTarget>(
+        std::bind(&TargetController::onSetBreakpointEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::RemoveBreakpointOnTarget>(
+        std::bind(&TargetController::onRemoveBreakpointEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::SetProgramCounterOnTarget>(
+        std::bind(&TargetController::onSetProgramCounterEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::InsightStateChanged>(
+        std::bind(&TargetController::onInsightStateChangedEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::RetrieveTargetPinStates>(
+        std::bind(&TargetController::onRetrieveTargetPinStatesEvent, this, std::placeholders::_1)
+    );
+
+    this->eventListener->registerCallbackForEventType<Events::SetTargetPinState>(
+        std::bind(&TargetController::onSetPinStateEvent, this, std::placeholders::_1)
+    );
+}
+
+void TargetController::checkUdevRules() {
+    auto bloomRulesPath = std::string("/etc/udev/rules.d/99-bloom.rules");
+    auto latestBloomRulesPath = Application::getResourcesDirPath() + "/UDevRules/99-bloom.rules";
+
+    if (!std::filesystem::exists(bloomRulesPath)) {
+        Logger::warning("Bloom udev rules missing - attempting installation");
+
+        // We can only install them if we're running as root
+        if (!Application::isRunningAsRoot()) {
+            Logger::error("Bloom udev rules missing - cannot install udev rules without root privileges.\n"
+                "Running Bloom once with root privileges will allow it to automatically install the udev rules."
+                " Alternatively, instructions on manually installing the udev rules can be found "
+                "here: https://bloom.oscillate.io/some/link.\nBloom may fail to connect to some debug tools "
+                "until this is resolved.");
+            return;
+        }
+
+        if (!std::filesystem::exists(latestBloomRulesPath)) {
+            // This shouldn't happen, but it can if someone has been messing with the installation files
+            Logger::error("Unable to install Bloom udev rules - \"" + latestBloomRulesPath + "\" does not exist.");
+            return;
+        }
+
+        std::filesystem::copy(latestBloomRulesPath, bloomRulesPath);
+        Logger::warning("Bloom udev rules installed - a reconnect of the debug tool may be required "
+            "before the new udev rules come into effect.");
+    }
+}
+
+void TargetController::shutdown() {
+    if (this->getState() == ThreadState::STOPPED) {
+        return;
+    }
+
+    try {
+        Logger::info("Shutting down TargetController");
+        //this->targetControllerEventListener->clearAllCallbacks();
+        this->eventManager.deregisterListener(this->eventListener->getId());
+        auto target = this->getTarget();
+        auto debugTool = this->getDebugTool();
+
+        if (debugTool != nullptr && debugTool->isInitialised()) {
+            if (target != nullptr) {
+                /*
+                 * We call deactivate() without checking if the target is activated. This will address any cases
+                 * where a target is only partially activated (where the call to activate() failed).
+                 */
+                Logger::info("Deactivating target");
+                target->deactivate();
+            }
+
+            Logger::info("Closing debug tool");
+            debugTool->close();
+        }
+    } catch (const std::exception& exception) {
+        Logger::error("Failed to properly shutdown TargetController. Error: " + std::string(exception.what()));
+    }
+
+    this->setStateAndEmitEvent(ThreadState::STOPPED);
+}
+
+void TargetController::fireTargetEvents() {
+    auto newTargetState = this->target->getState();
+
+    if (newTargetState != this->lastTargetState) {
+        this->lastTargetState = newTargetState;
+
+        if (newTargetState == TargetState::STOPPED) {
+            Logger::debug("Target state changed - STOPPED");
+            this->eventManager.triggerEvent(std::make_shared<TargetExecutionStopped>(
+                this->target->getProgramCounter(),
+                TargetBreakCause::UNKNOWN
+            ));
+        }
+
+        if (newTargetState == TargetState::RUNNING) {
+            Logger::debug("Target state changed - RUNNING");
+            this->eventManager.triggerEvent(std::make_shared<TargetExecutionResumed>());
+        }
+    }
+}
+
+void TargetController::emitErrorEvent(int correlationId) {
+    auto errorEvent = std::make_shared<Events::TargetControllerErrorOccurred>();
+    errorEvent->correlationId = correlationId;
+    this->eventManager.triggerEvent(errorEvent);
+}
+
+void TargetController::onShutdownTargetControllerEvent(EventPointer<Events::ShutdownTargetController> event) {
+    this->shutdown();
+}
+
+void TargetController::onExtractTargetDescriptor(EventPointer<Events::ExtractTargetDescriptor> event) {
+    if (!this->cachedTargetDescriptor.has_value()) {
+        this->cachedTargetDescriptor = this->target->getDescriptor();
+    }
+
+    auto targetDescriptorExtracted = std::make_shared<TargetDescriptorExtracted>();
+    targetDescriptorExtracted->targetDescriptor = this->cachedTargetDescriptor.value();
+
+    targetDescriptorExtracted->correlationId = event->id;
+    this->eventManager.triggerEvent(targetDescriptorExtracted);
+}
+
+void TargetController::onStopTargetExecutionEvent(EventPointer<Events::StopTargetExecution> event) {
+    if (this->target->getState() != TargetState::STOPPED) {
+        this->target->stop();
+        this->lastTargetState = TargetState::STOPPED;
+    }
+
+    auto executionStoppedEvent = std::make_shared<TargetExecutionStopped>(
+        this->target->getProgramCounter(),
+        TargetBreakCause::UNKNOWN
+    );
+
+    executionStoppedEvent->correlationId = event->id;
+    this->eventManager.triggerEvent(executionStoppedEvent);
+}
+
+void TargetController::onStepTargetExecutionEvent(EventPointer<Events::StepTargetExecution> event) {
+    try {
+        if (this->target->getState() != TargetState::STOPPED) {
+            // We can't step the target if it's already running.
+            throw Exception("Target is already running");
+        }
+
+        if (event->fromProgramCounter.has_value()) {
+            this->target->setProgramCounter(event->fromProgramCounter.value());
+        }
+
+        this->target->step();
+        this->lastTargetState = TargetState::RUNNING;
+
+        auto executionResumedEvent = std::make_shared<TargetExecutionResumed>();
+        executionResumedEvent->correlationId = event->id;
+        this->eventManager.triggerEvent(executionResumedEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to step execution on target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onResumeTargetExecutionEvent(EventPointer<Events::ResumeTargetExecution> event) {
+    try {
+        if (this->target->getState() != TargetState::RUNNING) {
+            if (event->fromProgramCounter.has_value()) {
+                this->target->setProgramCounter(event->fromProgramCounter.value());
+            }
+
+            this->target->run();
+            this->lastTargetState = TargetState::RUNNING;
+        }
+
+        auto executionResumedEvent = std::make_shared<Events::TargetExecutionResumed>();
+        executionResumedEvent->correlationId = event->id;
+        this->eventManager.triggerEvent(executionResumedEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to stop execution on target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onReadRegistersEvent(EventPointer<Events::RetrieveRegistersFromTarget> event) {
+    try {
+        auto registers = this->target->readRegisters(event->descriptors);
+
+        if (registers.size() > 0) {
+            auto registersRetrievedEvent = std::make_shared<Events::RegistersRetrievedFromTarget>();
+            registersRetrievedEvent->correlationId = event->id;
+            registersRetrievedEvent->registers = registers;
+            this->eventManager.triggerEvent(registersRetrievedEvent);
+        }
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to read general registers from target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onWriteRegistersEvent(EventPointer<Events::WriteRegistersToTarget> event) {
+    try {
+        this->target->writeRegisters(event->registers);
+
+        auto registersWrittenEvent = std::make_shared<Events::RegistersWrittenToTarget>();
+        registersWrittenEvent->correlationId = event->id;
+        this->eventManager.triggerEvent(registersWrittenEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to write registers to target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onReadMemoryEvent(EventPointer<Events::RetrieveMemoryFromTarget> event) {
+    try {
+        auto memoryReadEvent = std::make_shared<Events::MemoryRetrievedFromTarget>();
+        memoryReadEvent->correlationId = event->id;
+        memoryReadEvent->data = this->target->readMemory(event->memoryType, event->startAddress, event->bytes);
+
+        this->eventManager.triggerEvent(memoryReadEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to read memory from target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onWriteMemoryEvent(EventPointer<Events::WriteMemoryToTarget> event) {
+    try {
+        this->target->writeMemory(event->memoryType, event->startAddress, event->buffer);
+
+        auto memoryWrittenEvent = std::make_shared<Events::MemoryWrittenToTarget>();
+        memoryWrittenEvent->correlationId = event->id;
+        this->eventManager.triggerEvent(memoryWrittenEvent);
+
+        if (this->target->willMemoryWriteAffectIoPorts(
+            event->memoryType,
+            event->startAddress,
+            static_cast<std::uint32_t>(event->buffer.size())
+        )) {
+            // This memory write has affected the target's IO port values
+            this->eventManager.triggerEvent(std::make_shared<Events::TargetIoPortsUpdated>());
+        }
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to write memory to target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onSetBreakpointEvent(EventPointer<Events::SetBreakpointOnTarget> event) {
+    try {
+        this->target->setBreakpoint(event->breakpoint.address);
+        auto breakpointSetEvent = std::make_shared<Events::BreakpointSetOnTarget>();
+        breakpointSetEvent->correlationId = event->id;
+
+        this->eventManager.triggerEvent(breakpointSetEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to set breakpoint on target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onRemoveBreakpointEvent(EventPointer<Events::RemoveBreakpointOnTarget> event) {
+    try {
+        this->target->removeBreakpoint(event->breakpoint.address);
+        auto breakpointRemovedEvent = std::make_shared<Events::BreakpointRemovedOnTarget>();
+        breakpointRemovedEvent->correlationId = event->id;
+
+        this->eventManager.triggerEvent(breakpointRemovedEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to remove breakpoint on target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onDebugSessionStartedEvent(EventPointer<Events::DebugSessionStarted>) {
+    this->target->reset();
+
+    if (this->target->getState() != TargetState::STOPPED) {
+        this->target->stop();
+    }
+}
+
+void TargetController::onDebugSessionFinishedEvent(EventPointer<DebugSessionFinished>) {
+    if (this->target->getState() != TargetState::RUNNING) {
+        this->target->run();
+    }
+}
+
+void TargetController::onSetProgramCounterEvent(EventPointer<Events::SetProgramCounterOnTarget> event) {
+    try {
+        if (this->target->getState() != TargetState::STOPPED) {
+            throw Exception("Invalid target state - target must be stopped before the program counter can be updated");
+        }
+
+        this->target->setProgramCounter(event->address);
+        auto programCounterSetEvent = std::make_shared<Events::ProgramCounterSetOnTarget>();
+        programCounterSetEvent->correlationId = event->id;
+
+        this->eventManager.triggerEvent(programCounterSetEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to set program counter on target - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+// TODO: remove this
+void TargetController::onInsightStateChangedEvent(EventPointer<Events::InsightStateChanged> event) {
+    if (event->getState() == ThreadState::READY) {
+        /*
+         * Insight has just started up.
+         *
+         * Refresh the target state and kick off a target stop/resume execution event. Setting the lastTargetState
+         * to UNKNOWN will be enough to do this. See TargetController::fireTargetEvents().
+         */
+        this->lastTargetState = TargetState::UNKNOWN;
+    }
+}
+
+void TargetController::onRetrieveTargetPinStatesEvent(EventPointer<Events::RetrieveTargetPinStates> event) {
+    try {
+        if (this->target->getState() != TargetState::STOPPED) {
+            throw Exception("Invalid target state - target must be stopped before pin states can be retrieved");
+        }
+
+        auto pinStatesRetrieved = std::make_shared<Events::TargetPinStatesRetrieved>();
+        pinStatesRetrieved->correlationId = event->id;
+        pinStatesRetrieved->variantId = event->variantId;
+        pinStatesRetrieved->pinSatesByNumber = this->target->getPinStates(event->variantId);
+
+        this->eventManager.triggerEvent(pinStatesRetrieved);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to retrieve target pin states - " + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
+
+void TargetController::onSetPinStateEvent(EventPointer<Events::SetTargetPinState> event) {
+    try {
+        if (this->target->getState() != TargetState::STOPPED) {
+            throw Exception("Invalid target state - target must be stopped before pin state can be set");
+        }
+
+        this->target->setPinState(event->variantId, event->pinDescriptor, event->pinState);
+
+        auto pinStatesUpdateEvent = std::make_shared<Events::TargetPinStatesRetrieved>();
+        pinStatesUpdateEvent->correlationId = event->id;
+        pinStatesUpdateEvent->variantId = event->variantId;
+        pinStatesUpdateEvent->pinSatesByNumber = {
+            {event->pinDescriptor.number, event->pinState}
+        };
+
+        this->eventManager.triggerEvent(pinStatesUpdateEvent);
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to set target pin state for pin " + event->pinDescriptor.name + " - "
+            + exception.getMessage());
+        this->emitErrorEvent(event->id);
+    }
+}
diff --git a/src/TargetController/TargetController.hpp b/src/TargetController/TargetController.hpp
new file mode 100644
index 00000000..5ae0fb96
--- /dev/null
+++ b/src/TargetController/TargetController.hpp
@@ -0,0 +1,222 @@
+#pragma once
+
+#include <memory>
+#include <map>
+#include <string>
+#include <functional>
+#include <QJsonObject>
+#include <QJsonArray>
+
+#include "src/Helpers/Thread.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/EventManager/EventListener.hpp"
+#include "src/DebugToolDrivers/DebugTools.hpp"
+#include "src/Targets/Target.hpp"
+#include "src/Targets/Targets.hpp"
+#include "src/EventManager/EventManager.hpp"
+#include "src/EventManager/Events/Events.hpp"
+
+namespace Bloom
+{
+    using namespace Targets;
+    using namespace DebugToolDrivers;
+    using namespace Targets::Microchip::Avr;
+    using Avr8Bit::Avr8;
+    using Events::EventPointer;
+
+    /**
+     * The TargetController possesses full control of the debugging target and the debug tool.
+     *
+`    * The TargetController runs on a dedicated thread. Its sole purpose is to handle communication to  &from the
+     * debug tool and target.
+     *
+     * The TargetController should be oblivious to any manufacture/device specific functionality. It should
+     * only ever interface with the base Target and DebugTool classes.
+     */
+    class TargetController: public Thread
+    {
+    private:
+        ApplicationConfig applicationConfig;
+        EnvironmentConfig environmentConfig;
+
+        std::unique_ptr<Targets::Target> target = nullptr;
+        std::unique_ptr<DebugTool> debugTool = nullptr;
+
+        EventManager& eventManager;
+        EventListenerPointer eventListener = std::make_shared<EventListener>("TargetControllerEventListener");
+
+        TargetState lastTargetState = TargetState::UNKNOWN;
+        std::optional<TargetDescriptor> cachedTargetDescriptor;
+
+        /**
+         * Constructs a mapping of supported debug tool names to lambdas. The lambdas should *only* instantiate
+         * and return an instance to the derived DebugTool class. They should never attempt to establish
+         * a connection to the device.
+         *
+         * Currently, the only debug tool we support is the Atmel-ICE.
+         *
+         * @return
+         */
+        static auto getSupportedDebugTools() {
+            return std::map<std::string, std::function<std::unique_ptr<DebugTool>()>> {
+                {
+                    "atmel-ice",
+                    []() -> std::unique_ptr<DebugTool> {
+                        return std::make_unique<AtmelIce>();
+                    }
+                },
+                {
+                    "power-debugger",
+                    []() -> std::unique_ptr<DebugTool> {
+                        return std::make_unique<PowerDebugger>();
+                    }
+                },
+            };
+        }
+
+        /**
+         * Constructs a mapping of supported target names to lambdas. The lambdas should instantiate and return an
+         * instance to the appropriate Target class.
+         *
+         * @return
+         */
+        static auto getSupportedTargets() {
+            auto mapping = std::map<std::string, std::function<std::unique_ptr<Targets::Target>()>> {
+                {
+                    "avr8",
+                    []() -> std::unique_ptr<Targets::Target> {
+                        return std::make_unique<Avr8>();
+                    }
+                },
+            };
+
+            // Include all targets from AVR8 part description files
+            auto avr8PdMapping = Avr8Bit::PartDescriptionFile::getPartDescriptionMapping();
+
+            for (auto mapIt = avr8PdMapping.begin(); mapIt != avr8PdMapping.end(); mapIt++) {
+                // Each target signature maps to an array of targets, as numerous targets can possess the same signature.
+                auto targets = mapIt.value().toArray();
+
+                for (auto targetIt = targets.begin(); targetIt != targets.end(); targetIt++) {
+                    auto targetName = targetIt->toObject().find("targetName").value().toString()
+                        .toLower().toStdString();
+
+                    if (mapping.find(targetName) == mapping.end()) {
+                        mapping.insert({
+                           targetName,
+                           [targetName]() -> std::unique_ptr<Targets::Target> {
+                               return std::make_unique<Avr8>(targetName);
+                           }
+                       });
+                    }
+                }
+            }
+
+            return mapping;
+        }
+
+        void setDebugTool(std::unique_ptr<DebugTool> debugTool) {
+            this->debugTool = std::move(debugTool);
+        }
+
+        void setTarget(std::unique_ptr<Targets::Target> target) {
+            this->target = std::move(target);
+        }
+
+        Targets::Target* getTarget() {
+            return this->target.get();
+        }
+
+        DebugTool* getDebugTool() {
+            return this->debugTool.get();
+        }
+
+        /**
+         * Updates the state of the TargetController and emits a state changed event.
+         *
+         * @param state
+         * @param emitEvent
+         */
+        void setStateAndEmitEvent(ThreadState state) {
+            this->setState(state);
+            this->eventManager.triggerEvent(
+                std::make_shared<Events::TargetControllerStateChanged>(state)
+            );
+        };
+
+        /**
+         * Installs Bloom's udev rules on user's machine. Rules are copied from build/Distribution/Resources/UdevRules
+         * to /etc/udev/rules.d/. This method will report an error if Bloom isn't running as root (as root privileges
+         * are required for writing to files in /etc/udev).
+         */
+        void checkUdevRules();
+
+        /**
+         * Because the TargetController hogs the thread, this method must be called in a dedicated thread.
+         */
+        void startup();
+
+        /**
+         * Exit point - must be called before the TargetController thread is terminated.
+         *
+         * Handles deactivating the target among other clean-up related things.
+         */
+        void shutdown();
+
+        /**
+         * Should fire any events queued on the target.
+         */
+        void fireTargetEvents();
+
+        void emitErrorEvent(int correlationId);
+    public:
+        TargetController(EventManager& eventManager) : eventManager(eventManager) {};
+
+        void setApplicationConfig(const ApplicationConfig& applicationConfig) {
+            this->applicationConfig = applicationConfig;
+        }
+
+        void setEnvironmentConfig(const EnvironmentConfig& environmentConfig) {
+            this->environmentConfig = environmentConfig;
+        }
+
+        /**
+         * Entry point for the TargetController.
+         */
+        void run();
+
+        void onExtractTargetDescriptor(EventPointer<Events::ExtractTargetDescriptor> event);
+
+        /**
+         * Callback for StopTargetExecution event.
+         *
+         * Will attempt to stop the target and emit a TargetExecutionStopped event.
+         */
+        void onStopTargetExecutionEvent(EventPointer<Events::StopTargetExecution> event);
+
+        void onStepTargetExecutionEvent(EventPointer<Events::StepTargetExecution> event);
+
+        /**
+         * Callback for ResumeTargetExecution event.
+         */
+        void onResumeTargetExecutionEvent(EventPointer<Events::ResumeTargetExecution> event);
+
+        /**
+         * Callback for ShutdownTargetController event.
+         */
+        void onShutdownTargetControllerEvent(EventPointer<Events::ShutdownTargetController> event);
+
+        void onReadRegistersEvent(EventPointer<Events::RetrieveRegistersFromTarget> event);
+        void onWriteRegistersEvent(EventPointer<Events::WriteRegistersToTarget> event);
+        void onReadMemoryEvent(EventPointer<Events::RetrieveMemoryFromTarget> event);
+        void onWriteMemoryEvent(EventPointer<Events::WriteMemoryToTarget> event);
+        void onSetBreakpointEvent(EventPointer<Events::SetBreakpointOnTarget> event);
+        void onRemoveBreakpointEvent(EventPointer<Events::RemoveBreakpointOnTarget> event);
+        void onDebugSessionStartedEvent(EventPointer<Events::DebugSessionStarted> event);
+        void onDebugSessionFinishedEvent(EventPointer<Events::DebugSessionFinished> event);
+        void onSetProgramCounterEvent(EventPointer<Events::SetProgramCounterOnTarget> event);
+        void onInsightStateChangedEvent(EventPointer<Events::InsightStateChanged> event);
+        void onRetrieveTargetPinStatesEvent(EventPointer<Events::RetrieveTargetPinStates> event);
+        void onSetPinStateEvent(EventPointer<Events::SetTargetPinState> event);
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/Avr8.cpp b/src/Targets/Microchip/AVR/AVR8/Avr8.cpp
new file mode 100644
index 00000000..99a80dd8
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/Avr8.cpp
@@ -0,0 +1,851 @@
+#include <cstdint>
+#include <QtCore>
+#include <QJsonDocument>
+#include <cassert>
+#include <algorithm>
+#include <iterator>
+#include <bitset>
+#include <limits>
+
+#include "Avr8.hpp"
+#include "PadDescriptor.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Exceptions/InvalidConfig.hpp"
+#include "src/Targets/TargetRegister.hpp"
+#include "src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.hpp"
+
+// Derived AVR8 targets
+#include "XMega/XMega.hpp"
+#include "Mega/Mega.hpp"
+#include "Tiny/Tiny.hpp"
+
+using namespace Bloom;
+using namespace Targets;
+using namespace Targets::Microchip::Avr;
+using namespace Avr8Bit;
+using namespace Exceptions;
+using Avr8Bit::Avr8;
+
+/**
+ * Initialises the target from config parameters extracted from user's config file.
+ *
+ * @see Application::extractConfig(); for more on config extraction.
+ *
+ * @param targetConfig
+ */
+void Avr8::preActivationConfigure(const TargetConfig& targetConfig) {
+    Target::preActivationConfigure(targetConfig);
+
+    this->avr8Interface->configure(targetConfig);
+}
+
+void Avr8::postActivationConfigure() {
+    auto targetSignature = this->getId();
+    auto partDescription = PartDescriptionFile(
+        targetSignature.toHex(),
+        (!this->name.empty()) ? std::optional(this->name) : std::nullopt
+    );
+    auto pdSignature = partDescription.getTargetSignature();
+
+    if (targetSignature != pdSignature) {
+        // This should never happen. If it does, someone has screwed up the part description mapping file.
+        throw Exception("Failed to activate target - target signature mismatch.\nThe target signature (\""
+            + targetSignature.toHex() + "\") does not match the AVR8 part description signature (\""
+            + pdSignature.toHex() + "\"). Please review your target configuration in bloom.json");
+    }
+
+    this->partDescription = partDescription;
+    this->id = partDescription.getTargetSignature();
+    this->name = partDescription.getTargetName();
+    this->family = partDescription.getFamily();
+}
+
+void Avr8::postPromotionConfigure() {
+    this->avr8Interface->setTargetParameters(this->getTargetParameters());
+    this->loadPadDescriptors();
+    this->loadTargetVariants();
+}
+
+void Avr8::loadPadDescriptors() {
+    auto& targetParameters = this->getTargetParameters();
+
+    /*
+     * Every port address we extract from the part description will be stored in portAddresses, so that
+     * we can extract the start (min) and end (max) for the target's IO port address
+     * range (TargetParameters::ioPortAddressRangeStart & TargetParameters::ioPortAddressRangeEnd)
+     */
+    std::vector<std::uint32_t> portAddresses;
+
+    auto& modules = this->partDescription->getModulesMappedByName();
+    auto portModule = (modules.contains("port")) ? std::optional(modules.find("port")->second) : std::nullopt;
+    auto& peripheralModules = this->partDescription->getPeripheralModulesMappedByName();
+
+    if (peripheralModules.contains("port")) {
+        auto portPeripheralModule = peripheralModules.find("port")->second;
+
+        for (const auto& [instanceName, instance] : portPeripheralModule.instancesMappedByName) {
+            if (instanceName.find("port") == 0) {
+                auto portPeripheralRegisterGroup = (portPeripheralModule.registerGroupsMappedByName.contains(instanceName)) ?
+                    std::optional(portPeripheralModule.registerGroupsMappedByName.find(instanceName)->second) :
+                    std::nullopt;
+
+                for (const auto& signal : instance.instanceSignals) {
+                    if (!signal.index.has_value()) {
+                        continue;
+                    }
+
+                    auto padDescriptor = PadDescriptor();
+                    padDescriptor.name = signal.padName;
+                    padDescriptor.gpioPinNumber = signal.index.value();
+
+                    if (portModule.has_value() && portModule->registerGroupsMappedByName.contains(instanceName)) {
+                        // We have register information for this port
+                        auto registerGroup = portModule->registerGroupsMappedByName.find(instanceName)->second;
+
+                        for (const auto& [registerName, portRegister] : registerGroup.registersMappedByName) {
+                            if (registerName.find("port") == 0) {
+                                // This is the data register for the port
+                                padDescriptor.gpioPortSetAddress = portRegister.offset;
+                                padDescriptor.gpioPortClearAddress = portRegister.offset;
+
+                            } else if (registerName.find("pin") == 0) {
+                                // This is the input data register for the port
+                                padDescriptor.gpioPortInputAddress = portRegister.offset;
+
+                            } else if (registerName.find("ddr") == 0) {
+                                // This is the data direction register for the port
+                                padDescriptor.ddrSetAddress = portRegister.offset;
+                                padDescriptor.ddrClearAddress = portRegister.offset;
+                            }
+                        }
+
+                    } else if (portModule.has_value() && portModule->registerGroupsMappedByName.contains("port")) {
+                        // We have generic register information for all ports on the target
+                        auto registerGroup = portModule->registerGroupsMappedByName.find("port")->second;
+
+                        for (const auto& [registerName, portRegister] : registerGroup.registersMappedByName) {
+                            if (registerName.find("outset") == 0) {
+                                // Include the port register offset
+                                padDescriptor.gpioPortSetAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.gpioPortSetAddress = padDescriptor.gpioPortSetAddress.value() + portRegister.offset;
+
+                            } else if (registerName.find("outclr") == 0) {
+                                padDescriptor.gpioPortClearAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.gpioPortClearAddress = padDescriptor.gpioPortClearAddress.value() + portRegister.offset;
+
+                            } else if (registerName.find("dirset") == 0) {
+                                padDescriptor.ddrSetAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.ddrSetAddress = padDescriptor.ddrSetAddress.value() + portRegister.offset;
+
+                            } else if (registerName.find("dirclr") == 0) {
+                                padDescriptor.ddrClearAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.ddrClearAddress = padDescriptor.ddrClearAddress.value() + portRegister.offset;
+
+                            } else if (registerName == "in") {
+                                padDescriptor.gpioPortInputAddress = (portPeripheralRegisterGroup.has_value() && portPeripheralRegisterGroup->offset.has_value()) ?
+                                    portPeripheralRegisterGroup->offset.value_or(0) : 0;
+
+                                padDescriptor.gpioPortInputAddress = padDescriptor.gpioPortInputAddress.value() + portRegister.offset;
+                            }
+                        }
+                    }
+
+                    if (padDescriptor.gpioPortSetAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.gpioPortSetAddress.value());
+                    }
+
+                    if (padDescriptor.gpioPortClearAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.gpioPortClearAddress.value());
+                    }
+
+                    if (padDescriptor.ddrSetAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.ddrSetAddress.value());
+                    }
+
+                    if (padDescriptor.ddrClearAddress.has_value()) {
+                        portAddresses.push_back(padDescriptor.ddrClearAddress.value());
+                    }
+
+                    this->padDescriptorsByName.insert(std::pair(padDescriptor.name, padDescriptor));
+                }
+            }
+        }
+    }
+
+    if (!portAddresses.empty()) {
+        targetParameters.ioPortAddressRangeStart = *std::min_element(portAddresses.begin(), portAddresses.end());
+        targetParameters.ioPortAddressRangeEnd = *std::max_element(portAddresses.begin(), portAddresses.end());
+    }
+}
+
+void Avr8::loadTargetVariants() {
+    auto variants = this->generateVariantsFromPartDescription();
+
+    for (auto& targetVariant : variants) {
+        for (auto& [pinNumber, pinDescriptor] : targetVariant.pinDescriptorsByNumber) {
+            if (this->padDescriptorsByName.contains(pinDescriptor.padName)) {
+                auto& pad = this->padDescriptorsByName.at(pinDescriptor.padName);
+                if (pad.gpioPortSetAddress.has_value() && pad.ddrSetAddress.has_value()) {
+                    pinDescriptor.type = TargetPinType::GPIO;
+                }
+            }
+        }
+
+        this->targetVariantsById.insert(std::pair(targetVariant.id, targetVariant));
+    }
+}
+
+TargetParameters& Avr8::getTargetParameters() {
+    if (!this->targetParameters.has_value()) {
+        assert(this->partDescription.has_value());
+        this->targetParameters = TargetParameters();
+        this->targetParameters->family = this->family;
+        auto& propertyGroups = this->partDescription->getPropertyGroupsMappedByName();
+
+        auto flashMemorySegment = this->partDescription->getFlashMemorySegment();
+        if (flashMemorySegment.has_value()) {
+            this->targetParameters->flashSize = flashMemorySegment->size;
+            this->targetParameters->flashStartAddress = flashMemorySegment->startAddress;
+
+            if (flashMemorySegment->pageSize.has_value()) {
+                this->targetParameters->flashPageSize = flashMemorySegment->pageSize.value();
+            }
+        }
+
+        auto ramMemorySegment = this->partDescription->getRamMemorySegment();
+        if (ramMemorySegment.has_value()) {
+            this->targetParameters->ramSize = ramMemorySegment->size;
+            this->targetParameters->ramStartAddress = ramMemorySegment->startAddress;
+        }
+
+        auto registerMemorySegment = this->partDescription->getRegisterMemorySegment();
+        if (registerMemorySegment.has_value()) {
+            this->targetParameters->gpRegisterSize = registerMemorySegment->size;
+            this->targetParameters->gpRegisterStartAddress = registerMemorySegment->startAddress;
+        }
+
+        auto eepromMemorySegment = this->partDescription->getEepromMemorySegment();
+        if (eepromMemorySegment.has_value()) {
+            this->targetParameters->eepromSize = eepromMemorySegment->size;
+
+            if (eepromMemorySegment->pageSize.has_value()) {
+                this->targetParameters->eepromPageSize = eepromMemorySegment->pageSize.value();
+            }
+        }
+
+        auto firstBootSectionMemorySegment = this->partDescription->getFirstBootSectionMemorySegment();
+        if (firstBootSectionMemorySegment.has_value()) {
+            this->targetParameters->bootSectionStartAddress = firstBootSectionMemorySegment->startAddress / 2;
+            this->targetParameters->bootSectionSize = firstBootSectionMemorySegment->size;
+        }
+
+        // OCD attributes can be found in property groups
+        if (propertyGroups.contains("ocd")) {
+            auto& ocdProperties = propertyGroups.at("ocd").propertiesMappedByName;
+
+            if (ocdProperties.find("ocd_revision") != ocdProperties.end()) {
+                this->targetParameters->ocdRevision = ocdProperties.find("ocd_revision")->second.value.toUShort(nullptr, 10);
+            }
+
+            if (ocdProperties.find("ocd_datareg") != ocdProperties.end()) {
+                this->targetParameters->ocdDataRegister = ocdProperties.find("ocd_datareg")->second.value.toUShort(nullptr, 16);
+            }
+        }
+
+        auto statusRegister = this->partDescription->getStatusRegister();
+        if (statusRegister.has_value()) {
+            this->targetParameters->statusRegisterStartAddress = statusRegister->offset;
+            this->targetParameters->statusRegisterSize = statusRegister->size;
+        }
+
+        auto stackPointerRegister = this->partDescription->getStackPointerRegister();
+        if (stackPointerRegister.has_value()) {
+            this->targetParameters->stackPointerRegisterStartAddress = stackPointerRegister->offset;
+            this->targetParameters->stackPointerRegisterSize = stackPointerRegister->size;
+
+        } else {
+            // Sometimes the SP register is split into two register nodes, one for low, the other for high
+            auto stackPointerLowRegister = this->partDescription->getStackPointerLowRegister();
+            auto stackPointerHighRegister = this->partDescription->getStackPointerHighRegister();
+
+            if (stackPointerLowRegister.has_value()) {
+                this->targetParameters->stackPointerRegisterStartAddress = stackPointerLowRegister->offset;
+                this->targetParameters->stackPointerRegisterSize = stackPointerLowRegister->size;
+            }
+
+            if (stackPointerHighRegister.has_value()) {
+                this->targetParameters->stackPointerRegisterSize = (this->targetParameters->stackPointerRegisterSize.has_value()) ?
+                   this->targetParameters->stackPointerRegisterSize.value() + stackPointerHighRegister->size :
+                   stackPointerHighRegister->size;
+            }
+        }
+
+        auto spmcsrRegister = this->partDescription->getSpmcsrRegister();
+        if (spmcsrRegister.has_value()) {
+            this->targetParameters->spmcsRegisterStartAddress = spmcsrRegister->offset;
+        }
+
+        auto osccalRegister = this->partDescription->getOscillatorCalibrationRegister();
+        if (osccalRegister.has_value()) {
+            this->targetParameters->osccalAddress = osccalRegister->offset;
+        }
+
+        auto eepromAddressRegister = this->partDescription->getEepromAddressRegister();
+        if (eepromAddressRegister.has_value()) {
+            this->targetParameters->eepromAddressRegisterLow = eepromAddressRegister->offset;
+            this->targetParameters->eepromAddressRegisterHigh = (eepromAddressRegister->size == 2)
+                ? eepromAddressRegister->offset + 1 : eepromAddressRegister->offset;
+        }
+
+        auto eepromDataRegister = this->partDescription->getEepromDataRegister();
+        if (eepromDataRegister.has_value()) {
+            this->targetParameters->eepromDataRegisterAddress = eepromDataRegister->offset;
+        }
+
+        auto eepromControlRegister = this->partDescription->getEepromControlRegister();
+        if (eepromControlRegister.has_value()) {
+            this->targetParameters->eepromControlRegisterAddress = eepromControlRegister->offset;
+        }
+
+        if (propertyGroups.contains("pdi_interface")) {
+            auto& pdiInterfaceProperties = propertyGroups.at("pdi_interface").propertiesMappedByName;
+
+            if (pdiInterfaceProperties.contains("app_section_offset")) {
+                this->targetParameters->appSectionPdiOffset = pdiInterfaceProperties
+                    .at("app_section_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("boot_section_offset")) {
+                this->targetParameters->bootSectionPdiOffset = pdiInterfaceProperties
+                    .at("boot_section_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("datamem_offset")) {
+                this->targetParameters->ramPdiOffset = pdiInterfaceProperties
+                    .at("datamem_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("eeprom_offset")) {
+                this->targetParameters->eepromPdiOffset = pdiInterfaceProperties
+                    .at("eeprom_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("user_signatures_offset")) {
+                this->targetParameters->userSignaturesPdiOffset = pdiInterfaceProperties
+                    .at("user_signatures_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("prod_signatures_offset")) {
+                this->targetParameters->productSignaturesPdiOffset = pdiInterfaceProperties
+                    .at("prod_signatures_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("fuse_registers_offset")) {
+                this->targetParameters->fuseRegistersPdiOffset = pdiInterfaceProperties
+                    .at("fuse_registers_offset").value.toInt(nullptr, 16);
+            }
+
+            if (pdiInterfaceProperties.contains("lock_registers_offset")) {
+                this->targetParameters->lockRegistersPdiOffset = pdiInterfaceProperties
+                    .at("lock_registers_offset").value.toInt(nullptr, 16);
+            }
+        }
+    }
+
+    return this->targetParameters.value();
+}
+
+std::unique_ptr<Targets::Target> Avr8::promote() {
+    std::unique_ptr<Targets::Target> promoted = nullptr;
+
+    if (this->family.has_value()) {
+        // Promote generic AVR8 target to correct family.
+        switch (this->family.value()) {
+            case Family::XMEGA: {
+                Logger::info("AVR8 target promoted to XMega target");
+                promoted = std::make_unique<XMega>(*this);
+                break;
+            }
+            case Family::MEGA: {
+                Logger::info("AVR8 target promoted to megaAVR target");
+                promoted = std::make_unique<Mega>(*this);
+                break;
+            }
+            case Family::TINY: {
+                Logger::info("AVR8 target promoted to tinyAVR target");
+                promoted = std::make_unique<Tiny>(*this);
+                break;
+            }
+            default: {
+                break;
+            }
+        }
+    }
+
+    return promoted;
+}
+
+void Avr8::activate() {
+    if (this->getActivated()) {
+        return;
+    }
+
+    this->avr8Interface->init();
+    this->avr8Interface->activate();
+    this->activated = true;
+}
+
+void Avr8::deactivate() {
+    try {
+        this->avr8Interface->deactivate();
+        this->activated = false;
+
+    } catch (const Exception& exception) {
+        Logger::error("Failed to deactivate AVR8 target - " + exception.getMessage());
+    }
+}
+
+TargetSignature Avr8::getId() {
+    if (!this->id.has_value()) {
+        this->id = this->avr8Interface->getDeviceId();
+    }
+
+    return this->id.value();
+}
+
+std::vector<TargetVariant> Avr8::generateVariantsFromPartDescription() {
+    std::vector<TargetVariant> output;
+    auto pdVariants = this->partDescription->getVariants();
+    auto pdPinoutsByName = this->partDescription->getPinoutsMappedByName();
+    auto& modules = this->partDescription->getModulesMappedByName();
+
+    for (const auto& pdVariant : pdVariants) {
+        if (pdVariant.disabled) {
+            continue;
+        }
+
+        auto targetVariant = TargetVariant();
+        targetVariant.id = static_cast<int>(output.size());
+        targetVariant.name = pdVariant.orderCode;
+        targetVariant.packageName = pdVariant.package;
+
+        if (pdVariant.package.find("QFP") == 0 || pdVariant.package.find("TQFP") == 0) {
+            targetVariant.package = TargetPackage::QFP;
+
+        } else if (pdVariant.package.find("PDIP") == 0 || pdVariant.package.find("DIP") == 0) {
+            targetVariant.package = TargetPackage::DIP;
+
+        } else if (pdVariant.package.find("QFN") == 0 || pdVariant.package.find("VQFN") == 0) {
+            targetVariant.package = TargetPackage::QFN;
+
+        } else if (pdVariant.package.find("SOIC") == 0) {
+            targetVariant.package = TargetPackage::SOIC;
+        }
+
+        if (!pdPinoutsByName.contains(pdVariant.pinoutName)) {
+            // Missing pinouts in the part description file
+            continue;
+        }
+
+        auto pdPinout = pdPinoutsByName.find(pdVariant.pinoutName)->second;
+        for (const auto& pdPin : pdPinout.pins) {
+            auto targetPin = TargetPinDescriptor();
+            targetPin.name = pdPin.pad;
+            targetPin.padName = pdPin.pad;
+            targetPin.number = pdPin.position;
+
+            // TODO: REMOVE THIS:
+            if (pdPin.pad.find("vcc") == 0 || pdPin.pad.find("avcc") == 0 || pdPin.pad.find("aref") == 0) {
+                targetPin.type = TargetPinType::VCC;
+
+            } else if (pdPin.pad.find("gnd") == 0) {
+                targetPin.type = TargetPinType::GND;
+            }
+
+            targetVariant.pinDescriptorsByNumber.insert(std::pair(targetPin.number, targetPin));
+        }
+
+        output.push_back(targetVariant);
+    }
+
+    return output;
+}
+
+TargetDescriptor Avr8Bit::Avr8::getDescriptor() {
+    auto parameters = this->getTargetParameters();
+
+    auto descriptor = TargetDescriptor();
+    descriptor.id = this->getHumanReadableId();
+    descriptor.name = this->getName();
+    descriptor.ramSize = parameters.ramSize.value_or(0);
+
+    std::transform(
+        this->targetVariantsById.begin(),
+        this->targetVariantsById.end(),
+        std::back_inserter(descriptor.variants),
+        [](auto& variantToIdPair) {
+            return variantToIdPair.second;
+        }
+    );
+
+    return descriptor;
+}
+
+void Avr8::run() {
+    this->avr8Interface->run();
+}
+
+void Avr8::stop() {
+    this->avr8Interface->stop();
+}
+
+void Avr8::step() {
+    this->avr8Interface->step();
+}
+
+void Avr8::reset() {
+    this->avr8Interface->reset();
+}
+
+void Avr8::setBreakpoint(std::uint32_t address) {
+    this->avr8Interface->setBreakpoint(address);
+}
+
+void Avr8::removeBreakpoint(std::uint32_t address) {
+    this->avr8Interface->clearBreakpoint(address);
+}
+
+void Avr8::clearAllBreakpoints() {
+    this->avr8Interface->clearAllBreakpoints();
+}
+
+TargetRegisters Avr8::readGeneralPurposeRegisters(std::set<std::size_t> registerIds) {
+    return this->avr8Interface->readGeneralPurposeRegisters(registerIds);
+}
+
+void Avr8::writeRegisters(const TargetRegisters& registers) {
+    TargetRegisters gpRegisters;
+
+    for (const auto& targetRegister : registers) {
+        if (targetRegister.descriptor.type == TargetRegisterType::GENERAL_PURPOSE_REGISTER
+            && targetRegister.descriptor.id.has_value()) {
+            gpRegisters.push_back(targetRegister);
+
+        } else if (targetRegister.descriptor.type == TargetRegisterType::PROGRAM_COUNTER) {
+            Logger::debug("Setting PC register");
+
+            auto programCounterBytes = targetRegister.value;
+
+            if (programCounterBytes.size() < 4) {
+                // All PC register values should be at least 4 bytes in size
+                programCounterBytes.insert(programCounterBytes.begin(), 4 - programCounterBytes.size(), 0x00);
+            }
+
+            this->setProgramCounter(static_cast<std::uint32_t>(
+                programCounterBytes[0] << 24
+                | programCounterBytes[1] << 16
+                | programCounterBytes[2] << 8
+                | programCounterBytes[3]
+            ));
+
+        } else if (targetRegister.descriptor.type == TargetRegisterType::STATUS_REGISTER) {
+            Logger::error("Setting status register");
+            this->avr8Interface->setStatusRegister(targetRegister);
+
+        } else if (targetRegister.descriptor.type == TargetRegisterType::STACK_POINTER) {
+            Logger::error("Setting stack pointer register");
+            this->avr8Interface->setStackPointerRegister(targetRegister);
+        }
+    }
+
+    if (!gpRegisters.empty()) {
+        this->avr8Interface->writeGeneralPurposeRegisters(gpRegisters);
+    }
+}
+
+TargetRegisters Avr8::readRegisters(const TargetRegisterDescriptors& descriptors) {
+    TargetRegisters registers;
+    std::set<std::size_t> gpRegisterIds;
+
+    for (const auto& descriptor : descriptors) {
+        if (descriptor.type == TargetRegisterType::GENERAL_PURPOSE_REGISTER && descriptor.id.has_value()) {
+            gpRegisterIds.insert(descriptor.id.value());
+
+        } else if (descriptor.type == TargetRegisterType::PROGRAM_COUNTER) {
+            registers.push_back(this->getProgramCounterRegister());
+
+        } else if (descriptor.type == TargetRegisterType::STATUS_REGISTER) {
+            registers.push_back(this->getStatusRegister());
+
+        } else if (descriptor.type == TargetRegisterType::STACK_POINTER) {
+            registers.push_back(this->getStackPointerRegister());
+        }
+    }
+
+    if (!gpRegisterIds.empty()) {
+        auto gpRegisters = this->readGeneralPurposeRegisters(gpRegisterIds);
+        registers.insert(registers.end(), gpRegisters.begin(), gpRegisters.end());
+    }
+
+    return registers;
+}
+
+TargetMemoryBuffer Avr8::readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) {
+    return this->avr8Interface->readMemory(memoryType, startAddress, bytes);
+}
+
+void Avr8::writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) {
+    this->avr8Interface->writeMemory(memoryType, startAddress, buffer);
+}
+
+TargetState Avr8::getState() {
+    return this->avr8Interface->getTargetState();
+}
+
+std::uint32_t Avr8::getProgramCounter() {
+    return this->avr8Interface->getProgramCounter();
+}
+
+TargetRegister Avr8::getProgramCounterRegister() {
+    auto programCounter = this->getProgramCounter();
+
+    return TargetRegister(TargetRegisterType::PROGRAM_COUNTER, {
+        static_cast<unsigned char>(programCounter),
+        static_cast<unsigned char>(programCounter >> 8),
+        static_cast<unsigned char>(programCounter >> 16),
+        static_cast<unsigned char>(programCounter >> 24),
+    });
+}
+
+TargetRegister Avr8::getStackPointerRegister() {
+    return this->avr8Interface->getStackPointerRegister();
+}
+
+TargetRegister Avr8::getStatusRegister() {
+    return this->avr8Interface->getStatusRegister();
+}
+
+void Avr8::setProgramCounter(std::uint32_t programCounter) {
+    this->avr8Interface->setProgramCounter(programCounter);
+}
+
+std::map<int, TargetPinState> Avr8::getPinStates(int variantId) {
+    if (!this->targetVariantsById.contains(variantId)) {
+        throw Exception("Invalid target variant ID");
+    }
+
+    std::map<int, TargetPinState> output;
+    auto& variant = this->targetVariantsById.at(variantId);
+
+    /*
+     * To prevent the number of memory reads we perform here, we cache the data and map it by start address.
+     *
+     * This way, we only perform 3 memory reads for a target variant with 3 ports - one per port (instead of one
+     * per pin).
+     *
+     * We may be able to make this more efficient by combining reads for ports with aligned memory addresses. This will
+     * be considered when the need for it becomes apparent.
+     */
+    std::map<std::uint16_t, TargetMemoryBuffer> cachedMemoryByStartAddress;
+    auto readMemoryBitset = [this, &cachedMemoryByStartAddress](std::uint16_t startAddress) {
+        if (!cachedMemoryByStartAddress.contains(startAddress)) {
+            cachedMemoryByStartAddress.insert(
+                std::pair(
+                    startAddress,
+                    this->readMemory(TargetMemoryType::RAM, startAddress, 1)
+                )
+            );
+        }
+
+        return std::bitset<std::numeric_limits<unsigned char>::digits>(
+            cachedMemoryByStartAddress.at(startAddress).at(0)
+        );
+    };
+
+    for (const auto& [pinNumber, pinDescriptor] : variant.pinDescriptorsByNumber) {
+        if (this->padDescriptorsByName.contains(pinDescriptor.padName)) {
+            auto& pad = this->padDescriptorsByName.at(pinDescriptor.padName);
+
+            if (!pad.gpioPinNumber.has_value()) {
+                continue;
+            }
+
+            auto pinState = TargetPinState();
+
+            if (pad.ddrSetAddress.has_value()) {
+                auto dataDirectionRegisterValue = readMemoryBitset(pad.ddrSetAddress.value());
+                pinState.ioDirection = dataDirectionRegisterValue.test(pad.gpioPinNumber.value()) ?
+                                       TargetPinState::IoDirection::OUTPUT : TargetPinState::IoDirection::INPUT;
+
+                if (pinState.ioDirection == TargetPinState::IoDirection::OUTPUT
+                    && pad.gpioPortSetAddress.has_value()
+                ) {
+                    auto portRegisterValue = readMemoryBitset(pad.gpioPortSetAddress.value());
+                    pinState.ioState = portRegisterValue.test(pad.gpioPinNumber.value()) ?
+                        TargetPinState::IoState::HIGH : TargetPinState::IoState::LOW;
+
+                } else if (pinState.ioDirection == TargetPinState::IoDirection::INPUT
+                    && pad.gpioPortInputAddress.has_value()
+                    ) {
+                    auto portInputRegisterValue = readMemoryBitset(pad.gpioPortInputAddress.value());
+                    auto h = portInputRegisterValue.to_string();
+                    pinState.ioState = portInputRegisterValue.test(pad.gpioPinNumber.value()) ?
+                        TargetPinState::IoState::HIGH : TargetPinState::IoState::LOW;
+                }
+            }
+
+            output.insert(std::pair(pinNumber, pinState));
+        }
+    }
+
+    return output;
+}
+
+void Avr8::setPinState(int variantId, const TargetPinDescriptor& pinDescriptor, const TargetPinState& state) {
+    if (!this->targetVariantsById.contains(variantId)) {
+        throw Exception("Invalid target variant ID");
+    }
+
+    if (!this->padDescriptorsByName.contains(pinDescriptor.padName)) {
+        throw Exception("Unknown pad");
+    }
+
+    if (!state.ioDirection.has_value()) {
+        throw Exception("Missing IO direction state");
+    }
+
+    auto& variant = this->targetVariantsById.at(variantId);
+    auto& padDescriptor = this->padDescriptorsByName.at(pinDescriptor.padName);
+    auto ioState = state.ioState;
+
+    if (state.ioDirection == TargetPinState::IoDirection::INPUT) {
+        // When setting the direction to INPUT, we must always set the IO pinstate to LOW
+        ioState = TargetPinState::IoState::LOW;
+    }
+
+    if (!padDescriptor.ddrSetAddress.has_value()
+        || !padDescriptor.gpioPortSetAddress.has_value()
+        || !padDescriptor.gpioPinNumber.has_value()
+    ) {
+        throw Exception("Inadequate pad descriptor");
+    }
+
+    auto pinNumber = padDescriptor.gpioPinNumber.value();
+    auto ddrSetAddress = padDescriptor.ddrSetAddress.value();
+    auto ddrSetValue = this->readMemory(TargetMemoryType::RAM, ddrSetAddress, 1);
+
+    if (ddrSetValue.empty()) {
+        throw Exception("Failed to read DDSR value");
+    }
+
+    auto ddrSetBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(ddrSetValue.front());
+    if (ddrSetBitset.test(pinNumber) != (state.ioDirection == TargetPinState::IoDirection::OUTPUT)) {
+        // DDR needs updating
+        ddrSetBitset.set(pinNumber, (state.ioDirection == TargetPinState::IoDirection::OUTPUT));
+
+        this->writeMemory(
+            TargetMemoryType::RAM,
+            ddrSetAddress,
+            {static_cast<unsigned char>(ddrSetBitset.to_ulong())}
+        );
+    }
+
+    if (padDescriptor.ddrClearAddress.has_value() && padDescriptor.ddrClearAddress != ddrSetAddress) {
+        // We also need to ensure the data direction clear register value is correct
+        auto ddrClearAddress = padDescriptor.ddrClearAddress.value();
+        auto ddrClearValue = this->readMemory(TargetMemoryType::RAM, ddrClearAddress, 1);
+
+        if (ddrClearValue.empty()) {
+            throw Exception("Failed to read DDCR value");
+        }
+
+        auto ddrClearBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(ddrClearValue.front());
+        if (ddrClearBitset.test(pinNumber) == (state.ioDirection == TargetPinState::IoDirection::INPUT)) {
+            ddrClearBitset.set(pinNumber, (state.ioDirection == TargetPinState::IoDirection::INPUT));
+
+            this->writeMemory(
+                TargetMemoryType::RAM,
+                ddrClearAddress,
+                {static_cast<unsigned char>(ddrClearBitset.to_ulong())}
+            );
+        }
+    }
+
+    if (ioState.has_value()) {
+        auto portSetAddress = padDescriptor.gpioPortSetAddress.value();
+        auto portSetRegisterValue = this->readMemory(TargetMemoryType::RAM, portSetAddress, 1);
+
+        if (portSetRegisterValue.empty()) {
+            throw Exception("Failed to read PORT register value");
+        }
+
+        auto portSetBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(portSetRegisterValue.front());
+        if (portSetBitset.test(pinNumber) != (ioState == TargetPinState::IoState::HIGH)) {
+            // PORT set register needs updating
+            portSetBitset.set(pinNumber, (ioState == TargetPinState::IoState::HIGH));
+
+            this->writeMemory(
+                TargetMemoryType::RAM,
+                portSetAddress,
+                {static_cast<unsigned char>(portSetBitset.to_ulong())}
+            );
+        }
+
+        if (padDescriptor.gpioPortClearAddress.has_value() && padDescriptor.gpioPortClearAddress != portSetAddress) {
+            // We also need to ensure the PORT clear register value is correct
+            auto portClearAddress = padDescriptor.gpioPortClearAddress.value();
+            auto portClearRegisterValue = this->readMemory(TargetMemoryType::RAM, portClearAddress, 1);
+
+            if (portClearRegisterValue.empty()) {
+                throw Exception("Failed to read PORT (OUTSET) register value");
+            }
+
+            auto portClearBitset = std::bitset<std::numeric_limits<unsigned char>::digits>(portClearRegisterValue.front());
+            if (portClearBitset.test(pinNumber) == (ioState == TargetPinState::IoState::LOW)) {
+                // PORT clear register needs updating
+                portClearBitset.set(pinNumber, (ioState == TargetPinState::IoState::LOW));
+
+                this->writeMemory(
+                    TargetMemoryType::RAM,
+                    portClearAddress,
+                    {static_cast<unsigned char>(portClearBitset.to_ulong())}
+                );
+            }
+        }
+    }
+}
+
+bool Avr8::willMemoryWriteAffectIoPorts(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) {
+    auto& targetParameters = this->getTargetParameters();
+
+    /*
+     * We're making an assumption here; that all IO port addresses for all AVR8 targets are aligned. I have no idea
+     * how well this will hold.
+     *
+     * If they're not aligned, this function may report false positives.
+     */
+    if (targetParameters.ioPortAddressRangeStart.has_value() && targetParameters.ioPortAddressRangeEnd.has_value()) {
+        auto endAddress = startAddress + (bytes - 1);
+        return (
+            startAddress >= targetParameters.ioPortAddressRangeStart
+            && startAddress <= targetParameters.ioPortAddressRangeEnd
+        ) || (
+            endAddress >= targetParameters.ioPortAddressRangeStart
+            && endAddress <= targetParameters.ioPortAddressRangeEnd
+        ) || (
+            startAddress <= targetParameters.ioPortAddressRangeStart
+            && endAddress >= targetParameters.ioPortAddressRangeStart
+        );
+    }
+
+    return false;
+}
+
diff --git a/src/Targets/Microchip/AVR/AVR8/Avr8.hpp b/src/Targets/Microchip/AVR/AVR8/Avr8.hpp
new file mode 100644
index 00000000..0ceab0f3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/Avr8.hpp
@@ -0,0 +1,132 @@
+#pragma once
+
+#include <cstdint>
+#include <queue>
+
+#include "src/DebugToolDrivers/TargetInterfaces/Microchip/AVR/AVR8/Avr8Interface.hpp"
+#include "src/Targets/Microchip/AVR/Target.hpp"
+#include "src/Targets/TargetRegister.hpp"
+#include "src/DebugToolDrivers/DebugTool.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "src/Exceptions/Exception.hpp"
+
+#include "TargetParameters.hpp"
+#include "Family.hpp"
+#include "PadDescriptor.hpp"
+
+// Part Description
+#include "PartDescription/PartDescriptionFile.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    using namespace Exceptions;
+    using namespace PartDescription;
+
+    using PartDescription::PartDescriptionFile;
+    using DebugToolDrivers::TargetInterfaces::Microchip::Avr::Avr8::Avr8Interface;
+    using Targets::TargetRegisterMap;
+
+    class Avr8: public Target
+    {
+    protected:
+        Avr8Interface* avr8Interface;
+        std::string name = "";
+        std::optional<Family> family;
+        std::optional<PartDescriptionFile> partDescription = std::nullopt;
+        std::optional<TargetParameters> targetParameters = std::nullopt;
+        std::map<std::string, PadDescriptor> padDescriptorsByName;
+        std::map<int, TargetVariant> targetVariantsById;
+
+        virtual TargetParameters& getTargetParameters();
+
+        virtual void loadPadDescriptors();
+        virtual void loadTargetVariants();
+
+    public:
+        explicit Avr8() = default;
+        Avr8(const std::string& name): name(name) {};
+
+        [[nodiscard]] std::string getName() const override {
+            return this->name;
+        }
+
+        /**
+         * Checks if DebugTool is compatible with AVR8 targets.
+         *
+         * @param debugTool
+         * @return
+         */
+        bool isDebugToolSupported(DebugTool* debugTool) override {
+            return debugTool->getAvr8Interface() != nullptr;
+        }
+
+        void setDebugTool(DebugTool* debugTool) override {
+            this->avr8Interface = debugTool->getAvr8Interface();
+        };
+
+        void preActivationConfigure(const TargetConfig& targetConfig) override;
+        void postActivationConfigure() override;
+
+        virtual void postPromotionConfigure() override;
+
+        void activate() override;
+
+        void deactivate() override;
+
+        TargetSignature getId() override;
+
+        void run() override;
+
+        void stop() override;
+
+        void step() override;
+
+        void reset() override;
+
+        void setBreakpoint(std::uint32_t address) override;
+        void removeBreakpoint(std::uint32_t address) override;
+        void clearAllBreakpoints() override;
+
+        /**
+         * AVR8 targets are promotable. See promote() method for more.
+         *
+         * @return
+         */
+        bool supportsPromotion() override {
+            return true;
+        }
+
+        virtual std::vector<TargetVariant> generateVariantsFromPartDescription();
+
+        virtual TargetDescriptor getDescriptor() override;
+
+        virtual std::unique_ptr<Targets::Target> promote() override;
+
+        virtual TargetRegisters readGeneralPurposeRegisters(std::set<std::size_t> registerIds) override;
+        virtual void writeRegisters(const TargetRegisters& registers) override;
+        virtual TargetRegisters readRegisters(const TargetRegisterDescriptors& descriptors) override;
+        virtual TargetMemoryBuffer readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) override;
+        virtual void writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) override;
+
+        virtual TargetState getState() override;
+
+        virtual std::uint32_t getProgramCounter() override;
+        virtual TargetRegister getProgramCounterRegister() override;
+        virtual TargetRegister getStackPointerRegister() override;
+        virtual TargetRegister getStatusRegister() override;
+        virtual void setProgramCounter(std::uint32_t programCounter) override;
+
+        virtual std::map<int, TargetPinState> getPinStates(int variantId) override;
+        virtual void setPinState(
+            int variantId,
+            const TargetPinDescriptor& pinDescriptor,
+            const TargetPinState& state
+        ) override;
+
+        virtual bool willMemoryWriteAffectIoPorts(
+            TargetMemoryType memoryType,
+            std::uint32_t startAddress,
+            std::uint32_t bytes
+        ) override;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/Family.hpp b/src/Targets/Microchip/AVR/AVR8/Family.hpp
new file mode 100644
index 00000000..048dca95
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/Family.hpp
@@ -0,0 +1,11 @@
+#pragma once
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    enum class Family: int
+    {
+        MEGA,
+        XMEGA,
+        TINY,
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/Mega/Mega.cpp b/src/Targets/Microchip/AVR/AVR8/Mega/Mega.cpp
new file mode 100644
index 00000000..35124a27
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/Mega/Mega.cpp
@@ -0,0 +1,7 @@
+#include <QtCore>
+#include <QJsonDocument>
+
+#include "Mega.hpp"
+#include "src/Logger/Logger.hpp"
+
+using namespace Bloom::Targets::Microchip::Avr::Avr8Bit;
diff --git a/src/Targets/Microchip/AVR/AVR8/Mega/Mega.hpp b/src/Targets/Microchip/AVR/AVR8/Mega/Mega.hpp
new file mode 100644
index 00000000..403cda48
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/Mega/Mega.hpp
@@ -0,0 +1,18 @@
+#pragma once
+
+#include "src/Targets/Microchip/AVR/AVR8/Avr8.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    class Mega: public Avr8
+    {
+    protected:
+
+    public:
+        Mega(const Avr8& avr8) : Avr8(avr8) {};
+
+        virtual bool supportsPromotion() override {
+            return false;
+        }
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PadDescriptor.hpp b/src/Targets/Microchip/AVR/AVR8/PadDescriptor.hpp
new file mode 100644
index 00000000..c67ec297
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PadDescriptor.hpp
@@ -0,0 +1,42 @@
+#pragma once
+
+#include <string>
+#include <cstdint>
+#include <optional>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    /**
+     * Pin configurations for AVR8 targets may vary across target variants. This is why we must differentiate a pin
+     * to a pad. A pin is mapped to a pad, but this mapping is variant specific. For example, pin 4 on
+     * the ATmega328P-PN (DIP variant) is mapped to a GPIO pad (PORTD/PIN2), but on the QFN variant (ATmega328P-MN),
+     * pin 4 is mapped to a GND pad.
+     *
+     * PadDescriptor describes a single pad on an AVR8 target. On target configuration, PadDescriptors are
+     * generated from the AVR8 part description file. These descriptors are mapped to pad names.
+     * See Avr8::loadPadDescriptors() for more.
+     */
+    struct PadDescriptor
+    {
+        std::string name;
+
+        std::optional<std::uint8_t> gpioPinNumber;
+
+        /**
+         * AVR8 GPIO pins can be manipulated by writing to an IO register address. The gpioPortAddress member
+         * holds this address.
+         */
+        std::optional<std::uint16_t> gpioPortSetAddress;
+        std::optional<std::uint16_t> gpioPortInputAddress;
+
+        std::optional<std::uint16_t> gpioPortClearAddress;
+
+        /**
+         * The data direction of a pin is configured via a data direction register (DDR), which, like the
+         * gpioPortSetAddress, is an IO register.
+         */
+        std::optional<std::uint16_t> ddrSetAddress;
+
+        std::optional<std::uint16_t> ddrClearAddress;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/AddressSpace.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/AddressSpace.hpp
new file mode 100644
index 00000000..3173c7fa
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/AddressSpace.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include <cstdint>
+#include "MemorySegment.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct AddressSpace {
+        std::string id;
+        std::string name;
+        std::uint16_t startAddress;
+        std::uint16_t size;
+        bool littleEndian = true;
+        std::map<MemorySegmentType, std::map<std::string, MemorySegment>> memorySegmentsByTypeAndName;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/MemorySegment.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/MemorySegment.hpp
new file mode 100644
index 00000000..d7cf8182
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/MemorySegment.hpp
@@ -0,0 +1,45 @@
+#pragma once
+
+#include <cstdint>
+#include <QDomElement>
+
+#include "src/Helpers/BiMap.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    enum MemorySegmentType {
+        REGISTERS,
+        IO,
+        EEPROM,
+        RAM,
+        FLASH,
+        SIGNATURES,
+        FUSES,
+        LOCKBITS,
+        OSCCAL,
+    };
+
+    struct MemorySegment {
+        std::string name;
+        MemorySegmentType type;
+        std::uint32_t startAddress;
+        std::uint32_t size;
+        std::optional<std::uint16_t> pageSize;
+
+        /**
+         * Mapping of all known memory segment types by their name. Any memory segments belonging to a type
+         * not defined in here should be ignored.
+         */
+        static const inline BiMap<std::string, MemorySegmentType> typesMappedByName = {
+            {"regs", MemorySegmentType::REGISTERS},
+            {"io", MemorySegmentType::IO},
+            {"eeprom", MemorySegmentType::EEPROM},
+            {"ram", MemorySegmentType::RAM},
+            {"flash", MemorySegmentType::FLASH},
+            {"signatures", MemorySegmentType::SIGNATURES},
+            {"fuses", MemorySegmentType::FUSES},
+            {"lockbits", MemorySegmentType::LOCKBITS},
+            {"osccal", MemorySegmentType::OSCCAL},
+        };
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/Module.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/Module.hpp
new file mode 100644
index 00000000..a6b1ac2b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/Module.hpp
@@ -0,0 +1,13 @@
+#pragma once
+
+#include "ModuleInstance.hpp"
+#include "RegisterGroup.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Module {
+        std::string name;
+        std::map<std::string, ModuleInstance> instancesMappedByName;
+        std::map<std::string, RegisterGroup> registerGroupsMappedByName;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/ModuleInstance.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/ModuleInstance.hpp
new file mode 100644
index 00000000..00821f49
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/ModuleInstance.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include <map>
+#include <vector>
+
+#include "RegisterGroup.hpp"
+#include "Signal.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct ModuleInstance {
+        std::string name;
+        std::map<std::string, RegisterGroup> registerGroupsMappedByName;
+        std::vector<Signal> instanceSignals;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.cpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.cpp
new file mode 100644
index 00000000..14870465
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.cpp
@@ -0,0 +1,862 @@
+#include "PartDescriptionFile.hpp"
+#include "src/Targets/Microchip/AVR/Exceptions/PartDescriptionParsingFailureException.hpp"
+#include "src/Logger/Logger.hpp"
+#include "src/Application.hpp"
+
+using namespace Bloom::Targets::Microchip::Avr::Avr8Bit;
+using namespace Bloom::Exceptions;
+
+// TODO: Move this into a resolvePartDescriptionFile() method.
+PartDescriptionFile::PartDescriptionFile(const std::string& targetSignatureHex, std::optional<std::string> targetName) {
+    auto mapping = this->getPartDescriptionMapping();
+    auto qTargetSignatureHex = QString::fromStdString(targetSignatureHex);
+
+    if (mapping.contains(qTargetSignatureHex)) {
+        // We have a match for the target signature.
+        auto descriptionFilesJsonArray = mapping.find(qTargetSignatureHex).value().toArray();
+        auto descriptionFiles = std::vector<QJsonValue>();
+        std::copy_if(
+            descriptionFilesJsonArray.begin(),
+            descriptionFilesJsonArray.end(),
+            std::back_inserter(descriptionFiles),
+            [&targetName] (const QJsonValue& value) {
+                auto pdTargetName = value.toObject().find("targetName")->toString().toLower().toStdString();
+                return !targetName.has_value() || (targetName.has_value() && targetName.value() == pdTargetName);
+            }
+        );
+
+        if (targetName.has_value() && descriptionFiles.empty()) {
+            throw Exception("Failed to resolve target description file for target \"" + targetName.value()
+                + "\" - target signature \"" + targetSignatureHex + "\" does not belong to target with name \"" +
+                targetName.value() + "\". Please review your bloom.json configuration.");
+        }
+
+        if (descriptionFiles.size() == 1) {
+            // Attempt to load the XML part description file
+            auto descriptionFilePath = QString::fromStdString(Application::getApplicationDirPath()) + "/"
+                + descriptionFiles.front().toObject().find("targetDescriptionFilePath")->toString();
+
+            Logger::debug("Loading AVR8 part description file: " + descriptionFilePath.toStdString());
+            this->init(descriptionFilePath);
+
+        } else if (descriptionFiles.size() > 1) {
+            /*
+             * There are numerous part description files mapped to this target signature. There's really not
+             * much we can do at this point, so we'll just instruct the user to use a more specific target name.
+             */
+            QStringList targetNames;
+            std::transform(
+                descriptionFiles.begin(),
+                descriptionFiles.end(),
+                std::back_inserter(targetNames),
+                [](const QJsonValue& descriptionFile) {
+                    return QString("\"" + descriptionFile.toObject().find("targetName")->toString().toLower() + "\"");
+                }
+            );
+
+            throw Exception("Failed to resolve part description file for target \""
+                + targetSignatureHex + "\" - ambiguous signature.\nThe signature is mapped to numerous targets: "
+                + targetNames.join(", ").toStdString() + ".\n\nPlease update the target name in your Bloom " +
+                "configuration to one of the above."
+            );
+
+        } else {
+            throw Exception("Failed to resolve part description file for target \""
+                + targetSignatureHex + "\" - invalid AVR8 target description mapping."
+            );
+        }
+
+    } else {
+        throw Exception("Failed to resolve part description file for target \""
+            + targetSignatureHex + "\" - unknown target signature.");
+    }
+}
+
+void PartDescriptionFile::init(const QString& xmlFilePath) {
+    auto file = QFile(xmlFilePath);
+    if (!file.exists()) {
+        // This can happen if someone has been messing with the Resources directory.
+        throw Exception("Failed to load part description file - file not found");
+    }
+
+    file.open(QIODevice::ReadOnly);
+    auto xml = QDomDocument();
+    xml.setContent(file.readAll());
+    this->init(xml);
+}
+
+void PartDescriptionFile::init(const QDomDocument& xml) {
+    this->xml = xml;
+
+    auto device = xml.elementsByTagName("devices").item(0)
+        .toElement().elementsByTagName("device").item(0).toElement();
+
+    if (!device.isElement()) {
+        throw PartDescriptionParsingFailureException("Device element not found.");
+    }
+
+    this->deviceElement = device;
+}
+
+QJsonObject PartDescriptionFile::getPartDescriptionMapping() {
+    auto mappingFile = QFile(
+        QString::fromStdString(Application::getResourcesDirPath() + "/TargetPartDescriptions/AVR/Mapping.json")
+    );
+
+    if (!mappingFile.exists()) {
+        throw TargetControllerStartupFailure("Failed to load AVR part description mapping - mapping file not found");
+    }
+
+    mappingFile.open(QIODevice::ReadOnly);
+    return QJsonDocument::fromJson(mappingFile.readAll()).object();
+}
+
+std::string PartDescriptionFile::getTargetName() const {
+    return this->deviceElement.attributes().namedItem("name").nodeValue().toStdString();
+}
+
+TargetSignature PartDescriptionFile::getTargetSignature() const {
+    auto propertyGroups = this->getPropertyGroupsMappedByName();
+    auto signaturePropertyGroupIt = propertyGroups.find("signatures");
+
+    if (signaturePropertyGroupIt == propertyGroups.end()) {
+        throw PartDescriptionParsingFailureException("Signature property group not found");
+    }
+
+    auto signaturePropertyGroup = signaturePropertyGroupIt->second;
+    auto& signatureProperties = signaturePropertyGroup.propertiesMappedByName;
+    std::optional<unsigned char> signatureByteZero;
+    std::optional<unsigned char> signatureByteOne;
+    std::optional<unsigned char> signatureByteTwo;
+
+    if (signatureProperties.find("signature0") != signatureProperties.end()) {
+        signatureByteZero = static_cast<unsigned char>(
+            signatureProperties.find("signature0")->second.value.toShort(nullptr, 16)
+        );
+    }
+
+    if (signatureProperties.find("signature1") != signatureProperties.end()) {
+        signatureByteOne = static_cast<unsigned char>(
+            signatureProperties.find("signature1")->second.value.toShort(nullptr, 16)
+        );
+    }
+
+    if (signatureProperties.find("signature2") != signatureProperties.end()) {
+        signatureByteTwo = static_cast<unsigned char>(
+            signatureProperties.find("signature2")->second.value.toShort(nullptr, 16)
+        );
+    }
+
+    if (signatureByteZero.has_value() && signatureByteOne.has_value() && signatureByteTwo.has_value()) {
+        return TargetSignature(signatureByteZero.value(), signatureByteOne.value(), signatureByteTwo.value());
+    }
+
+    throw PartDescriptionParsingFailureException("Failed to extract target signature from AVR8 part description.");
+}
+
+AddressSpace PartDescriptionFile::generateAddressSpaceFromXml(const QDomElement& xmlElement) const {
+    if (
+        !xmlElement.hasAttribute("id")
+            || !xmlElement.hasAttribute("name")
+            || !xmlElement.hasAttribute("size")
+            || !xmlElement.hasAttribute("start")
+    ) {
+        throw Exception("Address space element missing id/name/size/start attributes.");
+    }
+
+    auto addressSpace = AddressSpace();
+    addressSpace.name = xmlElement.attribute("name").toStdString();
+    addressSpace.id = xmlElement.attribute("id").toStdString();
+
+    bool conversionStatus;
+    addressSpace.startAddress = xmlElement.attribute("start").toUShort(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to convert start address hex value to integer.");
+    }
+
+    addressSpace.size = xmlElement.attribute("size").toUShort(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        throw Exception("Failed to convert size hex value to integer.");
+    }
+
+    if (xmlElement.hasAttribute("endianness")) {
+        addressSpace.littleEndian = (xmlElement.attribute("endianness").toStdString() == "little");
+    }
+
+    // Create memory segment objects and add them to the mapping.
+    auto segmentNodes = xmlElement.elementsByTagName("memory-segment");
+    auto& memorySegments = addressSpace.memorySegmentsByTypeAndName;
+    for (int segmentIndex = 0; segmentIndex < segmentNodes.count(); segmentIndex++) {
+        try {
+            auto segment = this->generateMemorySegmentFromXml(segmentNodes.item(segmentIndex).toElement());
+
+            if (memorySegments.find(segment.type) == memorySegments.end()) {
+                memorySegments.insert(
+                    std::pair<
+                        MemorySegmentType,
+                        decltype(addressSpace.memorySegmentsByTypeAndName)::mapped_type
+                    >(segment.type, {}));
+            }
+
+            memorySegments.find(segment.type)->second.insert(std::pair(segment.name, segment));
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract memory segment from part description element - "
+                + exception.getMessage());
+        }
+    }
+
+    return addressSpace;
+}
+
+MemorySegment PartDescriptionFile::generateMemorySegmentFromXml(const QDomElement& xmlElement) const {
+    if (
+        !xmlElement.hasAttribute("type")
+            || !xmlElement.hasAttribute("name")
+            || !xmlElement.hasAttribute("size")
+            || !xmlElement.hasAttribute("start")
+    ) {
+        throw Exception("Missing type/name/size/start attributes");
+    }
+
+    auto segment = MemorySegment();
+    auto typeName = xmlElement.attribute("type").toStdString();
+    auto type = MemorySegment::typesMappedByName.valueAt(typeName);
+
+    if (!type.has_value()) {
+        throw Exception("Unknown type: \"" + typeName + "\"");
+    }
+
+    segment.type = type.value();
+    segment.name = xmlElement.attribute("name").toLower().toStdString();
+
+    bool conversionStatus;
+    segment.startAddress = xmlElement.attribute("start").toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        // Failed to convert startAddress hex value as string to uint16_t
+        throw Exception("Invalid start address");
+    }
+
+    segment.size = xmlElement.attribute("size").toUInt(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        // Failed to convert size hex value as string to uint16_t
+        throw Exception("Invalid size");
+    }
+
+    if (xmlElement.hasAttribute("pagesize")) {
+        // The page size can be in single byte hexadecimal form ("0x01"), or it can be in plain integer form!
+        auto pageSize = xmlElement.attribute("pagesize");
+        segment.pageSize = pageSize.toUInt(&conversionStatus, pageSize.contains("0x") ? 16 : 10);
+
+        if (!conversionStatus) {
+            // Failed to convert size hex value as string to uint16_t
+            throw Exception("Invalid size");
+        }
+    }
+
+    return segment;
+}
+
+RegisterGroup PartDescriptionFile::generateRegisterGroupFromXml(const QDomElement& xmlElement) const {
+    if (!xmlElement.hasAttribute("name")) {
+        throw Exception("Missing register group name attribute");
+    }
+
+    auto registerGroup = RegisterGroup();
+    registerGroup.name = xmlElement.attribute("name").toLower().toStdString();
+
+    if (registerGroup.name.empty()) {
+        throw Exception("Empty register group name");
+    }
+
+    if (xmlElement.hasAttribute("offset")) {
+        registerGroup.offset = xmlElement.attribute("offset").toInt(nullptr, 16);
+    }
+
+    auto& registers = registerGroup.registersMappedByName;
+    auto registerNodes = xmlElement.elementsByTagName("register");
+    for (int registerIndex = 0; registerIndex < registerNodes.count(); registerIndex++) {
+        try {
+            auto reg = this->generateRegisterFromXml(registerNodes.item(registerIndex).toElement());
+            registers.insert(std::pair(reg.name, reg));
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract register from register group part description element - "
+                              + exception.getMessage());
+        }
+    }
+
+    return registerGroup;
+}
+
+Register PartDescriptionFile::generateRegisterFromXml(const QDomElement& xmlElement) const {
+    if (
+        !xmlElement.hasAttribute("name")
+        || !xmlElement.hasAttribute("offset")
+        || !xmlElement.hasAttribute("size")
+    ) {
+        throw Exception("Missing register name/offset/size attribute");
+    }
+
+    auto reg = Register();
+    reg.name = xmlElement.attribute("name").toLower().toStdString();
+
+    if (reg.name.empty()) {
+        throw Exception("Empty register name");
+    }
+
+    bool conversionStatus;
+    reg.size = xmlElement.attribute("size").toUShort(nullptr, 10);
+    reg.offset = xmlElement.attribute("offset").toUShort(&conversionStatus, 16);
+
+    if (!conversionStatus) {
+        // Failed to convert offset hex value as string to uint16_t
+        throw Exception("Invalid register offset");
+    }
+
+    return reg;
+}
+
+Family PartDescriptionFile::getFamily() const {
+    static auto familyNameToEnums = this->getFamilyNameToEnumMapping();
+    auto familyName = this->deviceElement.attributes().namedItem("family").nodeValue().toLower().toStdString();
+
+    if (familyName.empty()) {
+        throw Exception("Could not find target family name in part description file.");
+    }
+
+    if (familyNameToEnums.find(familyName) == familyNameToEnums.end()) {
+        throw Exception("Unknown family name in part description file.");
+    }
+
+    return familyNameToEnums.find(familyName)->second;
+}
+
+const std::map<std::string, PropertyGroup>& PartDescriptionFile::getPropertyGroupsMappedByName() const {
+    if (!this->cachedPropertyGroupMapping.has_value()) {
+        if (!this->deviceElement.isElement()) {
+            throw PartDescriptionParsingFailureException("Device element not found.");
+        }
+
+        std::map<std::string, PropertyGroup> output;
+        auto propertyGroupNodes = this->deviceElement.elementsByTagName("property-groups").item(0).toElement()
+            .elementsByTagName("property-group");
+
+        for (int propertyGroupIndex = 0; propertyGroupIndex < propertyGroupNodes.count(); propertyGroupIndex++) {
+            auto propertyGroupElement = propertyGroupNodes.item(propertyGroupIndex).toElement();
+            auto propertyGroupName = propertyGroupElement.attributes().namedItem("name").nodeValue().toLower().toStdString();
+            PropertyGroup propertyGroup;
+            propertyGroup.name = propertyGroupName;
+
+            auto propertyNodes = propertyGroupElement.elementsByTagName("property");
+            for (int propertyIndex = 0; propertyIndex < propertyNodes.count(); propertyIndex++) {
+                auto propertyElement = propertyNodes.item(propertyIndex).toElement();
+                auto propertyName = propertyElement.attributes().namedItem("name").nodeValue();
+
+                Property property;
+                property.name = propertyName.toStdString();
+                property.value = propertyElement.attributes().namedItem("value").nodeValue();
+
+                propertyGroup.propertiesMappedByName.insert(std::pair(propertyName.toLower().toStdString(), property));
+            }
+
+            output.insert(std::pair(propertyGroup.name, propertyGroup));
+        }
+
+        this->cachedPropertyGroupMapping.emplace(output);
+    }
+
+    return this->cachedPropertyGroupMapping.value();
+}
+
+const std::map<std::string, Module>& PartDescriptionFile::getModulesMappedByName() const {
+    if (!this->cachedModuleByNameMapping.has_value()) {
+        std::map<std::string, Module> output;
+        auto moduleNodes = this->xml.elementsByTagName("modules").item(0).toElement()
+            .elementsByTagName("module");
+
+        for (int moduleIndex = 0; moduleIndex < moduleNodes.count(); moduleIndex++) {
+            auto moduleElement = moduleNodes.item(moduleIndex).toElement();
+            auto moduleName = moduleElement.attributes().namedItem("name").nodeValue().toLower().toStdString();
+            Module module;
+            module.name = moduleName;
+
+            auto registerGroupNodes = moduleElement.elementsByTagName("register-group");
+            for (int registerGroupIndex = 0; registerGroupIndex < registerGroupNodes.count(); registerGroupIndex++) {
+                auto registerGroup = this->generateRegisterGroupFromXml(registerGroupNodes.item(registerGroupIndex).toElement());
+
+                module.registerGroupsMappedByName.insert(std::pair(registerGroup.name, registerGroup));
+            }
+
+            output.insert(std::pair(module.name, module));
+        }
+
+        this->cachedModuleByNameMapping.emplace(output);
+    }
+
+    return this->cachedModuleByNameMapping.value();
+}
+
+const std::map<std::string, Module>& PartDescriptionFile::getPeripheralModulesMappedByName() const {
+    if (!this->cachedPeripheralModuleByNameMapping.has_value()) {
+        std::map<std::string, Module> output;
+        auto moduleNodes = this->deviceElement.elementsByTagName("peripherals").item(0).toElement()
+            .elementsByTagName("module");
+
+        for (int moduleIndex = 0; moduleIndex < moduleNodes.count(); moduleIndex++) {
+            auto moduleElement = moduleNodes.item(moduleIndex).toElement();
+            auto moduleName = moduleElement.attributes().namedItem("name").nodeValue().toLower().toStdString();
+            Module module;
+            module.name = moduleName;
+
+            auto registerGroupNodes = moduleElement.elementsByTagName("register-group");
+            for (int registerGroupIndex = 0; registerGroupIndex < registerGroupNodes.count(); registerGroupIndex++) {
+                auto registerGroup = this->generateRegisterGroupFromXml(registerGroupNodes.item(registerGroupIndex).toElement());
+
+                module.registerGroupsMappedByName.insert(std::pair(registerGroup.name, registerGroup));
+            }
+
+            auto instanceNodes = moduleElement.elementsByTagName("instance");
+            for (int instanceIndex = 0; instanceIndex < instanceNodes.count(); instanceIndex++) {
+                auto instanceXml = instanceNodes.item(instanceIndex).toElement();
+                auto instance = ModuleInstance();
+                instance.name = instanceXml.attribute("name").toLower().toStdString();
+
+                auto registerGroupNodes = instanceXml.elementsByTagName("register-group");
+                for (int registerGroupIndex = 0; registerGroupIndex < registerGroupNodes.count(); registerGroupIndex++) {
+                    auto registerGroup = this->generateRegisterGroupFromXml(registerGroupNodes.item(registerGroupIndex).toElement());
+
+                    instance.registerGroupsMappedByName.insert(std::pair(registerGroup.name, registerGroup));
+                }
+
+                auto signalNodes = instanceXml.elementsByTagName("signals").item(0).toElement()
+                    .elementsByTagName("signal");
+                for (int signalIndex = 0; signalIndex < signalNodes.count(); signalIndex++) {
+                    auto signalXml = signalNodes.item(signalIndex).toElement();
+                    auto signal = Signal();
+
+                    if (!signalXml.hasAttribute("pad")) {
+                        continue;
+                    }
+
+                    signal.padName = signalXml.attribute("pad").toLower().toStdString();
+                    signal.function = signalXml.attribute("function").toStdString();
+                    signal.group = signalXml.attribute("group").toStdString();
+                    auto indexAttribute = signalXml.attribute("index");
+                    bool indexValid = false;
+                    auto indexValue = indexAttribute.toInt(&indexValid, 10);
+
+                    if (!indexAttribute.isEmpty() && indexValid) {
+                        signal.index = indexValue;
+                    }
+
+                    instance.instanceSignals.emplace_back(signal);
+                }
+
+                module.instancesMappedByName.insert(std::pair(instance.name, instance));
+            }
+
+            output.insert(std::pair(module.name, module));
+        }
+
+        this->cachedPeripheralModuleByNameMapping.emplace(output);
+    }
+
+    return this->cachedPeripheralModuleByNameMapping.value();
+}
+
+std::map<std::string, AddressSpace> PartDescriptionFile::getAddressSpacesMappedById() const {
+    std::map<std::string, AddressSpace> output;
+
+    auto addressSpaceNodes = this->deviceElement.elementsByTagName("address-spaces").item(0).toElement()
+        .elementsByTagName("address-space");
+
+    for (int addressSpaceIndex = 0; addressSpaceIndex < addressSpaceNodes.count(); addressSpaceIndex++) {
+        try {
+            auto addressSpace = this->generateAddressSpaceFromXml(addressSpaceNodes.item(addressSpaceIndex).toElement());
+            output.insert(std::pair(addressSpace.id, addressSpace));
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract address space from part description element - " + exception.getMessage());
+        }
+    }
+
+    return output;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getFlashMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+    auto programAddressSpaceIt = addressMapping.find("prog");
+
+    // Flash memory attributes are typically found in memory segments within the program address space.
+    if (programAddressSpaceIt != addressMapping.end()) {
+        auto& programAddressSpace = programAddressSpaceIt->second;
+        auto& programMemorySegments = programAddressSpace.memorySegmentsByTypeAndName;
+
+        if (programMemorySegments.find(MemorySegmentType::FLASH) != programMemorySegments.end()) {
+            auto& flashMemorySegments = programMemorySegments.find(MemorySegmentType::FLASH)->second;
+
+            /*
+             * Some part descriptions describe the flash memory segments in the "APP_SECTION" segment, whereas
+             * others use the "FLASH" segment.
+             */
+            auto flashSegmentIt = flashMemorySegments.find("app_section") != flashMemorySegments.end() ?
+                                  flashMemorySegments.find("app_section") : flashMemorySegments.find("flash");
+
+            if (flashSegmentIt != flashMemorySegments.end()) {
+                return flashSegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getRamMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+
+    // Internal RAM  &register attributes are usually found in the data address space
+    auto dataAddressSpaceIt = addressMapping.find("data");
+
+    if (dataAddressSpaceIt != addressMapping.end()) {
+        auto& dataAddressSpace = dataAddressSpaceIt->second;
+        auto& dataMemorySegments = dataAddressSpace.memorySegmentsByTypeAndName;
+
+        if (dataMemorySegments.find(MemorySegmentType::RAM) != dataMemorySegments.end()) {
+            auto& ramMemorySegments = dataMemorySegments.find(MemorySegmentType::RAM)->second;
+            auto ramMemorySegmentIt = ramMemorySegments.begin();
+
+            if (ramMemorySegmentIt != ramMemorySegments.end()) {
+                return ramMemorySegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getRegisterMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+
+    // Internal RAM  &register attributes are usually found in the data address space
+    auto dataAddressSpaceIt = addressMapping.find("data");
+
+    if (dataAddressSpaceIt != addressMapping.end()) {
+        auto& dataAddressSpace = dataAddressSpaceIt->second;
+        auto& dataMemorySegments = dataAddressSpace.memorySegmentsByTypeAndName;
+
+        if (dataMemorySegments.find(MemorySegmentType::REGISTERS) != dataMemorySegments.end()) {
+            auto& registerMemorySegments = dataMemorySegments.find(MemorySegmentType::REGISTERS)->second;
+            auto registerMemorySegmentIt = registerMemorySegments.begin();
+
+            if (registerMemorySegmentIt != registerMemorySegments.end()) {
+                return registerMemorySegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getEepromMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+
+    // EEPROM attributes are usually found in the data address space
+    auto eepromAddressSpaceIt = addressMapping.find("eeprom");
+
+    if (eepromAddressSpaceIt != addressMapping.end()) {
+        auto& eepromAddressSpace = eepromAddressSpaceIt->second;
+        auto& eepromAddressSpaceSegments = eepromAddressSpace.memorySegmentsByTypeAndName;
+
+        if (eepromAddressSpaceSegments.find(MemorySegmentType::EEPROM) != eepromAddressSpaceSegments.end()) {
+            auto& eepromMemorySegments = eepromAddressSpaceSegments.find(MemorySegmentType::EEPROM)->second;
+            auto eepromMemorySegmentIt = eepromMemorySegments.begin();
+
+            if (eepromMemorySegmentIt != eepromMemorySegments.end()) {
+                return eepromMemorySegmentIt->second;
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<MemorySegment> PartDescriptionFile::getFirstBootSectionMemorySegment() const {
+    auto addressMapping = this->getAddressSpacesMappedById();
+    auto programAddressSpaceIt = addressMapping.find("prog");
+
+    if (programAddressSpaceIt != addressMapping.end()) {
+        auto& programAddressSpace = programAddressSpaceIt->second;
+        auto& programMemorySegments = programAddressSpace.memorySegmentsByTypeAndName;
+
+        if (programMemorySegments.find(MemorySegmentType::FLASH) != programMemorySegments.end()) {
+            auto& flashMemorySegments = programMemorySegments.find(MemorySegmentType::FLASH)->second;
+            auto firstBootSectionSegmentIt = flashMemorySegments.find("boot_section_1");
+
+            if (flashMemorySegments.contains("boot_section_1")) {
+                return flashMemorySegments.at("boot_section_1");
+
+            } else if (flashMemorySegments.contains("boot_section")) {
+                return flashMemorySegments.at("boot_section");
+            }
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<RegisterGroup> PartDescriptionFile::getCpuRegisterGroup() const {
+    auto& modulesByName = this->getModulesMappedByName();
+
+    if (modulesByName.find("cpu") != modulesByName.end()) {
+        auto cpuModule = modulesByName.find("cpu")->second;
+        auto cpuRegisterGroupIt = cpuModule.registerGroupsMappedByName.find("cpu");
+
+        if (cpuRegisterGroupIt != cpuModule.registerGroupsMappedByName.end()) {
+            return cpuRegisterGroupIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<RegisterGroup> PartDescriptionFile::getEepromRegisterGroup() const {
+    auto& modulesByName = this->getModulesMappedByName();
+
+    if (modulesByName.find("eeprom") != modulesByName.end()) {
+        auto eepromModule = modulesByName.find("eeprom")->second;
+        auto eepromRegisterGroupIt = eepromModule.registerGroupsMappedByName.find("eeprom");
+
+        if (eepromRegisterGroupIt != eepromModule.registerGroupsMappedByName.end()) {
+            return eepromRegisterGroupIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStatusRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto statusRegisterIt = cpuRegisterGroup->registersMappedByName.find("sreg");
+
+        if (statusRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return statusRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStackPointerRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto stackPointerRegisterIt = cpuRegisterGroup->registersMappedByName.find("sp");
+
+        if (stackPointerRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return stackPointerRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStackPointerHighRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto stackPointerHighRegisterIt = cpuRegisterGroup->registersMappedByName.find("sph");
+
+        if (stackPointerHighRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return stackPointerHighRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getStackPointerLowRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto stackPointerLowRegisterIt = cpuRegisterGroup->registersMappedByName.find("spl");
+
+        if (stackPointerLowRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return stackPointerLowRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getOscillatorCalibrationRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto osccalRegisterIt = cpuRegisterGroup->registersMappedByName.find("osccal");
+
+        if (osccalRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return osccalRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getSpmcsrRegister() const {
+    auto cpuRegisterGroup = this->getCpuRegisterGroup();
+
+    if (cpuRegisterGroup.has_value()) {
+        auto spmcsrRegisterIt = cpuRegisterGroup->registersMappedByName.find("spmcsr");
+
+        if (spmcsrRegisterIt != cpuRegisterGroup->registersMappedByName.end()) {
+            return spmcsrRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getEepromAddressRegister() const {
+    auto eepromRegisterGroup = this->getEepromRegisterGroup();
+
+    if (eepromRegisterGroup.has_value()) {
+        auto eepromAddressRegisterIt = eepromRegisterGroup->registersMappedByName.find("eear");
+
+        if (eepromAddressRegisterIt != eepromRegisterGroup->registersMappedByName.end()) {
+            return eepromAddressRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getEepromDataRegister() const {
+    auto eepromRegisterGroup = this->getEepromRegisterGroup();
+
+    if (eepromRegisterGroup.has_value()) {
+        auto eepromDataRegisterIt = eepromRegisterGroup->registersMappedByName.find("eedr");
+
+        if (eepromDataRegisterIt != eepromRegisterGroup->registersMappedByName.end()) {
+            return eepromDataRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::optional<Register> PartDescriptionFile::getEepromControlRegister() const {
+    auto eepromRegisterGroup = this->getEepromRegisterGroup();
+
+    if (eepromRegisterGroup.has_value()) {
+        auto eepromControlRegisterIt = eepromRegisterGroup->registersMappedByName.find("eecr");
+
+        if (eepromControlRegisterIt != eepromRegisterGroup->registersMappedByName.end()) {
+            return eepromControlRegisterIt->second;
+        }
+    }
+
+    return std::nullopt;
+}
+
+std::vector<Variant> PartDescriptionFile::getVariants() const {
+    std::vector<Variant> output;
+
+    auto variantNodes = this->xml.elementsByTagName("variants").item(0).toElement()
+        .elementsByTagName("variant");
+
+    for (int variantIndex = 0; variantIndex < variantNodes.count(); variantIndex++) {
+        try {
+            auto variantXml = variantNodes.item(variantIndex).toElement();
+
+            if (!variantXml.hasAttribute("ordercode")) {
+                throw Exception("Missing ordercode attribute");
+            }
+
+            if (!variantXml.hasAttribute("package")) {
+                throw Exception("Missing package attribute");
+            }
+
+            if (!variantXml.hasAttribute("pinout")) {
+                throw Exception("Missing pinout attribute");
+            }
+
+            auto variant = Variant();
+            variant.orderCode = variantXml.attribute("ordercode").toStdString();
+            variant.pinoutName = variantXml.attribute("pinout").toLower().toStdString();
+            variant.package = variantXml.attribute("package").toUpper().toStdString();
+
+            if (variantXml.hasAttribute("disabled")) {
+                variant.disabled = (variantXml.attribute("disabled") == "1");
+            }
+
+            output.push_back(variant);
+
+        } catch (const Exception& exception) {
+            Logger::debug("Failed to extract variant from part description element - " + exception.getMessage());
+        }
+    }
+
+    return output;
+}
+
+const std::map<std::string, Pinout>& PartDescriptionFile::getPinoutsMappedByName() const {
+    if (!this->cachedPinoutByNameMapping.has_value()) {
+        this->cachedPinoutByNameMapping = std::map<std::string, Pinout>();
+
+        auto pinoutNodes = this->xml.elementsByTagName("pinouts").item(0).toElement()
+            .elementsByTagName("pinout");
+
+        for (int pinoutIndex = 0; pinoutIndex < pinoutNodes.count(); pinoutIndex++) {
+            try {
+                auto pinoutXml = pinoutNodes.item(pinoutIndex).toElement();
+
+                if (!pinoutXml.hasAttribute("name")) {
+                    throw Exception("Missing name attribute");
+                }
+
+                auto pinout = Pinout();
+                pinout.name = pinoutXml.attribute("name").toLower().toStdString();
+
+                auto pinNodes = pinoutXml.elementsByTagName("pin");
+
+                for (int pinIndex = 0; pinIndex < pinNodes.count(); pinIndex++) {
+                    auto pinXml = pinNodes.item(pinIndex).toElement();
+
+                    if (!pinXml.hasAttribute("position")) {
+                        throw Exception("Missing position attribute on pin element " + std::to_string(pinIndex));
+                    }
+
+                    if (!pinXml.hasAttribute("pad")) {
+                        throw Exception("Missing pad attribute on pin element " + std::to_string(pinIndex));
+                    }
+
+                    auto pin = Pin();
+                    bool positionConversionSucceeded = true;
+                    pin.position = pinXml.attribute("position").toInt(&positionConversionSucceeded, 10);
+                    pin.pad = pinXml.attribute("pad").toLower().toStdString();
+
+                    if (!positionConversionSucceeded) {
+                        throw Exception("Failed to convert position attribute value to integer on pin element "
+                                            + std::to_string(pinIndex));
+                    }
+
+                    pinout.pins.push_back(pin);
+                }
+
+                this->cachedPinoutByNameMapping->insert(std::pair(pinout.name, pinout));
+
+            } catch (const Exception& exception) {
+                Logger::debug("Failed to extract pinout from part description element - " + exception.getMessage());
+            }
+        }
+    }
+
+    return this->cachedPinoutByNameMapping.value();
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.hpp
new file mode 100644
index 00000000..d22abceb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/PartDescriptionFile.hpp
@@ -0,0 +1,174 @@
+#pragma once
+
+#include <QFile>
+#include <QDomDocument>
+
+#include "AddressSpace.hpp"
+#include "MemorySegment.hpp"
+#include "PropertyGroup.hpp"
+#include "RegisterGroup.hpp"
+#include "Module.hpp"
+#include "Variant.hpp"
+#include "Pinout.hpp"
+#include "src/Targets/Microchip/AVR/TargetSignature.hpp"
+#include "src/Targets/Microchip/AVR/AVR8/Family.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    using Avr::TargetSignature;
+
+    /**
+     * An AVR8 part description file is an XML file that describes a particular AVR8 target.
+     * All supported AVR8 targets come with a part description file.
+     *
+     * Part description files are part of the Bloom codebase.
+     * For AVR8 part description files, see directory "src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8".
+     *
+     * During the build process, all part description files are copied to the distribution directory, ready
+     * to be shipped with the Bloom binary. Alongside these files is a JSON file, containing a mapping of AVR8 target
+     * signatures to part description file paths. Bloom uses this mapping to find a particular part description
+     * file, given a target signature. See directory "bin/Distribution/Resources/TargetPartDescriptions".
+     * The copying of the part description files, and the generation of the JSON mapping, is done by a PHP script:
+     * "build/scripts/CopyAvrPartFilesAndCreateMapping.php". This script is invoked via a custom command, at build time.
+     *
+     * All processing of AVR8 part description files is done in this class.
+     */
+    class PartDescriptionFile
+    {
+    private:
+        QDomDocument xml;
+        QDomElement deviceElement;
+        mutable std::optional<std::map<std::string, PropertyGroup>> cachedPropertyGroupMapping;
+        mutable std::optional<std::map<std::string, Module>> cachedModuleByNameMapping;
+        mutable std::optional<std::map<std::string, Module>> cachedPeripheralModuleByNameMapping;
+        mutable std::optional<std::map<std::string, Pinout>> cachedPinoutByNameMapping;
+
+        /**`
+         * AVR8 part description files include the target family name. This method returns a mapping of part
+         * description family name strings to Family enum values.
+         *
+         * TODO: the difference in AVR8 family variations, like "tinyAVR" and "tinyAVR 2" may require attention.
+         *
+         * @return
+         */
+        static inline auto getFamilyNameToEnumMapping() {
+            // All keys should be lower case.
+            return std::map<std::string, Family> {
+                {"megaavr", Family::MEGA},
+                {"avr mega", Family::MEGA},
+                {"avr xmega", Family::XMEGA},
+                {"avr tiny", Family::TINY},
+                {"tinyavr", Family::TINY},
+                {"tinyavr 2", Family::TINY},
+            };
+        };
+
+        void init(const QDomDocument& xml);
+        void init(const QString& xmlFilePath);
+
+        /**
+         * Constructs an AddressSpace object from an XML element (in the form of a QDomElement), taken from
+         * an AVR part description file.
+         *
+         * @param xmlElement
+         * @return
+         */
+        AddressSpace generateAddressSpaceFromXml(const QDomElement& xmlElement) const;
+
+        /**
+         * Constructs a MemorySegment from an XML element (in the form of a QDomElement) taken from
+         * an AVR part description file.
+         *
+         * @param xmlElement
+         * @return
+         */
+        MemorySegment generateMemorySegmentFromXml(const QDomElement& xmlElement) const;
+        RegisterGroup generateRegisterGroupFromXml(const QDomElement& xmlElement) const;
+
+        Register generateRegisterFromXml(const QDomElement& xmlElement) const;
+
+    public:
+        /**
+         * Will construct a PartDescription instance from the XML of a part description file, the path to which
+         * is given via xmlFilePath.
+         *
+         * @param xmlFilePath
+         */
+        PartDescriptionFile(const QString& xmlFilePath) {
+            this->init(xmlFilePath);
+        }
+
+        /**
+         * Will construct a PartDescription instance from pre-loaded XML.
+         *
+         * @param xml
+         */
+        PartDescriptionFile(const QDomDocument& xml) {
+            this->init(xml);
+        }
+
+        /**
+         * Will resolve the part description file using the part description JSON mapping and a given target signature.
+         *
+         * @param targetSignatureHex
+         * @param targetName
+         */
+        PartDescriptionFile(const std::string& targetSignatureHex, std::optional<std::string> targetName);
+
+        /**
+         * Loads the AVR8 target description JSON mapping file.
+         *
+         * @return
+         */
+        static QJsonObject getPartDescriptionMapping();
+
+        std::string getTargetName() const;
+
+
+        /**
+         * Extracts the AVR8 target signature from the part description XML.
+         *
+         * @return
+         */
+        TargetSignature getTargetSignature() const;
+
+        /**
+         * Extracts all address spaces for the AVR8 target, from the part description XML.
+         *
+         * Will return a mapping of the extracted address spaces, mapped by id.
+         *
+         * @return
+         */
+        std::map<std::string, AddressSpace> getAddressSpacesMappedById() const;
+
+        /**
+         * Extracts the AVR8 target family from the part description XML.
+         *
+         * @return
+         */
+        Family getFamily() const;
+
+        const std::map<std::string, PropertyGroup>& getPropertyGroupsMappedByName() const;
+        const std::map<std::string, Module>& getModulesMappedByName() const;
+        const std::map<std::string, Module>& getPeripheralModulesMappedByName() const;
+
+        std::optional<MemorySegment> getFlashMemorySegment() const;
+        std::optional<MemorySegment> getRamMemorySegment() const;
+        std::optional<MemorySegment> getRegisterMemorySegment() const;
+        std::optional<MemorySegment> getEepromMemorySegment() const;
+        std::optional<MemorySegment> getFirstBootSectionMemorySegment() const;
+        std::optional<RegisterGroup> getCpuRegisterGroup() const;
+        std::optional<RegisterGroup> getEepromRegisterGroup() const;
+        std::optional<Register> getStatusRegister() const;
+        std::optional<Register> getStackPointerRegister() const;
+        std::optional<Register> getStackPointerHighRegister() const;
+        std::optional<Register> getStackPointerLowRegister() const;
+        std::optional<Register> getOscillatorCalibrationRegister() const;
+        std::optional<Register> getSpmcsrRegister() const;
+        std::optional<Register> getEepromAddressRegister() const;
+        std::optional<Register> getEepromDataRegister() const;
+        std::optional<Register> getEepromControlRegister() const;
+        std::vector<Variant> getVariants() const;
+        const std::map<std::string, Pinout>& getPinoutsMappedByName() const;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/Pinout.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/Pinout.hpp
new file mode 100644
index 00000000..34c259dc
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/Pinout.hpp
@@ -0,0 +1,17 @@
+#pragma once
+
+#include <string>
+#include <vector>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Pin {
+        std::string pad;
+        int position;
+    };
+
+    struct Pinout {
+        std::string name;
+        std::vector<Pin> pins;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/PropertyGroup.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/PropertyGroup.hpp
new file mode 100644
index 00000000..b306ddce
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/PropertyGroup.hpp
@@ -0,0 +1,19 @@
+#pragma once
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Property {
+        std::string name;
+
+        /*
+         * We use QString here as we're dealing with arbitrary values and QString provides many helpful
+         * functions to make this easier.
+         */
+        QString value;
+    };
+
+    struct PropertyGroup {
+        std::string name;
+        std::map<std::string, Property> propertiesMappedByName;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/RegisterGroup.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/RegisterGroup.hpp
new file mode 100644
index 00000000..ad0d24af
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/RegisterGroup.hpp
@@ -0,0 +1,20 @@
+#pragma once
+
+#include <cstdint>
+#include <map>
+#include <optional>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Register {
+        std::string name;
+        std::uint16_t offset;
+        std::uint16_t size;
+    };
+
+    struct RegisterGroup {
+        std::string name;
+        std::optional<std::uint16_t> offset;
+        std::map<std::string, Register> registersMappedByName;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/Signal.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/Signal.hpp
new file mode 100644
index 00000000..e0a3120d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/Signal.hpp
@@ -0,0 +1,14 @@
+#pragma once
+
+#include <string>
+#include <optional>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Signal {
+        std::string padName;
+        std::string function;
+        std::optional<int> index;
+        std::string group;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/PartDescription/Variant.hpp b/src/Targets/Microchip/AVR/AVR8/PartDescription/Variant.hpp
new file mode 100644
index 00000000..6b6f4fe1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/PartDescription/Variant.hpp
@@ -0,0 +1,13 @@
+#pragma once
+
+#include <string>
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit::PartDescription
+{
+    struct Variant {
+        std::string orderCode;
+        std::string pinoutName;
+        std::string package;
+        bool disabled = false;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp b/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp
new file mode 100644
index 00000000..9a6dcfeb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/TargetParameters.hpp
@@ -0,0 +1,54 @@
+#pragma once
+
+#include <cstdint>
+#include <optional>
+
+#include "src/Targets/Microchip/AVR/AVR8/PartDescription/AddressSpace.hpp"
+#include "../TargetSignature.hpp"
+#include "Family.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    struct TargetParameters
+    {
+        std::optional<Family> family;
+
+        std::optional<std::uint32_t> bootSectionStartAddress;
+        std::optional<std::uint32_t> gpRegisterStartAddress;
+        std::optional<std::uint32_t> gpRegisterSize;
+        std::optional<std::uint16_t> flashPageSize;
+        std::optional<std::uint32_t> flashSize;
+        std::optional<std::uint32_t> flashStartAddress;
+        std::optional<std::uint16_t> ramStartAddress;
+        std::optional<std::uint32_t> ramSize;
+        std::optional<std::uint16_t> eepromSize;
+        std::optional<std::uint16_t> eepromPageSize;
+        std::optional<std::uint8_t> eepromAddressRegisterHigh;
+        std::optional<std::uint8_t> eepromAddressRegisterLow;
+        std::optional<std::uint8_t> eepromDataRegisterAddress;
+        std::optional<std::uint8_t> eepromControlRegisterAddress;
+        std::optional<std::uint8_t> ocdRevision;
+        std::optional<std::uint8_t> ocdDataRegister;
+        std::optional<std::uint16_t> statusRegisterStartAddress;
+        std::optional<std::uint16_t> statusRegisterSize;
+        std::optional<std::uint16_t> stackPointerRegisterStartAddress;
+        std::optional<std::uint16_t> stackPointerRegisterSize;
+        std::optional<std::uint8_t> spmcsRegisterStartAddress;
+        std::optional<std::uint8_t> osccalAddress;
+
+        // XMega/PDI specific target params
+        std::optional<std::uint32_t> appSectionPdiOffset;
+        std::optional<std::uint16_t> bootSectionSize;
+        std::optional<std::uint32_t> bootSectionPdiOffset;
+        std::optional<std::uint32_t> eepromPdiOffset;
+        std::optional<std::uint32_t> ramPdiOffset;
+        std::optional<std::uint32_t> fuseRegistersPdiOffset;
+        std::optional<std::uint32_t> lockRegistersPdiOffset;
+        std::optional<std::uint32_t> userSignaturesPdiOffset;
+        std::optional<std::uint32_t> productSignaturesPdiOffset;
+
+
+        std::optional<std::uint32_t> ioPortAddressRangeStart;
+        std::optional<std::uint32_t> ioPortAddressRangeEnd;
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/Tiny/Tiny.hpp b/src/Targets/Microchip/AVR/AVR8/Tiny/Tiny.hpp
new file mode 100644
index 00000000..ae98c941
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/Tiny/Tiny.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "src/Targets/Microchip/AVR/AVR8/Avr8.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    class Tiny: public Avr8
+    {
+    public:
+        Tiny(const Avr8& avr8) : Avr8(avr8) {};
+
+        virtual bool supportsPromotion() override {
+            return false;
+        }
+    };
+}
diff --git a/src/Targets/Microchip/AVR/AVR8/XMega/XMega.hpp b/src/Targets/Microchip/AVR/AVR8/XMega/XMega.hpp
new file mode 100644
index 00000000..ae475dcd
--- /dev/null
+++ b/src/Targets/Microchip/AVR/AVR8/XMega/XMega.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include "src/Targets/Microchip/AVR/AVR8/Avr8.hpp"
+
+namespace Bloom::Targets::Microchip::Avr::Avr8Bit
+{
+    class XMega: public Avr8
+    {
+    public:
+        XMega(const Avr8& avr8) : Avr8(avr8) {};
+
+        virtual bool supportsPromotion() override {
+            return false;
+        }
+    };
+}
diff --git a/src/Targets/Microchip/AVR/Exceptions/PartDescriptionParsingFailureException.hpp b/src/Targets/Microchip/AVR/Exceptions/PartDescriptionParsingFailureException.hpp
new file mode 100644
index 00000000..350ed853
--- /dev/null
+++ b/src/Targets/Microchip/AVR/Exceptions/PartDescriptionParsingFailureException.hpp
@@ -0,0 +1,20 @@
+#pragma once
+
+#include "src/Exceptions/TargetControllerStartupFailure.hpp"
+
+namespace Bloom::Exceptions
+{
+    class PartDescriptionParsingFailureException: public Exception
+    {
+    public:
+        explicit PartDescriptionParsingFailureException(const std::string& message)
+        : Exception(message) {
+            this->message = "Failed to parse AVR part description file - " + message;
+        }
+
+        explicit PartDescriptionParsingFailureException(const char* message)
+        : Exception(message) {
+            this->message = "Failed to parse AVR part description file - " + std::string(message);
+        }
+    };
+}
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN128.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN128.xml
new file mode 100644
index 00000000..1dbfbf40
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN128.xml
@@ -0,0 +1,1654 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="AT90CAN128-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN128-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90CAN128" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PC7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                        <signals>
+                            <signal group="TXCAN" function="default" pad="PD5"/>
+                            <signal group="RXCAN" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CANIT" caption="CAN Transfer Complete or Error"/>
+                <interrupt index="19" name="OVRIT" caption="CAN Timer Overrun"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="22" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="23" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="24" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="25" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="28" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="29" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="30" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="31" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="32" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="33" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="34" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="35" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="36" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0978103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x81"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Reserved for factory tests" mask="0x01" name="TA0SEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally; [CKDIV8=0]" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7; [CKOUT=0]" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.1 V" name="4V1" value="0x06"/>
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x05"/>
+                <value caption="Brown-out detection at VCC=3.9 V" name="3V9" value="0x04"/>
+                <value caption="Brown-out detection at VCC=3.8 V" name="3V8" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.5 V" name="2V5" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data Register" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register t Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register t Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS_XMEM"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="RAM Page Z Select Register Bit 0" mask="0x01" name="RAMPZ0"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS_XMEM">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = XMEMSTART - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = XMEMSTART - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = XMEMSTART - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = XMEMSTART - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = XMEMSTART - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = XMEMSTART - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = XMEMSTART - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVRG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register" name="CANGIT" offset="0xDA" size="1" ocd-rw="R">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off INterrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register" name="CANEN2" offset="0xDC" size="1" mask="0xFF" ocd-rw="R">
+                    <bitfield caption="Enable MOb" mask="0xFF" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register" name="CANEN1" offset="0xDD" size="1" mask="0x7F" ocd-rw="R">
+                    <bitfield caption="Enable MOb" mask="0x7F" name="ENMOB" lsb="8"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register" name="CANIE2" offset="0xDE" size="1" mask="0xFF">
+                    <bitfield caption="Interrupt Enable by MOb" mask="0xFF" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register" name="CANIE1" offset="0xDF" size="1" mask="0x7F">
+                    <bitfield caption="Interrupt Enable by MOb" mask="0x7F" name="IEMOB" lsb="8"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt by MOb" mask="0xFF" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt by MOb" mask="0x7F" name="SIT" lsb="8"/>
+                </register>
+                <register caption="Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segments" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF">
+                    <bitfield caption="CAN Timer Prescaler" mask="0xFF" name="TPRSC"/>
+                </register>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" ocd-rw="R">
+                    <bitfield caption="CAN Timer Count" mask="0xFFFF" name="CANTIM"/>
+                </register>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" ocd-rw="R">
+                    <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
+                </register>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Trasnmit Error Count" mask="0xFF" name="TEC"/>
+                </register>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Receive Error Count" mask="0xFF" name="REC"/>
+                </register>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb number" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General purpose bits" mask="0x0F" name="CGP" rw="R"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number Bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index Bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config Bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code Bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Trasnmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF" ocd-rw="R">
+                    <bitfield caption="Time Stamp Count" mask="0xFFFF" name="TIMSTM"/>
+                </register>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF">
+                    <bitfield caption="Message Data" mask="0xFF" name="MSG"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN32.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN32.xml
new file mode 100644
index 00000000..ec91fef4
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN32.xml
@@ -0,0 +1,1630 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="AT90CAN32-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN32-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90CAN32" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x6000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x0900" size="0xf700" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PC7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                        <signals>
+                            <signal group="TXCAN" function="default" pad="PD5"/>
+                            <signal group="RXCAN" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CANIT" caption="CAN Transfer Complete or Error"/>
+                <interrupt index="19" name="OVRIT" caption="CAN Timer Overrun"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="22" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="23" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="24" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="25" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="28" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="29" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="30" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="31" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="32" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="33" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="34" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="35" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="36" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0958103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x81"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Reserved for factory tests" mask="0x01" name="TA0SEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally; [CKDIV8=0]" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7; [CKOUT=0]" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_1KCK_65MS" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$3000" name="4096W_3000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.1 V" name="4V1" value="0x06"/>
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x05"/>
+                <value caption="Brown-out detection at VCC=3.9 V" name="3V9" value="0x04"/>
+                <value caption="Brown-out detection at VCC=3.8 V" name="3V8" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.5 V" name="2V5" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data Register" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register t Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register t Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS_XMEM"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="RAM Page Z Select Register - Not used." name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="RAM Page Z Select Register Bit 0" mask="0x01" name="RAMPZ0"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS_XMEM">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = XMEMSTART - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = XMEMSTART - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = XMEMSTART - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = XMEMSTART - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = XMEMSTART - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = XMEMSTART - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = XMEMSTART - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVRG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register" name="CANGIT" offset="0xDA" size="1" ocd-rw="R">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off INterrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register" name="CANEN2" offset="0xDC" size="1" mask="0xFF" ocd-rw="R">
+                    <bitfield caption="Enable MOb" mask="0xFF" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register" name="CANEN1" offset="0xDD" size="1" mask="0x7F" ocd-rw="R">
+                    <bitfield caption="Enable MOb" mask="0x7F" name="ENMOB" lsb="8"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register" name="CANIE2" offset="0xDE" size="1" mask="0xFF">
+                    <bitfield caption="Interrupt Enable by MOb" mask="0xFF" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register" name="CANIE1" offset="0xDF" size="1" mask="0x7F">
+                    <bitfield caption="Interrupt Enable by MOb" mask="0x7F" name="IEMOB" lsb="8"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt by MOb" mask="0xFF" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt by MOb" mask="0x7F" name="SIT" lsb="8"/>
+                </register>
+                <register caption="Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segments" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF">
+                    <bitfield caption="CAN Timer Prescaler" mask="0xFF" name="TPRSC"/>
+                </register>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" ocd-rw="R">
+                    <bitfield caption="CAN Timer Count" mask="0xFFFF" name="CANTIM"/>
+                </register>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" ocd-rw="R">
+                    <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
+                </register>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Trasnmit Error Count" mask="0xFF" name="TEC"/>
+                </register>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Receive Error Count" mask="0xFF" name="REC"/>
+                </register>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb number" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General purpose bits" mask="0x0F" name="CGP" rw="R"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number Bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index Bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config Bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code Bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Trasnmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF" ocd-rw="R">
+                    <bitfield caption="Time Stamp Count" mask="0xFFFF" name="TIMSTM"/>
+                </register>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF">
+                    <bitfield caption="Message Data" mask="0xFF" name="MSG"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN64.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN64.xml
new file mode 100644
index 00000000..3eeb4064
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90CAN64.xml
@@ -0,0 +1,1632 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="AT90CAN64-16AI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16MI" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="AT90CAN64-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90CAN64" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PC7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                        <signals>
+                            <signal group="TXCAN" function="default" pad="PD5"/>
+                            <signal group="RXCAN" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CANIT" caption="CAN Transfer Complete or Error"/>
+                <interrupt index="19" name="OVRIT" caption="CAN Timer Overrun"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="22" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="23" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="24" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="25" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="28" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="29" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="30" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="31" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="32" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="33" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="34" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="35" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="36" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0968103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x81"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x01"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Reserved for factory tests" mask="0x01" name="TA0SEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally; [CKDIV8=0]" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7; [CKOUT=0]" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_16MHZ_1KCK_65MS" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection level at VCC=4.1 V" name="4V1" value="0x06"/>
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x05"/>
+                <value caption="Brown-out detection level at VCC=3.9 V" name="3V9" value="0x04"/>
+                <value caption="Brown-out detection level at VCC=3.8 V" name="3V8" value="0x03"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x02"/>
+                <value caption="Brown-out detection level at VCC=2.6 V" name="2V6" value="0x01"/>
+                <value caption="Brown-out detection level at VCC=2.5 V" name="2V5" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data Register" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register t Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register t Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS_XMEM"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="RAM Page Z Select Register - Not used." name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="RAM Page Z Select Register Bit 0" mask="0x01" name="RAMPZ0"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS_XMEM">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = XMEMSTART - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = XMEMSTART - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = XMEMSTART - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = XMEMSTART - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = XMEMSTART - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = XMEMSTART - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = XMEMSTART - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register
+                        caption="EEPROM Read/Write Access Bytes - Only bit 10..8 are used in AT90CAN64 - Only bit 9..8 are used in AT90CAN32"
+                        name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareC Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareC Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVRG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register" name="CANGIT" offset="0xDA" size="1" ocd-rw="R">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off INterrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register" name="CANEN2" offset="0xDC" size="1" mask="0xFF" ocd-rw="R">
+                    <bitfield caption="Enable MOb" mask="0xFF" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register" name="CANEN1" offset="0xDD" size="1" mask="0x7F" ocd-rw="R">
+                    <bitfield caption="Enable MOb" mask="0x7F" name="ENMOB" lsb="8"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register" name="CANIE2" offset="0xDE" size="1" mask="0xFF">
+                    <bitfield caption="Interrupt Enable by MOb" mask="0xFF" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register" name="CANIE1" offset="0xDF" size="1" mask="0x7F">
+                    <bitfield caption="Interrupt Enable by MOb" mask="0x7F" name="IEMOB" lsb="8"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT2" offset="0xE0" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt by MOb" mask="0xFF" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register" name="CANSIT1" offset="0xE1" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt by MOb" mask="0x7F" name="SIT" lsb="8"/>
+                </register>
+                <register caption="Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segments" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF">
+                    <bitfield caption="CAN Timer Prescaler" mask="0xFF" name="TPRSC"/>
+                </register>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" ocd-rw="R">
+                    <bitfield caption="CAN Timer Count" mask="0xFFFF" name="CANTIM"/>
+                </register>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" ocd-rw="R">
+                    <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
+                </register>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Trasnmit Error Count" mask="0xFF" name="TEC"/>
+                </register>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Receive Error Count" mask="0xFF" name="REC"/>
+                </register>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb number" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General purpose bits" mask="0x0F" name="CGP" rw="R"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number Bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index Bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config Bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code Bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Trasnmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF" ocd-rw="R">
+                    <bitfield caption="Time Stamp Count" mask="0xFFFF" name="TIMSTM"/>
+                </register>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF">
+                    <bitfield caption="Message Data" mask="0xFF" name="MSG"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM1.xml
new file mode 100644
index 00000000..19da97d6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM1.xml
@@ -0,0 +1,1133 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC1" caption="Power Stage Controller">
+                        <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
+                <interrupt index="4" name="PSC1_EC" caption="PSC1 End Cycle"/>
+                <interrupt index="5" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="6" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_0" caption="Analog Comparator 0"/>
+                <interrupt index="8" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="9" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="RESERVED15" caption=""/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP_A" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="19" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="22" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="23" name="USART_TX" caption="USART, Tx Complete"/>
+                <interrupt index="24" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="25" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER0_COMPB" caption="Timer Counter 0 Compare Match B"/>
+                <interrupt index="28" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="29" name="RESERVED30" caption=""/>
+                <interrupt index="30" name="RESERVED31" caption=""/>
+                <interrupt index="31" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9383"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x83"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="64"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="4"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSCOUT Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register" name="PICR0" offset="0xDE" size="2">
+                    <bitfield caption="PSC 0 Capture Software Trig bit" mask="0x8000" name="PCST0"/>
+                    <bitfield caption="PSC 0 Capture Register" mask="0x0FFF" name="PICR0"/>
+                </register>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0xDD" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"
+                              values="PSC_FAULT_MODE_OPER"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0xDC" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"
+                              values="PSC_FAULT_MODE_OPER"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0xDB" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0" values="PSC_PRESCALER"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x20" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Auto Run" mask="0x04" name="PARUN0"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0xDA" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0" values="PSC_ALIGN_MODE"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR0RB" offset="0xD8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR0SB" offset="0xD6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR0RA" offset="0xD4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR0SA" offset="0xD2" size="2" mask="0x0FFF"/>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0xD0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0"
+                              values="PSC_SYNC_SOURCE"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0xA1" size="1">
+                    <bitfield caption="PSC 0 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE0"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0xA0" size="1">
+                    <bitfield caption="PSC 0 Synchro Error Interrupt" mask="0x20" name="PSEI0"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0" values="MISC_2BIT_COUNT"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register " name="PICR2" offset="0xFE" size="2">
+                    <bitfield caption="PSC 2 Capture Software Trig bit" mask="0x8000" name="PCST2"/>
+                    <bitfield caption="PSC 2 Input Capture Register" mask="0x0FFF" name="PICR2"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0xFD" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"
+                              values="PSC_FAULT_MODE_OPER"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0xFC" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"
+                              values="PSC_FAULT_MODE_OPER"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0xFB" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2" values="PSC_PRESCALER"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0xFA" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2" values="PSC_ALIGN_MODE"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR2RB" offset="0xF8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR2SB" offset="0xF6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR2RA" offset="0xF4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR2SA" offset="0xF2" size="2" mask="0x0FFF"/>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0xF1" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0xF0" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0xA5" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0xA4" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2" values="MISC_2BIT_COUNT"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC1">
+                <register caption="PSC 1 Input Capture Register " name="PICR1" offset="0xEE" size="2" mask="0x0FFF"/>
+                <register caption="PSC 1 Input B Control" name="PFRC1B" offset="0xED" size="1">
+                    <bitfield caption="PSC 1 Capture Enable Input Part B" mask="0x80" name="PCAE1B"/>
+                    <bitfield caption="PSC 1 Input Select for Part B" mask="0x40" name="PISEL1B"/>
+                    <bitfield caption="PSC 1 Edge Level Selector on Input Part B" mask="0x20" name="PELEV1B"/>
+                    <bitfield caption="PSC 1 Filter Enable on Input Part B" mask="0x10" name="PFLTE1B"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM1B"
+                              values="PSC_FAULT_MODE_OPER"/>
+                </register>
+                <register caption="PSC 1 Input B Control" name="PFRC1A" offset="0xEC" size="1">
+                    <bitfield caption="PSC 1 Capture Enable Input Part A" mask="0x80" name="PCAE1A"/>
+                    <bitfield caption="PSC 1 Input Select for Part A" mask="0x40" name="PISEL1A"/>
+                    <bitfield caption="PSC 1 Edge Level Selector on Input Part A" mask="0x20" name="PELEV1A"/>
+                    <bitfield caption="PSC 1 Filter Enable on Input Part A" mask="0x10" name="PFLTE1A"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM1A"
+                              values="PSC_FAULT_MODE_OPER"/>
+                </register>
+                <register caption="PSC 1 Control Register" name="PCTL1" offset="0xEB" size="1">
+                    <bitfield caption="PSC 1 Prescaler Selects" mask="0xC0" name="PPRE1" values="PSC_PRESCALER"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM1"/>
+                    <bitfield caption="PSC 1 Asynchronous Output Control B" mask="0x10" name="PAOC1B"/>
+                    <bitfield caption="PSC 1 Asynchronous Output Control A" mask="0x08" name="PAOC1A"/>
+                    <bitfield caption="PSC1 Auto Run" mask="0x04" name="PARUN1"/>
+                    <bitfield caption="PSC1 Complete Cycle" mask="0x02" name="PCCYC1"/>
+                    <bitfield caption="PSC 1 Run" mask="0x01" name="PRUN1"/>
+                </register>
+                <register caption="PSC1 Synchro and Output Configuration" name="PSOC1" offset="0xE0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC1"
+                              values="PSC_SYNC_SOURCE"/>
+                    <bitfield caption="PSCOUT11 Output Enable" mask="0x04" name="POEN1B"/>
+                    <bitfield caption="PSCOUT10 Output Enable" mask="0x01" name="POEN1A"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PSC_FAULT_MODE_OPER">
+                <value caption="No action, PSC Input is ignored" name="VAL_0x00" value="0x00"/>
+                <value caption="Stop signal, Jump to Opposite Dead-Time and Wait" name="VAL_0x01" value="0x01"/>
+                <value caption="Stop signal, Execute Opposite Dead-Time and Wait" name="VAL_0x02" value="0x02"/>
+                <value caption="Stop signal, Execute Opposite while Fault active" name="VAL_0x03" value="0x03"/>
+                <value caption="Deactivate outputs without changing timing." name="VAL_0x04" value="0x04"/>
+                <value caption="Stop signal and Insert Dead-Time" name="VAL_0x05" value="0x05"/>
+                <value caption="Stop signal, Jump to Opposite Dead-Time and Wait." name="VAL_0x06" value="0x06"/>
+                <value caption="Halt PSC and Wait for Software Action" name="VAL_0x07" value="0x07"/>
+                <value caption="Edge Retrigger PSC" name="VAL_0x08" value="0x08"/>
+                <value caption="Fixed Frequency Edge Retrigger PSC" name="VAL_0x09" value="0x09"/>
+                <value caption="Reserved (do not use)" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Reserved (do not use)" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved (do not use)" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved (do not use)" name="VAL_0x0D" value="0x0D"/>
+                <value caption="Fixed Frequency Edge Retrigger PSC and Disactivate Output" name="VAL_0x0E"
+                       value="0x0E"/>
+                <value caption="Reserved (do not use)" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="PSC_PRESCALER">
+                <value caption="No divider on PSC input clock" name="VAL_0x00" value="0x00"/>
+                <value caption="Divide the PSC input clock by 4" name="VAL_0x01" value="0x01"/>
+                <value caption="Divide the PSC input clock by 16" name="VAL_0x02" value="0x02"/>
+                <value caption="Divide the PSC input clock by 64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="PSC_ALIGN_MODE">
+                <value caption="One Ramp Mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Two Ramp Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Four Ramp Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Center Aligned Mode" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="PSC_SYNC_SOURCE">
+                <value caption="Send signal on leading edge of PSCOUTn0" name="VAL_0x00" value="0x00"/>
+                <value caption="Send signal on trailing edge of PSCOUTn0" name="VAL_0x01" value="0x01"/>
+                <value caption="Send signal on leading edge of PSCOUTn1" name="VAL_0x02" value="0x02"/>
+                <value caption="Send signal on trailing edge of PSCOUTn1" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="MISC_2BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 3 bis" mask="0xFF" name="GPIOR" lsb="30"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC1" mask="0x40" name="PRPSC1"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSC0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1">
+                    <bitfield caption="Timer Counter 0 value" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1">
+                    <bitfield caption="Output Compare A value" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1">
+                    <bitfield caption="Output Compare B value" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter Input Capture" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1" mask="0x9F">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x10" name="ADASCR"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 3" mask="0x08" name="ADTS3"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 2" mask="0x04" name="ADTS2"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 1" mask="0x02" name="ADTS1"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 0" mask="0x01" name="ADTS0"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="" mask="0x03" name="AMP1TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" ocd-rw="">
+                    <bitfield caption="SPI Data" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Mask" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bytes" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bit" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM161.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM161.xml
new file mode 100644
index 00000000..55935bc7
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM161.xml
@@ -0,0 +1,1062 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM161" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+                    <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC2_EEC" caption="PSC2 End Of Enhanced Cycle"/>
+                <interrupt index="4" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="5" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="6" name="PSC0_EEC" caption="PSC0 End Of Enhanced Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="8" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="9" name="ANALOG_COMP_3" caption="Analog Comparator 3"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="14" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="15" name="SPI_STC" caption="SPI Serial Transfer Complet"/>
+                <interrupt index="16" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="17" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="18" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="19" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x948B"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x8B"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC2 Reset Behavior for 22 and 23" mask="0x40" name="PSC2RBA"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSC Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="PSC2 and PSC0 input Reset Behavior" mask="0x08" name="PSCINRB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PE0 as I/O pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]"
+                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]"
+                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]"
+                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]"
+                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]"
+                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]"
+                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]"
+                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]"
+                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]"
+                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]"
+                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]"
+                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]"
+                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]"
+                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]"
+                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS"
+                       value="0x03"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]"
+                       name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS"
+                       value="0x23"/>
+                <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS"
+                       value="0x33"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]"
+                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]"
+                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]"
+                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS"
+                       value="0x06"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1"
+                       value="0x16"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS"
+                       value="0x26"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register High Byte" name="DACH" offset="0x59" size="1" ocd-rw="">
+                    <bitfield caption="DAC Data Register High Byte Bits" mask="0xFF" name="DACH"/>
+                </register>
+                <register caption="DAC Data Register Low Byte" name="DACL" offset="0x58" size="1" ocd-rw="">
+                    <bitfield caption="DAC Data Register Low Byte Bits" mask="0xFF" name="DACL"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x76" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x37" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x38" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x56" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x82" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x89" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x41" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x40" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x28" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
+                    <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10"
+                              name="ADSSEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x78" size="1">
+                    <bitfield caption="" mask="0x08" name="ACMP1MD"/>
+                    <bitfield caption="" mask="0x04" name="AMP0POSD"/>
+                    <bitfield caption="" mask="0x02" name="ADC10D"/>
+                    <bitfield caption="" mask="0x01" name="ADC9D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x79" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x08" name="AMP0GS"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator3 Control Register" name="AC3CON" offset="0x7F" size="1">
+                    <bitfield caption="Analog Comparator3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"/>
+                    <bitfield caption="Analog Comparator 3 Alternate Output Enable" mask="0x08" name="AC3OEA"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                </register>
+                <register caption="" name="AC3ECON" offset="0x7C" size="1">
+                    <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC3OI"/>
+                    <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC3OE"/>
+                    <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC3H"/>
+                </register>
+                <register caption="" name="AC2ECON" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC2OI"/>
+                    <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC2OE"/>
+                    <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC2H"/>
+                </register>
+                <register caption="" name="AC1ECON" offset="0x7A" size="1">
+                    <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC1OI"/>
+                    <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC1OE"/>
+                    <bitfield caption="Analog Comparator Interrupt Capture Enable" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC1H"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Reset Pin Disable" mask="0x08" name="RSTDIS"/>
+                    <bitfield caption="Frequency Selection of the Calibrated RC Oscillator" mask="0x04" name="CKRC81"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x83" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x87" size="1">
+                    <bitfield caption="" mask="0x3C" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x86" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSCR"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="" name="CLKCSR" offset="0x84" size="1">
+                    <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
+                    <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
+                    <bitfield caption="Clock Control" mask="0x0F" name="CLKC"/>
+                </register>
+                <register caption="" name="CLKSELR" offset="0x85" size="1">
+                    <bitfield caption="Clock OUT" mask="0x40" name="COUT"/>
+                    <bitfield caption="Clock Start up Time" mask="0x30" name="CSUT"/>
+                    <bitfield caption="Clock Source Select" mask="0x0F" name="CKSEL"/>
+                </register>
+                <register caption="BandGap Current Calibration Register" name="BGCCR" offset="0x81" size="1">
+                    <bitfield caption="" mask="0x0F" name="BGCC"/>
+                </register>
+                <register caption="BandGap Resistor Calibration Register" name="BGCRR" offset="0x80" size="1">
+                    <bitfield caption="" mask="0x0F" name="BGCR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x01" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="None Volatile Busy Memory Busy" mask="0x80" name="NVMBSY"/>
+                    <bitfield caption="EEPROM Page Access" mask="0x40" name="EEPAGE"/>
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0x68" size="2" mask="0x8FFF"/>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0x63" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0x62" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0x32" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x24" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0x31" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR0RB" offset="0x44" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR0SB" offset="0x42" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR0RA" offset="0x4A" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR0SA" offset="0x60" size="2" mask="0x0FFF"/>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0x6A" size="1">
+                    <bitfield caption="PSC Input Select" mask="0x80" name="PISEL0A1"/>
+                    <bitfield caption="PSC Input Select" mask="0x40" name="PISEL0B1"/>
+                    <bitfield caption="Synchronisation out for ADC selection" mask="0x30" name="PSYNC0"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0x2F" size="1">
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Enhanced Cycle Enable" mask="0x02" name="PEOEPE0"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0x30" size="1">
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register High" name="PICR2H" offset="0x6D" size="1">
+                    <bitfield caption="PSC 2 Capture Software Trigger Bit" mask="0x80" name="PCST2"/>
+                    <bitfield caption="" mask="0x0C" name="PICR21"/>
+                    <bitfield caption="" mask="0x03" name="PICR2" lsb="8"/>
+                </register>
+                <register caption="PSC 2 Input Capture Register Low" name="PICR2L" offset="0x6C" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0x67" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0x66" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0x36" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0x35" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="PSC 2 Enhanced Configuration Register" name="PCNFE2" offset="0x70" size="1">
+                    <bitfield caption="" mask="0xE0" name="PASDLK2"/>
+                    <bitfield caption="" mask="0x10" name="PBFM21"/>
+                    <bitfield caption="" mask="0x08" name="PELEV2A1"/>
+                    <bitfield caption="" mask="0x04" name="PELEV2B1"/>
+                    <bitfield caption="" mask="0x02" name="PISEL2A1"/>
+                    <bitfield caption="" mask="0x01" name="PISEL2B1"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR2RB" offset="0x48" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR2SB" offset="0x46" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR2RA" offset="0x4E" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR2SA" offset="0x64" size="2" mask="0x0FFF"/>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0x6F" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0x6E" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0x33" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Enhanced Cycle Interrupt Enable" mask="0x02" name="PEOEPE2"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0x34" size="1">
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+                <register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1"
+                          mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x21" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x10" name="WGM13"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x5A" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM216.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
new file mode 100644
index 00000000..f16814f7
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM216.xml
@@ -0,0 +1,1216 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM216" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EUSART">
+                    <instance name="EUSART" caption="Extended USART">
+                        <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
+                                        caption="Extended USART"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
+                <interrupt index="4" name="PSC1_EC" caption="PSC1 End Cycle"/>
+                <interrupt index="5" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="6" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_0" caption="Analog Comparator 0"/>
+                <interrupt index="8" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="9" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="RESERVED15" caption=""/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP_A" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="19" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="22" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="23" name="USART_TX" caption="USART, Tx Complete"/>
+                <interrupt index="24" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="25" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER0_COMPB" caption="Timer Counter 0 Compare Match B"/>
+                <interrupt index="28" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="29" name="RESERVED30" caption=""/>
+                <interrupt index="30" name="RESERVED31" caption=""/>
+                <interrupt index="31" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9483"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x83"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC1 Reset Behavior" mask="0x40" name="PSC1RB"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSCOUT Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Extended USART" name="EUSART">
+            <register-group caption="Extended USART" name="EUSART">
+                <register caption="EUSART I/O Data Register" name="EUDR" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
+                              values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
+                              values="COMM_TRANS_CHAR_SIZE2"/>
+                </register>
+                <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
+                    <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
+                    <bitfield caption="EUSBS Enable Bit" mask="0x08" name="EUSBS"/>
+                    <bitfield caption="Manchester Mode Bit" mask="0x02" name="EMCH"/>
+                    <bitfield caption="Order Bit" mask="0x01" name="BODR"/>
+                </register>
+                <register caption="EUSART Status Register C" name="EUCSRC" offset="0xCA" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Error Manchester Bit" mask="0x08" name="FEM"/>
+                    <bitfield caption="F1617 Bit" mask="0x04" name="F1617"/>
+                    <bitfield caption="Stop Bits" mask="0x03" name="STP"/>
+                </register>
+                <register caption="Manchester Receiver Baud Rate Register High Byte" name="MUBRRH" offset="0xCD"
+                          size="1">
+                    <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR" lsb="8"/>
+                </register>
+                <register caption="Manchester Receiver Baud Rate Register Low Byte" name="MUBRRL" offset="0xCC"
+                          size="1">
+                    <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="Reserved" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE2">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="16 or 17" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bit" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register Bytes" name="DAC" offset="0xAB" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 3 bis" mask="0xFF" name="GPIOR" lsb="30"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC1" mask="0x40" name="PRPSC1"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSC0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1">
+                    <bitfield caption="Timer Counter 0 value" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1">
+                    <bitfield caption="Output Compare A value" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1">
+                    <bitfield caption="Output Compare B value" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter Input Capture" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1" mask="0x8F">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 3" mask="0x08" name="ADTS3"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 2" mask="0x04" name="ADTS2"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 1" mask="0x02" name="ADTS1"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 0" mask="0x01" name="ADTS0"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="" mask="0x03" name="AMP1TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status register A" name="UCSRA" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data Overrun" mask="0x08" name="DOR"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double USART Transmission Bit" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control an Status register B" name="UCSRB" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control an Status register C" name="UCSRC" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0xC5" size="1">
+                    <bitfield caption="USART Baud Rate Register Bits" mask="0x0F" name="UBRR" lsb="8"/>
+                </register>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0xC4" size="1">
+                    <bitfield caption="USART Baud Rate Register bits" mask="0xFF" name="UBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" ocd-rw="">
+                    <bitfield caption="SPI Data" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Mask" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bytes" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0xDE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 0 Input Capture Software Trig" mask="0x8000" name="PCST0"/>
+                    <bitfield caption="PSC 0 Input Capture Bytes" mask="0x0FFF" name="PICR0"/>
+                </register>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0xDD" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0xDC" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0xDB" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x20" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Auto Run" mask="0x04" name="PARUN0"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0xDA" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR0RB" offset="0xD8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR0SB" offset="0xD6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR0RA" offset="0xD4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR0SA" offset="0xD2" size="2" mask="0x0FFF"/>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0xD0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0xA1" size="1">
+                    <bitfield caption="PSC 0 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE0"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0xA0" size="1">
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
+                    <bitfield caption="PSC 0 Synchro Error Interrupt" mask="0x20" name="PSEI0"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register " name="PICR2" offset="0xFE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 2 Input Capture Software Trig" mask="0x8000" name="PCST2"/>
+                    <bitfield caption="PSC 2 Input Capture Bytes" mask="0x0FFF" name="PICR2"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0xFD" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0xFC" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0xFB" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0xFA" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR2RB" offset="0xF8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR2SB" offset="0xF6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR2RA" offset="0xF4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR2SA" offset="0xF2" size="2" mask="0x0FFF"/>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0xF1" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0xF0" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0xA5" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0xA4" size="1">
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
new file mode 100644
index 00000000..51a4ec7e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM2B.xml
@@ -0,0 +1,1245 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM2B" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EUSART">
+                    <instance name="EUSART" caption="Extended USART">
+                        <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
+                                        caption="Extended USART"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
+                <interrupt index="4" name="PSC1_EC" caption="PSC1 End Cycle"/>
+                <interrupt index="5" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="6" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_0" caption="Analog Comparator 0"/>
+                <interrupt index="8" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="9" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="RESERVED15" caption=""/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="19" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="22" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="23" name="USART_TX" caption="USART, Tx Complete"/>
+                <interrupt index="24" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="25" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER0_COMPB" caption="Timer Counter 0 Compare Match B"/>
+                <interrupt index="28" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="29" name="RESERVED30" caption=""/>
+                <interrupt index="30" name="RESERVED31" caption=""/>
+                <interrupt index="31" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9383"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x83"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC1 Reset Behavior" mask="0x40" name="PSC1RB"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSCOUT Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Rc. Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Extended USART" name="EUSART">
+            <register-group caption="Extended USART" name="EUSART">
+                <register caption="EUSART I/O Data Register" name="EUDR" offset="0xCE" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="EUSART Extended data bits" mask="0xFF" name="EUDR"/>
+                </register>
+                <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
+                              values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
+                              values="COMM_TRANS_CHAR_SIZE2"/>
+                </register>
+                <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
+                    <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
+                    <bitfield caption="EUSBS Enable Bit" mask="0x08" name="EUSBS"/>
+                    <bitfield caption="Manchester Mode Bit" mask="0x02" name="EMCH"/>
+                    <bitfield caption="Order Bit" mask="0x01" name="BODR"/>
+                </register>
+                <register caption="EUSART Status Register C" name="EUCSRC" offset="0xCA" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Error Manchester Bit" mask="0x08" name="FEM"/>
+                    <bitfield caption="F1617 Bit" mask="0x04" name="F1617"/>
+                    <bitfield caption="Stop Bits" mask="0x03" name="STP"/>
+                </register>
+                <register caption="Manchester Receiver Baud Rate Register" name="MUBRR" offset="0xCC" size="2">
+                    <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFFFF" name="MUBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="Reserved" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE2">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="16 or 17" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bit" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0xAB" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 3 bis" mask="0xFF" name="GPIOR" lsb="30"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC1" mask="0x40" name="PRPSC1"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSC0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1">
+                    <bitfield caption="Timer Counter 0 value" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare A" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare B" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data Register" mask="0xFFFF" name="ADC"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x0F" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1" mask="0xFF">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="" mask="0x03" name="AMP1TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0xC6" size="1" ocd-rw="">
+                    <bitfield caption="USART I/O Data" mask="0xFF" name="UDR"/>
+                </register>
+                <register caption="USART Control and Status register A" name="UCSRA" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data Overrun" mask="0x08" name="DOR"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double USART Transmission Bit" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control an Status register B" name="UCSRB" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control an Status register C" name="UCSRC" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register" name="UBRR" offset="0xC4" size="2">
+                    <bitfield caption="USART Baud Rate Register Bits" mask="0x0FFF" name="UBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bytes" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0xDE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 0 Input Capture Software Trig" mask="0x8000" name="PCST0"/>
+                    <bitfield caption="PSC 0 Input Capture Bytes" mask="0x0FFF" name="PICR0"/>
+                </register>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0xDD" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0xDC" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0xDB" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x20" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Auto Run" mask="0x04" name="PARUN0"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0xDA" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare 0 RB Register" name="OCR0RB" offset="0xD8" size="2">
+                    <bitfield caption="Output Compare RB" mask="0xFFFF" name="OCR0RB"/>
+                </register>
+                <register caption="Output Compare 0 SB Register" name="OCR0SB" offset="0xD6" size="2">
+                    <bitfield caption="Output Compare SB" mask="0x0FFF" name="OCR0SB"/>
+                </register>
+                <register caption="Output Compare 0 RA Register" name="OCR0RA" offset="0xD4" size="2">
+                    <bitfield caption="Output Compare RA" mask="0x0FFF" name="OCR0RA"/>
+                </register>
+                <register caption="Output Compare 0 SA Register" name="OCR0SA" offset="0xD2" size="2">
+                    <bitfield caption="Output Compare SA" mask="0x0FFF" name="OCR0SA"/>
+                </register>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0xD0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0xA1" size="1">
+                    <bitfield caption="PSC 0 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE0"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0xA0" size="1">
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
+                    <bitfield caption="PSC 0 Synchro Error Interrupt" mask="0x20" name="PSEI0"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register " name="PICR2" offset="0xFE" size="2">
+                    <bitfield caption="PSC 2 Input Capture Software Trig" mask="0x8000" name="PCST2"/>
+                    <bitfield caption="PSC 2 Input Capture Bytes" mask="0x0FFF" name="PICR2"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0xFD" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0xFC" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0xFB" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0xFA" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="Output Compare 2 RB Register" name="OCR2RB" offset="0xF8" size="2">
+                    <bitfield caption="Output Compare RB" mask="0xFFFF" name="OCR2RB"/>
+                </register>
+                <register caption="Output Compare 2 SB Register" name="OCR2SB" offset="0xF6" size="2">
+                    <bitfield caption="Output Compare SB" mask="0x0FFF" name="OCR2SB"/>
+                </register>
+                <register caption="Output Compare 2 RA Register" name="OCR2RA" offset="0xF4" size="2">
+                    <bitfield caption="Output Compare RA" mask="0x0FFF" name="OCR2RA"/>
+                </register>
+                <register caption="Output Compare 2 SA Register" name="OCR2SA" offset="0xF2" size="2">
+                    <bitfield caption="Output Compare SA" mask="0x0FFF" name="OCR2SA"/>
+                </register>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0xF1" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0xF0" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2_"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0xA5" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0xA4" size="1">
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM316.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
new file mode 100644
index 00000000..031d818c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM316.xml
@@ -0,0 +1,1309 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM316" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EUSART">
+                    <instance name="EUSART" caption="Extended USART">
+                        <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
+                                        caption="Extended USART"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC1" caption="Power Stage Controller">
+                        <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
+                <interrupt index="4" name="PSC1_EC" caption="PSC1 End Cycle"/>
+                <interrupt index="5" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="6" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_0" caption="Analog Comparator 0"/>
+                <interrupt index="8" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="9" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="RESERVED15" caption=""/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP_A" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="19" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="22" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="23" name="USART_TX" caption="USART, Tx Complete"/>
+                <interrupt index="24" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="25" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER0_COMPB" caption="Timer Counter 0 Compare Match B"/>
+                <interrupt index="28" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="29" name="RESERVED30" caption=""/>
+                <interrupt index="30" name="RESERVED31" caption=""/>
+                <interrupt index="31" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9483"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x83"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC1 Reset Behavior" mask="0x40" name="PSC1RB"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSCOUT Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Extended USART" name="EUSART">
+            <register-group caption="Extended USART" name="EUSART">
+                <register caption="EUSART I/O Data Register" name="EUDR" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
+                              values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
+                              values="COMM_TRANS_CHAR_SIZE2"/>
+                </register>
+                <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
+                    <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
+                    <bitfield caption="EUSBS Enable Bit" mask="0x08" name="EUSBS"/>
+                    <bitfield caption="Manchester Mode Bit" mask="0x02" name="EMCH"/>
+                    <bitfield caption="Order Bit" mask="0x01" name="BODR"/>
+                </register>
+                <register caption="EUSART Status Register C" name="EUCSRC" offset="0xCA" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Error Manchester Bit" mask="0x08" name="FEM"/>
+                    <bitfield caption="F1617 Bit" mask="0x04" name="F1617"/>
+                    <bitfield caption="Stop Bits" mask="0x03" name="STP"/>
+                </register>
+                <register caption="Manchester Receiver Baud Rate Register High Byte" name="MUBRRH" offset="0xCD"
+                          size="1">
+                    <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR" lsb="8"/>
+                </register>
+                <register caption="Manchester Receiver Baud Rate Register Low Byte" name="MUBRRL" offset="0xCC"
+                          size="1">
+                    <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFF" name="MUBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="Reserved" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE2">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="16 or 17" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bit" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register Bytes" name="DAC" offset="0xAB" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 3 bis" mask="0xFF" name="GPIOR" lsb="30"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC1" mask="0x40" name="PRPSC1"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSC0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1">
+                    <bitfield caption="Timer Counter 0 value" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1">
+                    <bitfield caption="Output Compare A value" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1">
+                    <bitfield caption="Output Compare B value" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A Register" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B Register" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1" mask="0x8F">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 3" mask="0x08" name="ADTS3"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 2" mask="0x04" name="ADTS2"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 1" mask="0x02" name="ADTS1"/>
+                    <bitfield caption="ADC Auto Trigger Source Selection 0" mask="0x01" name="ADTS0"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="" mask="0x03" name="AMP1TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status register A" name="UCSRA" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data Overrun" mask="0x08" name="DOR"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double USART Transmission Bit" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control an Status register B" name="UCSRB" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control an Status register C" name="UCSRC" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0xC5" size="1">
+                    <bitfield caption="USART Baud Rate Register Bits" mask="0x0F" name="UBRR" lsb="8"/>
+                </register>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0xC4" size="1">
+                    <bitfield caption="USART Baud Rate Register bits" mask="0xFF" name="UBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" ocd-rw="">
+                    <bitfield caption="SPI Data" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bytes" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0xDE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 0 Input Capture Software Trig" mask="0x8000" name="PCST0"/>
+                    <bitfield caption="PSC 0 Input Capture Bytes" mask="0x0FFF" name="PICR0"/>
+                </register>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0xDD" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0xDC" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0xDB" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x20" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Auto Run" mask="0x04" name="PARUN0"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0xDA" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR0RB" offset="0xD8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR0SB" offset="0xD6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR0RA" offset="0xD4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR0SA" offset="0xD2" size="2" mask="0x0FFF"/>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0xD0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0xA1" size="1">
+                    <bitfield caption="PSC 0 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE0"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0xA0" size="1">
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
+                    <bitfield caption="PSC 0 Synchro Error Interrupt" mask="0x20" name="PSEI0"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC1">
+                <register caption="PSC 1 Input Capture Register " name="PICR1" offset="0xEE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 1 Input Capture Software Trig" mask="0x8000" name="PCST1"/>
+                    <bitfield caption="PSC 1 Input Capture Bytes" mask="0x0FFF" name="PICR1"/>
+                </register>
+                <register caption="PSC 1 Input B Control" name="PFRC1B" offset="0xED" size="1">
+                    <bitfield caption="PSC 1 Capture Enable Input Part B" mask="0x80" name="PCAE1B"/>
+                    <bitfield caption="PSC 1 Input Select for Part B" mask="0x40" name="PISEL1B"/>
+                    <bitfield caption="PSC 1 Edge Level Selector on Input Part B" mask="0x20" name="PELEV1B"/>
+                    <bitfield caption="PSC 1 Filter Enable on Input Part B" mask="0x10" name="PFLTE1B"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM1B"/>
+                </register>
+                <register caption="PSC 1 Input B Control" name="PFRC1A" offset="0xEC" size="1">
+                    <bitfield caption="PSC 1 Capture Enable Input Part A" mask="0x80" name="PCAE1A"/>
+                    <bitfield caption="PSC 1 Input Select for Part A" mask="0x40" name="PISEL1A"/>
+                    <bitfield caption="PSC 1 Edge Level Selector on Input Part A" mask="0x20" name="PELEV1A"/>
+                    <bitfield caption="PSC 1 Filter Enable on Input Part A" mask="0x10" name="PFLTE1A"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM1A"/>
+                </register>
+                <register caption="PSC 1 Control Register" name="PCTL1" offset="0xEB" size="1">
+                    <bitfield caption="PSC 1 Prescaler Selects" mask="0xC0" name="PPRE1"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM1"/>
+                    <bitfield caption="PSC 1 Asynchronous Output Control B" mask="0x10" name="PAOC1B"/>
+                    <bitfield caption="PSC 1 Asynchronous Output Control A" mask="0x08" name="PAOC1A"/>
+                    <bitfield caption="PSC1 Auto Run" mask="0x04" name="PARUN1"/>
+                    <bitfield caption="PSC1 Complete Cycle" mask="0x02" name="PCCYC1"/>
+                    <bitfield caption="PSC 1 Run" mask="0x01" name="PRUN1"/>
+                </register>
+                <register caption="PSC 1 Configuration Register" name="PCNF1" offset="0xEA" size="1">
+                    <bitfield caption="PSC 1 Fifty" mask="0x80" name="PFIFTY1"/>
+                    <bitfield caption="PSC 1 Autolock" mask="0x40" name="PALOCK1"/>
+                    <bitfield caption="PSC 1 Lock" mask="0x20" name="PLOCK1"/>
+                    <bitfield caption="PSC 1 Mode" mask="0x18" name="PMODE1"/>
+                    <bitfield caption="PSC 1 Output Polarity" mask="0x04" name="POP1"/>
+                    <bitfield caption="PSC 1 Input Clock Select" mask="0x02" name="PCLKSEL1"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR1RB" offset="0xE8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR1SB" offset="0xE6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR1RA" offset="0xE4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR1SA" offset="0xE2" size="2" mask="0x0FFF"/>
+                <register caption="PSC1 Synchro and Output Configuration" name="PSOC1" offset="0xE0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC1_"/>
+                    <bitfield caption="PSCOUT11 Output Enable" mask="0x04" name="POEN1B"/>
+                    <bitfield caption="PSCOUT10 Output Enable" mask="0x01" name="POEN1A"/>
+                </register>
+                <register caption="PSC1 Interrupt Mask Register" name="PIM1" offset="0xA3" size="1">
+                    <bitfield caption="PSC 1 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE1"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE1B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE1A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE1"/>
+                </register>
+                <register caption="PSC1 Interrupt Flag Register" name="PIFR1" offset="0xA2" size="1">
+                    <bitfield caption="PSC 1 Output B Activity" mask="0x80" name="POAC1B"/>
+                    <bitfield caption="PSC 1 Output A Activity" mask="0x40" name="POAC1A"/>
+                    <bitfield caption="PSC 1 Synchro Error Interrupt" mask="0x20" name="PSEI1"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV1B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV1A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN1"/>
+                    <bitfield caption="End of PSC1 Interrupt" mask="0x01" name="PEOP1"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register " name="PICR2" offset="0xFE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 2 Input Capture Software Trig" mask="0x8000" name="PCST2"/>
+                    <bitfield caption="PSC 2 Input Capture Bytes" mask="0x0FFF" name="PICR2"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0xFD" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0xFC" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0xFB" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0xFA" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR2RB" offset="0xF8" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare SB Register " name="OCR2SB" offset="0xF6" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare RA Register " name="OCR2RA" offset="0xF4" size="2" mask="0x0FFF"/>
+                <register caption="Output Compare SA Register " name="OCR2SA" offset="0xF2" size="2" mask="0x0FFF"/>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0xF1" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0xF0" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2_"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0xA5" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0xA4" size="1">
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
new file mode 100644
index 00000000..aef5edb9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM3B.xml
@@ -0,0 +1,1329 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM3B" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EUSART">
+                    <instance name="EUSART" caption="Extended USART">
+                        <register-group name="EUSART" name-in-module="EUSART" offset="0x00" address-space="data"
+                                        caption="Extended USART"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC1" caption="Power Stage Controller">
+                        <register-group name="PSC1" name-in-module="PSC1" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC1_CAPT" caption="PSC1 Capture Event"/>
+                <interrupt index="4" name="PSC1_EC" caption="PSC1 End Cycle"/>
+                <interrupt index="5" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="6" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_0" caption="Analog Comparator 0"/>
+                <interrupt index="8" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="9" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="RESERVED15" caption=""/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="19" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="20" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="21" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="22" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="23" name="USART_TX" caption="USART, Tx Complete"/>
+                <interrupt index="24" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="25" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="26" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="27" name="TIMER0_COMPB" caption="Timer Counter 0 Compare Match B"/>
+                <interrupt index="28" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="29" name="RESERVED30" caption=""/>
+                <interrupt index="30" name="RESERVED31" caption=""/>
+                <interrupt index="31" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9383"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x83"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC1 Reset Behavior" mask="0x40" name="PSC1RB"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSCOUT Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Rc. Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Extended USART" name="EUSART">
+            <register-group caption="Extended USART" name="EUSART">
+                <register caption="EUSART I/O Data Register" name="EUDR" offset="0xCE" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="EUSART Extended data bits" mask="0xFF" name="EUDR"/>
+                </register>
+                <register caption="EUSART Control and Status Register A" name="EUCSRA" offset="0xC8" size="1">
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0xF0" name="UTxS"
+                              values="COMM_TRANS_CHAR_SIZE"/>
+                    <bitfield caption="EUSART Control and Status Register A Bits" mask="0x0F" name="URxS"
+                              values="COMM_TRANS_CHAR_SIZE2"/>
+                </register>
+                <register caption="EUSART Control Register B" name="EUCSRB" offset="0xC9" size="1">
+                    <bitfield caption="EUSART Enable Bit" mask="0x10" name="EUSART"/>
+                    <bitfield caption="EUSBS Enable Bit" mask="0x08" name="EUSBS"/>
+                    <bitfield caption="Manchester Mode Bit" mask="0x02" name="EMCH"/>
+                    <bitfield caption="Order Bit" mask="0x01" name="BODR"/>
+                </register>
+                <register caption="EUSART Status Register C" name="EUCSRC" offset="0xCA" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Error Manchester Bit" mask="0x08" name="FEM"/>
+                    <bitfield caption="F1617 Bit" mask="0x04" name="F1617"/>
+                    <bitfield caption="Stop Bits" mask="0x03" name="STP"/>
+                </register>
+                <register caption="Manchester Receiver Baud Rate Register" name="MUBRR" offset="0xCC" size="2">
+                    <bitfield caption="Manchester Receiver Baud Rate Register Bits" mask="0xFFFF" name="MUBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="Reserved" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="COMM_TRANS_CHAR_SIZE2">
+                <value caption="5-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="6-bit" name="VAL_0x01" value="0x01"/>
+                <value caption="7-bit" name="VAL_0x02" value="0x02"/>
+                <value caption="8-bit" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="9-bit" name="VAL_0x07" value="0x07"/>
+                <value caption="13-bit" name="VAL_0x08" value="0x08"/>
+                <value caption="14-bit" name="VAL_0x09" value="0x09"/>
+                <value caption="15-bit" name="VAL_0x0A" value="0x0A"/>
+                <value caption="16-bit" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Reserved" name="VAL_0x0C" value="0x0C"/>
+                <value caption="Reserved" name="VAL_0x0D" value="0x0D"/>
+                <value caption="16 or 17" name="VAL_0x0E" value="0x0E"/>
+                <value caption="17-bit" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0xAD" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bit" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0xAE" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0xAF" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator Clock Divider" mask="0x80" name="ACCKDIV"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0xAB" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0xAA" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 3 bis" mask="0xFF" name="GPIOR" lsb="30"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC1" mask="0x40" name="PRPSC1"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSC0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1">
+                    <bitfield caption="Timer Counter 0 value" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare A" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare B" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2">
+                    <bitfield caption="Timer/Counter1 Output Compare A" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2">
+                    <bitfield caption="Timer/Counter1 Output Compare B" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data Register" mask="0xFFFF" name="ADC"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x0F" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1" mask="0xFF">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="" mask="0x03" name="AMP1TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0xC6" size="1" ocd-rw="">
+                    <bitfield caption="USART I/O Data" mask="0xFF" name="UDR"/>
+                </register>
+                <register caption="USART Control and Status register A" name="UCSRA" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data Overrun" mask="0x08" name="DOR"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double USART Transmission Bit" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control an Status register B" name="UCSRB" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control an Status register C" name="UCSRC" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register" name="UBRR" offset="0xC4" size="2">
+                    <bitfield caption="USART Baud Rate Register Bits" mask="0x0FFF" name="UBRR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bytes" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0xDE" size="2" mask="0x8FFF">
+                    <bitfield caption="PSC 0 Input Capture Software Trig" mask="0x8000" name="PCST0"/>
+                    <bitfield caption="PSC 0 Input Capture Bytes" mask="0x0FFF" name="PICR0"/>
+                </register>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0xDD" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0xDC" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0xDB" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x20" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Auto Run" mask="0x04" name="PARUN0"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0xDA" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare 0 RB Register" name="OCR0RB" offset="0xD8" size="2">
+                    <bitfield caption="Output Compare RB" mask="0xFFFF" name="OCR0RB"/>
+                </register>
+                <register caption="Output Compare 0 SB Register" name="OCR0SB" offset="0xD6" size="2">
+                    <bitfield caption="Output Compare SB" mask="0x0FFF" name="OCR0SB"/>
+                </register>
+                <register caption="Output Compare 0 RA Register" name="OCR0RA" offset="0xD4" size="2">
+                    <bitfield caption="Output Compare RA" mask="0x0FFF" name="OCR0RA"/>
+                </register>
+                <register caption="Output Compare 0 SA Register" name="OCR0SA" offset="0xD2" size="2">
+                    <bitfield caption="Output Compare SA" mask="0x0FFF" name="OCR0SA"/>
+                </register>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0xD0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC0"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0xA1" size="1">
+                    <bitfield caption="PSC 0 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE0"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0xA0" size="1">
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
+                    <bitfield caption="PSC 0 Synchro Error Interrupt" mask="0x20" name="PSEI0"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC1">
+                <register caption="PSC 1 Input Capture Register " name="PICR1" offset="0xEE" size="2">
+                    <bitfield caption="PSC 1 Input Capture Software Trig" mask="0x8000" name="PCST1"/>
+                    <bitfield caption="PSC 1 Input Capture Bytes" mask="0x0FFF" name="PICR1"/>
+                </register>
+                <register caption="PSC 1 Input B Control" name="PFRC1B" offset="0xED" size="1">
+                    <bitfield caption="PSC 1 Capture Enable Input Part B" mask="0x80" name="PCAE1B"/>
+                    <bitfield caption="PSC 1 Input Select for Part B" mask="0x40" name="PISEL1B"/>
+                    <bitfield caption="PSC 1 Edge Level Selector on Input Part B" mask="0x20" name="PELEV1B"/>
+                    <bitfield caption="PSC 1 Filter Enable on Input Part B" mask="0x10" name="PFLTE1B"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM1B"/>
+                </register>
+                <register caption="PSC 1 Input B Control" name="PFRC1A" offset="0xEC" size="1">
+                    <bitfield caption="PSC 1 Capture Enable Input Part A" mask="0x80" name="PCAE1A"/>
+                    <bitfield caption="PSC 1 Input Select for Part A" mask="0x40" name="PISEL1A"/>
+                    <bitfield caption="PSC 1 Edge Level Selector on Input Part A" mask="0x20" name="PELEV1A"/>
+                    <bitfield caption="PSC 1 Filter Enable on Input Part A" mask="0x10" name="PFLTE1A"/>
+                    <bitfield caption="PSC 1 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM1A"/>
+                </register>
+                <register caption="PSC 1 Control Register" name="PCTL1" offset="0xEB" size="1">
+                    <bitfield caption="PSC 1 Prescaler Selects" mask="0xC0" name="PPRE1"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM1"/>
+                    <bitfield caption="PSC 1 Asynchronous Output Control B" mask="0x10" name="PAOC1B"/>
+                    <bitfield caption="PSC 1 Asynchronous Output Control A" mask="0x08" name="PAOC1A"/>
+                    <bitfield caption="PSC1 Auto Run" mask="0x04" name="PARUN1"/>
+                    <bitfield caption="PSC1 Complete Cycle" mask="0x02" name="PCCYC1"/>
+                    <bitfield caption="PSC 1 Run" mask="0x01" name="PRUN1"/>
+                </register>
+                <register caption="PSC 1 Configuration Register" name="PCNF1" offset="0xEA" size="1">
+                    <bitfield caption="PSC 1 Fifty" mask="0x80" name="PFIFTY1"/>
+                    <bitfield caption="PSC 1 Autolock" mask="0x40" name="PALOCK1"/>
+                    <bitfield caption="PSC 1 Lock" mask="0x20" name="PLOCK1"/>
+                    <bitfield caption="PSC 1 Mode" mask="0x18" name="PMODE1"/>
+                    <bitfield caption="PSC 1 Output Polarity" mask="0x04" name="POP1"/>
+                    <bitfield caption="PSC 1 Input Clock Select" mask="0x02" name="PCLKSEL1"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR1RB" offset="0xE8" size="2">
+                    <bitfield caption="Output Compare 1 RB" mask="0xFFFF" name="OCR1RB"/>
+                </register>
+                <register caption="Output Compare SB Register " name="OCR1SB" offset="0xE6" size="2">
+                    <bitfield caption="Output Compare 1 SB" mask="0x0FFF" name="OCR1SB"/>
+                </register>
+                <register caption="Output Compare RA Register " name="OCR1RA" offset="0xE4" size="2">
+                    <bitfield caption="Output Compare 1 RA" mask="0x0FFF" name="OCR1RA"/>
+                </register>
+                <register caption="Output Compare SA Register " name="OCR1SA" offset="0xE2" size="2">
+                    <bitfield caption="Output Compare 1 SA" mask="0x0FFF" name="OCR1SA"/>
+                </register>
+                <register caption="PSC1 Synchro and Output Configuration" name="PSOC1" offset="0xE0" size="1">
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC1_"/>
+                    <bitfield caption="PSCOUT11 Output Enable" mask="0x04" name="POEN1B"/>
+                    <bitfield caption="PSCOUT10 Output Enable" mask="0x01" name="POEN1A"/>
+                </register>
+                <register caption="PSC1 Interrupt Mask Register" name="PIM1" offset="0xA3" size="1">
+                    <bitfield caption="PSC 1 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE1"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE1B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE1A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE1"/>
+                </register>
+                <register caption="PSC1 Interrupt Flag Register" name="PIFR1" offset="0xA2" size="1">
+                    <bitfield caption="PSC 1 Output B Activity" mask="0x80" name="POAC1B"/>
+                    <bitfield caption="PSC 1 Output A Activity" mask="0x40" name="POAC1A"/>
+                    <bitfield caption="PSC 1 Synchro Error Interrupt" mask="0x20" name="PSEI1"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV1B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV1A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN1"/>
+                    <bitfield caption="End of PSC1 Interrupt" mask="0x01" name="PEOP1"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register " name="PICR2" offset="0xFE" size="2">
+                    <bitfield caption="PSC 2 Input Capture Software Trig" mask="0x8000" name="PCST2"/>
+                    <bitfield caption="PSC 2 Input Capture Bytes" mask="0x0FFF" name="PICR2"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0xFD" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0xFC" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0xFB" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0xFA" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="Output Compare 2 RB Register" name="OCR2RB" offset="0xF8" size="2">
+                    <bitfield caption="Output Compare RB" mask="0xFFFF" name="OCR2RB"/>
+                </register>
+                <register caption="Output Compare 2 SB Register" name="OCR2SB" offset="0xF6" size="2">
+                    <bitfield caption="Output Compare SB" mask="0x0FFF" name="OCR2SB"/>
+                </register>
+                <register caption="Output Compare 2 RA Register" name="OCR2RA" offset="0xF4" size="2">
+                    <bitfield caption="Output Compare RA" mask="0x0FFF" name="OCR2RA"/>
+                </register>
+                <register caption="Output Compare 2 SA Register" name="OCR2SA" offset="0xF2" size="2">
+                    <bitfield caption="Output Compare SA" mask="0x0FFF" name="OCR2SA"/>
+                </register>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0xF1" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0xF0" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2_"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0xA5" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0xA4" size="1">
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM81.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM81.xml
new file mode 100644
index 00000000..0b448c47
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90PWM81.xml
@@ -0,0 +1,1086 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90PWM81" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0100" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC0" caption="Power Stage Controller">
+                        <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                    <instance name="PSC2" caption="Power Stage Controller">
+                        <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
+                <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
+                <interrupt index="3" name="PSC2_EEC" caption="PSC2 End Of Enhanced Cycle"/>
+                <interrupt index="4" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
+                <interrupt index="5" name="PSC0_EC" caption="PSC0 End Cycle"/>
+                <interrupt index="6" name="PSC0_EEC" caption="PSC0 End Of Enhanced Cycle"/>
+                <interrupt index="7" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
+                <interrupt index="8" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
+                <interrupt index="9" name="ANALOG_COMP_3" caption="Analog Comparator 3"/>
+                <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="14" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="15" name="SPI_STC" caption="SPI Serial Transfer Complet"/>
+                <interrupt index="16" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="17" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="18" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="19" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9388"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x88"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
+                    <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
+                    <bitfield caption="PSC2 Reset Behavior for 22 and 23" mask="0x40" name="PSC2RBA"/>
+                    <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
+                    <bitfield caption="PSC Reset Value" mask="0x10" name="PSCRV"/>
+                    <bitfield caption="PSC2 and PSC0 input Reset Behavior" mask="0x08" name="PSCINRB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PE0 as I/O pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]"
+                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]"
+                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
+                <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]"
+                       name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]"
+                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]"
+                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]"
+                       name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]"
+                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]"
+                       name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]"
+                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]"
+                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]"
+                       name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]"
+                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]"
+                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]"
+                       name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]"
+                       name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]"
+                       name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS"
+                       value="0x03"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]"
+                       name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS"
+                       value="0x23"/>
+                <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS"
+                       value="0x33"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]"
+                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]"
+                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]"
+                       name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]"
+                       name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
+                <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]"
+                       name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS"
+                       value="0x06"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1"
+                       value="0x16"/>
+                <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS"
+                       value="0x26"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0x58" size="2" mask="0xFFFF" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0x03FF" name="DACH"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x76" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x37" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x38" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x56" size="1" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x82" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x89" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x41" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x40" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x28" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x4C" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data Register" mask="0xFFFF" name="ADC"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
+                    <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10"
+                              name="ADSSEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x77" size="1">
+                    <bitfield caption="ADC8 Digital input Disable" mask="0x80" name="ADC8D"/>
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x40" name="ADC7D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x78" size="1">
+                    <bitfield caption="" mask="0x08" name="ACMP1MD"/>
+                    <bitfield caption="" mask="0x04" name="AMP0PD"/>
+                    <bitfield caption="ADC10 Digital input Disable" mask="0x02" name="ADC10D"/>
+                    <bitfield caption="ADC9 Digital input Disable" mask="0x01" name="ADC9D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x79" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="" mask="0x08" name="AMP0GS"/>
+                    <bitfield caption="" mask="0x03" name="AMP0TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator3 Control Register" name="AC3CON" offset="0x7F" size="1">
+                    <bitfield caption="Analog Comparator3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"/>
+                    <bitfield caption="Analog Comparator 3 Alternate Output Enable" mask="0x08" name="AC3OEA"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                </register>
+                <register caption="" name="AC3ECON" offset="0x7C" size="1">
+                    <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC3OI"/>
+                    <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC3OE"/>
+                    <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC3H"/>
+                </register>
+                <register caption="" name="AC2ECON" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC2OI"/>
+                    <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC2OE"/>
+                    <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC2H"/>
+                </register>
+                <register caption="" name="AC1ECON" offset="0x7A" size="1">
+                    <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC1OI"/>
+                    <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC1OE"/>
+                    <bitfield caption="Analog Comparator Interrupt Capture Enable" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC1H"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Reset Pin Disable" mask="0x08" name="RSTDIS"/>
+                    <bitfield caption="Frequency Selection of the Calibrated RC Oscillator" mask="0x04" name="CKRC81"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x83" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x87" size="1">
+                    <bitfield caption="" mask="0x3C" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x86" size="1">
+                    <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
+                    <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSCR"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="" name="CLKCSR" offset="0x84" size="1">
+                    <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
+                    <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
+                    <bitfield caption="Clock Control" mask="0x0F" name="CLKC"/>
+                </register>
+                <register caption="" name="CLKSELR" offset="0x85" size="1">
+                    <bitfield caption="Clock OUT" mask="0x40" name="COUT"/>
+                    <bitfield caption="Clock Start up Time" mask="0x30" name="CSUT"/>
+                    <bitfield caption="Clock Source Select" mask="0x0F" name="CKSEL"/>
+                </register>
+                <register caption="BandGap Current Calibration Register" name="BGCCR" offset="0x81" size="1">
+                    <bitfield caption="" mask="0x0F" name="BGCC"/>
+                </register>
+                <register caption="BandGap Resistor Calibration Register" name="BGCRR" offset="0x80" size="1">
+                    <bitfield caption="" mask="0x0F" name="BGCR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access Bytes" name="EEAR" offset="0x3E" size="2">
+                    <bitfield caption="EEPROM Address bytes" mask="0x01FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="None Volatile Busy Memory Busy" mask="0x80" name="NVMBSY"/>
+                    <bitfield caption="EEPROM Page Access" mask="0x40" name="EEPAGE"/>
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC0">
+                <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0x68" size="2">
+                    <bitfield caption="PSC 0 Capture Software Trigger Bit" mask="0x8000" name="PCST0"/>
+                    <bitfield caption="PSC 0 Input Capture Bytes" mask="0x0FFF" name="PICR0"/>
+                </register>
+                <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0x63" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
+                    <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
+                </register>
+                <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0x62" size="1">
+                    <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
+                    <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
+                    <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
+                    <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
+                    <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
+                </register>
+                <register caption="PSC 0 Control Register" name="PCTL0" offset="0x32" size="1">
+                    <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
+                    <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x24" name="PBFM0"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
+                    <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
+                    <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
+                    <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
+                </register>
+                <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0x31" size="1">
+                    <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
+                    <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
+                    <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
+                    <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
+                    <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
+                    <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR0RB" offset="0x44" size="2">
+                    <bitfield caption="Output Compare 0 RB" mask="0xFFFF" name="OCR0RB"/>
+                </register>
+                <register caption="Output Compare SB Register " name="OCR0SB" offset="0x42" size="2">
+                    <bitfield caption="Output Compare 0 SB" mask="0x0FFF" name="OCR0SB"/>
+                </register>
+                <register caption="Output Compare RA Register " name="OCR0RA" offset="0x4A" size="2">
+                    <bitfield caption="Output Compare 0 RA" mask="0x0FFF" name="OCR0RA"/>
+                </register>
+                <register caption="Output Compare SA Register " name="OCR0SA" offset="0x60" size="2">
+                    <bitfield caption="Output Compare 0 SA" mask="0x0FFF" name="OCR0SA"/>
+                </register>
+                <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0x6A" size="1">
+                    <bitfield caption="PSC Input Select" mask="0x80" name="PISEL0A1"/>
+                    <bitfield caption="PSC Input Select" mask="0x40" name="PISEL0B1"/>
+                    <bitfield caption="Synchronisation out for ADC selection" mask="0x30" name="PSYNC0"/>
+                    <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
+                    <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0x2F" size="1">
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
+                    <bitfield caption="End of Enhanced Cycle Enable" mask="0x02" name="PEOEPE0"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
+                </register>
+                <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0x30" size="1">
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
+                    <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
+                    <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Stage Controller" name="PSC2">
+                <register caption="PSC 2 Input Capture Register" name="PICR2" offset="0x6C" size="2">
+                    <bitfield caption="PSC 2 Capture Software Trigger Bit" mask="0x8000" name="PCST2"/>
+                    <bitfield caption="PSC 2 Input Capture Bytes" mask="0x0FFF" name="PICR2"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0x67" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
+                    <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
+                </register>
+                <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0x66" size="1">
+                    <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
+                    <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
+                    <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
+                    <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
+                    <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
+                </register>
+                <register caption="PSC 2 Control Register" name="PCTL2" offset="0x36" size="1">
+                    <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
+                    <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
+                    <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
+                    <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
+                    <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
+                    <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
+                </register>
+                <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0x35" size="1">
+                    <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
+                    <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
+                    <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
+                    <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
+                    <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
+                    <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
+                    <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
+                </register>
+                <register caption="PSC 2 Enhanced Configuration Register" name="PCNFE2" offset="0x70" size="1">
+                    <bitfield caption="" mask="0xE0" name="PASDLK2"/>
+                    <bitfield caption="" mask="0x10" name="PBFM21"/>
+                    <bitfield caption="" mask="0x08" name="PELEV2A1"/>
+                    <bitfield caption="" mask="0x04" name="PELEV2B1"/>
+                    <bitfield caption="" mask="0x02" name="PISEL2A1"/>
+                    <bitfield caption="" mask="0x01" name="PISEL2B1"/>
+                </register>
+                <register caption="Output Compare RB Register " name="OCR2RB" offset="0x48" size="2">
+                    <bitfield caption="Output Compare 2 RB" mask="0xFFFF" name="OCR2RB"/>
+                </register>
+                <register caption="Output Compare SB Register " name="OCR2SB" offset="0x46" size="2">
+                    <bitfield caption="Output Compare 2 SB" mask="0x0FFF" name="OCR2SB"/>
+                </register>
+                <register caption="Output Compare RA Register " name="OCR2RA" offset="0x4E" size="2">
+                    <bitfield caption="Output Compare 2 RA" mask="0x0FFF" name="OCR2RA"/>
+                </register>
+                <register caption="Output Compare SA Register " name="OCR2SA" offset="0x64" size="2">
+                    <bitfield caption="Output Compare 2 SA" mask="0x0FFF" name="OCR2SA"/>
+                </register>
+                <register caption="PSC 2 Output Matrix" name="POM2" offset="0x6F" size="1">
+                    <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
+                    <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
+                </register>
+                <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0x6E" size="1">
+                    <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
+                    <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
+                    <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
+                    <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
+                    <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
+                </register>
+                <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0x33" size="1">
+                    <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
+                    <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
+                    <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
+                    <bitfield caption="End of Enhanced Cycle Interrupt Enable" mask="0x02" name="PEOEPE2"/>
+                    <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
+                </register>
+                <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0x34" size="1">
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
+                    <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
+                    <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
+                    <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
+                    <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
+                    <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
+                    <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
+                </register>
+                <register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1">
+                    <bitfield caption="Analog Synchronization Delay bits" mask="0xFF" name="PASDLY2"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x21" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x10" name="WGM13"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x5A" size="2">
+                    <bitfield caption="Timer/Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x8C" size="2">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB1286.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB1286.xml
new file mode 100644
index 00000000..60c27311
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB1286.xml
@@ -0,0 +1,1355 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.2" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90USB1286" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_GLOBAL">
+                    <instance name="USB_GLOBAL" caption="USB Controller">
+                        <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
+                                        caption="USB Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="11" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="26" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="27" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="TWI" caption="2-wire Serial Interface        "/>
+                <interrupt index="37" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0978203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x82"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x03"/>
+                <value caption="Brown-out detection at VCC=3.4 V" name="3V4" value="0x02"/>
+                <value caption="Brown-out detection at VCC=3.5 V" name="3V5" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM" values="CPU_PIN_RELEASE"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS3">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_PIN_RELEASE">
+                <value caption="None" name="VAL_0x00" value="0x00"/>
+                <value caption="Px7" name="VAL_0x01" value="0x01"/>
+                <value caption="Px7-Px6" name="VAL_0x02" value="0x02"/>
+                <value caption="Px7-Px5" name="VAL_0x03" value="0x03"/>
+                <value caption="Px7-Px4" name="VAL_0x04" value="0x04"/>
+                <value caption="Px7-Px3" name="VAL_0x05" value="0x05"/>
+                <value caption="Px7-Px2" name="VAL_0x06" value="0x06"/>
+                <value caption="Full Port X" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x7F"/>
+                <register caption="" name="UEBCHX" offset="0xF3" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x7F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="" mask="0x04" name="LSM"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="USB Controller" name="USB_GLOBAL">
+            <register-group caption="USB Controller" name="USB_GLOBAL">
+                <register caption="" name="USBINT" offset="0xDA" size="1">
+                    <bitfield caption="" mask="0x02" name="IDTI"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTI"/>
+                </register>
+                <register caption="" name="USBSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x08" name="SPEED"/>
+                    <bitfield caption="" mask="0x02" name="ID"/>
+                    <bitfield caption="" mask="0x01" name="VBUS"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x40" name="HOST"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                    <bitfield caption="" mask="0x10" name="OTGPADE"/>
+                    <bitfield caption="" mask="0x02" name="IDTE"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTE"/>
+                </register>
+                <register caption="USB Hardware Configuration Register" name="UHWCON" offset="0xD7" size="1">
+                    <bitfield caption="" mask="0x80" name="UIMOD"/>
+                    <bitfield caption="" mask="0x40" name="UIDE"/>
+                    <bitfield caption="" mask="0x10" name="UVCONE"/>
+                    <bitfield caption="" mask="0x01" name="UVREGE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB1287.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB1287.xml
new file mode 100644
index 00000000..7732906c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB1287.xml
@@ -0,0 +1,1480 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.2" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90USB1287" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="USB_GLOBAL">
+                    <instance name="USB_GLOBAL" caption="USB Controller">
+                        <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
+                                        caption="USB Controller"/>
+                    </instance>
+                </module>
+                <module name="USB_HOST">
+                    <instance name="USB_HOST" caption="USB Host Registers">
+                        <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data"
+                                        caption="USB Host Registers"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="11" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="26" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="27" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="TWI" caption="2-wire Serial Interface        "/>
+                <interrupt index="37" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0978203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x82"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x03"/>
+                <value caption="Brown-out detection at VCC=3.4 V" name="3V4" value="0x02"/>
+                <value caption="Brown-out detection at VCC=3.5 V" name="3V5" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM" values="CPU_PIN_RELEASE"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS3">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_PIN_RELEASE">
+                <value caption="None" name="VAL_0x00" value="0x00"/>
+                <value caption="Px7" name="VAL_0x01" value="0x01"/>
+                <value caption="Px7-Px6" name="VAL_0x02" value="0x02"/>
+                <value caption="Px7-Px5" name="VAL_0x03" value="0x03"/>
+                <value caption="Px7-Px4" name="VAL_0x04" value="0x04"/>
+                <value caption="Px7-Px3" name="VAL_0x05" value="0x05"/>
+                <value caption="Px7-Px2" name="VAL_0x06" value="0x06"/>
+                <value caption="Full Port X" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x7F"/>
+                <register caption="" name="UEBCHX" offset="0xF3" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x7F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="" mask="0x04" name="LSM"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Controller" name="USB_GLOBAL">
+            <register-group caption="USB Controller" name="USB_GLOBAL">
+                <register caption="" name="OTGINT" offset="0xDF" size="1">
+                    <bitfield caption="" mask="0x20" name="STOI"/>
+                    <bitfield caption="" mask="0x10" name="HNPERRI"/>
+                    <bitfield caption="" mask="0x08" name="ROLEEXI"/>
+                    <bitfield caption="" mask="0x04" name="BCERRI"/>
+                    <bitfield caption="" mask="0x02" name="VBERRI"/>
+                    <bitfield caption="" mask="0x01" name="SRPI"/>
+                </register>
+                <register caption="" name="OTGIEN" offset="0xDE" size="1">
+                    <bitfield caption="" mask="0x20" name="STOE"/>
+                    <bitfield caption="" mask="0x10" name="HNPERRE"/>
+                    <bitfield caption="" mask="0x08" name="ROLEEXE"/>
+                    <bitfield caption="" mask="0x04" name="BCERRE"/>
+                    <bitfield caption="" mask="0x02" name="VBERRE"/>
+                    <bitfield caption="" mask="0x01" name="SRPE"/>
+                </register>
+                <register caption="" name="OTGCON" offset="0xDD" size="1">
+                    <bitfield caption="" mask="0x20" name="HNPREQ"/>
+                    <bitfield caption="" mask="0x10" name="SRPREQ"/>
+                    <bitfield caption="" mask="0x08" name="SRPSEL"/>
+                    <bitfield caption="" mask="0x04" name="VBUSHWC"/>
+                    <bitfield caption="" mask="0x02" name="VBUSREQ"/>
+                    <bitfield caption="" mask="0x01" name="VBUSRQC"/>
+                </register>
+                <register caption="" name="OTGTCON" offset="0xF9" size="1">
+                    <bitfield caption="" mask="0x80" name="OTGTCON_7"/>
+                    <bitfield caption="" mask="0x60" name="PAGE"/>
+                    <bitfield caption="" mask="0x07" name="VALUE_2"/>
+                </register>
+                <register caption="" name="USBINT" offset="0xDA" size="1">
+                    <bitfield caption="" mask="0x02" name="IDTI"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTI"/>
+                </register>
+                <register caption="" name="USBSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x08" name="SPEED"/>
+                    <bitfield caption="" mask="0x02" name="ID"/>
+                    <bitfield caption="" mask="0x01" name="VBUS"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x40" name="HOST"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                    <bitfield caption="" mask="0x10" name="OTGPADE"/>
+                    <bitfield caption="" mask="0x02" name="IDTE"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTE"/>
+                </register>
+                <register caption="USB Hardware Configuration Register" name="UHWCON" offset="0xD7" size="1">
+                    <bitfield caption="" mask="0x80" name="UIMOD"/>
+                    <bitfield caption="" mask="0x40" name="UIDE"/>
+                    <bitfield caption="" mask="0x10" name="UVCONE"/>
+                    <bitfield caption="" mask="0x01" name="UVREGE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Host Registers" name="USB_HOST">
+            <register-group caption="USB Host Registers" name="USB_HOST">
+                <register caption="" name="UPERRX" offset="0xF5" size="1">
+                    <bitfield caption="" mask="0x60" name="COUNTER"/>
+                    <bitfield caption="" mask="0x10" name="CRC16"/>
+                    <bitfield caption="" mask="0x08" name="TIMEOUT"/>
+                    <bitfield caption="" mask="0x04" name="PID"/>
+                    <bitfield caption="" mask="0x02" name="DATAPID"/>
+                    <bitfield caption="" mask="0x01" name="DATATGL"/>
+                </register>
+                <register caption="" name="UPINT" offset="0xF8" size="1" mask="0x7F"/>
+                <register caption="" name="UPBCHX" offset="0xF7" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UPBCLX" offset="0xF6" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UPDATX" offset="0xAF" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UPIENX" offset="0xAE" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKEDE"/>
+                    <bitfield caption="" mask="0x10" name="PERRE"/>
+                    <bitfield caption="" mask="0x08" name="TXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="TXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="RXSTALLE"/>
+                    <bitfield caption="" mask="0x01" name="RXINE"/>
+                </register>
+                <register caption="" name="UPCFG2X" offset="0xAD" size="1" mask="0xFF"/>
+                <register caption="" name="UPSTAX" offset="0xAC" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYK"/>
+                </register>
+                <register caption="" name="UPCFG1X" offset="0xAB" size="1">
+                    <bitfield caption="" mask="0x70" name="PSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="PBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UPCFG0X" offset="0xAA" size="1">
+                    <bitfield caption="" mask="0xC0" name="PTYPE"/>
+                    <bitfield caption="" mask="0x30" name="PTOKEN"/>
+                    <bitfield caption="" mask="0x0F" name="PEPNUM"/>
+                </register>
+                <register caption="" name="UPCONX" offset="0xA9" size="1">
+                    <bitfield caption="" mask="0x40" name="PFREEZE"/>
+                    <bitfield caption="" mask="0x20" name="INMODE"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="PEN"/>
+                </register>
+                <register caption="" name="UPRST" offset="0xA8" size="1">
+                    <bitfield caption="" mask="0x7F" name="PRST"/>
+                </register>
+                <register caption="" name="UPNUM" offset="0xA7" size="1" mask="0x07"/>
+                <register caption="" name="UPINTX" offset="0xA6" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKEDI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="PERRI"/>
+                    <bitfield caption="" mask="0x08" name="TXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="TXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="RXSTALLI"/>
+                    <bitfield caption="" mask="0x01" name="RXINI"/>
+                </register>
+                <register caption="" name="UPINRQX" offset="0xA5" size="1" mask="0xFF"/>
+                <register caption="" name="UHFLEN" offset="0xA4" size="1" mask="0xFF"/>
+                <register caption="" name="UHFNUM" offset="0xA2" size="2" mask="0x07FF"/>
+                <register caption="" name="UHADDR" offset="0xA1" size="1" mask="0x7F"/>
+                <register caption="" name="UHIEN" offset="0xA0" size="1">
+                    <bitfield caption="" mask="0x40" name="HWUPE"/>
+                    <bitfield caption="" mask="0x20" name="HSOFE"/>
+                    <bitfield caption="" mask="0x10" name="RXRSME"/>
+                    <bitfield caption="" mask="0x08" name="RSMEDE"/>
+                    <bitfield caption="" mask="0x04" name="RSTE"/>
+                    <bitfield caption="" mask="0x02" name="DDISCE"/>
+                    <bitfield caption="" mask="0x01" name="DCONNE"/>
+                </register>
+                <register caption="" name="UHINT" offset="0x9F" size="1">
+                    <bitfield caption="" mask="0x40" name="UHUPI"/>
+                    <bitfield caption="" mask="0x20" name="HSOFI"/>
+                    <bitfield caption="" mask="0x10" name="RXRSMI"/>
+                    <bitfield caption="" mask="0x08" name="RSMEDI"/>
+                    <bitfield caption="" mask="0x04" name="RSTI"/>
+                    <bitfield caption="" mask="0x02" name="DDISCI"/>
+                    <bitfield caption="" mask="0x01" name="DCONNI"/>
+                </register>
+                <register caption="" name="UHCON" offset="0x9E" size="1">
+                    <bitfield caption="" mask="0x04" name="RESUME"/>
+                    <bitfield caption="" mask="0x02" name="RESET"/>
+                    <bitfield caption="" mask="0x01" name="SOFEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB162.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB162.xml
new file mode 100644
index 00000000..3d253cc0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB162.xml
@@ -0,0 +1,1016 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90USB162" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="PS2">
+                    <instance name="PS2" caption="PS/2 Controller">
+                        <register-group name="PS2" name-in-module="PS2" offset="0x00" address-space="data"
+                                        caption="PS/2 Controller"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="12" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="13" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="14" name="TIMER1_CAPT" caption="Timer/Counter2 Capture Event"/>
+                <interrupt index="15" name="TIMER1_COMPA" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="16" name="TIMER1_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="17" name="TIMER1_COMPC" caption="Timer/Counter2 Compare Match C"/>
+                <interrupt index="18" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="19" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="20" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="21" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="23" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="24" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="25" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="26" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9482"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x82"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x40" name="RSTDISBL"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x06"/>
+                <value caption="Brown-out detection level at VCC=2.9 V" name="2V9" value="0x05"/>
+                <value caption="Brown-out detection level at VCC=3.0 V" name="3V0" value="0x04"/>
+                <value caption="Brown-out detection level at VCC=3.5 V" name="3V5" value="0x03"/>
+                <value caption="Brown-out detection level at VCC=3.6 V" name="3V6" value="0x02"/>
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x01"/>
+                <value caption="Brown-out detection level at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1">
+                    <bitfield caption="Port C Data Register bits" mask="0xF0" name="PORTC" lsb="4"/>
+                    <bitfield caption="Port C Data Register bits" mask="0x07" name="PORTC"/>
+                </register>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1">
+                    <bitfield caption="Port C Data Direction Register bits" mask="0xF0" name="DDC" lsb="4"/>
+                    <bitfield caption="Port C Data Direction Register bits" mask="0x07" name="DDC"/>
+                </register>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="Port C Input Pins bits" mask="0xF0" name="PINC" lsb="4"/>
+                    <bitfield caption="Port C Input Pins bits" mask="0x07" name="PINC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x1F"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x1F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="" mask="0x04" name="RSTCPU"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                </register>
+                <register caption="Regulator Control Register" name="REGCR" offset="0x63" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x01" name="REGDIS"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="PS/2 Controller" name="PS2">
+            <register-group caption="PS/2 Controller" name="PS2">
+                <register caption="" name="UPOE" offset="0xFB" size="1">
+                    <bitfield caption="" mask="0xC0" name="UPWE"/>
+                    <bitfield caption="" mask="0x30" name="UPDRV"/>
+                    <bitfield caption="" mask="0x08" name="SCKI"/>
+                    <bitfield caption="" mask="0x04" name="DATAI"/>
+                    <bitfield caption="" mask="0x02" name="DPI"/>
+                    <bitfield caption="" mask="0x01" name="DMI"/>
+                </register>
+                <register caption="PS2 Pad Enable register" name="PS2CON" offset="0xFA" size="1">
+                    <bitfield caption="Enable" mask="0x01" name="PS2EN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="USB reset flag" mask="0x20" name="USBRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xD2" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xD1" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xD0" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
+                          ocd-rw=""/>
+            </register-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="" mask="0x1F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="W"/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+                <register caption="Watchdog Timer Clock Divider" name="WDTCKD" offset="0x62" size="1">
+                    <bitfield caption="Watchdog Early Warning Interrupt Flag" mask="0x08" name="WDEWIF"/>
+                    <bitfield caption="Watchdog Early Warning Interrupt Enable" mask="0x04" name="WDEWIE"/>
+                    <bitfield caption="Watchdog Timer Clock Dividers" mask="0x03" name="WCLKD"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB646.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB646.xml
new file mode 100644
index 00000000..5b071cf2
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB646.xml
@@ -0,0 +1,1480 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90USB646" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="USB_GLOBAL">
+                    <instance name="USB_GLOBAL" caption="USB Controller">
+                        <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
+                                        caption="USB Controller"/>
+                    </instance>
+                </module>
+                <module name="USB_HOST">
+                    <instance name="USB_HOST" caption="USB Host Registers">
+                        <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data"
+                                        caption="USB Host Registers"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="11" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="26" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="27" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="TWI" caption="2-wire Serial Interface        "/>
+                <interrupt index="37" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0968203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x82"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x9B">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$7F00" name="512W_7F00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$7E00" name="1024W_7E00" value="0x02"/>
+                <value caption="Boot Flash size=2408 words start address=$7C00" name="2408W_7C00" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$7800" name="4096W_7800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x03"/>
+                <value caption="Brown-out detection at VCC=3.4 V" name="3V4" value="0x02"/>
+                <value caption="Brown-out detection at VCC=3.5 V" name="3V5" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM" values="CPU_PIN_RELEASE"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS3">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_PIN_RELEASE">
+                <value caption="None" name="VAL_0x00" value="0x00"/>
+                <value caption="Px7" name="VAL_0x01" value="0x01"/>
+                <value caption="Px7-Px6" name="VAL_0x02" value="0x02"/>
+                <value caption="Px7-Px5" name="VAL_0x03" value="0x03"/>
+                <value caption="Px7-Px4" name="VAL_0x04" value="0x04"/>
+                <value caption="Px7-Px3" name="VAL_0x05" value="0x05"/>
+                <value caption="Px7-Px2" name="VAL_0x06" value="0x06"/>
+                <value caption="Full Port X" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x7F"/>
+                <register caption="" name="UEBCHX" offset="0xF3" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x7F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="" mask="0x04" name="LSM"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Controller" name="USB_GLOBAL">
+            <register-group caption="USB Controller" name="USB_GLOBAL">
+                <register caption="" name="OTGINT" offset="0xDF" size="1">
+                    <bitfield caption="" mask="0x20" name="STOI"/>
+                    <bitfield caption="" mask="0x10" name="HNPERRI"/>
+                    <bitfield caption="" mask="0x08" name="ROLEEXI"/>
+                    <bitfield caption="" mask="0x04" name="BCERRI"/>
+                    <bitfield caption="" mask="0x02" name="VBERRI"/>
+                    <bitfield caption="" mask="0x01" name="SRPI"/>
+                </register>
+                <register caption="" name="OTGIEN" offset="0xDE" size="1">
+                    <bitfield caption="" mask="0x20" name="STOE"/>
+                    <bitfield caption="" mask="0x10" name="HNPERRE"/>
+                    <bitfield caption="" mask="0x08" name="ROLEEXE"/>
+                    <bitfield caption="" mask="0x04" name="BCERRE"/>
+                    <bitfield caption="" mask="0x02" name="VBERRE"/>
+                    <bitfield caption="" mask="0x01" name="SRPE"/>
+                </register>
+                <register caption="" name="OTGCON" offset="0xDD" size="1">
+                    <bitfield caption="" mask="0x20" name="HNPREQ"/>
+                    <bitfield caption="" mask="0x10" name="SRPREQ"/>
+                    <bitfield caption="" mask="0x08" name="SRPSEL"/>
+                    <bitfield caption="" mask="0x04" name="VBUSHWC"/>
+                    <bitfield caption="" mask="0x02" name="VBUSREQ"/>
+                    <bitfield caption="" mask="0x01" name="VBUSRQC"/>
+                </register>
+                <register caption="" name="OTGTCON" offset="0xF9" size="1">
+                    <bitfield caption="" mask="0x80" name="OTGTCON_7"/>
+                    <bitfield caption="" mask="0x60" name="PAGE"/>
+                    <bitfield caption="" mask="0x07" name="VALUE_2"/>
+                </register>
+                <register caption="" name="USBINT" offset="0xDA" size="1">
+                    <bitfield caption="" mask="0x02" name="IDTI"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTI"/>
+                </register>
+                <register caption="" name="USBSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x08" name="SPEED"/>
+                    <bitfield caption="" mask="0x02" name="ID"/>
+                    <bitfield caption="" mask="0x01" name="VBUS"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x40" name="HOST"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                    <bitfield caption="" mask="0x10" name="OTGPADE"/>
+                    <bitfield caption="" mask="0x02" name="IDTE"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTE"/>
+                </register>
+                <register caption="USB Hardware Configuration Register" name="UHWCON" offset="0xD7" size="1">
+                    <bitfield caption="" mask="0x80" name="UIMOD"/>
+                    <bitfield caption="" mask="0x40" name="UIDE"/>
+                    <bitfield caption="" mask="0x10" name="UVCONE"/>
+                    <bitfield caption="" mask="0x01" name="UVREGE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Host Registers" name="USB_HOST">
+            <register-group caption="USB Host Registers" name="USB_HOST">
+                <register caption="" name="UPERRX" offset="0xF5" size="1">
+                    <bitfield caption="" mask="0x60" name="COUNTER"/>
+                    <bitfield caption="" mask="0x10" name="CRC16"/>
+                    <bitfield caption="" mask="0x08" name="TIMEOUT"/>
+                    <bitfield caption="" mask="0x04" name="PID"/>
+                    <bitfield caption="" mask="0x02" name="DATAPID"/>
+                    <bitfield caption="" mask="0x01" name="DATATGL"/>
+                </register>
+                <register caption="" name="UPINT" offset="0xF8" size="1" mask="0x7F"/>
+                <register caption="" name="UPBCHX" offset="0xF7" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UPBCLX" offset="0xF6" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UPDATX" offset="0xAF" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UPIENX" offset="0xAE" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKEDE"/>
+                    <bitfield caption="" mask="0x10" name="PERRE"/>
+                    <bitfield caption="" mask="0x08" name="TXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="TXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="RXSTALLE"/>
+                    <bitfield caption="" mask="0x01" name="RXINE"/>
+                </register>
+                <register caption="" name="UPCFG2X" offset="0xAD" size="1" mask="0xFF"/>
+                <register caption="" name="UPSTAX" offset="0xAC" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYK"/>
+                </register>
+                <register caption="" name="UPCFG1X" offset="0xAB" size="1">
+                    <bitfield caption="" mask="0x70" name="PSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="PBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UPCFG0X" offset="0xAA" size="1">
+                    <bitfield caption="" mask="0xC0" name="PTYPE"/>
+                    <bitfield caption="" mask="0x30" name="PTOKEN"/>
+                    <bitfield caption="" mask="0x0F" name="PEPNUM"/>
+                </register>
+                <register caption="" name="UPCONX" offset="0xA9" size="1">
+                    <bitfield caption="" mask="0x40" name="PFREEZE"/>
+                    <bitfield caption="" mask="0x20" name="INMODE"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="PEN"/>
+                </register>
+                <register caption="" name="UPRST" offset="0xA8" size="1">
+                    <bitfield caption="" mask="0x7F" name="PRST"/>
+                </register>
+                <register caption="" name="UPNUM" offset="0xA7" size="1" mask="0x07"/>
+                <register caption="" name="UPINTX" offset="0xA6" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKEDI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="PERRI"/>
+                    <bitfield caption="" mask="0x08" name="TXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="TXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="RXSTALLI"/>
+                    <bitfield caption="" mask="0x01" name="RXINI"/>
+                </register>
+                <register caption="" name="UPINRQX" offset="0xA5" size="1" mask="0xFF"/>
+                <register caption="" name="UHFLEN" offset="0xA4" size="1" mask="0xFF"/>
+                <register caption="" name="UHFNUM" offset="0xA2" size="2" mask="0x07FF"/>
+                <register caption="" name="UHADDR" offset="0xA1" size="1" mask="0x7F"/>
+                <register caption="" name="UHIEN" offset="0xA0" size="1">
+                    <bitfield caption="" mask="0x40" name="HWUPE"/>
+                    <bitfield caption="" mask="0x20" name="HSOFE"/>
+                    <bitfield caption="" mask="0x10" name="RXRSME"/>
+                    <bitfield caption="" mask="0x08" name="RSMEDE"/>
+                    <bitfield caption="" mask="0x04" name="RSTE"/>
+                    <bitfield caption="" mask="0x02" name="DDISCE"/>
+                    <bitfield caption="" mask="0x01" name="DCONNE"/>
+                </register>
+                <register caption="" name="UHINT" offset="0x9F" size="1">
+                    <bitfield caption="" mask="0x40" name="UHUPI"/>
+                    <bitfield caption="" mask="0x20" name="HSOFI"/>
+                    <bitfield caption="" mask="0x10" name="RXRSMI"/>
+                    <bitfield caption="" mask="0x08" name="RSMEDI"/>
+                    <bitfield caption="" mask="0x04" name="RSTI"/>
+                    <bitfield caption="" mask="0x02" name="DDISCI"/>
+                    <bitfield caption="" mask="0x01" name="DCONNI"/>
+                </register>
+                <register caption="" name="UHCON" offset="0x9E" size="1">
+                    <bitfield caption="" mask="0x04" name="RESUME"/>
+                    <bitfield caption="" mask="0x02" name="RESET"/>
+                    <bitfield caption="" mask="0x01" name="SOFEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB647.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB647.xml
new file mode 100644
index 00000000..26462da5
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB647.xml
@@ -0,0 +1,1480 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90USB647" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="USB_GLOBAL">
+                    <instance name="USB_GLOBAL" caption="USB Controller">
+                        <register-group name="USB_GLOBAL" name-in-module="USB_GLOBAL" offset="0x00" address-space="data"
+                                        caption="USB Controller"/>
+                    </instance>
+                </module>
+                <module name="USB_HOST">
+                    <instance name="USB_HOST" caption="USB Host Registers">
+                        <register-group name="USB_HOST" name-in-module="USB_HOST" offset="0x00" address-space="data"
+                                        caption="USB Host Registers"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="11" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="26" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="27" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="TWI" caption="2-wire Serial Interface        "/>
+                <interrupt index="37" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0968203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x82"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF3">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x9B">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$7F00" name="512W_7F00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$7E00" name="1024W_7E00" value="0x02"/>
+                <value caption="Boot Flash size=2408 words start address=$7C00" name="2408W_7C00" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$7800" name="4096W_7800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x03"/>
+                <value caption="Brown-out detection at VCC=3.4 V" name="3V4" value="0x02"/>
+                <value caption="Brown-out detection at VCC=3.5 V" name="3V5" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS3"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM" values="CPU_PIN_RELEASE"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS3">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_PIN_RELEASE">
+                <value caption="None" name="VAL_0x00" value="0x00"/>
+                <value caption="Px7" name="VAL_0x01" value="0x01"/>
+                <value caption="Px7-Px6" name="VAL_0x02" value="0x02"/>
+                <value caption="Px7-Px5" name="VAL_0x03" value="0x03"/>
+                <value caption="Px7-Px4" name="VAL_0x04" value="0x04"/>
+                <value caption="Px7-Px3" name="VAL_0x05" value="0x05"/>
+                <value caption="Px7-Px2" name="VAL_0x06" value="0x06"/>
+                <value caption="Full Port X" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x7F"/>
+                <register caption="" name="UEBCHX" offset="0xF3" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x7F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="" mask="0x04" name="LSM"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Controller" name="USB_GLOBAL">
+            <register-group caption="USB Controller" name="USB_GLOBAL">
+                <register caption="" name="OTGINT" offset="0xDF" size="1">
+                    <bitfield caption="" mask="0x20" name="STOI"/>
+                    <bitfield caption="" mask="0x10" name="HNPERRI"/>
+                    <bitfield caption="" mask="0x08" name="ROLEEXI"/>
+                    <bitfield caption="" mask="0x04" name="BCERRI"/>
+                    <bitfield caption="" mask="0x02" name="VBERRI"/>
+                    <bitfield caption="" mask="0x01" name="SRPI"/>
+                </register>
+                <register caption="" name="OTGIEN" offset="0xDE" size="1">
+                    <bitfield caption="" mask="0x20" name="STOE"/>
+                    <bitfield caption="" mask="0x10" name="HNPERRE"/>
+                    <bitfield caption="" mask="0x08" name="ROLEEXE"/>
+                    <bitfield caption="" mask="0x04" name="BCERRE"/>
+                    <bitfield caption="" mask="0x02" name="VBERRE"/>
+                    <bitfield caption="" mask="0x01" name="SRPE"/>
+                </register>
+                <register caption="" name="OTGCON" offset="0xDD" size="1">
+                    <bitfield caption="" mask="0x20" name="HNPREQ"/>
+                    <bitfield caption="" mask="0x10" name="SRPREQ"/>
+                    <bitfield caption="" mask="0x08" name="SRPSEL"/>
+                    <bitfield caption="" mask="0x04" name="VBUSHWC"/>
+                    <bitfield caption="" mask="0x02" name="VBUSREQ"/>
+                    <bitfield caption="" mask="0x01" name="VBUSRQC"/>
+                </register>
+                <register caption="" name="OTGTCON" offset="0xF9" size="1">
+                    <bitfield caption="" mask="0x80" name="OTGTCON_7"/>
+                    <bitfield caption="" mask="0x60" name="PAGE"/>
+                    <bitfield caption="" mask="0x07" name="VALUE_2"/>
+                </register>
+                <register caption="" name="USBINT" offset="0xDA" size="1">
+                    <bitfield caption="" mask="0x02" name="IDTI"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTI"/>
+                </register>
+                <register caption="" name="USBSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x08" name="SPEED"/>
+                    <bitfield caption="" mask="0x02" name="ID"/>
+                    <bitfield caption="" mask="0x01" name="VBUS"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x40" name="HOST"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                    <bitfield caption="" mask="0x10" name="OTGPADE"/>
+                    <bitfield caption="" mask="0x02" name="IDTE"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTE"/>
+                </register>
+                <register caption="USB Hardware Configuration Register" name="UHWCON" offset="0xD7" size="1">
+                    <bitfield caption="" mask="0x80" name="UIMOD"/>
+                    <bitfield caption="" mask="0x40" name="UIDE"/>
+                    <bitfield caption="" mask="0x10" name="UVCONE"/>
+                    <bitfield caption="" mask="0x01" name="UVREGE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Host Registers" name="USB_HOST">
+            <register-group caption="USB Host Registers" name="USB_HOST">
+                <register caption="" name="UPERRX" offset="0xF5" size="1">
+                    <bitfield caption="" mask="0x60" name="COUNTER"/>
+                    <bitfield caption="" mask="0x10" name="CRC16"/>
+                    <bitfield caption="" mask="0x08" name="TIMEOUT"/>
+                    <bitfield caption="" mask="0x04" name="PID"/>
+                    <bitfield caption="" mask="0x02" name="DATAPID"/>
+                    <bitfield caption="" mask="0x01" name="DATATGL"/>
+                </register>
+                <register caption="" name="UPINT" offset="0xF8" size="1" mask="0x7F"/>
+                <register caption="" name="UPBCHX" offset="0xF7" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UPBCLX" offset="0xF6" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UPDATX" offset="0xAF" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UPIENX" offset="0xAE" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKEDE"/>
+                    <bitfield caption="" mask="0x10" name="PERRE"/>
+                    <bitfield caption="" mask="0x08" name="TXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="TXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="RXSTALLE"/>
+                    <bitfield caption="" mask="0x01" name="RXINE"/>
+                </register>
+                <register caption="" name="UPCFG2X" offset="0xAD" size="1" mask="0xFF"/>
+                <register caption="" name="UPSTAX" offset="0xAC" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYK"/>
+                </register>
+                <register caption="" name="UPCFG1X" offset="0xAB" size="1">
+                    <bitfield caption="" mask="0x70" name="PSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="PBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UPCFG0X" offset="0xAA" size="1">
+                    <bitfield caption="" mask="0xC0" name="PTYPE"/>
+                    <bitfield caption="" mask="0x30" name="PTOKEN"/>
+                    <bitfield caption="" mask="0x0F" name="PEPNUM"/>
+                </register>
+                <register caption="" name="UPCONX" offset="0xA9" size="1">
+                    <bitfield caption="" mask="0x40" name="PFREEZE"/>
+                    <bitfield caption="" mask="0x20" name="INMODE"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="PEN"/>
+                </register>
+                <register caption="" name="UPRST" offset="0xA8" size="1">
+                    <bitfield caption="" mask="0x7F" name="PRST"/>
+                </register>
+                <register caption="" name="UPNUM" offset="0xA7" size="1" mask="0x07"/>
+                <register caption="" name="UPINTX" offset="0xA6" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKEDI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="PERRI"/>
+                    <bitfield caption="" mask="0x08" name="TXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="TXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="RXSTALLI"/>
+                    <bitfield caption="" mask="0x01" name="RXINI"/>
+                </register>
+                <register caption="" name="UPINRQX" offset="0xA5" size="1" mask="0xFF"/>
+                <register caption="" name="UHFLEN" offset="0xA4" size="1" mask="0xFF"/>
+                <register caption="" name="UHFNUM" offset="0xA2" size="2" mask="0x07FF"/>
+                <register caption="" name="UHADDR" offset="0xA1" size="1" mask="0x7F"/>
+                <register caption="" name="UHIEN" offset="0xA0" size="1">
+                    <bitfield caption="" mask="0x40" name="HWUPE"/>
+                    <bitfield caption="" mask="0x20" name="HSOFE"/>
+                    <bitfield caption="" mask="0x10" name="RXRSME"/>
+                    <bitfield caption="" mask="0x08" name="RSMEDE"/>
+                    <bitfield caption="" mask="0x04" name="RSTE"/>
+                    <bitfield caption="" mask="0x02" name="DDISCE"/>
+                    <bitfield caption="" mask="0x01" name="DCONNE"/>
+                </register>
+                <register caption="" name="UHINT" offset="0x9F" size="1">
+                    <bitfield caption="" mask="0x40" name="UHUPI"/>
+                    <bitfield caption="" mask="0x20" name="HSOFI"/>
+                    <bitfield caption="" mask="0x10" name="RXRSMI"/>
+                    <bitfield caption="" mask="0x08" name="RSMEDI"/>
+                    <bitfield caption="" mask="0x04" name="RSTI"/>
+                    <bitfield caption="" mask="0x02" name="DDISCI"/>
+                    <bitfield caption="" mask="0x01" name="DCONNI"/>
+                </register>
+                <register caption="" name="UHCON" offset="0x9E" size="1">
+                    <bitfield caption="" mask="0x04" name="RESUME"/>
+                    <bitfield caption="" mask="0x02" name="RESET"/>
+                    <bitfield caption="" mask="0x01" name="SOFEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB82.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB82.xml
new file mode 100644
index 00000000..ed8ff38a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/AT90USB82.xml
@@ -0,0 +1,1016 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="AT90USB82" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="PS2">
+                    <instance name="PS2" caption="PS/2 Controller">
+                        <register-group name="PS2" name-in-module="PS2" offset="0x00" address-space="data"
+                                        caption="PS/2 Controller"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="12" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="13" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="14" name="TIMER1_CAPT" caption="Timer/Counter2 Capture Event"/>
+                <interrupt index="15" name="TIMER1_COMPA" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="16" name="TIMER1_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="17" name="TIMER1_COMPC" caption="Timer/Counter2 Compare Match C"/>
+                <interrupt index="18" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="19" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="20" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="21" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="23" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="24" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="25" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="26" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9682"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x82"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x40" name="RSTDISBL"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x06"/>
+                <value caption="Brown-out detection level at VCC=2.9 V" name="2V9" value="0x05"/>
+                <value caption="Brown-out detection level at VCC=3.0 V" name="3V0" value="0x04"/>
+                <value caption="Brown-out detection level at VCC=3.5 V" name="3V5" value="0x03"/>
+                <value caption="Brown-out detection level at VCC=3.6 V" name="3V6" value="0x02"/>
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x01"/>
+                <value caption="Brown-out detection level at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1">
+                    <bitfield caption="Port C Data Register bits" mask="0xF0" name="PORTC" lsb="4"/>
+                    <bitfield caption="Port C Data Register bits" mask="0x07" name="PORTC"/>
+                </register>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1">
+                    <bitfield caption="Port C Data Direction Register bits" mask="0xF0" name="DDC" lsb="4"/>
+                    <bitfield caption="Port C Data Direction Register bits" mask="0x07" name="DDC"/>
+                </register>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="Port C Input Pins bits" mask="0xF0" name="PINC" lsb="4"/>
+                    <bitfield caption="Port C Input Pins bits" mask="0x07" name="PINC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x1F"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x1F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="" mask="0x04" name="RSTCPU"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                </register>
+                <register caption="Regulator Control Register" name="REGCR" offset="0x63" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x01" name="REGDIS"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="PS/2 Controller" name="PS2">
+            <register-group caption="PS/2 Controller" name="PS2">
+                <register caption="" name="UPOE" offset="0xFB" size="1">
+                    <bitfield caption="" mask="0xC0" name="UPWE"/>
+                    <bitfield caption="" mask="0x30" name="UPDRV"/>
+                    <bitfield caption="" mask="0x08" name="SCKI"/>
+                    <bitfield caption="" mask="0x04" name="DATAI"/>
+                    <bitfield caption="" mask="0x02" name="DPI"/>
+                    <bitfield caption="" mask="0x01" name="DMI"/>
+                </register>
+                <register caption="PS2 Pad Enable register" name="PS2CON" offset="0xFA" size="1">
+                    <bitfield caption="Enable" mask="0x01" name="PS2EN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="USB reset flag" mask="0x20" name="USBRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xD2" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xD1" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xD0" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
+                          ocd-rw=""/>
+            </register-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="" mask="0x1F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="W"/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+                <register caption="Watchdog Timer Clock Divider" name="WDTCKD" offset="0x62" size="1">
+                    <bitfield caption="Watchdog Early Warning Interrupt Flag" mask="0x08" name="WDEWIF"/>
+                    <bitfield caption="Watchdog Early Warning Interrupt Enable" mask="0x04" name="WDEWIE"/>
+                    <bitfield caption="Watchdog Timer Clock Dividers" mask="0x03" name="WCLKD"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128.xml
new file mode 100644
index 00000000..f16a27d4
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128.xml
@@ -0,0 +1,1433 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega128L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega128L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega128-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega128-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+
+        <variant ordercode="ATmega128L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="3.0" vccmax="5.5"/>
+        <variant ordercode="ATmega128L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="3.0" vccmax="5.5"/>
+
+        <variant ordercode="ATmega128-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega128-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega128" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="SS" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="MISC">
+                    <instance name="MISC" caption="Other Registers">
+                        <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
+                                        caption="Other Registers"/>
+                        <signals>
+                            <signal group="AD" index="7" function="default" pad="PA7"/>
+                            <signal group="AD" index="6" function="default" pad="PA6"/>
+                            <signal group="AD" index="5" function="default" pad="PA5"/>
+                            <signal group="AD" index="4" function="default" pad="PA4"/>
+                            <signal group="AD" index="3" function="default" pad="PA3"/>
+                            <signal group="AD" index="2" function="default" pad="PA2"/>
+                            <signal group="AD" index="1" function="default" pad="PA1"/>
+                            <signal group="AD" index="0" function="default" pad="PA0"/>
+                            <signal group="A" index="15" function="default" pad="PC7"/>
+                            <signal group="A" index="14" function="default" pad="PC6"/>
+                            <signal group="A" index="13" function="default" pad="PC5"/>
+                            <signal group="A" index="12" function="default" pad="PC4"/>
+                            <signal group="A" index="11" function="default" pad="PC3"/>
+                            <signal group="A" index="10" function="default" pad="PC2"/>
+                            <signal group="A" index="9" function="default" pad="PC1"/>
+                            <signal group="A" index="8" function="default" pad="PC0"/>
+                            <signal group="PDO" function="default" pad="PE1"/>
+                            <signal group="PDI" function="default" pad="PE0"/>
+                            <signal group="ALE" function="default" pad="PG2"/>
+                            <signal group="RD" function="default" pad="PG1"/>
+                            <signal group="WR" function="default" pad="PG0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB4"/>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB7"/>
+                            <signal group="T" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="19" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="20" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="25" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="26" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="27" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="28" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="29" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="30" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="31" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="32" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="33" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="34" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0970203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x22"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="12"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="12"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
+                    <bitfield caption="ATmega103 Compatibility Mode" mask="0x02" name="M103C"/>
+                    <bitfield caption="Watchdog Timer always on" mask="0x01" name="WDTON"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flashsize=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x70" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x74" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x71" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x73" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x72" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x95" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0x9C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x9B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x9A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x9D" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="External SRAM Wait State Select" mask="0x40" name="SRW10"/>
+                    <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x18" name="SM"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x04" name="SM2" values="CPU_SLEEP_MODE_2BITS1"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="XTAL Divide Control Register" name="XDIV" offset="0x5C" size="1">
+                    <bitfield caption="XTAL Divide Enable" mask="0x80" name="XDIVEN"/>
+                    <bitfield caption="XTAL Divide Select Bit 6" mask="0x40" name="XDIV6"/>
+                    <bitfield caption="XTAL Divide Select Bit 5" mask="0x20" name="XDIV5"/>
+                    <bitfield caption="XTAL Divide Select Bit 4" mask="0x10" name="XDIV4"/>
+                    <bitfield caption="XTAL Divide Select Bit 3" mask="0x08" name="XDIV3"/>
+                    <bitfield caption="XTAL Divide Select Bit 2" mask="0x04" name="XDIV2"/>
+                    <bitfield caption="XTAL Divide Select Bit 1" mask="0x02" name="XDIV1"/>
+                    <bitfield caption="XTAL Divide Select Bit 0" mask="0x01" name="XDIV0"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x6F" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="RAM Page Z Select Register Bit 0" mask="0x01" name="RAMPZ0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x1100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x1100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x1100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x1100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x1100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x1100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x1100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
+                <value value="0x01" caption="2.0 MHz " name="2_0_MHz_"/>
+                <value value="0x02" caption="4.0 MHz " name="4_0_MHz_"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_2BITS1">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x02"/>
+                <value caption="Power Down" name="PDOWN" value="0x04"/>
+                <value caption="Power Save" name="PSAVE" value="0x06"/>
+                <value caption="Standby" name="STDBY" value="0x05"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x68" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Other Registers" name="MISC">
+            <register-group caption="Other Registers" name="MISC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
+                              name="PSR321"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x21" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x62" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x61" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x65" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x64" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x63" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x51" size="1" mask="0xFF"/>
+                <register caption="Asynchronus Status Register" name="ASSR" offset="0x50" size="1">
+                    <bitfield caption="Asynchronus Timer/Counter 0" mask="0x08" name="AS0"/>
+                    <bitfield caption="Timer/Counter0 Update Busy" mask="0x04" name="TCN0UB"/>
+                    <bitfield caption="Output Compare register 0 Busy" mask="0x02" name="OCR0UB"/>
+                    <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
+                              name="OCIE1C"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x7A" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x78" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
+                              name="OCIE3C"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x04" name="TOV3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x02" name="OCF3C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x8B" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 3  Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x8C" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x84" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C  Bytes" name="OCR3C" offset="0x82" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x80" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC2">
+                <register caption="Timer/Counter Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Wafeform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Mode" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="" mask="0x40" name="TOIE2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Free Running Select" mask="0x20" name="ADFR"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN64" caption="TQFPQFN64">
+            <pin position="1" pad="PEN"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
new file mode 100644
index 00000000..5f7a2d89
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
@@ -0,0 +1,2069 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1280V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
+                 package="TQFP100" pinout="TQFP"/>
+        <variant ordercode="ATmega1280V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
+                 package="CBGA100" pinout="CBGA"/>
+        <variant ordercode="ATmega1280-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="TQFP100" pinout="TQFP"/>
+        <variant ordercode="ATmega1280-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="CBGA100" pinout="CBGA"/>
+    </variants>
+    <devices>
+        <device name="ATmega1280" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2" caption="USART">
+                        <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" pad="PH2" function="default"/>
+                            <signal group="TXD" pad="PH1" function="default"/>
+                            <signal group="RXD" pad="PH0" function="default"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3" caption="USART">
+                        <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" pad="PJ2" function="default"/>
+                            <signal group="TXD" pad="PJ1" function="default"/>
+                            <signal group="RXD" pad="PJ0" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PH0" index="0"/>
+                            <signal group="P" function="default" pad="PH1" index="1"/>
+                            <signal group="P" function="default" pad="PH2" index="2"/>
+                            <signal group="P" function="default" pad="PH3" index="3"/>
+                            <signal group="P" function="default" pad="PH4" index="4"/>
+                            <signal group="P" function="default" pad="PH5" index="5"/>
+                            <signal group="P" function="default" pad="PH6" index="6"/>
+                            <signal group="P" function="default" pad="PH7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PJ0" index="0"/>
+                            <signal group="P" function="default" pad="PJ1" index="1"/>
+                            <signal group="P" function="default" pad="PJ2" index="2"/>
+                            <signal group="P" function="default" pad="PJ3" index="3"/>
+                            <signal group="P" function="default" pad="PJ4" index="4"/>
+                            <signal group="P" function="default" pad="PJ5" index="5"/>
+                            <signal group="P" function="default" pad="PJ6" index="6"/>
+                            <signal group="P" function="default" pad="PJ7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTK" caption="I/O Port">
+                        <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PK0" index="0"/>
+                            <signal group="P" function="default" pad="PK1" index="1"/>
+                            <signal group="P" function="default" pad="PK2" index="2"/>
+                            <signal group="P" function="default" pad="PK3" index="3"/>
+                            <signal group="P" function="default" pad="PK4" index="4"/>
+                            <signal group="P" function="default" pad="PK5" index="5"/>
+                            <signal group="P" function="default" pad="PK6" index="6"/>
+                            <signal group="P" function="default" pad="PK7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTL" caption="I/O Port">
+                        <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PL0" index="0"/>
+                            <signal group="P" function="default" pad="PL1" index="1"/>
+                            <signal group="P" function="default" pad="PL2" index="2"/>
+                            <signal group="P" function="default" pad="PL3" index="3"/>
+                            <signal group="P" function="default" pad="PL4" index="4"/>
+                            <signal group="P" function="default" pad="PL5" index="5"/>
+                            <signal group="P" function="default" pad="PL6" index="6"/>
+                            <signal group="P" function="default" pad="PL7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PG5"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCB" function="default" pad="PH6"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCC" pad="PL5" function="default"/>
+                            <signal group="OCB" pad="PL4" function="default"/>
+                            <signal group="OCA" pad="PL3" function="default"/>
+                            <signal group="T" pad="PL2" function="default"/>
+                            <signal group="ICP" pad="PL1" function="default"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" pad="PH7" function="default"/>
+                            <signal group="OCC" pad="PH5" function="default"/>
+                            <signal group="OCB" pad="PH4" function="default"/>
+                            <signal group="OCA" pad="PH3" function="default"/>
+                            <signal group="ICP" pad="PL0" function="default"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PJ0"/>
+                            <signal group="PCINT" index="10" function="default" pad="PJ1"/>
+                            <signal group="PCINT" index="11" function="default" pad="PJ2"/>
+                            <signal group="PCINT" index="12" function="default" pad="PJ3"/>
+                            <signal group="PCINT" index="13" function="default" pad="PJ4"/>
+                            <signal group="PCINT" index="14" function="default" pad="PJ5"/>
+                            <signal group="PCINT" index="15" function="default" pad="PJ6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PK0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PK1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PK2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PK3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PK4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PK5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PK6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PK7"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="8" function="default" pad="PK0"/>
+                            <signal group="ADC" index="9" function="default" pad="PK1"/>
+                            <signal group="ADC" index="10" function="default" pad="PK2"/>
+                            <signal group="ADC" index="11" function="default" pad="PK3"/>
+                            <signal group="ADC" index="12" function="default" pad="PK4"/>
+                            <signal group="ADC" index="13" function="default" pad="PK5"/>
+                            <signal group="ADC" index="14" function="default" pad="PK6"/>
+                            <signal group="ADC" index="15" function="default" pad="PK7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
+                <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
+                <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
+                <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
+                <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0970303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART2">
+                <register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR2A" offset="0xD0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC2"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC2"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE2"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE2"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR2"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE2"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X2"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM2"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR2B" offset="0xD1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE2"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE2"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE2"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN2"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN2"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ22"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB82"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB82"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR2C" offset="0xD2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL2" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM2" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS2" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART3">
+                <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE3"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR3"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE3"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X3"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM3"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR3B" offset="0x131" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE3"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE3"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE3"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN3"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN3"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ32"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB83"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB83"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR3C" offset="0x132" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL3" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM3" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS3" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ3"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL3"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR3" offset="0x134" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x3F"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0x102" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0x101" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0x100" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0x105" size="1" mask="0xFF"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0x104" size="1" mask="0xFF"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0x103" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTK">
+                <register caption="PORT K Data Register" name="PORTK" offset="0x108" size="1" mask="0xFF"/>
+                <register caption="PORT K Data Direction Register" name="DDRK" offset="0x107" size="1" mask="0xFF"/>
+                <register caption="PORT K Input Pins" name="PINK" offset="0x106" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTL">
+                <register caption="PORT L Data Register" name="PORTL" offset="0x10B" size="1" mask="0xFF"/>
+                <register caption="PORT L Data Direction Register" name="DDRL" offset="0x10A" size="1" mask="0xFF"/>
+                <register caption="PORT L Input Pins" name="PINL" offset="0x109" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM5A"/>
+                    <bitfield caption="Compare Output Mode 5B, bits" mask="0x30" name="COM5B"/>
+                    <bitfield caption="Compare Output Mode 5C, bits" mask="0x0C" name="COM5C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Output Compare Flag 5A" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Compare Output Mode 4C, bits" mask="0x0C" name="COM4C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable bits" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable bits" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x03"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART3" mask="0x04" name="PRUSART3"/>
+                    <bitfield caption="Power Reduction USART2" mask="0x02" name="PRUSART2"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS2">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2200 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2200 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2200 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2200 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2200 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2200 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2200 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF6"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF6">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+                <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
+                <value caption="ADC Single Ended Input pin 9" name="ADC9" value="0x21"/>
+                <value caption="ADC Single Ended Input pin 10" name="ADC10" value="0x22"/>
+                <value caption="ADC Single Ended Input pin 11" name="ADC11" value="0x23"/>
+                <value caption="ADC Single Ended Input pin 12" name="ADC12" value="0x24"/>
+                <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
+                <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
+                <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
+                       value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
+                       value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
+                       value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
+                       value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
+                       value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
+                       value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
+                       name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
+                       name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
+                       value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
+                       value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
+                       value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
+                       value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
+                       value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
+                       value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
+                       value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
+                       value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
+                       value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
+                       value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
+                       value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
+                       value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
+                       value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
+                       value="0x3D"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP">
+            <pin pad="PG5" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="PH0" position="12"/>
+            <pin pad="PH1" position="13"/>
+            <pin pad="PH2" position="14"/>
+            <pin pad="PH3" position="15"/>
+            <pin pad="PH4" position="16"/>
+            <pin pad="PH5" position="17"/>
+            <pin pad="PH6" position="18"/>
+            <pin pad="PB0" position="19"/>
+            <pin pad="PB1" position="20"/>
+            <pin pad="PB2" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="PH7" position="27"/>
+            <pin pad="PG3" position="28"/>
+            <pin pad="PG4" position="29"/>
+            <pin pad="RESET" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="GND" position="32"/>
+            <pin pad="XTAL2" position="33"/>
+            <pin pad="XTAL1" position="34"/>
+            <pin pad="PL0" position="35"/>
+            <pin pad="PL1" position="36"/>
+            <pin pad="PL2" position="37"/>
+            <pin pad="PL3" position="38"/>
+            <pin pad="PL4" position="39"/>
+            <pin pad="PL5" position="40"/>
+            <pin pad="PL6" position="41"/>
+            <pin pad="PL7" position="42"/>
+            <pin pad="PD0" position="43"/>
+            <pin pad="PD1" position="44"/>
+            <pin pad="PD2" position="45"/>
+            <pin pad="PD3" position="46"/>
+            <pin pad="PD4" position="47"/>
+            <pin pad="PD5" position="48"/>
+            <pin pad="PD6" position="49"/>
+            <pin pad="PD7" position="50"/>
+            <pin pad="PG0" position="51"/>
+            <pin pad="PG1" position="52"/>
+            <pin pad="PC0" position="53"/>
+            <pin pad="PC1" position="54"/>
+            <pin pad="PC2" position="55"/>
+            <pin pad="PC3" position="56"/>
+            <pin pad="PC4" position="57"/>
+            <pin pad="PC5" position="58"/>
+            <pin pad="PC6" position="59"/>
+            <pin pad="PC7" position="60"/>
+            <pin pad="VCC" position="61"/>
+            <pin pad="GND" position="62"/>
+            <pin pad="PJ0" position="63"/>
+            <pin pad="PJ1" position="64"/>
+            <pin pad="PJ2" position="65"/>
+            <pin pad="PJ3" position="66"/>
+            <pin pad="PJ4" position="67"/>
+            <pin pad="PJ5" position="68"/>
+            <pin pad="PJ6" position="69"/>
+            <pin pad="PG2" position="70"/>
+            <pin pad="PA7" position="71"/>
+            <pin pad="PA6" position="72"/>
+            <pin pad="PA5" position="73"/>
+            <pin pad="PA4" position="74"/>
+            <pin pad="PA3" position="75"/>
+            <pin pad="PA2" position="76"/>
+            <pin pad="PA1" position="77"/>
+            <pin pad="PA0" position="78"/>
+            <pin pad="PJ7" position="79"/>
+            <pin pad="VCC" position="80"/>
+            <pin pad="GND" position="81"/>
+            <pin pad="PK7" position="82"/>
+            <pin pad="PK6" position="83"/>
+            <pin pad="PK5" position="84"/>
+            <pin pad="PK4" position="85"/>
+            <pin pad="PK3" position="86"/>
+            <pin pad="PK2" position="87"/>
+            <pin pad="PK1" position="88"/>
+            <pin pad="PK0" position="89"/>
+            <pin pad="PF7" position="90"/>
+            <pin pad="PF6" position="91"/>
+            <pin pad="PF5" position="92"/>
+            <pin pad="PF4" position="93"/>
+            <pin pad="PF3" position="94"/>
+            <pin pad="PF2" position="95"/>
+            <pin pad="PF1" position="96"/>
+            <pin pad="PF0" position="97"/>
+            <pin pad="AREF" position="98"/>
+            <pin pad="GND" position="99"/>
+            <pin pad="AVCC" position="100"/>
+        </pinout>
+        <pinout name="CBGA">
+            <pin pad="GND" position="A1"/>
+            <pin pad="AVCC" position="B1"/>
+            <pin pad="PE2" position="C1"/>
+            <pin pad="PE3" position="D1"/>
+            <pin pad="PE7" position="E1"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="GND" position="G1"/>
+            <pin pad="PB3" position="H1"/>
+            <pin pad="PH7" position="J1"/>
+            <pin pad="PB7" position="K1"/>
+            <pin pad="AREF" position="A2"/>
+            <pin pad="PG5" position="B2"/>
+            <pin pad="PE0" position="C2"/>
+            <pin pad="PE4" position="D2"/>
+            <pin pad="PH0" position="E2"/>
+            <pin pad="PH4" position="F2"/>
+            <pin pad="PB1" position="G2"/>
+            <pin pad="PB4" position="H2"/>
+            <pin pad="PG3" position="J2"/>
+            <pin pad="PG4" position="K2"/>
+            <pin pad="PF0" position="A3"/>
+            <pin pad="PF1" position="B3"/>
+            <pin pad="PE1" position="C3"/>
+            <pin pad="PE5" position="D3"/>
+            <pin pad="PH1" position="E3"/>
+            <pin pad="PH6" position="F3"/>
+            <pin pad="PB2" position="G3"/>
+            <pin pad="RESET" position="H3"/>
+            <pin pad="PB6" position="J3"/>
+            <pin pad="VCC" position="K3"/>
+            <pin pad="PF2" position="A4"/>
+            <pin pad="PF3" position="B4"/>
+            <pin pad="PF4" position="C4"/>
+            <pin pad="PE6" position="D4"/>
+            <pin pad="PH3" position="E4"/>
+            <pin pad="PB0" position="F4"/>
+            <pin pad="PB5" position="G4"/>
+            <pin pad="PL1" position="H4"/>
+            <pin pad="PL0" position="J4"/>
+            <pin pad="GND" position="K4"/>
+            <pin pad="PF5" position="A5"/>
+            <pin pad="PF6" position="B5"/>
+            <pin pad="PF7" position="C5"/>
+            <pin pad="PH2" position="D5"/>
+            <pin pad="PH5" position="E5"/>
+            <pin pad="PL4" position="F5"/>
+            <pin pad="PL2" position="G5"/>
+            <pin pad="PL3" position="H5"/>
+            <pin pad="XTAL2" position="J5"/>
+            <pin pad="XTAL1" position="K5"/>
+            <pin pad="PK0" position="A6"/>
+            <pin pad="PK1" position="B6"/>
+            <pin pad="PK2" position="C6"/>
+            <pin pad="PA4" position="D6"/>
+            <pin pad="PJ6" position="E6"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD0" position="G6"/>
+            <pin pad="PL7" position="H6"/>
+            <pin pad="PL6" position="J6"/>
+            <pin pad="PL5" position="K6"/>
+            <pin pad="PK3" position="A7"/>
+            <pin pad="PK4" position="B7"/>
+            <pin pad="PK5" position="C7"/>
+            <pin pad="PA5" position="D7"/>
+            <pin pad="PJ5" position="E7"/>
+            <pin pad="PJ1" position="F7"/>
+            <pin pad="PD5" position="G7"/>
+            <pin pad="PD4" position="H7"/>
+            <pin pad="PD3" position="J7"/>
+            <pin pad="PD2" position="K7"/>
+            <pin pad="PK6" position="A8"/>
+            <pin pad="PK7" position="B8"/>
+            <pin pad="PJ7" position="C8"/>
+            <pin pad="PA6" position="D8"/>
+            <pin pad="PJ4" position="E8"/>
+            <pin pad="PJ0" position="F8"/>
+            <pin pad="PC5" position="G8"/>
+            <pin pad="PC4" position="H8"/>
+            <pin pad="PC1" position="J8"/>
+            <pin pad="PD6" position="K8"/>
+            <pin pad="GND" position="A9"/>
+            <pin pad="PA0" position="B9"/>
+            <pin pad="PA1" position="C9"/>
+            <pin pad="PA7" position="D9"/>
+            <pin pad="PJ3" position="E9"/>
+            <pin pad="PC7" position="F9"/>
+            <pin pad="PC6" position="G9"/>
+            <pin pad="PC3" position="H9"/>
+            <pin pad="PC0" position="J9"/>
+            <pin pad="PD7" position="K9"/>
+            <pin pad="VCC" position="A10"/>
+            <pin pad="PA2" position="B10"/>
+            <pin pad="PA3" position="C10"/>
+            <pin pad="PG2" position="D10"/>
+            <pin pad="PJ2" position="E10"/>
+            <pin pad="GND" position="F10"/>
+            <pin pad="VCC" position="G10"/>
+            <pin pad="PC2" position="H10"/>
+            <pin pad="PG1" position="J10"/>
+            <pin pad="PG0" position="K10"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml
new file mode 100644
index 00000000..1448e380
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1281.xml
@@ -0,0 +1,1811 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1281V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1281V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1281-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega1281-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega1281" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PG5"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PE0"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
+                <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
+                <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
+                <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
+                <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0970403F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x04"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x3F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM5A"/>
+                    <bitfield caption="Compare Output Mode 5B, bits" mask="0x30" name="COM5B"/>
+                    <bitfield caption="Compare Output Mode 5C, bits" mask="0x0C" name="COM5C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Output Compare Flag 5A" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Compare Output Mode 4C, bits" mask="0x0C" name="COM4C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable mask" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF6"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF6">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+                <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
+                <value caption="ADC Single Ended Input pin 9" name="ADC9" value="0x21"/>
+                <value caption="ADC Single Ended Input pin 10" name="ADC10" value="0x22"/>
+                <value caption="ADC Single Ended Input pin 11" name="ADC11" value="0x23"/>
+                <value caption="ADC Single Ended Input pin 12" name="ADC12" value="0x24"/>
+                <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
+                <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
+                <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
+                       value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
+                       value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
+                       value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
+                       value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
+                       value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
+                       value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
+                       name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
+                       name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
+                       value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
+                       value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
+                       value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
+                       value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
+                       value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
+                       value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
+                       value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
+                       value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
+                       value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
+                       value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
+                       value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
+                       value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
+                       value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
+                       value="0x3D"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM" values="CPU_PIN_RELEASE"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x03"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART3" mask="0x04" name="PRUSART3"/>
+                    <bitfield caption="Power Reduction USART2" mask="0x02" name="PRUSART2"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS2">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2200 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2200 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2200 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2200 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2200 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2200 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2200 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_PIN_RELEASE">
+                <value caption="None" name="VAL_0x00" value="0x00"/>
+                <value caption="Px7" name="VAL_0x01" value="0x01"/>
+                <value caption="Px7-Px6" name="VAL_0x02" value="0x02"/>
+                <value caption="Px7-Px5" name="VAL_0x03" value="0x03"/>
+                <value caption="Px7-Px4" name="VAL_0x04" value="0x04"/>
+                <value caption="Px7-Px3" name="VAL_0x05" value="0x05"/>
+                <value caption="Px7-Px2" name="VAL_0x06" value="0x06"/>
+                <value caption="Full Port X" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="PG5"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="PG5"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml
new file mode 100644
index 00000000..f5620a2f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284.xml
@@ -0,0 +1,1494 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1284-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega1284" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x4000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD0"/>
+                            <signal group="ICP" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB7"/>
+                            <signal group="OCA" function="default" pad="PB6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0970503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="128"/>
+                    <property name="IspReadEeprom_blockSize" value="128"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x01" name="PRTIM3"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml
new file mode 100644
index 00000000..36884083
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284P.xml
@@ -0,0 +1,1550 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1284P-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-AN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-PN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega1284P-MN" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega1284P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x4000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD0"/>
+                            <signal group="ICP" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB7"/>
+                            <signal group="OCA" function="default" pad="PB6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0970503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="128"/>
+                    <property name="IspReadEeprom_blockSize" value="128"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR0"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF">
+                    <bitfield caption="USART Baud Rate Register" mask="0x0FFF" name="UBRR0"/>
+                </register>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR1"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF">
+                    <bitfield caption="USART Baud Rate Register" mask="0x0FFF" name="UBRR1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                </register>
+                <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 bits" mask="0xFFFF" name="TCNT3"/>
+                </register>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Output Compare A bits" mask="0xFFFF" name="OCR3A"/>
+                </register>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Output Compare B bits" mask="0xFFFF" name="OCR3B"/>
+                </register>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Input Capture bits" mask="0xFFFF" name="ICR3"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare B bits" mask="0xFF" name="OCR2B"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare A bits" mask="0xFF" name="OCR2A"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data bits" mask="0xFFFF" name="ADC"/>
+                </register>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPD"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x01" name="PRTIM3"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
new file mode 100644
index 00000000..db7c432b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1284RFR2.xml
@@ -0,0 +1,2798 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1284RFR2-ZU" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZUR" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZF" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega1284RFR2-ZFR" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega1284RFR2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
+                               size="0x0300">
+                    <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x4000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+                <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
+                <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
+                <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
+                <interrupt index="75" name="TRX24_AMI2" caption="Address match interrupt of address filter 2"/>
+                <interrupt index="76" name="TRX24_AMI3" caption="Address match interrupt of address filter 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A70303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa7"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                    <bitfield caption="Reserved Bit" mask="0x01" name="Res"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="Reserved Bit" mask="0x02" name="Res"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="Reserved Bit" mask="0x04" name="Res"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_SPI2X"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Reserved" mask="0x3E" name="Res"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_SPI2X">
+                <value caption="fosc/4 / fosc/2 (SPI2X=0/1)" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16 / fosc/8 (SPI2X=0/1)" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64 / fosc/32 (SPI2X=0/1)" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128 / fosc/64 (SPI2X=0/1)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Reserved Bit" mask="0x30" name="Res"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Reserved Bit" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Reserved" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Reserved" mask="0x7C" name="Res"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Reserved" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Reserved" mask="0x30" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="Power Amplifier Ramp up/down Control Register" name="PARCR" offset="0x138" size="1">
+                    <bitfield caption="ext. PA Ramp Down Lead Time" mask="0xE0" name="PALTD" values="PALTD_bitf"/>
+                    <bitfield caption="ext. PA Ramp Up Lead Time" mask="0x1C" name="PALTU" values="PALTU_bitf"/>
+                    <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
+                    <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
+                          offset="0x10E" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
+                          offset="0x10F" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
+                          name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
+                          name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
+                          offset="0x112" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
+                          offset="0x113" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
+                          name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
+                          name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
+                          offset="0x116" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
+                          offset="0x117" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
+                          name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
+                          name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
+                          offset="0x11A" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
+                          offset="0x11B" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
+                          name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
+                          name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3H"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
+                          size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
+                    <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
+                    <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
+                    <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
+                          size="1">
+                    <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
+                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
+                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
+                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
+                              name="AACK_0_I_AM_COORD"/>
+                </register>
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="Reserved" mask="0x7E" name="Res"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0x80" name="Res7"/>
+                    <bitfield caption="Enable Phase Measurement Unit" mask="0x40" name="PMU_EN"/>
+                    <bitfield caption="Start of Phase Measurement Unit" mask="0x20" name="PMU_START"/>
+                    <bitfield caption="PMU IF Inverse" mask="0x10" name="PMU_IF_INV"/>
+                    <bitfield caption="Reserved" mask="0x0F" name="Res"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
+                    <bitfield caption="Reserved" mask="0x0F" name="Res"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Reserved" mask="0x7C" name="Res"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Reserved" mask="0x70" name="Res"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
+                              name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
+                              name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
+                              name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
+                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 3" mask="0x10" name="MAF_3_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 2" mask="0x08" name="MAF_2_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 1" mask="0x04" name="MAF_1_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
+                    <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
+                    <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
+                </register>
+                <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
+                    <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
+                    <bitfield caption="Reserved" mask="0x30" name="Res"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
+                          size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
+                              values="RX_RPC_CTRL_BITF"/>
+                    <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
+                    <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
+                    <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
+                    <bitfield caption="Reserved" mask="0x04" name="Res0"/>
+                    <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
+                              name="XAH_RPC_EN"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="PALTD_bitf">
+                <value caption="-3us" name="PALTD_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTD_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTD_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTD_0US" value="3"/>
+                <value caption="1us" name="PALTD_1US" value="4"/>
+                <value caption="2us" name="PALTD_2US" value="5"/>
+                <value caption="3us" name="PALTD_3US" value="6"/>
+                <value caption="4us" name="PALTD_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="PALTU_bitf">
+                <value caption="-3us" name="PALTU_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTU_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTU_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTU_0US" value="3"/>
+                <value caption="1us" name="PALTU_1US" value="4"/>
+                <value caption="2us" name="PALTU_2US" value="5"/>
+                <value caption="3us" name="PALTU_3US" value="6"/>
+                <value caption="4us" name="PALTU_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.5 dBm" name="VAL_0" value="0"/>
+                <value caption="3.3 dBm" name="VAL_1" value="1"/>
+                <value caption="2.8 dBm" name="VAL_2" value="2"/>
+                <value caption="2.3 dBm" name="VAL_3" value="3"/>
+                <value caption="1.8 dBm" name="VAL_4" value="4"/>
+                <value caption="1.2 dBm" name="VAL_5" value="5"/>
+                <value caption="0.5 dBm" name="VAL_6" value="6"/>
+                <value caption="-0.5 dBm" name="VAL_7" value="7"/>
+                <value caption="-1.5 dBm" name="VAL_8" value="8"/>
+                <value caption="-2.5 dBm" name="VAL_9" value="9"/>
+                <value caption="-3.5 dBm" name="VAL_10" value="10"/>
+                <value caption="-4.5 dBm" name="VAL_11" value="11"/>
+                <value caption="-6.5 dBm" name="VAL_12" value="12"/>
+                <value caption="-8.5 dBm" name="VAL_13" value="13"/>
+                <value caption="-11.5 dBm" name="VAL_14" value="14"/>
+                <value caption="-16.5 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V / 1.70V (BATMON_HR=1/0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V / 1.75V (BATMON_HR=1/0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V / 1.80V (BATMON_HR=1/0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V / 1.85V (BATMON_HR=1/0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V / 1.90V (BATMON_HR=1/0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V / 1.95V (BATMON_HR=1/0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V / 2.00V (BATMON_HR=1/0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V / 2.05V (BATMON_HR=1/0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V / 2.10V (BATMON_HR=1/0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V / 2.15V (BATMON_HR=1/0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V / 2.20V (BATMON_HR=1/0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V / 2.25V (BATMON_HR=1/0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V / 2.30V (BATMON_HR=1/0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V / 2.35V (BATMON_HR=1/0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V / 2.40V (BATMON_HR=1/0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_RPC_CTRL_BITF">
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
+                       value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+                <value caption="RFA2 family" name="P_RFA2" value="0x93"/>
+                <value caption="RFR2 family" name="P_RFR2" value="0x94"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_2_BITF">
+                <value caption="Revision A" name="REV_A" value="12"/>
+                <value caption="Revision B" name="REV_B" value="1"/>
+                <value caption="Revision C" name="REV_C" value="3"/>
+                <value caption="Revision D" name="REV_D" value="4"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
+                          offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCTSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
+                          offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCTSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
+                          offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCTSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
+                          offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCTSTRLL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
+                    <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
+                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
+                              name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
+                              name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
+                              name="SCCS1" values="SCCS1_BITF"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
+                          offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCRSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
+                          offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCRSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
+                          offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCRSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
+                          offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCRSTRLL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SCCKDIV_BITF">
+                <value caption="Transceiver Clock divided by 256, (62.5kHz)" name="VAL_0" value="0"/>
+                <value caption="Transceiver Clock divided by 128, (125kHz)" name="VAL_1" value="1"/>
+                <value caption="Transceiver Clock divided by 64,  (250kHz)" name="VAL_2" value="2"/>
+                <value caption="Transceiver Clock divided by 32,  (500kHz)" name="VAL_3" value="3"/>
+                <value caption="Transceiver Clock divided by 16,  (1MHz)" name="VAL_4" value="4"/>
+                <value caption="Transceiver Clock divided by 8,   (2MHz)" name="VAL_5" value="5"/>
+                <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
+            </value-group>
+            <value-group caption="" name="SCCS3_BITF">
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS2_BITF">
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS1_BITF">
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="0"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Reserved" mask="0x60" name="Res"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Reserved" mask="0xE0" name="Res"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Reserved" mask="0x70" name="Res"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Reserved" mask="0xFE" name="Res"/>
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x01" name="RAMPZ0" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="16.0 MHz" name="16_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register #0" name="DRTRAM0" offset="0x135" size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #1" name="DRTRAM1" offset="0x134" size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #2" name="DRTRAM2" offset="0x133" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #3" name="DRTRAM3" offset="0x132" size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xE0" name="Res"/>
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Reserved" mask="0xFC" name="Res"/>
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml
new file mode 100644
index 00000000..30e560de
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128A.xml
@@ -0,0 +1,1409 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega128A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega128A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega128A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="SS" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="MISC">
+                    <instance name="MISC" caption="Other Registers">
+                        <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
+                                        caption="Other Registers"/>
+                        <signals>
+                            <signal group="PDI" function="default" pad="PE0"/>
+                            <signal group="PDO" function="default" pad="PE1"/>
+                            <signal group="OC3C" function="default" pad="PE5"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="WR" function="default" pad="PG0"/>
+                            <signal group="RD" function="default" pad="PG1"/>
+                            <signal group="A" index="8" function="default" pad="PC0"/>
+                            <signal group="A" index="9" function="default" pad="PC1"/>
+                            <signal group="A" index="10" function="default" pad="PC2"/>
+                            <signal group="A" index="11" function="default" pad="PC3"/>
+                            <signal group="A" index="12" function="default" pad="PC4"/>
+                            <signal group="A" index="13" function="default" pad="PC5"/>
+                            <signal group="A" index="14" function="default" pad="PC6"/>
+                            <signal group="A" index="15" function="default" pad="PC7"/>
+                            <signal group="ALE" function="default" pad="PG2"/>
+                            <signal group="AD" index="7" function="default" pad="PA7"/>
+                            <signal group="AD" index="6" function="default" pad="PA6"/>
+                            <signal group="AD" index="5" function="default" pad="PA5"/>
+                            <signal group="AD" index="4" function="default" pad="PA4"/>
+                            <signal group="AD" index="3" function="default" pad="PA3"/>
+                            <signal group="AD" index="2" function="default" pad="PA2"/>
+                            <signal group="AD" index="1" function="default" pad="PA1"/>
+                            <signal group="AD" index="0" function="default" pad="PA0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="19" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="20" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="25" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="26" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="27" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="28" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="29" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="30" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="31" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="32" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="33" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="34" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0970203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x22"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="12"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="12"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
+                    <bitfield caption="ATmega103 Compatibility Mode" mask="0x02" name="M103C"/>
+                    <bitfield caption="Watchdog Timer always on" mask="0x01" name="WDTON"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flashsize=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x70" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x74" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x71" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x73" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x72" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x95" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0x9C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x9B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x9A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x9D" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="External SRAM Wait State Select" mask="0x40" name="SRW10"/>
+                    <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x18" name="SM"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x04" name="SM2" values="CPU_SLEEP_MODE_2BITS1"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x6F" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="XTAL Divide Control Register" name="XDIV" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="RAM Page Z Select Register Bit 0" mask="0x01" name="RAMPZ0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x1100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x1100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x1100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x1100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x1100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x1100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x1100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
+                <value value="0x01" caption="2.0 MHz " name="2_0_MHz_"/>
+                <value value="0x02" caption="4.0 MHz " name="4_0_MHz_"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_2BITS1">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x02"/>
+                <value caption="Power Down" name="PDOWN" value="0x04"/>
+                <value caption="Power Save" name="PSAVE" value="0x06"/>
+                <value caption="Standby" name="STDBY" value="0x05"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x68" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Other Registers" name="MISC">
+            <register-group caption="Other Registers" name="MISC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
+                              name="PSR321"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x21" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x62" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x61" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x65" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x64" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x63" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x51" size="1" mask="0xFF"/>
+                <register caption="Asynchronus Status Register" name="ASSR" offset="0x50" size="1">
+                    <bitfield caption="Asynchronus Timer/Counter 0" mask="0x08" name="AS0"/>
+                    <bitfield caption="Timer/Counter0 Update Busy" mask="0x04" name="TCN0UB"/>
+                    <bitfield caption="Output Compare register 0 Busy" mask="0x02" name="OCR0UB"/>
+                    <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
+                              name="OCIE1C"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x7A" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x78" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
+                              name="OCIE3C"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x04" name="TOV3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x02" name="OCF3C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x8B" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 3  Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x8C" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x84" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C  Bytes" name="OCR3C" offset="0x82" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x80" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC2">
+                <register caption="Timer/Counter Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Wafeform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Mode" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="" mask="0x40" name="TOIE2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Free Running Select" mask="0x20" name="ADFR"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN64" caption="TQFPQFN64">
+            <pin position="1" pad="PEN"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
new file mode 100644
index 00000000..8e5b468d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128RFA1.xml
@@ -0,0 +1,2485 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="3.6"/>
+    </variants>
+    <devices>
+        <device name="ATmega128RFA1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x4000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
+                <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
+                <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
+                <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
+                <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A70103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa7"/>
+                    <property name="SIGNATURE2" value="0x01"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TRXOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TRXOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TRXOSC_1KCK_0MS"
+                       value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TRXOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TRXOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TRXOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TRXOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TRXOSC_16KCK_65MS"
+                       value="0x37"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                    <bitfield caption="Reserved Bit" mask="0x01" name="Res"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="Reserved Bit" mask="0x02" name="Res"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="Reserved Bit" mask="0x04" name="Res"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Reserved" mask="0x3E" name="Res"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Reserved Bit" mask="0x30" name="Res"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Reserved Bit" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Reserved" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Reserved" mask="0x7C" name="Res"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Reserved" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Reserved" mask="0x30" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="Reserved" mask="0x7E" name="Res"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0xFF" name="Res"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Reserved" mask="0x1F" name="Res"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Power Amplifier Buffer Lead Time" mask="0xC0" name="PA_BUF_LT"
+                              values="PA_BUF_LT_bitf"/>
+                    <bitfield caption="Power Amplifier Lead Time" mask="0x30" name="PA_LT" values="PA_LT_bitf"/>
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Reserved" mask="0x7C" name="Res"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Reserved" mask="0x70" name="Res"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Reserved" mask="0x70" name="Res"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="PA_BUF_LT_bitf">
+                <value caption="0 us" name="PA_BUF_LT_0US" value="0"/>
+                <value caption="2 us" name="PA_BUF_LT_2US" value="1"/>
+                <value caption="4 us" name="PA_BUF_LT_4US" value="2"/>
+                <value caption="6 us" name="PA_BUF_LT_6US" value="3"/>
+            </value-group>
+            <value-group caption="" name="PA_LT_bitf">
+                <value caption="2 us" name="PA_LT_2US" value="0"/>
+                <value caption="4 us" name="PA_LT_4US" value="1"/>
+                <value caption="6 us" name="PA_LT_6US" value="2"/>
+                <value caption="8 us" name="PA_LT_8US" value="3"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.0 dBm" name="VAL_0" value="0"/>
+                <value caption="2.8 dBm" name="VAL_1" value="1"/>
+                <value caption="2.3 dBm" name="VAL_2" value="2"/>
+                <value caption="1.8 dBm" name="VAL_3" value="3"/>
+                <value caption="1.3 dBm" name="VAL_4" value="4"/>
+                <value caption="0.7 dBm" name="VAL_5" value="5"/>
+                <value caption="0.0 dBm" name="VAL_6" value="6"/>
+                <value caption=" -1 dBm" name="VAL_7" value="7"/>
+                <value caption=" -2 dBm" name="VAL_8" value="8"/>
+                <value caption=" -3 dBm" name="VAL_9" value="9"/>
+                <value caption=" -4 dBm" name="VAL_10" value="10"/>
+                <value caption=" -5 dBm" name="VAL_11" value="11"/>
+                <value caption=" -7 dBm" name="VAL_12" value="12"/>
+                <value caption=" -9 dBm" name="VAL_13" value="13"/>
+                <value caption="-12 dBm" name="VAL_14" value="14"/>
+                <value caption="-17 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V (BATMON_HR=1) 1.70V (BATMON_HR=0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V (BATMON_HR=1) 1.75V (BATMON_HR=0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V (BATMON_HR=1) 1.80V (BATMON_HR=0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V (BATMON_HR=1) 1.85V (BATMON_HR=0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V (BATMON_HR=1) 1.90V (BATMON_HR=0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V (BATMON_HR=1) 1.95V (BATMON_HR=0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V (BATMON_HR=1) 2.00V (BATMON_HR=0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V (BATMON_HR=1) 2.05V (BATMON_HR=0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V (BATMON_HR=1) 2.10V (BATMON_HR=0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V (BATMON_HR=1) 2.15V (BATMON_HR=0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V (BATMON_HR=1) 2.20V (BATMON_HR=0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V (BATMON_HR=1) 2.25V (BATMON_HR=0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V (BATMON_HR=1) 2.30V (BATMON_HR=0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V (BATMON_HR=1) 2.35V (BATMON_HR=0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V (BATMON_HR=1) 2.40V (BATMON_HR=0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V (BATMON_HR=1) 2.45V (BATMON_HR=0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_BITF">
+                <value caption="Revision A" name="REV_A" value="2"/>
+                <value caption="Revision B" name="REV_B" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved" mask="0xE0" name="Res"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Reserved" mask="0x70" name="Res"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Reserved" mask="0xFC" name="Res"/>
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x03" name="RAMPZ" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register of SRAM 0" name="DRTRAM0" offset="0x135"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register of SRAM 1" name="DRTRAM1" offset="0x134"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register of SRAM 2" name="DRTRAM2" offset="0x133"
+                          size="1">
+                    <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register of SRAM 3" name="DRTRAM3" offset="0x132"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xC0" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xF0" name="Res"/>
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="Reserved" mask="0xE0" name="Res"/>
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Reserved" mask="0xFC" name="Res"/>
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
new file mode 100644
index 00000000..d29b17ec
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA128RFR2.xml
@@ -0,0 +1,2768 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega128RFR2-ZU" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZUR" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZF" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega128RFR2-ZFR" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega128RFR2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
+                               size="0x0300">
+                    <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x4200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x4000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+                <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
+                <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
+                <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
+                <interrupt index="75" name="TRX24_AMI2" caption="Address match interrupt of address filter 2"/>
+                <interrupt index="76" name="TRX24_AMI3" caption="Address match interrupt of address filter 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A70203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa7"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                    <bitfield caption="Reserved Bit" mask="0x01" name="Res"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="Reserved Bit" mask="0x02" name="Res"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="Reserved Bit" mask="0x04" name="Res"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_SPI2X"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_SPI2X">
+                <value caption="fosc/4 / fosc/2 (SPI2X=0/1)" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16 / fosc/8 (SPI2X=0/1)" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64 / fosc/32 (SPI2X=0/1)" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128 / fosc/64 (SPI2X=0/1)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Reserved Bit" mask="0x30" name="Res"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Reserved Bit" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="Power Amplifier Ramp up/down Control Register" name="PARCR" offset="0x138" size="1">
+                    <bitfield caption="ext. PA Ramp Down Lead Time" mask="0xE0" name="PALTD" values="PALTD_bitf"/>
+                    <bitfield caption="ext. PA Ramp Up Lead Time" mask="0x1C" name="PALTU" values="PALTU_bitf"/>
+                    <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
+                    <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
+                          offset="0x10E" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
+                          offset="0x10F" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
+                          name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
+                          name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
+                          offset="0x112" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
+                          offset="0x113" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
+                          name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
+                          name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
+                          offset="0x116" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
+                          offset="0x117" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
+                          name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
+                          name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
+                          offset="0x11A" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
+                          offset="0x11B" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
+                          name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
+                          name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3H"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
+                          size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
+                    <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
+                    <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
+                    <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
+                          size="1">
+                    <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
+                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
+                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
+                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
+                              name="AACK_0_I_AM_COORD"/>
+                </register>
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0x80" name="Res7"/>
+                    <bitfield caption="Enable Phase Measurement Unit" mask="0x40" name="PMU_EN"/>
+                    <bitfield caption="Start of Phase Measurement Unit" mask="0x20" name="PMU_START"/>
+                    <bitfield caption="PMU IF Inverse" mask="0x10" name="PMU_IF_INV"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
+                              name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
+                              name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
+                              name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
+                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 3" mask="0x10" name="MAF_3_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 2" mask="0x08" name="MAF_2_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 1" mask="0x04" name="MAF_1_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
+                    <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
+                    <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
+                </register>
+                <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
+                    <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
+                          size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
+                              values="RX_RPC_CTRL_BITF"/>
+                    <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
+                    <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
+                    <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
+                    <bitfield caption="Reserved" mask="0x04" name="Res0"/>
+                    <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
+                              name="XAH_RPC_EN"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="PALTD_bitf">
+                <value caption="-3us" name="PALTD_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTD_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTD_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTD_0US" value="3"/>
+                <value caption="1us" name="PALTD_1US" value="4"/>
+                <value caption="2us" name="PALTD_2US" value="5"/>
+                <value caption="3us" name="PALTD_3US" value="6"/>
+                <value caption="4us" name="PALTD_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="PALTU_bitf">
+                <value caption="-3us" name="PALTU_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTU_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTU_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTU_0US" value="3"/>
+                <value caption="1us" name="PALTU_1US" value="4"/>
+                <value caption="2us" name="PALTU_2US" value="5"/>
+                <value caption="3us" name="PALTU_3US" value="6"/>
+                <value caption="4us" name="PALTU_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.5 dBm" name="VAL_0" value="0"/>
+                <value caption="3.3 dBm" name="VAL_1" value="1"/>
+                <value caption="2.8 dBm" name="VAL_2" value="2"/>
+                <value caption="2.3 dBm" name="VAL_3" value="3"/>
+                <value caption="1.8 dBm" name="VAL_4" value="4"/>
+                <value caption="1.2 dBm" name="VAL_5" value="5"/>
+                <value caption="0.5 dBm" name="VAL_6" value="6"/>
+                <value caption="-0.5 dBm" name="VAL_7" value="7"/>
+                <value caption="-1.5 dBm" name="VAL_8" value="8"/>
+                <value caption="-2.5 dBm" name="VAL_9" value="9"/>
+                <value caption="-3.5 dBm" name="VAL_10" value="10"/>
+                <value caption="-4.5 dBm" name="VAL_11" value="11"/>
+                <value caption="-6.5 dBm" name="VAL_12" value="12"/>
+                <value caption="-8.5 dBm" name="VAL_13" value="13"/>
+                <value caption="-11.5 dBm" name="VAL_14" value="14"/>
+                <value caption="-16.5 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V / 1.70V (BATMON_HR=1/0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V / 1.75V (BATMON_HR=1/0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V / 1.80V (BATMON_HR=1/0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V / 1.85V (BATMON_HR=1/0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V / 1.90V (BATMON_HR=1/0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V / 1.95V (BATMON_HR=1/0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V / 2.00V (BATMON_HR=1/0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V / 2.05V (BATMON_HR=1/0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V / 2.10V (BATMON_HR=1/0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V / 2.15V (BATMON_HR=1/0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V / 2.20V (BATMON_HR=1/0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V / 2.25V (BATMON_HR=1/0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V / 2.30V (BATMON_HR=1/0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V / 2.35V (BATMON_HR=1/0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V / 2.40V (BATMON_HR=1/0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_RPC_CTRL_BITF">
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
+                       value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+                <value caption="RFA2 family" name="P_RFA2" value="0x93"/>
+                <value caption="RFR2 family" name="P_RFR2" value="0x94"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_2_BITF">
+                <value caption="Revision A" name="REV_A" value="12"/>
+                <value caption="Revision B" name="REV_B" value="1"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
+                          offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCTSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
+                          offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCTSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
+                          offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCTSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
+                          offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCTSTRLL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
+                    <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
+                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
+                              name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
+                              name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
+                              name="SCCS1" values="SCCS1_BITF"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
+                          offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCRSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
+                          offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCRSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
+                          offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCRSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
+                          offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCRSTRLL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SCCKDIV_BITF">
+                <value caption="Transceiver Clock divided by 256, (62.5kHz)" name="VAL_0" value="0"/>
+                <value caption="Transceiver Clock divided by 128, (125kHz)" name="VAL_1" value="1"/>
+                <value caption="Transceiver Clock divided by 64,  (250kHz)" name="VAL_2" value="2"/>
+                <value caption="Transceiver Clock divided by 32,  (500kHz)" name="VAL_3" value="3"/>
+                <value caption="Transceiver Clock divided by 16,  (1MHz)" name="VAL_4" value="4"/>
+                <value caption="Transceiver Clock divided by 8,   (2MHz)" name="VAL_5" value="5"/>
+                <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
+            </value-group>
+            <value-group caption="" name="SCCS3_BITF">
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS2_BITF">
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS1_BITF">
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x01" name="RAMPZ0" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register #0" name="DRTRAM0" offset="0x135" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #1" name="DRTRAM1" offset="0x134" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #2" name="DRTRAM2" offset="0x133" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #3" name="DRTRAM3" offset="0x132" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16.xml
new file mode 100644
index 00000000..f04611b3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16.xml
@@ -0,0 +1,1209 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega16L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega16-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega16-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega16-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0460">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB3"/>
+                            <signal group="T" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="OC" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="SS" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="4" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="9" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="10" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="11" name="USART_RXC" caption="USART, Rx Complete"/>
+                <interrupt index="12" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="13" name="USART_TXC" caption="USART, Tx Complete"/>
+                <interrupt index="14" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="15" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="16" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="17" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="18" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="19" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="20" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                </register>
+                <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Mode Select" mask="0xB0" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x40" name="SE"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Special function I/O register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler reset" mask="0x02" name="PSR2"/>
+                    <bitfield caption="Prescaler reset" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x08"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x09"/>
+                <value caption="Standby" name="STDBY" value="0x0A"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x0B"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+                <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN44" caption="TQFPQFN44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="AREF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
new file mode 100644
index 00000000..0c64e3c1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1608.xml
@@ -0,0 +1,2532 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1608-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1608-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1608-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega1608">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x4000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2113" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2118" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                    <property name="INTERRUPT_VECTOR_SIZE" value="4"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x27"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2113" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2118" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD as Voltage reference" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="QFP32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="SSOP28">
+            <pin pad="PA7" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="PC2" position="4"/>
+            <pin pad="PC3" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="AVDD" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PF0" position="16"/>
+            <pin pad="PF1" position="17"/>
+            <pin pad="PF6" position="18"/>
+            <pin pad="UPDI" position="19"/>
+            <pin pad="VDD0" position="20"/>
+            <pin pad="GND1" position="21"/>
+            <pin pad="PA0" position="22"/>
+            <pin pad="PA1" position="23"/>
+            <pin pad="PA2" position="24"/>
+            <pin pad="PA3" position="25"/>
+            <pin pad="PA4" position="26"/>
+            <pin pad="PA5" position="27"/>
+            <pin pad="PA6" position="28"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml
new file mode 100644
index 00000000..ed4fa69e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA1609.xml
@@ -0,0 +1,2624 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega1609-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega1609-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega1609">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x4000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="8" pad="PE0"/>
+                            <signal function="AIN0" group="AIN" index="9" pad="PE1"/>
+                            <signal function="AIN0" group="AIN" index="10" pad="PE2"/>
+                            <signal function="AIN0" group="AIN" index="11" pad="PE3"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
+                                    pad="PC6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2113" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2118" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT1" function="EVSYS" group="EVOUT" index="1"
+                                    pad="PB2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS_ALT" group="EVOUT" index="2"
+                                    pad="PC7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT4" function="EVSYS" group="EVOUT" index="4"
+                                    pad="PE2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MISO" pad="PE1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MOSI" pad="PE0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SCK" pad="PE2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SS" pad="PE3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="0" pad="PE0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="1" pad="PE1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="1" pad="PB1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="2" pad="PE2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="2" pad="PB2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="3" pad="PE3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="3" pad="PB3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="4" pad="PC4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="4" pad="PB4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="5" pad="PC5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="5" pad="PB5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2_ALT" group="WO" index="0" pad="PB4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB3">
+                        <register-group address-space="data" name="TCB3" name-in-module="TCB" offset="0x0AB0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3_ALT" group="WO" index="0" pad="PC1"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3" group="WO" index="0" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="RXD" pad="PC5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="TXD" pad="PC4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XCK" pad="PC6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XDIR" pad="PC7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3">
+                        <register-group address-space="data" name="USART3" name-in-module="USART" offset="0x0860"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="RXD" pad="PB5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="RXD" pad="PB1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="TXD" pad="PB4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="TXD" pad="PB0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XCK" pad="PB2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XDIR" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+                <interrupt index="36" module-instance="TCB3" name="INT"/>
+                <interrupt index="37" module-instance="USART3" name="RXC"/>
+                <interrupt index="38" module-instance="USART3" name="DRE"/>
+                <interrupt index="39" module-instance="USART3" name="TXC"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                    <property name="INTERRUPT_VECTOR_SIZE" value="4"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x26"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2113" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2118" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+                <value caption="Connect user to event channel 6" name="CHANNEL6" value="0x7"/>
+                <value caption="Connect user to event channel 7" name="CHANNEL7" value="0x8"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+                <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PC7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output E select" name="PORTMUX_EVOUTE">
+                <value caption="EVOUT on PE2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PB4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PB5" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD as Voltage reference" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+        <pinout name="QFP48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA162.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
new file mode 100644
index 00000000..8b47bc91
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA162.xml
@@ -0,0 +1,1073 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega162" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x0500" size="0xfb00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="7" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="8" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="9" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="10" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="19" name="USART0_RXC" caption="USART0, Rx Complete"/>
+                <interrupt index="20" name="USART1_RXC" caption="USART1, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART1_UDRE" caption="USART1, Data register Empty"/>
+                <interrupt index="23" name="USART0_TXC" caption="USART0, Tx Complete"/>
+                <interrupt index="24" name="USART1_TXC" caption="USART1, Tx Complete"/>
+                <interrupt index="25" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="27" name="SPM_RDY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940403F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x04"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x04"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="ATmega161 compability mode" mask="0x10" name="M161C"/>
+                    <bitfield caption="Brownout detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="TICIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x80" name="TOV1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+                    <bitfield caption="Input Capture Flag 1" mask="0x08" name="ICF1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x04" name="TOV3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x8B" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x08" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x04" name="FOC3B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_SWAPPED"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counte3 Output Compare Register B  Bytes" name="OCR3B" offset="0x84" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x80" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_SWAPPED">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/16" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/32" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Control Register" name="TCCR2" offset="0x47" size="1">
+                    <bitfield caption="Forde Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Pulse Width Modulator Select Bit 0" mask="0x40" name="WGM20"
+                              values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Mode" mask="0x30" name="COM2"/>
+                    <bitfield caption="Pulse Width Modulator Select Bit 1" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT2" offset="0x43" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR2" offset="0x42" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x10" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x04" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x10" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x04" name="TOV2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x46" size="1">
+                    <bitfield caption="Asynchronous Timer 2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL0"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register High Byte" name="UBRR0H" offset="0x40" size="1" mask="0x8F">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL0"/>
+                    <bitfield caption="USART Baud Rate Register High bits" mask="0x0F" name="UBRR0" lsb="8"/>
+                </register>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF">
+                    <bitfield caption="USART Baud Rate Register Low bits" mask="0xFF" name="UBRR0"/>
+                </register>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x22" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x21" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x5C" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL1"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Highg Byte" name="UBRR1H" offset="0x5C" size="1"
+                          mask="0x8F">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL0"/>
+                    <bitfield caption="USART Baud Rate Register High bits" mask="0x0F" name="UBRR1" lsb="8"/>
+                </register>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x20" size="1" mask="0xFF">
+                    <bitfield caption="USART Baud Rate Register Low bits" mask="0xFF" name="UBRR1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="External SRAM Wait State Select" mask="0x40" name="SRW10"/>
+                    <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x10" name="SM1"/>
+                    <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Sleep Mode Select Bit 2" mask="0x20" name="SM2"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Extended MCU Control Register" name="EMCUCR" offset="0x56" size="1">
+                    <bitfield caption="Sleep mode Select Bit 0" mask="0x80" name="SM0"/>
+                    <bitfield caption="Wait State Sector Limit Bits" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
+                    <bitfield caption="Wait State Select Bit 1 for Lower Sector" mask="0x0C" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait State Select Bit 1 for Upper Sector" mask="0x02" name="SRW11"/>
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x01" name="ISC2"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x24" size="1" mask="0x7F">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock prescale register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x40" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask Bits" mask="0x38" name="XMM"/>
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter1 and Timer/Counter0" mask="0x01"
+                              name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x1100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x1100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x1100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x1100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x1100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x1100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x1100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x24" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write secion read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF">
+                    <bitfield caption="EEPROM Address Register bits" mask="0x01FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data Register bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x27" size="1" mask="0x07"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x26" size="1" mask="0x07"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x25" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter 0 Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter 0 Output Compare Register" name="OCR0" offset="0x51" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x01"
+                              name="OCIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+                    <bitfield caption="Output Compare Flag 0" mask="0x01" name="OCF0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="Extended MCU Control Register" name="EMCUCR" offset="0x56" size="1">
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x01" name="ISC2"/>
+                </register>
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x18" name="PCIE"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x18" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Interrupt mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Enable Mask" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Interrupt mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml
new file mode 100644
index 00000000..06337439
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164A.xml
@@ -0,0 +1,1541 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega164A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44"
+                 package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164A-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49"
+                 package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega164A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940a03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0f"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF0"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL0"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X0"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE0"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE0"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD0"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR0"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL0"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA0"/>
+                    <bitfield caption="SPI Clock Rate Select 1" mask="0x02" name="SPR01"/>
+                    <bitfield caption="SPI Clock Rate Select 0" mask="0x01" name="SPR00" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="DRQFN_44">
+            <pin pad="PB5" position="A1"/>
+            <pin pad="PB6" position="B1"/>
+            <pin pad="PB7" position="A2"/>
+            <pin pad="RESET" position="B2"/>
+            <pin pad="VCC" position="A3"/>
+            <pin pad="GND" position="B3"/>
+            <pin pad="XTAL2" position="A4"/>
+            <pin pad="XTAL1" position="B4"/>
+            <pin pad="PD0" position="A5"/>
+            <pin pad="PD1" position="B5"/>
+            <pin pad="PD2" position="A6"/>
+            <pin pad="PD3" position="A7"/>
+            <pin pad="PD4" position="B6"/>
+            <pin pad="PD5" position="A8"/>
+            <pin pad="PD6" position="B7"/>
+            <pin pad="PD7" position="A9"/>
+            <pin pad="VCC" position="B8"/>
+            <pin pad="GND" position="A10"/>
+            <pin pad="PC0" position="B9"/>
+            <pin pad="PC1" position="A11"/>
+            <pin pad="PC2" position="B10"/>
+            <pin pad="PC3" position="A12"/>
+            <pin pad="PC4" position="A13"/>
+            <pin pad="PC5" position="B11"/>
+            <pin pad="PC6" position="A14"/>
+            <pin pad="PC7" position="B12"/>
+            <pin pad="AVCC" position="A15"/>
+            <pin pad="GND" position="B13"/>
+            <pin pad="AREF" position="A16"/>
+            <pin pad="PA7" position="B14"/>
+            <pin pad="PA6" position="A17"/>
+            <pin pad="PA5" position="B15"/>
+            <pin pad="PA4" position="A18"/>
+            <pin pad="PA3" position="A19"/>
+            <pin pad="PA2" position="B16"/>
+            <pin pad="PA1" position="A20"/>
+            <pin pad="PA0" position="B17"/>
+            <pin pad="VCC" position="A21"/>
+            <pin pad="GND" position="B18"/>
+            <pin pad="PB0" position="A22"/>
+            <pin pad="PB1" position="B19"/>
+            <pin pad="PB2" position="A23"/>
+            <pin pad="PB3" position="B20"/>
+            <pin pad="PB4" position="A24"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="VFBGA49" caption="VFBGA49">
+            <pin position="A1" pad="GND"/>
+            <pin position="A2" pad="PB4"/>
+            <pin position="A3" pad="PB2"/>
+            <pin position="A4" pad="GND"/>
+            <pin position="A5" pad="VCC"/>
+            <pin position="A6" pad="PA2"/>
+            <pin position="A7" pad="GND"/>
+            <pin position="B1" pad="PB6"/>
+            <pin position="B2" pad="PB5"/>
+            <pin position="B3" pad="PB3"/>
+            <pin position="B4" pad="PB0"/>
+            <pin position="B5" pad="PA0"/>
+            <pin position="B6" pad="PA3"/>
+            <pin position="B7" pad="PA5"/>
+            <pin position="C1" pad="VCC"/>
+            <pin position="C2" pad="RESET"/>
+            <pin position="C3" pad="PB7"/>
+            <pin position="C4" pad="PB1"/>
+            <pin position="C5" pad="PA1"/>
+            <pin position="C6" pad="PA6"/>
+            <pin position="C7" pad="AREF"/>
+            <pin position="D1" pad="GND"/>
+            <pin position="D2" pad="XTAL2"/>
+            <pin position="D3" pad="PD0"/>
+            <pin position="D4" pad="GND"/>
+            <pin position="D5" pad="PA4"/>
+            <pin position="D6" pad="PA7"/>
+            <pin position="D7" pad="GND"/>
+            <pin position="E1" pad="XTAL1"/>
+            <pin position="E2" pad="PD1"/>
+            <pin position="E3" pad="PD5"/>
+            <pin position="E4" pad="PD7"/>
+            <pin position="E5" pad="PC5"/>
+            <pin position="E6" pad="PC7"/>
+            <pin position="E7" pad="AVCC"/>
+            <pin position="F1" pad="PD2"/>
+            <pin position="F2" pad="PD3"/>
+            <pin position="F3" pad="PD6"/>
+            <pin position="F4" pad="PC0"/>
+            <pin position="F5" pad="PC2"/>
+            <pin position="F6" pad="PC4"/>
+            <pin position="F7" pad="PC6"/>
+            <pin position="G1" pad="GND"/>
+            <pin position="G2" pad="PD4"/>
+            <pin position="G3" pad="VCC"/>
+            <pin position="G4" pad="GND"/>
+            <pin position="G5" pad="PC1"/>
+            <pin position="G6" pad="PC3"/>
+            <pin position="G7" pad="GND"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml
new file mode 100644
index 00000000..33cae245
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164P.xml
@@ -0,0 +1,1456 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega164PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega164P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega164P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940a03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF0"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL0"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X0"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE0"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE0"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD0"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR0"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL0"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA0"/>
+                    <bitfield caption="SPI Clock Rate Select 1" mask="0x02" name="SPR10"/>
+                    <bitfield caption="SPI Clock Rate Select 0" mask="0x01" name="SPR00" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_VQFN_44" caption="TQFP_VQFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml
new file mode 100644
index 00000000..253d02d7
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA164PA.xml
@@ -0,0 +1,1549 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega164PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44"
+                 package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49"
+                 package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega164PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega164PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940a03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF0"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL0"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X0"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE0"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE0"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD0"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR0"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL0"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA0"/>
+                    <bitfield caption="SPI Clock Rate Select 1" mask="0x02" name="SPR10"/>
+                    <bitfield caption="SPI Clock Rate Select 0" mask="0x01" name="SPR00" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="DRQFN_44">
+            <pin pad="PB5" position="A1"/>
+            <pin pad="PB6" position="B1"/>
+            <pin pad="PB7" position="A2"/>
+            <pin pad="RESET" position="B2"/>
+            <pin pad="VCC" position="A3"/>
+            <pin pad="GND" position="B3"/>
+            <pin pad="XTAL2" position="A4"/>
+            <pin pad="XTAL1" position="B4"/>
+            <pin pad="PD0" position="A5"/>
+            <pin pad="PD1" position="B5"/>
+            <pin pad="PD2" position="A6"/>
+            <pin pad="PD3" position="A7"/>
+            <pin pad="PD4" position="B6"/>
+            <pin pad="PD5" position="A8"/>
+            <pin pad="PD6" position="B7"/>
+            <pin pad="PD7" position="A9"/>
+            <pin pad="VCC" position="B8"/>
+            <pin pad="GND" position="A10"/>
+            <pin pad="PC0" position="B9"/>
+            <pin pad="PC1" position="A11"/>
+            <pin pad="PC2" position="B10"/>
+            <pin pad="PC3" position="A12"/>
+            <pin pad="PC4" position="A13"/>
+            <pin pad="PC5" position="B11"/>
+            <pin pad="PC6" position="A14"/>
+            <pin pad="PC7" position="B12"/>
+            <pin pad="AVCC" position="A15"/>
+            <pin pad="GND" position="B13"/>
+            <pin pad="AREF" position="A16"/>
+            <pin pad="PA7" position="B14"/>
+            <pin pad="PA6" position="A17"/>
+            <pin pad="PA5" position="B15"/>
+            <pin pad="PA4" position="A18"/>
+            <pin pad="PA3" position="A19"/>
+            <pin pad="PA2" position="B16"/>
+            <pin pad="PA1" position="A20"/>
+            <pin pad="PA0" position="B17"/>
+            <pin pad="VCC" position="A21"/>
+            <pin pad="GND" position="B18"/>
+            <pin pad="PB0" position="A22"/>
+            <pin pad="PB1" position="B19"/>
+            <pin pad="PB2" position="A23"/>
+            <pin pad="PB3" position="B20"/>
+            <pin pad="PB4" position="A24"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="VFBGA49" caption="VFBGA49">
+            <pin position="A1" pad="GND"/>
+            <pin position="A2" pad="PB4"/>
+            <pin position="A3" pad="PB2"/>
+            <pin position="A4" pad="GND"/>
+            <pin position="A5" pad="VCC"/>
+            <pin position="A6" pad="PA2"/>
+            <pin position="A7" pad="GND"/>
+            <pin position="B1" pad="PB6"/>
+            <pin position="B2" pad="PB5"/>
+            <pin position="B3" pad="PB3"/>
+            <pin position="B4" pad="PB0"/>
+            <pin position="B5" pad="PA0"/>
+            <pin position="B6" pad="PA3"/>
+            <pin position="B7" pad="PA5"/>
+            <pin position="C1" pad="VCC"/>
+            <pin position="C2" pad="RESET"/>
+            <pin position="C3" pad="PB7"/>
+            <pin position="C4" pad="PB1"/>
+            <pin position="C5" pad="PA1"/>
+            <pin position="C6" pad="PA6"/>
+            <pin position="C7" pad="AREF"/>
+            <pin position="D1" pad="GND"/>
+            <pin position="D2" pad="XTAL2"/>
+            <pin position="D3" pad="PD0"/>
+            <pin position="D4" pad="GND"/>
+            <pin position="D5" pad="PA4"/>
+            <pin position="D6" pad="PA7"/>
+            <pin position="D7" pad="GND"/>
+            <pin position="E1" pad="XTAL1"/>
+            <pin position="E2" pad="PD1"/>
+            <pin position="E3" pad="PD5"/>
+            <pin position="E4" pad="PD7"/>
+            <pin position="E5" pad="PC5"/>
+            <pin position="E6" pad="PC7"/>
+            <pin position="E7" pad="AVCC"/>
+            <pin position="F1" pad="PD2"/>
+            <pin position="F2" pad="PD3"/>
+            <pin position="F3" pad="PD6"/>
+            <pin position="F4" pad="PC0"/>
+            <pin position="F5" pad="PC2"/>
+            <pin position="F6" pad="PC4"/>
+            <pin position="F7" pad="PC6"/>
+            <pin position="G1" pad="GND"/>
+            <pin position="G2" pad="PD4"/>
+            <pin position="G3" pad="VCC"/>
+            <pin position="G4" pad="GND"/>
+            <pin position="G5" pad="PC1"/>
+            <pin position="G6" pad="PC3"/>
+            <pin position="G7" pad="GND"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
new file mode 100644
index 00000000..4cf15c5f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165A.xml
@@ -0,0 +1,1013 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega165A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940703F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x10"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out Detection Disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out Detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out Detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out Detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
new file mode 100644
index 00000000..21dbfd7a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165P.xml
@@ -0,0 +1,1013 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega165P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940703F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x07"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out Detection Disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out Detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out Detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out Detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xC0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xC0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
new file mode 100644
index 00000000..a2b1992b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA165PA.xml
@@ -0,0 +1,1015 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega165PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940703F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x07"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out Detection Disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out Detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out Detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out Detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168.xml
new file mode 100644
index 00000000..c94c7d27
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168.xml
@@ -0,0 +1,1284 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega168V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega168" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9406"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
+                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
new file mode 100644
index 00000000..4c195c27
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
@@ -0,0 +1,1346 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega168A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
+                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega168A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940B"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="UFBGA32" caption="UFBGA32">
+            <pin position="B1" pad="PD3"/>
+            <pin position="B2" pad="PD4"/>
+            <pin position="C1" pad="GND"/>
+            <pin position="D1" pad="VDD"/>
+            <pin position="D2" pad="VDD"/>
+            <pin position="E1" pad="PB6"/>
+            <pin position="F1" pad="PB7"/>
+            <pin position="F2" pad="PD5"/>
+            <pin position="E2" pad="PD6"/>
+            <pin position="F3" pad="PD7"/>
+            <pin position="E3" pad="PB0"/>
+            <pin position="F4" pad="PB1"/>
+            <pin position="E4" pad="PB2"/>
+            <pin position="F5" pad="PB3"/>
+            <pin position="F6" pad="PB4"/>
+            <pin position="E6" pad="PB5"/>
+            <pin position="E5" pad="AVCC"/>
+            <pin position="D6" pad="ADC6"/>
+            <pin position="D5" pad="AREF"/>
+            <pin position="C6" pad="GND"/>
+            <pin position="C5" pad="ADC7"/>
+            <pin position="B6" pad="PC0"/>
+            <pin position="A6" pad="PC1"/>
+            <pin position="A5" pad="PC2"/>
+            <pin position="B5" pad="PC3"/>
+            <pin position="A4" pad="PC4"/>
+            <pin position="B4" pad="PC5"/>
+            <pin position="A3" pad="PC6"/>
+            <pin position="B3" pad="PD0"/>
+            <pin position="A2" pad="PD1"/>
+            <pin position="A1" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml
new file mode 100644
index 00000000..44f65bf8
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168P.xml
@@ -0,0 +1,1317 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega168PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega168P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega168P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940B"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0b"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSRnC" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSRnB" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
new file mode 100644
index 00000000..0eb7b7ba
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
@@ -0,0 +1,1354 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega168PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
+                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega168PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940B"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0b"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="UFBGA32" caption="UFBGA32">
+            <pin position="B1" pad="PD3"/>
+            <pin position="B2" pad="PD4"/>
+            <pin position="C1" pad="GND"/>
+            <pin position="D1" pad="VDD"/>
+            <pin position="D2" pad="VDD"/>
+            <pin position="E1" pad="PB6"/>
+            <pin position="F1" pad="PB7"/>
+            <pin position="F2" pad="PD5"/>
+            <pin position="E2" pad="PD6"/>
+            <pin position="F3" pad="PD7"/>
+            <pin position="E3" pad="PB0"/>
+            <pin position="F4" pad="PB1"/>
+            <pin position="E4" pad="PB2"/>
+            <pin position="F5" pad="PB3"/>
+            <pin position="F6" pad="PB4"/>
+            <pin position="E6" pad="PB5"/>
+            <pin position="E5" pad="AVCC"/>
+            <pin position="D6" pad="ADC6"/>
+            <pin position="D5" pad="AREF"/>
+            <pin position="C6" pad="GND"/>
+            <pin position="C5" pad="ADC7"/>
+            <pin position="B6" pad="PC0"/>
+            <pin position="A6" pad="PC1"/>
+            <pin position="A5" pad="PC2"/>
+            <pin position="B5" pad="PC3"/>
+            <pin position="A4" pad="PC4"/>
+            <pin position="B4" pad="PC5"/>
+            <pin position="A3" pad="PC6"/>
+            <pin position="B3" pad="PD0"/>
+            <pin position="A2" pad="PD1"/>
+            <pin position="A1" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml
new file mode 100644
index 00000000..9c752fbb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA168PB.xml
@@ -0,0 +1,1283 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega168PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega168PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega168PB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                            <signal group="ADC" index="6" function="default" pad="PE2"/>
+                            <signal group="ADC" index="7" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AC" function="default" pad="PE0"/>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="DEVICEID">
+                    <instance name="DEVICEID" caption="Device ID">
+                        <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data"
+                                        caption="Device ID"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+                <interrupt index="26" name="USART_START" caption="USART Start Edge Interrupt"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9415"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x15"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Device ID" name="DEVICEID">
+            <register-group caption="Device ID" name="DEVICEID">
+                <register caption="" name="DEVID0" offset="0xF0" size="1"/>
+                <register caption="" name="DEVID1" offset="0xF1" size="1"/>
+                <register caption="" name="DEVID2" offset="0xF2" size="1"/>
+                <register caption="" name="DEVID3" offset="0xF3" size="1"/>
+                <register caption="" name="DEVID4" offset="0xF4" size="1"/>
+                <register caption="" name="DEVID5" offset="0xF5" size="1"/>
+                <register caption="" name="DEVID6" offset="0xF6" size="1"/>
+                <register caption="" name="DEVID7" offset="0xF7" size="1"/>
+                <register caption="" name="DEVID8" offset="0xF8" size="1"/>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR0D" offset="0xC3" size="1">
+                    <bitfield caption="RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="RX Start" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+                <register caption="Analog Comparator Status Register B" name="ACSRB" offset="0x4F" size="1">
+                    <bitfield caption="Analog Comparator Output Enable" mask="0x01" name="ACOE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x0F"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x0F"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="VQFN32" caption="VQFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml
new file mode 100644
index 00000000..2465d440
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169A.xml
@@ -0,0 +1,1505 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega169A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64"
+                 package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega169A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x11"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out Detection Disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out Detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out Detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out Detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x07" name="LCDPM" values="LCD_PORT_MASK"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="LCD_PORT_MASK">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="DRQFN64" caption="DRQFN64">
+            <pin position="B1" pad="LCDCAP"/>
+            <pin position="A1" pad="PE0"/>
+            <pin position="A2" pad="PE1"/>
+            <pin position="B2" pad="PE2"/>
+            <pin position="A3" pad="PE3"/>
+            <pin position="B3" pad="PE4"/>
+            <pin position="A4" pad="PE5"/>
+            <pin position="B4" pad="PE6"/>
+            <pin position="A5" pad="PE7"/>
+            <pin position="B5" pad="PB0"/>
+            <pin position="A6" pad="PB1"/>
+            <pin position="B6" pad="PB2"/>
+            <pin position="A7" pad="PB3"/>
+            <pin position="A8" pad="PB4"/>
+            <pin position="B7" pad="PB5"/>
+            <pin position="B8" pad="PB6"/>
+            <pin position="A9" pad="PB7"/>
+            <pin position="A10" pad="PG3"/>
+            <pin position="B9" pad="PG4"/>
+            <pin position="A11" pad="PG5"/>
+            <pin position="B10" pad="VCC"/>
+            <pin position="A12" pad="GND"/>
+            <pin position="B11" pad="XTAL2"/>
+            <pin position="A13" pad="XTAL1"/>
+            <pin position="B12" pad="PD0"/>
+            <pin position="A14" pad="PD1"/>
+            <pin position="B13" pad="PD2"/>
+            <pin position="A15" pad="PD3"/>
+            <pin position="B14" pad="PD4"/>
+            <pin position="A16" pad="PD5"/>
+            <pin position="A17" pad="PD6"/>
+            <pin position="B15" pad="PD7"/>
+            <pin position="B16" pad="PG0"/>
+            <pin position="A18" pad="PG1"/>
+            <pin position="A19" pad="PC0"/>
+            <pin position="B17" pad="PC1"/>
+            <pin position="A20" pad="PC2"/>
+            <pin position="B18" pad="PC3"/>
+            <pin position="A21" pad="PC4"/>
+            <pin position="B19" pad="PC5"/>
+            <pin position="A22" pad="PC6"/>
+            <pin position="B20" pad="PC7"/>
+            <pin position="A23" pad="PG2"/>
+            <pin position="B21" pad="PA7"/>
+            <pin position="A24" pad="PA6"/>
+            <pin position="A25" pad="PA5"/>
+            <pin position="B22" pad="PA4"/>
+            <pin position="B23" pad="PA3"/>
+            <pin position="A26" pad="PA2"/>
+            <pin position="A27" pad="PA1"/>
+            <pin position="B24" pad="PA0"/>
+            <pin position="A28" pad="VCC"/>
+            <pin position="B25" pad="GND"/>
+            <pin position="A29" pad="PF7"/>
+            <pin position="B26" pad="PF6"/>
+            <pin position="A30" pad="PF5"/>
+            <pin position="B27" pad="PF4"/>
+            <pin position="A31" pad="PF3"/>
+            <pin position="B28" pad="PF2"/>
+            <pin position="A32" pad="PF1"/>
+            <pin position="B29" pad="PF0"/>
+            <pin position="A33" pad="AREF"/>
+            <pin position="A34" pad="GND"/>
+            <pin position="B30" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml
new file mode 100644
index 00000000..37d20376
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169P.xml
@@ -0,0 +1,1507 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega169PV-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PV-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PV-8MCH" tempmin="-40" tempmax="85" speedmax="8000000" pinout="DRQFN64"
+                 package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169P-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega169P-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega169P-16MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64"
+                 package="DRQFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega169P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out Detection Disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out Detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out Detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out Detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x07" name="LCDPM" values="LCD_PORT_MASK"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="LCD_PORT_MASK">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xC0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xC0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="DRQFN64" caption="DRQFN64">
+            <pin position="B1" pad="LCDCAP"/>
+            <pin position="A1" pad="PE0"/>
+            <pin position="A2" pad="PE1"/>
+            <pin position="B2" pad="PE2"/>
+            <pin position="A3" pad="PE3"/>
+            <pin position="B3" pad="PE4"/>
+            <pin position="A4" pad="PE5"/>
+            <pin position="B4" pad="PE6"/>
+            <pin position="A5" pad="PE7"/>
+            <pin position="B5" pad="PB0"/>
+            <pin position="A6" pad="PB1"/>
+            <pin position="B6" pad="PB2"/>
+            <pin position="A7" pad="PB3"/>
+            <pin position="A8" pad="PB4"/>
+            <pin position="B7" pad="PB5"/>
+            <pin position="B8" pad="PB6"/>
+            <pin position="A9" pad="PB7"/>
+            <pin position="A10" pad="PG3"/>
+            <pin position="B9" pad="PG4"/>
+            <pin position="A11" pad="PG5"/>
+            <pin position="B10" pad="VCC"/>
+            <pin position="A12" pad="GND"/>
+            <pin position="B11" pad="XTAL2"/>
+            <pin position="A13" pad="XTAL1"/>
+            <pin position="B12" pad="PD0"/>
+            <pin position="A14" pad="PD1"/>
+            <pin position="B13" pad="PD2"/>
+            <pin position="A15" pad="PD3"/>
+            <pin position="B14" pad="PD4"/>
+            <pin position="A16" pad="PD5"/>
+            <pin position="A17" pad="PD6"/>
+            <pin position="B15" pad="PD7"/>
+            <pin position="B16" pad="PG0"/>
+            <pin position="A18" pad="PG1"/>
+            <pin position="A19" pad="PC0"/>
+            <pin position="B17" pad="PC1"/>
+            <pin position="A20" pad="PC2"/>
+            <pin position="B18" pad="PC3"/>
+            <pin position="A21" pad="PC4"/>
+            <pin position="B19" pad="PC5"/>
+            <pin position="A22" pad="PC6"/>
+            <pin position="B20" pad="PC7"/>
+            <pin position="A23" pad="PG2"/>
+            <pin position="B21" pad="PA7"/>
+            <pin position="A24" pad="PA6"/>
+            <pin position="A25" pad="PA5"/>
+            <pin position="B22" pad="PA4"/>
+            <pin position="B23" pad="PA3"/>
+            <pin position="A26" pad="PA2"/>
+            <pin position="A27" pad="PA1"/>
+            <pin position="B24" pad="PA0"/>
+            <pin position="A28" pad="VCC"/>
+            <pin position="B25" pad="GND"/>
+            <pin position="A29" pad="PF7"/>
+            <pin position="B26" pad="PF6"/>
+            <pin position="A30" pad="PF5"/>
+            <pin position="B27" pad="PF4"/>
+            <pin position="A31" pad="PF3"/>
+            <pin position="B28" pad="PF2"/>
+            <pin position="A32" pad="PF1"/>
+            <pin position="B29" pad="PF0"/>
+            <pin position="A33" pad="AREF"/>
+            <pin position="A34" pad="GND"/>
+            <pin position="B30" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml
new file mode 100644
index 00000000..5eae3540
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA169PA.xml
@@ -0,0 +1,1543 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega169PA-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-MCH" tempmin="-40" tempmax="85" speedmax="16000000" pinout="DRQFN64"
+                 package="DRQFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega169PA-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega169PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out Detection Disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out Detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out Detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out Detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare A" mask="0xFF" name="OCR2A"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF">
+                    <bitfield caption="EEPROM Address Bits" mask="0x01FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x07" name="LCDPM" values="LCD_PORT_MASK"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configuration Bits" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="LCD_PORT_MASK">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF">
+                    <bitfield caption="USI Data bits" mask="0xFF" name="USIDR"/>
+                </register>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC" values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR0"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF">
+                    <bitfield caption="USART Baud Rate bits" mask="0x0FFF" name="UBRR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose Bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose Bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose Bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="DRQFN64" caption="DRQFN64">
+            <pin position="B1" pad="LCDCAP"/>
+            <pin position="A1" pad="PE0"/>
+            <pin position="A2" pad="PE1"/>
+            <pin position="B2" pad="PE2"/>
+            <pin position="A3" pad="PE3"/>
+            <pin position="B3" pad="PE4"/>
+            <pin position="A4" pad="PE5"/>
+            <pin position="B4" pad="PE6"/>
+            <pin position="A5" pad="PE7"/>
+            <pin position="B5" pad="PB0"/>
+            <pin position="A6" pad="PB1"/>
+            <pin position="B6" pad="PB2"/>
+            <pin position="A7" pad="PB3"/>
+            <pin position="A8" pad="PB4"/>
+            <pin position="B7" pad="PB5"/>
+            <pin position="B8" pad="PB6"/>
+            <pin position="A9" pad="PB7"/>
+            <pin position="A10" pad="PG3"/>
+            <pin position="B9" pad="PG4"/>
+            <pin position="A11" pad="PG5"/>
+            <pin position="B10" pad="VCC"/>
+            <pin position="A12" pad="GND"/>
+            <pin position="B11" pad="XTAL2"/>
+            <pin position="A13" pad="XTAL1"/>
+            <pin position="B12" pad="PD0"/>
+            <pin position="A14" pad="PD1"/>
+            <pin position="B13" pad="PD2"/>
+            <pin position="A15" pad="PD3"/>
+            <pin position="B14" pad="PD4"/>
+            <pin position="A16" pad="PD5"/>
+            <pin position="A17" pad="PD6"/>
+            <pin position="B15" pad="PD7"/>
+            <pin position="B16" pad="PG0"/>
+            <pin position="A18" pad="PG1"/>
+            <pin position="A19" pad="PC0"/>
+            <pin position="B17" pad="PC1"/>
+            <pin position="A20" pad="PC2"/>
+            <pin position="B18" pad="PC3"/>
+            <pin position="A21" pad="PC4"/>
+            <pin position="B19" pad="PC5"/>
+            <pin position="A22" pad="PC6"/>
+            <pin position="B20" pad="PC7"/>
+            <pin position="A23" pad="PG2"/>
+            <pin position="B21" pad="PA7"/>
+            <pin position="A24" pad="PA6"/>
+            <pin position="A25" pad="PA5"/>
+            <pin position="B22" pad="PA4"/>
+            <pin position="B23" pad="PA3"/>
+            <pin position="A26" pad="PA2"/>
+            <pin position="A27" pad="PA1"/>
+            <pin position="B24" pad="PA0"/>
+            <pin position="A28" pad="VCC"/>
+            <pin position="B25" pad="GND"/>
+            <pin position="A29" pad="PF7"/>
+            <pin position="B26" pad="PF6"/>
+            <pin position="A30" pad="PF5"/>
+            <pin position="B27" pad="PF4"/>
+            <pin position="A31" pad="PF3"/>
+            <pin position="B28" pad="PF2"/>
+            <pin position="A32" pad="PF1"/>
+            <pin position="B29" pad="PF0"/>
+            <pin position="A33" pad="AREF"/>
+            <pin position="A34" pad="GND"/>
+            <pin position="B30" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml
new file mode 100644
index 00000000..0f32b787
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16A.xml
@@ -0,0 +1,1236 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega16A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0460">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB3"/>
+                            <signal group="T" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="OC" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="SS" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="4" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="9" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="10" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="11" name="USART_RXC" caption="USART, Rx Complete"/>
+                <interrupt index="12" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="13" name="USART_TXC" caption="USART, Tx Complete"/>
+                <interrupt index="14" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="15" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="16" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="17" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="18" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="19" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="20" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0940303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words start address=$1F80" name="128W_1F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Register" name="TCNT0" offset="0x52" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter 0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Output Compare 0 Register" name="OCR0" offset="0x5C" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare bits" mask="0xFF" name="OCR0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                </register>
+                <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x01FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Mode Select" mask="0xB0" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x40" name="SE"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Special function I/O register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler reset" mask="0x02" name="PSR2"/>
+                    <bitfield caption="Prescaler reset" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x08"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x09"/>
+                <value caption="Standby" name="STDBY" value="0x0A"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x0B"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+                <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter2" mask="0xFF" name="TCNT2"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare bits" mask="0xFF" name="OCR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register" name="UBRRL" offset="0x29" size="1" mask="0xFF">
+                    <bitfield caption="USART Baud Rate bits" mask="0xFF" name="UBRR"/>
+                </register>
+                <register caption="USART Baud Rate Register" name="UBRRH" offset="0x40" size="1" mask="0x8F">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Baud Rate bits" mask="0x0F" name="UBRR" lsb="8"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC" values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN44" caption="TQFPQFN44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="AREF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVA.xml
new file mode 100644
index 00000000..ff793083
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVA.xml
@@ -0,0 +1,685 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16HVA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="7" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="8" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="9" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="10" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="11" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="12" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="13" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="14" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="15" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="16" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="17" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="18" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="19" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVSP" type="hvsp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940C"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0c"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="HVSP_INTERFACE">
+                    <property name="HvspControlStack"
+                              value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                    <property name="HvspEnterProgMode_stabDelay" value="100"/>
+                    <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+                    <property name="HvspEnterProgMode_synchCycles" value="6"/>
+                    <property name="HvspEnterProgMode_latchCycles" value="1"/>
+                    <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+                    <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+                    <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+                    <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+                    <property name="HvspLeaveProgMode_stabDelay" value="101"/>
+                    <property name="HvspLeaveProgMode_resetDelay" value="26"/>
+                    <property name="HvspChipErase_pollTimeout" value="40"/>
+                    <property name="HvspChipErase_eraseTime" value="1"/>
+                    <property name="HvspProgramFlash_mode" value="0x0D"/>
+                    <property name="HvspProgramFlash_blockSize" value="256"/>
+                    <property name="HvspProgramFlash_pollTimeout" value="6"/>
+                    <property name="HvspReadFlash_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_mode" value="0x05"/>
+                    <property name="HvspProgramEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+                    <property name="HvspReadEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramFuse_pollTimeout" value="25"/>
+                    <property name="HvspProgramLock_pollTimeout" value="25"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDF">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Debug Wire enable" mask="0x10" name="DWEN"/>
+                    <bitfield caption="Self Programming enable" mask="0x08" name="SELFPRGEN"/>
+                    <bitfield caption="Select start-up time" mask="0x07" name="SUT" values="ENUM_SUT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 6 CK/14 CK + 4 ms" name="6CK_14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 6 CK/14 CK + 8 ms" name="6CK_14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 6 CK/14 CK + 16 ms" name="6CK_14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 6 CK/14 CK + 32 ms" name="6CK_14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 6 CK/14 CK + 64 ms" name="6CK_14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 6 CK/14 CK + 128 ms" name="6CK_14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 6 CK/14 CK + 256 ms" name="6CK_14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 6 CK/14 CK + 512 ms" name="6CK_14CK_512MS" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register  Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap calibration bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield
+                            caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
+                            mask="0x80" name="BGD"/>
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x01"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x01" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Data Register, Port B" name="PORTB" offset="0x25" size="1" mask="0x0F"/>
+                <register caption="Data Direction Register, Port B" name="DDRB" offset="0x24" size="1" mask="0x0F"/>
+                <register caption="Input Pins, Port B" name="PINB" offset="0x23" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+                    <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
+                          mask="0xFF"/>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group name="CPU_SLEEP_MODE_3BITS" caption="">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F"/>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F"/>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F"/>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF"/>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
+                </register>
+                <register caption="Timer Counter 0  Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
+                <register caption="Output compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Output compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter Interrupt Flag Register" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE8" size="2" mask="0xFFFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="CC-ADC Regular Current" name="CADRC" offset="0xE6" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVB.xml
new file mode 100644
index 00000000..f4470f86
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVB.xml
@@ -0,0 +1,982 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16HVB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="CHARGER_DETECT">
+                    <instance name="CHARGER_DETECT" caption="Charger Detect">
+                        <register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
+                                        address-space="data" caption="Charger Detect"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
+                <interrupt index="11" name="CHDET" caption="Charger Detect"/>
+                <interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM" caption="SPM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940D"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0d"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="50"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
+                    <bitfield caption="Clock Divide mode" mask="0x10" name="CKDIV8"/>
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_OSCSEL">
+                <value caption="Default" name="DEFAULT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
+                    <bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
+                </register>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
+                    <bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
+                    <bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
+                    <bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
+                </register>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
+                </register>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
+                    <bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
+                </register>
+                <register caption="Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
+                </register>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F">
+                    <bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
+                </register>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
+                              name="CHCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
+                              name="DHCDL"/>
+                </register>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
+                              name="COCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
+                              name="DOCDL"/>
+                </register>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
+                              name="SCDL"/>
+                </register>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Charger Detect" name="CHARGER_DETECT">
+            <register-group caption="Charger Detect" name="CHARGER_DETECT">
+                <register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
+                    <bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
+                    <bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
+                    <bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
+                    <bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
+                    <bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
+                </register>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
+                </register>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
+                          ocd-rw="R"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVBREVB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVBREVB.xml
new file mode 100644
index 00000000..cf672729
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16HVBREVB.xml
@@ -0,0 +1,982 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16HVBrevB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="CHARGER_DETECT">
+                    <instance name="CHARGER_DETECT" caption="Charger Detect">
+                        <register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
+                                        address-space="data" caption="Charger Detect"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
+                <interrupt index="11" name="CHDET" caption="Charger Detect"/>
+                <interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM" caption="SPM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x940D"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x0d"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="50"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
+                    <bitfield caption="DUVR mode on" mask="0x10" name="DUVRDINIT"/>
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_OSCSEL">
+                <value caption="Default" name="DEFAULT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
+                    <bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
+                </register>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
+                    <bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
+                    <bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
+                    <bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
+                </register>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
+                </register>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
+                    <bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
+                </register>
+                <register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
+                </register>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F">
+                    <bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
+                </register>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
+                              name="CHCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
+                              name="DHCDL"/>
+                </register>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
+                              name="COCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
+                              name="DOCDL"/>
+                </register>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
+                              name="SCDL"/>
+                </register>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Charger Detect" name="CHARGER_DETECT">
+            <register-group caption="Charger Detect" name="CHARGER_DETECT">
+                <register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
+                    <bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
+                    <bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
+                    <bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
+                    <bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
+                    <bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
+                </register>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
+                </register>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
+                          ocd-rw="R"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml
new file mode 100644
index 00000000..8a37d9f6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16M1.xml
@@ -0,0 +1,1537 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega16M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16M1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal function="AC" group="ACMP" index="0" pad="PD7"/>
+                            <signal function="AC" group="ACMP" index="1" pad="PC6"/>
+                            <signal function="AC" group="ACMP" index="2" pad="PD5"/>
+                            <signal function="AC" group="ACMP" index="3" pad="PC5"/>
+                            <signal function="AC" group="ACMPN" index="0" pad="PB2"/>
+                            <signal function="AC" group="ACMPN" index="1" pad="PB5"/>
+                            <signal function="AC" group="ACMPN" index="2" pad="PD6"/>
+                            <signal function="AC" group="ACMPN" index="3" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                        <signals>
+                            <signal function="DAC" group="D2A" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal function="TC0" group="T0" pad="PC2"/>
+                            <signal function="TC0" group="OC0A" pad="PD3"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal function="TC1" group="T1" pad="PC3"/>
+                            <signal function="TC1" group="ICP1A" pad="PD4"/>
+                            <signal function="TC1" group="ICP1B" pad="PC3"/>
+                            <signal function="TC1" group="OC1A" pad="PD2"/>
+                            <signal function="TC1" group="OC1B" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PE2"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB7"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PC4"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PC5"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LINUART">
+                    <instance name="LINUART" caption="Local Interconnect Network">
+                        <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
+                                        caption="Local Interconnect Network"/>
+                        <signals>
+                            <signal function="LIN" group="TXLIN" pad="PD3"/>
+                            <signal function="LIN" group="RXLIN" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal function="SPI" group="MISO" pad="PB0"/>
+                            <signal function="SPI_ALT" group="MISO" pad="PD2"/>
+                            <signal function="SPI" group="MOSI" pad="PB1"/>
+                            <signal function="SPI_ALT" group="MOSI" pad="PD3"/>
+                            <signal function="SPI" group="SCK" pad="PB7"/>
+                            <signal function="SPI_ALT" group="SCK" pad="PD4"/>
+                            <signal function="SPI" group="SS" pad="PD3"/>
+                            <signal function="SPI_ALT" group="SS" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal function="EXINT" group="INT" index="0" pad="PD6"/>
+                            <signal function="EXINT" group="INT" index="1" pad="PB2"/>
+                            <signal function="EXINT" group="INT" index="2" pad="PB5"/>
+                            <signal function="EXINT" group="INT" index="3" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="0" pad="PB0"/>
+                            <signal function="EXINT" group="PCINT" index="1" pad="PB1"/>
+                            <signal function="EXINT" group="PCINT" index="2" pad="PB2"/>
+                            <signal function="EXINT" group="PCINT" index="3" pad="PB3"/>
+                            <signal function="EXINT" group="PCINT" index="4" pad="PB4"/>
+                            <signal function="EXINT" group="PCINT" index="5" pad="PB5"/>
+                            <signal function="EXINT" group="PCINT" index="6" pad="PB6"/>
+                            <signal function="EXINT" group="PCINT" index="7" pad="PB7"/>
+                            <signal function="EXINT" group="PCINT" index="8" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="9" pad="PC1"/>
+                            <signal function="EXINT" group="PCINT" index="10" pad="PC2"/>
+                            <signal function="EXINT" group="PCINT" index="11" pad="PC3"/>
+                            <signal function="EXINT" group="PCINT" index="12" pad="PC4"/>
+                            <signal function="EXINT" group="PCINT" index="13" pad="PC5"/>
+                            <signal function="EXINT" group="PCINT" index="14" pad="PC6"/>
+                            <signal function="EXINT" group="PCINT" index="15" pad="PC7"/>
+                            <signal function="EXINT" group="PCINT" index="16" pad="PD0"/>
+                            <signal function="EXINT" group="PCINT" index="17" pad="PD1"/>
+                            <signal function="EXINT" group="PCINT" index="18" pad="PD2"/>
+                            <signal function="EXINT" group="PCINT" index="19" pad="PD3"/>
+                            <signal function="EXINT" group="PCINT" index="20" pad="PD4"/>
+                            <signal function="EXINT" group="PCINT" index="21" pad="PD5"/>
+                            <signal function="EXINT" group="PCINT" index="22" pad="PD6"/>
+                            <signal function="EXINT" group="PCINT" index="23" pad="PD7"/>
+                            <signal function="EXINT" group="PCINT" index="24" pad="PE0"/>
+                            <signal function="EXINT" group="PCINT" index="25" pad="PE1"/>
+                            <signal function="EXINT" group="PCINT" index="26" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC" caption="Power Stage Controller">
+                        <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                        <signals>
+                            <signal function="PSC" group="PSCIN2" pad="PD2"/>
+                            <signal function="PSC" group="PSCOUT2A" pad="PB0"/>
+                            <signal function="PSC" group="PSCOUT2B" pad="PB1"/>
+                            <signal function="PSC" group="PSCIN1" pad="PC1"/>
+                            <signal function="PSC" group="PSCOUT1A" pad="PC0"/>
+                            <signal function="PSC" group="PSCOUT1B" pad="PB6"/>
+                            <signal function="PSC" group="PSCIN0" pad="PD1"/>
+                            <signal function="PSC" group="PSCOUT0A" pad="PD0"/>
+                            <signal function="PSC" group="PSCOUT0B" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
+                <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
+                <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
+                <interrupt index="4" name="ANACOMP3" caption="Analog Comparator 3"/>
+                <interrupt index="5" name="PSC_FAULT" caption="PSC Fault"/>
+                <interrupt index="6" name="PSC_EC" caption="PSC End of Cycle"/>
+                <interrupt index="7" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="8" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="9" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="10" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer1/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="16" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CAN_INT" caption="CAN MOB, Burst, General Errors"/>
+                <interrupt index="19" name="CAN_TOVF" caption="CAN Timer Overflow"/>
+                <interrupt index="20" name="LIN_TC" caption="LIN Transfer Complete"/>
+                <interrupt index="21" name="LIN_ERR" caption="LIN Error"/>
+                <interrupt index="22" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="23" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="24" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="25" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="26" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="27" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="28" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+                <interrupt index="29" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="30" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9484"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x84"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
+                    <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
+                    <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVFG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register Flags" name="CANGIT" offset="0xDA" size="1">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer Flag" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt Flag" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General Flag" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General Flag" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General Flag" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General Flag" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off Interrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
+                          ocd-rw=""/>
+                <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
+                    <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="CAN Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width bits" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment bits" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="CAN Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segment 2 bits" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1 bits" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="Timer Control bits" mask="0xFF" name="TPRSC"/>
+                </register>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw="">
+                    <bitfield caption="Timer bits" mask="0xFFFF" name="CANTIM"/>
+                </register>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw="">
+                    <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
+                </register>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="">
+                    <bitfield caption="Transmit Error Counter bits" mask="0xFF" name="TEC"/>
+                </register>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="">
+                    <bitfield caption="Receive Error Counter bits" mask="0xFF" name="REC"/>
+                </register>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment (Active Low)" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning on MOb" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK on MOb" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK on MOb" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error on MOb" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error on MOb" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error on MOb" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error on MOb" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error on MOb" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Transmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1" mask="0xFD">
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF">
+                    <bitfield caption="TIMSTM" mask="0xFFFF" name="TIMSTM"/>
+                </register>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF">
+                    <bitfield caption="Message Data bits" mask="0xFF" name="MSG"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bits" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
+                    <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0x91" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction CAN" mask="0x40" name="PRCAN"/>
+                    <bitfield caption="Power Reduction PSC" mask="0x20" name="PRPSC"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction LIN UART" mask="0x02" name="PRLIN"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Timer/Counter Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Timer/Counter Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="ADC channel selection bits" mask="0x1F" name="MUX" values="ANALOG_ADC_MUXPOS"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data bits" mask="0xFFFF" name="ADC"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
+                    <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AMP2P Pin Digital input Disable" mask="0x40" name="AMP2PD"/>
+                    <bitfield caption="ACMP0 Pin Digital input Disable" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="AMP0P Pin Digital input Disable" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="AMP0N Pin Digital input Disable" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="ADC10 Pin Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Pin Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Pin Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Amplifier 0 Control and Status Register" name="AMP0CSR" offset="0x75" size="1">
+                    <bitfield caption="Amplifier 0 Enable" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="Amplifier 0 Input Shunt" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="Amplifier 0 Gain Selection" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="Amplifier 0 - Comparator 0 connection" mask="0x08" name="AMPCMP0"/>
+                    <bitfield caption="Amplifier 0 Clock Source Selection" mask="0x07" name="AMP0TS"/>
+                </register>
+                <register caption="Amplifier 1 Control and Status Register" name="AMP1CSR" offset="0x76" size="1">
+                    <bitfield caption="Amplifier 1 Enable" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="Amplifier 1 Input Shunt" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="Amplifier 1 Gain Selection" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="Amplifier 1 - Comparator 1 Connection" mask="0x08" name="AMPCMP1"/>
+                    <bitfield caption="Amplifier 1 Clock Source Selection" mask="0x07" name="AMP1TS"/>
+                </register>
+                <register caption="Amplifier 2 Control and Status Register" name="AMP2CSR" offset="0x77" size="1">
+                    <bitfield caption="Amplifier 2 Enable" mask="0x80" name="AMP2EN"/>
+                    <bitfield caption="Amplifier 2 Input Shunt" mask="0x40" name="AMP2IS"/>
+                    <bitfield caption="Amplifier 2 Gain Selection" mask="0x30" name="AMP2G"/>
+                    <bitfield caption="Amplifier 2 - Comparator 2 Connection" mask="0x08" name="AMPCMP2"/>
+                    <bitfield caption="Amplifier 2 Clock Source Selection" mask="0x07" name="AMP2TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC reference" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ANALOG_ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="ADC0" value="0x0"/>
+                <value caption="ADC input pin 1" name="ADC1" value="0x1"/>
+                <value caption="ADC input pin 2" name="ADC2" value="0x2"/>
+                <value caption="ADC input pin 3" name="ADC3" value="0x3"/>
+                <value caption="ADC input pin 4" name="ADC4" value="0x4"/>
+                <value caption="ADC input pin 5" name="ADC5" value="0x5"/>
+                <value caption="ADC input pin 6" name="ADC6" value="0x6"/>
+                <value caption="ADC input pin 7" name="ADC7" value="0x7"/>
+                <value caption="ADC input pin 8" name="ADC8" value="0x8"/>
+                <value caption="ADC input pin 9" name="ADC9" value="0x9"/>
+                <value caption="ADC input pin 10" name="ADC10" value="0xA"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0xB"/>
+                <value caption="Internal VCC / 4" name="VCC4" value="0xC"/>
+                <value caption="Current source" name="ISRC" value="0xD"/>
+                <value caption="Analog Differential Amplifier 0" name="AMP0" value="0xE"/>
+                <value caption="Analog Differential Amplifier 1" name="AMP1" value="0xF"/>
+                <value caption="Analog Differential Amplifier 2" name="AMP2" value="0x10"/>
+                <value caption="Bandgap" name="BNDGAP" value="0x11"/>
+                <value caption="0V (GND)" name="GND" value="0x12"/>
+            </value-group>
+        </module>
+        <module caption="Local Interconnect Network" name="LINUART">
+            <register-group caption="Local Interconnect Network" name="LINUART">
+                <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+                    <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+                    <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+                    <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+                    <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+                    <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+                </register>
+                <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+                    <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+                    <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+                    <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+                    <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+                    <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+                    <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+                </register>
+                <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+                    <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+                    <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+                    <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+                    <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+                </register>
+                <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+                    <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+                    <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+                    <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+                    <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+                    <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+                    <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+                    <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+                    <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+                </register>
+                <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+                    <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+                    <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+                </register>
+                <register caption="LIN Baud Rate Register" name="LINBRR" offset="0xCD" size="2">
+                    <bitfield caption="" mask="0x0FFF" name="LDIV"/>
+                </register>
+                <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+                    <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+                    <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+                </register>
+                <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+                    <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+                    <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+                </register>
+                <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+                    <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+                    <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+                </register>
+                <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1">
+                    <bitfield caption="LIN Data In / Data out" mask="0xFF" name="LDATA"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6D" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x07" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6C" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6A" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming mode" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC">
+                <register caption="PSC Interrupt Flag Register" name="PIFR" offset="0xBC" size="1" ocd-rw="">
+                    <bitfield caption="PSC External Event 2 Interrupt" mask="0x0E" name="PEV"/>
+                    <bitfield caption="PSC End of Cycle Interrupt" mask="0x01" name="PEOP"/>
+                </register>
+                <register caption="PSC Interrupt Mask Register" name="PIM" offset="0xBB" size="1" ocd-rw="">
+                    <bitfield caption="External Event 2 Interrupt Enable" mask="0x0E" name="PEVE"/>
+                    <bitfield caption="PSC End of Cycle Interrupt Enable" mask="0x01" name="PEOPE"/>
+                </register>
+                <register caption="PSC Module 2 Input Control Register" name="PMIC2" offset="0xBA" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 2 Overlap Enable" mask="0x80" name="POVEN2"/>
+                    <bitfield caption="PSC Module 2 Input Select" mask="0x40" name="PISEL2"/>
+                    <bitfield caption="PSC Module 2 Input Level Selector" mask="0x20" name="PELEV2"/>
+                    <bitfield caption="PSC Module 2 Input Filter Enable" mask="0x10" name="PFLTE2"/>
+                    <bitfield caption="PSC Module 2 Asynchronous Output Control" mask="0x08" name="PAOC2"/>
+                    <bitfield caption="PSC Module 2 Input Mode bits" mask="0x07" name="PRFM2"/>
+                </register>
+                <register caption="PSC Module 1 Input Control Register" name="PMIC1" offset="0xB9" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 1 Overlap Enable" mask="0x80" name="POVEN1"/>
+                    <bitfield caption="PSC Module 1 Input Select" mask="0x40" name="PISEL1"/>
+                    <bitfield caption="PSC Module 1 Input Level Selector" mask="0x20" name="PELEV1"/>
+                    <bitfield caption="PSC Module 1 Input Filter Enable" mask="0x10" name="PFLTE1"/>
+                    <bitfield caption="PSC Module 1 Asynchronous Output Control" mask="0x08" name="PAOC1"/>
+                    <bitfield caption="PSC Module 1 Input Mode bits" mask="0x07" name="PRFM1"/>
+                </register>
+                <register caption="PSC Module 0 Input Control Register" name="PMIC0" offset="0xB8" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 0 Overlap Enable" mask="0x80" name="POVEN0"/>
+                    <bitfield caption="PSC Module 0 Input Select" mask="0x40" name="PISEL0"/>
+                    <bitfield caption="PSC Module 0 Input Level Selector" mask="0x20" name="PELEV0"/>
+                    <bitfield caption="PSC Module 0 Input Filter Enable" mask="0x10" name="PFLTE0"/>
+                    <bitfield caption="PSC Module 0 Asynchronous Output Control" mask="0x08" name="PAOC0"/>
+                    <bitfield caption="PSC Module 0 Input Mode bits" mask="0x07" name="PRFM0"/>
+                </register>
+                <register caption="PSC Control Register" name="PCTL" offset="0xB7" size="1" ocd-rw="">
+                    <bitfield caption="PSC Prescaler Select bits" mask="0xC0" name="PPRE"/>
+                    <bitfield caption="PSC Input Clock Select" mask="0x20" name="PCLKSEL"/>
+                    <bitfield caption="PSC Complete Cycle" mask="0x02" name="PCCYC"/>
+                    <bitfield caption="PSC Run" mask="0x01" name="PRUN"/>
+                </register>
+                <register caption="PSC Output Configuration" name="POC" offset="0xB6" size="1" ocd-rw="">
+                    <bitfield caption="PSC Output 2B Enable" mask="0x20" name="POEN2B"/>
+                    <bitfield caption="PSC Output 2A Enable" mask="0x10" name="POEN2A"/>
+                    <bitfield caption="PSC Output 1B Enable" mask="0x08" name="POEN1B"/>
+                    <bitfield caption="PSC Output 1A Enable" mask="0x04" name="POEN1A"/>
+                    <bitfield caption="PSC Output 0B Enable" mask="0x02" name="POEN0B"/>
+                    <bitfield caption="PSC Output 0A Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC Configuration Register" name="PCNF" offset="0xB5" size="1" ocd-rw="">
+                    <bitfield caption="PSC Update Lock" mask="0x20" name="PULOCK"/>
+                    <bitfield caption="PSC Mode" mask="0x10" name="PMODE"/>
+                    <bitfield caption="PSC Output B Polarity" mask="0x08" name="POPB"/>
+                    <bitfield caption="PSC Output A Polarity" mask="0x04" name="POPA"/>
+                </register>
+                <register caption="PSC Synchro Configuration" name="PSYNC" offset="0xB4" size="1" ocd-rw="">
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x0C" name="PSYNC1"/>
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x03" name="PSYNC0"/>
+                </register>
+                <register caption="PSC Output Compare RB Register" name="POCR_RB" offset="0xB2" size="2" mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare RB bits" mask="0x0FFF" name="POCR_RB"/>
+                </register>
+                <register caption="PSC Module 2 Output Compare SB Register" name="POCR2SB" offset="0xB0" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare SB bits" mask="0x0FFF" name="POCR2SB"/>
+                </register>
+                <register caption="PSC Module 2 Output Compare RA Register" name="POCR2RA" offset="0xAE" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare RA bits" mask="0x0FFF" name="POCR2RA"/>
+                </register>
+                <register caption="PSC Module 2 Output Compare SA Register" name="POCR2SA" offset="0xAC" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare SA bits" mask="0x0FFF" name="POCR2SA"/>
+                </register>
+                <register caption="PSC Module 1 Output Compare SB Register" name="POCR1SB" offset="0xAA" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare SB bits" mask="0x0FFF" name="POCR1SB"/>
+                </register>
+                <register caption="PSC Module 1 Output Compare RA Register" name="POCR1RA" offset="0xA8" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare RA bits" mask="0x0FFF" name="POCR1RA"/>
+                </register>
+                <register caption="PSC Module 1 Output Compare SA Register" name="POCR1SA" offset="0xA6" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare SA bits" mask="0x0FFF" name="POCR1SA"/>
+                </register>
+                <register caption="PSC Module 0 Output Compare SB Register" name="POCR0SB" offset="0xA4" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare SB bits" mask="0x0FFF" name="POCR0SB"/>
+                </register>
+                <register caption="PSC Module 0 Output Compare RA Register" name="POCR0RA" offset="0xA2" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare RA bits" mask="0x0FFF" name="POCR0RA"/>
+                </register>
+                <register caption="PSC Module 0 Output Compare SA Register" name="POCR0SA" offset="0xA0" size="2"
+                          mask="0x0FFF">
+                    <bitfield caption="PSC Output Compare SA bits" mask="0x0FFF" name="POCR0SA"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD2"/>
+            <pin position="2" pad="PD3"/>
+            <pin position="3" pad="PC1"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PC2"/>
+            <pin position="7" pad="PC3"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PE1"/>
+            <pin position="11" pad="PE2"/>
+            <pin position="12" pad="PD4"/>
+            <pin position="13" pad="PD5"/>
+            <pin position="14" pad="PD6"/>
+            <pin position="15" pad="PD7"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PC4"/>
+            <pin position="18" pad="PC5"/>
+            <pin position="19" pad="AVCC"/>
+            <pin position="20" pad="AGND"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="PC6"/>
+            <pin position="23" pad="PB3"/>
+            <pin position="24" pad="PB4"/>
+            <pin position="25" pad="PC7"/>
+            <pin position="26" pad="PB5"/>
+            <pin position="27" pad="PB6"/>
+            <pin position="28" pad="PB7"/>
+            <pin position="29" pad="PD0"/>
+            <pin position="30" pad="PC0"/>
+            <pin position="31" pad="PE0"/>
+            <pin position="32" pad="PD1"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
new file mode 100644
index 00000000..1ec52edf
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
@@ -0,0 +1,1184 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega16U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="TQFP32" pinout="QUAD"/>
+        <variant ordercode="ATmega16U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="QFN32" pinout="QUAD"/>
+    </variants>
+    <devices>
+        <device name="ATmega16U2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" pad="PB3" function="default"/>
+                            <signal group="MOSI" pad="PB2" function="default"/>
+                            <signal group="SCLK" pad="PB1" function="default"/>
+                            <signal group="SS" pad="PB0" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OCA" pad="PB7" function="default"/>
+                            <signal group="OCB" pad="PD0" function="default"/>
+                            <signal group="T" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" pad="PC7" function="default"/>
+                            <signal group="OCA" pad="PC6" function="default"/>
+                            <signal group="OCB" pad="PC5" function="default"/>
+                            <signal group="OCC" pad="PB7" function="default"/>
+                            <signal group="T" pad="PB4" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" pad="PD0" function="default"/>
+                            <signal group="INT" index="1" pad="PD1" function="default"/>
+                            <signal group="INT" index="2" pad="PD2" function="default"/>
+                            <signal group="INT" index="3" pad="PD3" function="default"/>
+                            <signal group="INT" index="4" pad="PC7" function="default"/>
+                            <signal group="INT" index="5" pad="PD4" function="default"/>
+                            <signal group="INT" index="6" pad="PD6" function="default"/>
+                            <signal group="INT" index="7" pad="PD7" function="default"/>
+                            <signal group="PCINT" index="0" pad="PB0" function="default"/>
+                            <signal group="PCINT" index="1" pad="PB1" function="default"/>
+                            <signal group="PCINT" index="2" pad="PB2" function="default"/>
+                            <signal group="PCINT" index="3" pad="PB3" function="default"/>
+                            <signal group="PCINT" index="4" pad="PB4" function="default"/>
+                            <signal group="PCINT" index="5" pad="PB5" function="default"/>
+                            <signal group="PCINT" index="6" pad="PB6" function="default"/>
+                            <signal group="PCINT" index="7" pad="PB7" function="default"/>
+                            <signal group="PCINT" index="8" pad="PC6" function="default"/>
+                            <signal group="PCINT" index="9" pad="PC5" function="default"/>
+                            <signal group="PCINT" index="10" pad="PC4" function="default"/>
+                            <signal group="PCINT" index="11" pad="PC2" function="default"/>
+                            <signal group="PCINT" index="12" pad="PD5" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" pad="PD2" function="default"/>
+                            <signal group="TXD" pad="PD3" function="default"/>
+                            <signal group="XCK" pad="PD5" function="default"/>
+                            <signal group="RTS" pad="PD6" function="default"/>
+                            <signal group="CTS" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" pad="PD1" function="default"/>
+                            <signal group="AIN" index="1" pad="PD2" function="default"/>
+                            <signal group="AIN" index="2" pad="PC2" function="default"/>
+                            <signal group="AIN" index="3" pad="PD4" function="default"/>
+                            <signal group="AIN" index="4" pad="PD5" function="default"/>
+                            <signal group="AIN" index="5" pad="PD6" function="default"/>
+                            <signal group="AIN" index="6" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="12" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="13" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="14" name="TIMER1_CAPT" caption="Timer/Counter2 Capture Event"/>
+                <interrupt index="15" name="TIMER1_COMPA" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="16" name="TIMER1_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="17" name="TIMER1_COMPC" caption="Timer/Counter2 Compare Match C"/>
+                <interrupt index="18" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="19" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="20" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="21" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="23" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="24" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="25" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="26" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9489"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x89"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x40" name="RSTDISBL"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x06"/>
+                <value caption="Brown-out detection level at VCC=2.9 V" name="2V9" value="0x05"/>
+                <value caption="Brown-out detection level at VCC=3.0 V" name="3V0" value="0x04"/>
+                <value caption="Brown-out detection level at VCC=3.5 V" name="3V5" value="0x03"/>
+                <value caption="Brown-out detection level at VCC=3.6 V" name="3V6" value="0x02"/>
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x01"/>
+                <value caption="Brown-out detection level at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1">
+                    <bitfield caption="Port C Data Register bits" mask="0xF0" name="PORTC" lsb="4"/>
+                    <bitfield caption="Port C Data Register bits" mask="0x07" name="PORTC"/>
+                </register>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1">
+                    <bitfield caption="Port C Data Direction Register bits" mask="0xF0" name="DDC" lsb="4"/>
+                    <bitfield caption="Port C Data Direction Register bits" mask="0x07" name="DDC"/>
+                </register>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="Port C Input Pins bits" mask="0xF0" name="PINC" lsb="4"/>
+                    <bitfield caption="Port C Input Pins bits" mask="0x07" name="PINC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare C bits" mask="0xFFFF" name="OCR1C"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="USB Software Output Enable register" name="UPOE" offset="0xFB" size="1">
+                    <bitfield caption="USB Buffers Direct Drive enable configuration" mask="0xC0" name="UPWE"/>
+                    <bitfield caption="USB direct drive values" mask="0x30" name="UPDRV"/>
+                    <bitfield caption="D+ Input value" mask="0x02" name="DPI"/>
+                    <bitfield caption="D- Input value" mask="0x01" name="DMI"/>
+                </register>
+                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1"
+                          mask="0x1F">
+                    <bitfield caption="Byte Count bits" mask="0x1F" name="EPINT"/>
+                </register>
+                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Byte Count bits" mask="0xFF" name="BYCT"/>
+                </register>
+                <register caption="USB Data Endpoint" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="Data bits" mask="0xFF" name="DAT"/>
+                </register>
+                <register caption="USB Endpoint Interrupt Enable Register" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="Flow Error Interrupt Enable Flag" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="NAK IN Interrupt Enable Bit" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="NAK OUT Interrupt Enable Bit" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="Received SETUP Interrupt Enable Flag" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="Received OUT Data Interrupt Enable Flag" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="Stalled Interrupt Enable Flag" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="Transmitter Ready Interrupt Enable Flag" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="USB Endpoint Status 1 Register" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="Control Direction" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="Current Bank" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="USB Endpoint Status 0 Register" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="Configuration Status Flag" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="Overflow Error Interrupt Flag" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="Underflow Error Interrupt Flag" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="Data Toggle Sequencing Flag" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="Busy Bank Flag" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="USB Endpoint Configuration 1 Register" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="Endpoint Size Bits" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="Endpoint Bank Bits" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="Endpoint Allocation Bit" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="USB Endpoint Configuration 0 Register" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="Endpoint Type Bits" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="Endpoint Direction Bit" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="USB Endpoint Control Register" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="STALL Request Handshake Bit" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="STALL Request Clear Handshake Bit" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="Reset Data Toggle Bit" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="Endpoint Enable Bit" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="USB Endpoint Reset Register" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="Endpoint FIFO Reset Bits" mask="0x1F" name="EPRST"/>
+                </register>
+                <register caption="USB Endpoint Number" name="UENUM" offset="0xE9" size="1" mask="0x07">
+                    <bitfield caption="Endpoint Number bits" mask="0x07" name="EPNUM"/>
+                </register>
+                <register caption="USB Endpoint Interrupt Register" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="FIFO Control Bit" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="NAK IN Received Interrupt Flag" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="Read/Write Allowed Flag" mask="0x20" name="RWAL"/>
+                    <bitfield caption="NAK OUT Received Interrupt Flag" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="Received SETUP Interrupt Flag" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="Received OUT Data Interrupt Flag" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="STALLEDI Interrupt Flag" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="Transmitter Ready Interrupt Flag" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="USB Device Micro Frame Number" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Number CRC Error Flag" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2"
+                          mask="0x07FF">
+                    <bitfield caption="Frame Number Upper Flag" mask="0x07FF" name="FNUM"/>
+                </register>
+                <register caption="USB Device Address Register" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="Address Enable Bit" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="USB Address Bits" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="USB Device Interrupt Enable Register" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="Upstream Resume Interrupt Enable Bit" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="End Of Resume Interrupt Enable Bit" mask="0x20" name="EORSME"/>
+                    <bitfield caption="Wake-up CPU Interrupt Enable Bit" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="End Of Reset Interrupt Enable Bit" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="Start Of Frame Interrupt Enable Bit" mask="0x04" name="SOFE"/>
+                    <bitfield caption="Suspend Interrupt Enable Bit" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="USB Device Interrupt Register" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="Upstream Resume Interrupt Flag" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="End Of Resume Interrupt Flag" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="Wake-up CPU Interrupt Flag" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="End Of Reset Interrupt Flag" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x04" name="SOFI"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="USB Device Control Registers" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="USB Reset CPU Bit" mask="0x04" name="RSTCPU"/>
+                    <bitfield caption="Remote Wake-up Bit" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="Detach Bit" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="USB macro Enable Bit" mask="0x80" name="USBE"/>
+                    <bitfield caption="Freeze USB Clock Bit" mask="0x20" name="FRZCLK"/>
+                </register>
+                <register caption="Regulator Control Register" name="REGCR" offset="0x63" size="1" ocd-rw="R">
+                    <bitfield caption="Regulator Disable" mask="0x01" name="REGDIS"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="USB reset flag" mask="0x20" name="USBRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xD2" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xD1" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xD0" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
+                          ocd-rw=""/>
+            </register-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="" mask="0x1F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="W">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR1"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF">
+                    <bitfield caption="USART Baud Rate bits" mask="0x0FFF" name="UBRR1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+                <register caption="Watchdog Timer Clock Divider" name="WDTCKD" offset="0x62" size="1">
+                    <bitfield caption="Watchdog Early Warning Interrupt Flag" mask="0x08" name="WDEWIF"/>
+                    <bitfield caption="Watchdog Early Warning Interrupt Enable" mask="0x04" name="WDEWIE"/>
+                    <bitfield caption="Watchdog Timer Clock Dividers" mask="0x03" name="WCLKD"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Analog Comparator Input Multiplexer" name="ACMUX" offset="0x7D" size="1">
+                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX"
+                              values="ANALOG_COMP_SELECTION_BITS"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
+                    <bitfield caption="AIN7 Digital Input Disable" mask="0x80" name="AIN7D"/>
+                    <bitfield caption="AIN6 Digital Input Disable" mask="0x40" name="AIN6D"/>
+                    <bitfield caption="AIN5 Digital Input Disable" mask="0x20" name="AIN5D"/>
+                    <bitfield caption="AIN4 Digital Input Disable" mask="0x10" name="AIN4D"/>
+                    <bitfield caption="AIN3 Digital Input Disable" mask="0x08" name="AIN3D"/>
+                    <bitfield caption="AIN2 Digital Input Disable" mask="0x04" name="AIN2D"/>
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_COMP_SELECTION_BITS">
+                <value caption="AIN1" name="AIN1" value="0x00"/>
+                <value caption="AIN2" name="AIN2" value="0x01"/>
+                <value caption="AIN3" name="AIN3" value="0x02"/>
+                <value caption="AIN4" name="AIN4" value="0x03"/>
+                <value caption="AIN5" name="AIN5" value="0x04"/>
+                <value caption="AIN6" name="AIN6" value="0x05"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QUAD">
+            <pin pad="XTAL1" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="PC2" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="PB0" position="14"/>
+            <pin pad="PB1" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PB3" position="17"/>
+            <pin pad="PB4" position="18"/>
+            <pin pad="PB5" position="19"/>
+            <pin pad="PB6" position="20"/>
+            <pin pad="PB7" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="PC6" position="23"/>
+            <pin pad="PC1" position="24"/>
+            <pin pad="PC5" position="25"/>
+            <pin pad="PC4" position="26"/>
+            <pin pad="UCAP" position="27"/>
+            <pin pad="UGND" position="28"/>
+            <pin pad="D+" position="29"/>
+            <pin pad="D-" position="30"/>
+            <pin pad="UVCC" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml
new file mode 100644
index 00000000..ae4d7d69
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA16U4.xml
@@ -0,0 +1,1634 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega16U4-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4RC-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44"
+                 vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega16U4RC-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega16U4" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0600">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0500" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="PDI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="PDO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                            <signal group="RTS" function="default" pad="PB7"/>
+                            <signal group="CTS" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                        <signals>
+                            <signal group="HWB" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" function="default" pad="PC7"/>
+                            <signal group="OCA" function="default" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC10">
+                    <instance name="TC4" caption="Timer/Counter, 10-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 10-bit"/>
+                        <signals>
+                            <signal group="_OCA" function="default" pad="PC6"/>
+                            <signal group="OCA" function="default" pad="PC7"/>
+                            <signal group="_OCB" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="_OCD" function="default" pad="PD6"/>
+                            <signal group="OCD" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="8" function="default" pad="PD4"/>
+                            <signal group="ADC" index="9" function="default" pad="PD6"/>
+                            <signal group="ADC" index="10" function="default" pad="PD7"/>
+                            <signal group="ADC" index="11" function="default" pad="PB4"/>
+                            <signal group="ADC" index="12" function="default" pad="PB5"/>
+                            <signal group="ADC" index="13" function="default" pad="PB6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PC7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="Reserved1" caption="Reserved1"/>
+                <interrupt index="6" name="Reserved2" caption="Reserved2"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="Reserved3" caption="Reserved3"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="11" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="Reserved4" caption="Reserved4"/>
+                <interrupt index="14" name="Reserved5" caption="Reserved5"/>
+                <interrupt index="15" name="Reserved6" caption="Reserved6"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="26" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="27" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="TWI" caption="2-wire Serial Interface        "/>
+                <interrupt index="37" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="38" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="39" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="40" name="TIMER4_COMPD" caption="Timer/Counter4 Compare Match D"/>
+                <interrupt index="41" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="42" name="TIMER4_FPF" caption="Timer/Counter4 Fault Protection Interrupt"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0948803F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x88"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFB">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x52">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$1F00" name="256W_1F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$1E00" name="512W_1E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$1C00" name="1024W_1C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$1800" name="2048W_1800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x03"/>
+                <value caption="Brown-out detection at VCC=3.4 V" name="3V4" value="0x02"/>
+                <value caption="Brown-out detection at VCC=3.5 V" name="3V5" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xC0"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xC0"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xC0" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0x44"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0x44"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0x44" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xF3"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xF3"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xF3" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR1"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address Bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 10-bit" name="TC10">
+            <register-group caption="Timer/Counter, 10-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xC0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Force Output Compare Match 4A" mask="0x08" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare Match 4B" mask="0x04" name="FOC4B"/>
+                    <bitfield caption="" mask="0x02" name="PWM4A"/>
+                    <bitfield caption="" mask="0x01" name="PWM4B"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xC1" size="1">
+                    <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM4X"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter 4" mask="0x40" name="PSR4"/>
+                    <bitfield caption="Dead Time Prescaler Bits" mask="0x30" name="DTPS4"/>
+                    <bitfield caption="Clock Select Bits" mask="0x0F" name="CS4"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xC2" size="1">
+                    <bitfield caption="Comparator A Output Mode" mask="0x80" name="COM4A1S"/>
+                    <bitfield caption="Comparator A Output Mode" mask="0x40" name="COM4A0S"/>
+                    <bitfield caption="Comparator B Output Mode" mask="0x20" name="COM4B1S"/>
+                    <bitfield caption="Comparator B Output Mode" mask="0x10" name="COM4B0S"/>
+                    <bitfield caption="Comparator D Output Mode" mask="0x0C" name="COM4D"/>
+                    <bitfield caption="Force Output Compare Match 4D" mask="0x02" name="FOC4D"/>
+                    <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM4D"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register D" name="TCCR4D" offset="0xC3" size="1">
+                    <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE4"/>
+                    <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN4"/>
+                    <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC4"/>
+                    <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES4"/>
+                    <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC4"/>
+                    <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF4"/>
+                    <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register E" name="TCCR4E" offset="0xC4" size="1">
+                    <bitfield caption="Register Update Lock" mask="0x80" name="TLOCK4"/>
+                    <bitfield caption="Enhanced Compare/PWM Mode" mask="0x40" name="ENHC4"/>
+                    <bitfield caption="Output Compare Override Enable bit" mask="0x3F" name="OC4OE"/>
+                </register>
+                <register caption="Timer/Counter4 Low Bytes" name="TCNT4" offset="0xBE" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter4 bits" mask="0xFF" name="TC4"/>
+                </register>
+                <register caption="Timer/Counter4" name="TC4H" offset="0xBF" size="1" mask="0x07">
+                    <bitfield caption="Timer/Counter4 bits" mask="0x07" name="TC4" lsb="8"/>
+                </register>
+                <register caption="Timer/Counter4 Output Compare Register A" name="OCR4A" offset="0xCF" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter4 Output Compare A bits" mask="0xFF" name="OCR4A"/>
+                </register>
+                <register caption="Timer/Counter4 Output Compare Register B" name="OCR4B" offset="0xD0" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter4 Output Compare B bits" mask="0xFF" name="OCR4B"/>
+                </register>
+                <register caption="Timer/Counter4 Output Compare Register C" name="OCR4C" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter4 Output Compare C bits" mask="0xFF" name="OCR4C"/>
+                </register>
+                <register caption="Timer/Counter4 Output Compare Register D" name="OCR4D" offset="0xD2" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter4 Output Compare D bits" mask="0xFF" name="OCR4D"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Output Compare D Match Interrupt Enable" mask="0x80"
+                              name="OCIE4D"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x40"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x20"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x04" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 4D" mask="0x80" name="OCF4D"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x40" name="OCF4A"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x20" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x04" name="TOV4"/>
+                </register>
+                <register caption="Timer/Counter 4 Dead Time Value" name="DT4" offset="0xD4" size="1">
+                    <bitfield caption="Timer/Counter 4 Dead Time Value Bits" mask="0xFF" name="DT4L"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 bits" mask="0xFFFF" name="TCNT3"/>
+                </register>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Output Compare A bits" mask="0xFFFF" name="OCR3A"/>
+                </register>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Output Compare B bits" mask="0xFFFF" name="OCR3B"/>
+                </register>
+                <register caption="Timer/Counter3 Output Compare Register C Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Output Compare C bits" mask="0xFFFF" name="OCR3C"/>
+                </register>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter3 Input Capture bits" mask="0xFFFF" name="ICR3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register C Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare C bits" mask="0xFFFF" name="OCR1C"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask 0" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data Bits" mask="0x03FF" name="ADC"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x20" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR2" offset="0x7D" size="1" ocd-rw="">
+                    <bitfield caption="ADC13 Digital input Disable" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="ADC12 Digital input Disable" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="ADC11 Digital input Disable" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="ADC10 Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Oscillator Control Register" name="RCCTRL" offset="0x67" size="1">
+                    <bitfield caption="" mask="0x01" name="RCFREQ"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x03" name="RAMPZ" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xC7" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xC6" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xC5" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bit 2" mask="0x10" name="PINDIV"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="PLL Frequency Control Register" name="PLLFRQ" offset="0x52" size="1">
+                    <bitfield caption="" mask="0x80" name="PINMUX"/>
+                    <bitfield caption="" mask="0x40" name="PLLUSB"/>
+                    <bitfield caption="" mask="0x30" name="PLLTM"/>
+                    <bitfield caption="" mask="0x0F" name="PDIV"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x7F">
+                    <bitfield caption="Endpoint interrupt bits" mask="0x7F" name="EPINT"/>
+                </register>
+                <register caption="" name="UEBCHX" offset="0xF3" size="1" mask="0x07" ocd-rw="R">
+                    <bitfield caption="Byte count bits" mask="0x07" name="BYCT" lsb="8"/>
+                </register>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R">
+                    <bitfield caption="Byte count bits" mask="0xFF" name="BYCT"/>
+                </register>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0xFF" name="DAT"/>
+                </register>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x7F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07">
+                    <bitfield caption="" mask="0x07" name="UENUM"/>
+                </register>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF">
+                    <bitfield caption="Frame number value" mask="0x07FF" name="FNUM"/>
+                </register>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="USB low speed mode" mask="0x04" name="LSM"/>
+                    <bitfield caption="" mask="0x08" name="RSTCPU"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                    <bitfield caption="" mask="0x10" name="OTGPADE"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTE"/>
+                </register>
+                <register caption="" name="USBINT" offset="0xDA" size="1">
+                    <bitfield caption="" mask="0x01" name="VBUSTI"/>
+                </register>
+                <register caption="" name="USBSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x08" name="SPEED"/>
+                    <bitfield caption="" mask="0x01" name="VBUS"/>
+                </register>
+                <register caption="" name="UHWCON" offset="0xD7" size="1">
+                    <bitfield caption="" mask="0x01" name="UVREGE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP44" caption="TQFP44">
+            <pin position="1" pad="PE6"/>
+            <pin position="2" pad="UVCC"/>
+            <pin position="3" pad="DM"/>
+            <pin position="4" pad="DP"/>
+            <pin position="5" pad="UGND"/>
+            <pin position="6" pad="UCAP"/>
+            <pin position="7" pad="VBUS"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PB2"/>
+            <pin position="11" pad="PB3"/>
+            <pin position="12" pad="PB7"/>
+            <pin position="13" pad="RESET"/>
+            <pin position="14" pad="VCC"/>
+            <pin position="15" pad="GND"/>
+            <pin position="16" pad="XTAL2"/>
+            <pin position="17" pad="XTAL1"/>
+            <pin position="18" pad="PD0"/>
+            <pin position="19" pad="PD1"/>
+            <pin position="20" pad="PD2"/>
+            <pin position="21" pad="PD3"/>
+            <pin position="22" pad="PD5"/>
+            <pin position="23" pad="GND"/>
+            <pin position="24" pad="AVCC"/>
+            <pin position="25" pad="PD4"/>
+            <pin position="26" pad="PD6"/>
+            <pin position="27" pad="PD7"/>
+            <pin position="28" pad="PB4"/>
+            <pin position="29" pad="PB5"/>
+            <pin position="30" pad="PB6"/>
+            <pin position="31" pad="PC6"/>
+            <pin position="32" pad="PC7"/>
+            <pin position="33" pad="PE2"/>
+            <pin position="34" pad="VCC"/>
+            <pin position="35" pad="GND"/>
+            <pin position="36" pad="PF7"/>
+            <pin position="37" pad="PF6"/>
+            <pin position="38" pad="PF5"/>
+            <pin position="39" pad="PF4"/>
+            <pin position="40" pad="PF1"/>
+            <pin position="41" pad="PF0"/>
+            <pin position="42" pad="AREF"/>
+            <pin position="43" pad="GND"/>
+            <pin position="44" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN44" caption="QFN44">
+            <pin position="1" pad="PE6"/>
+            <pin position="2" pad="UVCC"/>
+            <pin position="3" pad="DM"/>
+            <pin position="4" pad="DP"/>
+            <pin position="5" pad="UGND"/>
+            <pin position="6" pad="UCAP"/>
+            <pin position="7" pad="VBUS"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PB2"/>
+            <pin position="11" pad="PB3"/>
+            <pin position="12" pad="PB7"/>
+            <pin position="13" pad="RESET"/>
+            <pin position="14" pad="VCC"/>
+            <pin position="15" pad="GND"/>
+            <pin position="16" pad="XTAL2"/>
+            <pin position="17" pad="XTAL1"/>
+            <pin position="18" pad="PD0"/>
+            <pin position="19" pad="PD1"/>
+            <pin position="20" pad="PD2"/>
+            <pin position="21" pad="PD3"/>
+            <pin position="22" pad="PD5"/>
+            <pin position="23" pad="GND"/>
+            <pin position="24" pad="AVCC"/>
+            <pin position="25" pad="PD4"/>
+            <pin position="26" pad="PD6"/>
+            <pin position="27" pad="PD7"/>
+            <pin position="28" pad="PB4"/>
+            <pin position="29" pad="PB5"/>
+            <pin position="30" pad="PB6"/>
+            <pin position="31" pad="PC6"/>
+            <pin position="32" pad="PC7"/>
+            <pin position="33" pad="PE2"/>
+            <pin position="34" pad="VCC"/>
+            <pin position="35" pad="GND"/>
+            <pin position="36" pad="PF7"/>
+            <pin position="37" pad="PF6"/>
+            <pin position="38" pad="PF5"/>
+            <pin position="39" pad="PF4"/>
+            <pin position="40" pad="PF1"/>
+            <pin position="41" pad="PF0"/>
+            <pin position="42" pad="AREF"/>
+            <pin position="43" pad="GND"/>
+            <pin position="44" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml
new file mode 100644
index 00000000..cda65115
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2560.xml
@@ -0,0 +1,2069 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega2560V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP100"
+                 package="TQFP100" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2560V-8CU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="CBGA100"
+                 package="CBGA100" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2560-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP100"
+                 package="TQFP100" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega2560-16CU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="CBGA100"
+                 package="CBGA100" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega2560" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
+                    <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2" caption="USART">
+                        <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PH1"/>
+                            <signal group="RXD" function="default" pad="PH0"/>
+                            <signal group="XCK" function="default" pad="PH2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3" caption="USART">
+                        <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PJ1"/>
+                            <signal group="RXD" function="default" pad="PJ0"/>
+                            <signal group="XCK" function="default" pad="PJ2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PH0" index="0"/>
+                            <signal group="P" function="default" pad="PH1" index="1"/>
+                            <signal group="P" function="default" pad="PH2" index="2"/>
+                            <signal group="P" function="default" pad="PH3" index="3"/>
+                            <signal group="P" function="default" pad="PH4" index="4"/>
+                            <signal group="P" function="default" pad="PH5" index="5"/>
+                            <signal group="P" function="default" pad="PH6" index="6"/>
+                            <signal group="P" function="default" pad="PH7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PJ0" index="0"/>
+                            <signal group="P" function="default" pad="PJ1" index="1"/>
+                            <signal group="P" function="default" pad="PJ2" index="2"/>
+                            <signal group="P" function="default" pad="PJ3" index="3"/>
+                            <signal group="P" function="default" pad="PJ4" index="4"/>
+                            <signal group="P" function="default" pad="PJ5" index="5"/>
+                            <signal group="P" function="default" pad="PJ6" index="6"/>
+                            <signal group="P" function="default" pad="PJ7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTK" caption="I/O Port">
+                        <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PK0" index="0"/>
+                            <signal group="P" function="default" pad="PK1" index="1"/>
+                            <signal group="P" function="default" pad="PK2" index="2"/>
+                            <signal group="P" function="default" pad="PK3" index="3"/>
+                            <signal group="P" function="default" pad="PK4" index="4"/>
+                            <signal group="P" function="default" pad="PK5" index="5"/>
+                            <signal group="P" function="default" pad="PK6" index="6"/>
+                            <signal group="P" function="default" pad="PK7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTL" caption="I/O Port">
+                        <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PL0" index="0"/>
+                            <signal group="P" function="default" pad="PL1" index="1"/>
+                            <signal group="P" function="default" pad="PL2" index="2"/>
+                            <signal group="P" function="default" pad="PL3" index="3"/>
+                            <signal group="P" function="default" pad="PL4" index="4"/>
+                            <signal group="P" function="default" pad="PL5" index="5"/>
+                            <signal group="P" function="default" pad="PL6" index="6"/>
+                            <signal group="P" function="default" pad="PL7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PG5"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                            <signal group="OCB" function="default" pad="PH6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PL2"/>
+                            <signal group="ICP" function="default" pad="PL1"/>
+                            <signal group="OCA" function="default" pad="PL3"/>
+                            <signal group="OCB" function="default" pad="PL4"/>
+                            <signal group="OCC" function="default" pad="PL5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PBH7"/>
+                            <signal group="ICP" function="default" pad="PL0"/>
+                            <signal group="OCA" function="default" pad="PH3"/>
+                            <signal group="OCB" function="default" pad="PH4"/>
+                            <signal group="OCC" function="default" pad="PH5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PJ0"/>
+                            <signal group="PCINT" index="10" function="default" pad="PJ1"/>
+                            <signal group="PCINT" index="11" function="default" pad="PJ2"/>
+                            <signal group="PCINT" index="12" function="default" pad="PJ3"/>
+                            <signal group="PCINT" index="13" function="default" pad="PJ4"/>
+                            <signal group="PCINT" index="14" function="default" pad="PJ5"/>
+                            <signal group="PCINT" index="15" function="default" pad="PJ6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PK0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PK1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PK2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PK3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PK4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PK5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PK6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PK7"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="8" function="default" pad="PK0"/>
+                            <signal group="ADC" index="9" function="default" pad="PK1"/>
+                            <signal group="ADC" index="10" function="default" pad="PK2"/>
+                            <signal group="ADC" index="11" function="default" pad="PK3"/>
+                            <signal group="ADC" index="12" function="default" pad="PK4"/>
+                            <signal group="ADC" index="13" function="default" pad="PK5"/>
+                            <signal group="ADC" index="14" function="default" pad="PK6"/>
+                            <signal group="ADC" index="15" function="default" pad="PK7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
+                <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
+                <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
+                <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
+                <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0980103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x01"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="4"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$1FC00" name="1024W_1FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$1F800" name="2048W_1F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$1F000" name="4096W_1F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART2">
+                <register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR2A" offset="0xD0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC2"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC2"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE2"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE2"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR2"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE2"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X2"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM2"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR2B" offset="0xD1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE2"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE2"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE2"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN2"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN2"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ22"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB82"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB82"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR2C" offset="0xD2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL2" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM2" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS2" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART3">
+                <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE3"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR3"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE3"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X3"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM3"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR3B" offset="0x131" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE3"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE3"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE3"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN3"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN3"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ32"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB83"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB83"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR3C" offset="0x132" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL3" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM3" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS3" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ3"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL3"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR3" offset="0x134" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x3F"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0x102" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0x101" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0x100" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0x105" size="1" mask="0xFF"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0x104" size="1" mask="0xFF"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0x103" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTK">
+                <register caption="PORT K Data Register" name="PORTK" offset="0x108" size="1" mask="0xFF"/>
+                <register caption="PORT K Data Direction Register" name="DDRK" offset="0x107" size="1" mask="0xFF"/>
+                <register caption="PORT K Input Pins" name="PINK" offset="0x106" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTL">
+                <register caption="PORT L Data Register" name="PORTL" offset="0x10B" size="1" mask="0xFF"/>
+                <register caption="PORT L Data Direction Register" name="DDRL" offset="0x10A" size="1" mask="0xFF"/>
+                <register caption="PORT L Input Pins" name="PINL" offset="0x109" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM5A"/>
+                    <bitfield caption="Compare Output Mode 5B, bits" mask="0x30" name="COM5B"/>
+                    <bitfield caption="Compare Output Mode 5C, bits" mask="0x0C" name="COM5C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Output Compare Flag 5A" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Compare Output Mode 4C, bits" mask="0x0C" name="COM4C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask interrupt" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask interrupt" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask interrupt" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x03"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART3" mask="0x04" name="PRUSART3"/>
+                    <bitfield caption="Power Reduction USART2" mask="0x02" name="PRUSART2"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS2">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2200 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2200 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2200 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2200 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2200 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2200 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2200 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF6"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF6">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+                <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
+                <value caption="ADC Single Ended Input pin 9" name="ADC9" value="0x21"/>
+                <value caption="ADC Single Ended Input pin 10" name="ADC10" value="0x22"/>
+                <value caption="ADC Single Ended Input pin 11" name="ADC11" value="0x23"/>
+                <value caption="ADC Single Ended Input pin 12" name="ADC12" value="0x24"/>
+                <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
+                <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
+                <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
+                       value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
+                       value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
+                       value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
+                       value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
+                       value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
+                       value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
+                       name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
+                       name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
+                       value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
+                       value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
+                       value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
+                       value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
+                       value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
+                       value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
+                       value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
+                       value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
+                       value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
+                       value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
+                       value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
+                       value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
+                       value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
+                       value="0x3D"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP100" caption="TQFP100">
+            <pin position="1" pad="PG5"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="PH0"/>
+            <pin position="13" pad="PH1"/>
+            <pin position="14" pad="PH2"/>
+            <pin position="15" pad="PH3"/>
+            <pin position="16" pad="PH4"/>
+            <pin position="17" pad="PH5"/>
+            <pin position="18" pad="PH6"/>
+            <pin position="19" pad="PB0"/>
+            <pin position="20" pad="PB1"/>
+            <pin position="21" pad="PB2"/>
+            <pin position="22" pad="PB3"/>
+            <pin position="23" pad="PB4"/>
+            <pin position="24" pad="PB5"/>
+            <pin position="25" pad="PB6"/>
+            <pin position="26" pad="PB7"/>
+            <pin position="27" pad="PH7"/>
+            <pin position="28" pad="PG3"/>
+            <pin position="29" pad="PG4"/>
+            <pin position="30" pad="RESET"/>
+            <pin position="31" pad="VCC"/>
+            <pin position="32" pad="GND"/>
+            <pin position="33" pad="XTAL2"/>
+            <pin position="34" pad="XTAL1"/>
+            <pin position="35" pad="PL0"/>
+            <pin position="36" pad="PL1"/>
+            <pin position="37" pad="PL2"/>
+            <pin position="38" pad="PL3"/>
+            <pin position="39" pad="PL4"/>
+            <pin position="40" pad="PL5"/>
+            <pin position="41" pad="PL6"/>
+            <pin position="42" pad="PL7"/>
+            <pin position="43" pad="PD0"/>
+            <pin position="44" pad="PD1"/>
+            <pin position="45" pad="PD2"/>
+            <pin position="46" pad="PD3"/>
+            <pin position="47" pad="PD4"/>
+            <pin position="48" pad="PD5"/>
+            <pin position="49" pad="PD6"/>
+            <pin position="50" pad="PD7"/>
+            <pin position="51" pad="PG0"/>
+            <pin position="52" pad="PG1"/>
+            <pin position="53" pad="PC0"/>
+            <pin position="54" pad="PC1"/>
+            <pin position="55" pad="PC2"/>
+            <pin position="56" pad="PC3"/>
+            <pin position="57" pad="PC4"/>
+            <pin position="58" pad="PC5"/>
+            <pin position="59" pad="PC6"/>
+            <pin position="60" pad="PC7"/>
+            <pin position="61" pad="VCC"/>
+            <pin position="62" pad="GND"/>
+            <pin position="63" pad="PJ0"/>
+            <pin position="64" pad="PJ1"/>
+            <pin position="65" pad="PJ2"/>
+            <pin position="66" pad="PJ3"/>
+            <pin position="67" pad="PJ4"/>
+            <pin position="68" pad="PJ5"/>
+            <pin position="69" pad="PJ6"/>
+            <pin position="70" pad="PG2"/>
+            <pin position="71" pad="PA7"/>
+            <pin position="72" pad="PA6"/>
+            <pin position="73" pad="PA5"/>
+            <pin position="74" pad="PA4"/>
+            <pin position="75" pad="PA3"/>
+            <pin position="76" pad="PA2"/>
+            <pin position="77" pad="PA1"/>
+            <pin position="78" pad="PA0"/>
+            <pin position="79" pad="PJ7"/>
+            <pin position="80" pad="VCC"/>
+            <pin position="81" pad="GND"/>
+            <pin position="82" pad="PK7"/>
+            <pin position="83" pad="PK6"/>
+            <pin position="84" pad="PK5"/>
+            <pin position="85" pad="PK4"/>
+            <pin position="86" pad="PK3"/>
+            <pin position="87" pad="PK2"/>
+            <pin position="88" pad="PK1"/>
+            <pin position="89" pad="PK0"/>
+            <pin position="90" pad="PF7"/>
+            <pin position="91" pad="PF6"/>
+            <pin position="92" pad="PF5"/>
+            <pin position="93" pad="PF4"/>
+            <pin position="94" pad="PF3"/>
+            <pin position="95" pad="PF2"/>
+            <pin position="96" pad="PF1"/>
+            <pin position="97" pad="PF0"/>
+            <pin position="98" pad="AREF"/>
+            <pin position="99" pad="GND"/>
+            <pin position="100" pad="AVCC"/>
+        </pinout>
+        <pinout name="CBGA100" caption="CBGA100">
+            <pin position="A1" pad="GND"/>
+            <pin position="A2" pad="AREF"/>
+            <pin position="A3" pad="PF0"/>
+            <pin position="A4" pad="PF5"/>
+            <pin position="A5" pad="PE3"/>
+            <pin position="A6" pad="PK0"/>
+            <pin position="A7" pad="PK3"/>
+            <pin position="A8" pad="PK6"/>
+            <pin position="A9" pad="GND"/>
+            <pin position="A10" pad="VCC"/>
+            <pin position="B1" pad="AVCC"/>
+            <pin position="B2" pad="PG5"/>
+            <pin position="B3" pad="PF1"/>
+            <pin position="B4" pad="PF3"/>
+            <pin position="B5" pad="PF6"/>
+            <pin position="B6" pad="PK1"/>
+            <pin position="B7" pad="PK4"/>
+            <pin position="B8" pad="PK7"/>
+            <pin position="B9" pad="PA0"/>
+            <pin position="B10" pad="PA2"/>
+            <pin position="C1" pad="PE2"/>
+            <pin position="C2" pad="PE0"/>
+            <pin position="C3" pad="PE1"/>
+            <pin position="C4" pad="PF4"/>
+            <pin position="C5" pad="PF7"/>
+            <pin position="C6" pad="PK2"/>
+            <pin position="C7" pad="PK5"/>
+            <pin position="C8" pad="PJ7"/>
+            <pin position="C9" pad="PA1"/>
+            <pin position="C10" pad="PA3"/>
+            <pin position="D1" pad="PE3"/>
+            <pin position="D2" pad="PE4"/>
+            <pin position="D3" pad="PE5"/>
+            <pin position="D4" pad="PE6"/>
+            <pin position="D5" pad="PH2"/>
+            <pin position="D6" pad="PA4"/>
+            <pin position="D7" pad="PA5"/>
+            <pin position="D8" pad="PA6"/>
+            <pin position="D9" pad="PA7"/>
+            <pin position="D10" pad="PG2"/>
+            <pin position="E1" pad="PE7"/>
+            <pin position="E2" pad="PH0"/>
+            <pin position="E3" pad="PH1"/>
+            <pin position="E4" pad="PH3"/>
+            <pin position="E5" pad="PH5"/>
+            <pin position="E6" pad="PJ6"/>
+            <pin position="E7" pad="PJ5"/>
+            <pin position="E8" pad="PJ4"/>
+            <pin position="E9" pad="PJ3"/>
+            <pin position="E10" pad="PJ2"/>
+            <pin position="F1" pad="VCC"/>
+            <pin position="F2" pad="PH4"/>
+            <pin position="F3" pad="PH6"/>
+            <pin position="F4" pad="PB0"/>
+            <pin position="5F" pad="PL4"/>
+            <pin position="F6" pad="PD1"/>
+            <pin position="F7" pad="PJ1"/>
+            <pin position="F8" pad="PJ0"/>
+            <pin position="F9" pad="PC7"/>
+            <pin position="F10" pad="GND"/>
+            <pin position="G1" pad="GND"/>
+            <pin position="G2" pad="PB1"/>
+            <pin position="G3" pad="PB2"/>
+            <pin position="G4" pad="PB5"/>
+            <pin position="G5" pad="PL2"/>
+            <pin position="G6" pad="PD0"/>
+            <pin position="G7" pad="PD5"/>
+            <pin position="G8" pad="PC5"/>
+            <pin position="G9" pad="PC6"/>
+            <pin position="G10" pad="VCC"/>
+            <pin position="H1" pad="PB3"/>
+            <pin position="H2" pad="PB4"/>
+            <pin position="H3" pad="RESET"/>
+            <pin position="H4" pad="PL1"/>
+            <pin position="H5" pad="PL3"/>
+            <pin position="H6" pad="PL7"/>
+            <pin position="H7" pad="PD4"/>
+            <pin position="H8" pad="PC4"/>
+            <pin position="H9" pad="PC3"/>
+            <pin position="H0" pad="PC2"/>
+            <pin position="I1" pad="PH7"/>
+            <pin position="I2" pad="PG3"/>
+            <pin position="I3" pad="PB6"/>
+            <pin position="I4" pad="PL0"/>
+            <pin position="I5" pad="XTAL2"/>
+            <pin position="I6" pad="PL6"/>
+            <pin position="I7" pad="PD3"/>
+            <pin position="I8" pad="PC1"/>
+            <pin position="I9" pad="PC0"/>
+            <pin position="I0" pad="PG1"/>
+            <pin position="J1" pad="PB7"/>
+            <pin position="J2" pad="PG4"/>
+            <pin position="J3" pad="VCC"/>
+            <pin position="J4" pad="GND"/>
+            <pin position="J5" pad="XTAL1"/>
+            <pin position="J6" pad="PL5"/>
+            <pin position="J7" pad="PD2"/>
+            <pin position="J8" pad="PD6"/>
+            <pin position="J9" pad="PD7"/>
+            <pin position="J10" pad="PG0"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml
new file mode 100644
index 00000000..fd8ba6e3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2561.xml
@@ -0,0 +1,1802 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega2561V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2561V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega2561-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega2561-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega2561" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
+                    <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PG5"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PE0"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
+                <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
+                <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
+                <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
+                <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0980203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="4"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$1FC00" name="1024W_1FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$1F800" name="2048W_1F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$1F000" name="4096W_1F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x3F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM5A"/>
+                    <bitfield caption="Compare Output Mode 5B, bits" mask="0x30" name="COM5B"/>
+                    <bitfield caption="Compare Output Mode 5C, bits" mask="0x0C" name="COM5C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Output Compare Flag 5A" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Compare Output Mode 4C, bits" mask="0x0C" name="COM4C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask interrupt" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask interrupt" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask interrupt" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x03"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART3" mask="0x04" name="PRUSART3"/>
+                    <bitfield caption="Power Reduction USART2" mask="0x02" name="PRUSART2"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS2">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2200 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2200 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2200 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2200 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2200 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2200 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2200 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF6"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF6">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+                <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
+                <value caption="ADC Single Ended Input pin 9" name="ADC9" value="0x21"/>
+                <value caption="ADC Single Ended Input pin 10" name="ADC10" value="0x22"/>
+                <value caption="ADC Single Ended Input pin 11" name="ADC11" value="0x23"/>
+                <value caption="ADC Single Ended Input pin 12" name="ADC12" value="0x24"/>
+                <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
+                <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
+                <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
+                       value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
+                       value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
+                       value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
+                       value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
+                       value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
+                       value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
+                       name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
+                       name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
+                       value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
+                       value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
+                       value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
+                       value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
+                       value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
+                       value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
+                       value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
+                       value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
+                       value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
+                       value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
+                       value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
+                       value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
+                       value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
+                       value="0x3D"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="PG5"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="PG5"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
new file mode 100644
index 00000000..7e970b63
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA2564RFR2.xml
@@ -0,0 +1,2777 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega2564RFR2-ZU" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZUR" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZF" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega2564RFR2-ZFR" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega2564RFR2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
+                    <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
+                               size="0x0300">
+                    <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x8200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x8000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+                <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
+                <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
+                <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
+                <interrupt index="75" name="TRX24_AMI2" caption="Address match interrupt of address filter 2"/>
+                <interrupt index="76" name="TRX24_AMI3" caption="Address match interrupt of address filter 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp">
+                    <parameters>
+                        <param name="SUPPORTS_EEPROM_ERASE" value="0"/>
+                    </parameters>
+                </interface>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <parameters>
+                <param name="SUPPORTS_EEPROM_ERASE" value="1"/>
+            </parameters>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A80303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa8"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="4"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$1FC00" name="1024W_1FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$1F800" name="2048W_1F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$1F000" name="4096W_1F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                    <bitfield caption="Reserved Bit" mask="0x01" name="Res"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="Reserved Bit" mask="0x02" name="Res"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="Reserved Bit" mask="0x04" name="Res"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_SPI2X"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_SPI2X">
+                <value caption="fosc/4 / fosc/2 (SPI2X=0/1)" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16 / fosc/8 (SPI2X=0/1)" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64 / fosc/32 (SPI2X=0/1)" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128 / fosc/64 (SPI2X=0/1)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Reserved Bit" mask="0x30" name="Res"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Reserved Bit" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="Power Amplifier Ramp up/down Control Register" name="PARCR" offset="0x138" size="1">
+                    <bitfield caption="ext. PA Ramp Down Lead Time" mask="0xE0" name="PALTD" values="PALTD_bitf"/>
+                    <bitfield caption="ext. PA Ramp Up Lead Time" mask="0x1C" name="PALTU" values="PALTU_bitf"/>
+                    <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
+                    <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
+                          offset="0x10E" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
+                          offset="0x10F" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
+                          name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
+                          name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
+                          offset="0x112" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
+                          offset="0x113" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
+                          name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
+                          name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
+                          offset="0x116" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
+                          offset="0x117" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
+                          name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
+                          name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
+                          offset="0x11A" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
+                          offset="0x11B" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
+                          name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
+                          name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3H"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
+                          size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
+                    <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
+                    <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
+                    <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
+                          size="1">
+                    <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
+                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
+                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
+                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
+                              name="AACK_0_I_AM_COORD"/>
+                </register>
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0x80" name="Res7"/>
+                    <bitfield caption="Enable Phase Measurement Unit" mask="0x40" name="PMU_EN"/>
+                    <bitfield caption="Start of Phase Measurement Unit" mask="0x20" name="PMU_START"/>
+                    <bitfield caption="PMU IF Inverse" mask="0x10" name="PMU_IF_INV"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
+                              name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
+                              name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
+                              name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
+                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 3" mask="0x10" name="MAF_3_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 2" mask="0x08" name="MAF_2_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 1" mask="0x04" name="MAF_1_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
+                    <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
+                    <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
+                </register>
+                <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
+                    <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
+                          size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
+                              values="RX_RPC_CTRL_BITF"/>
+                    <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
+                    <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
+                    <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
+                    <bitfield caption="Reserved" mask="0x04" name="Res0"/>
+                    <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
+                              name="XAH_RPC_EN"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="PALTD_bitf">
+                <value caption="-3us" name="PALTD_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTD_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTD_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTD_0US" value="3"/>
+                <value caption="1us" name="PALTD_1US" value="4"/>
+                <value caption="2us" name="PALTD_2US" value="5"/>
+                <value caption="3us" name="PALTD_3US" value="6"/>
+                <value caption="4us" name="PALTD_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="PALTU_bitf">
+                <value caption="-3us" name="PALTU_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTU_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTU_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTU_0US" value="3"/>
+                <value caption="1us" name="PALTU_1US" value="4"/>
+                <value caption="2us" name="PALTU_2US" value="5"/>
+                <value caption="3us" name="PALTU_3US" value="6"/>
+                <value caption="4us" name="PALTU_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.5 dBm" name="VAL_0" value="0"/>
+                <value caption="3.3 dBm" name="VAL_1" value="1"/>
+                <value caption="2.8 dBm" name="VAL_2" value="2"/>
+                <value caption="2.3 dBm" name="VAL_3" value="3"/>
+                <value caption="1.8 dBm" name="VAL_4" value="4"/>
+                <value caption="1.2 dBm" name="VAL_5" value="5"/>
+                <value caption="0.5 dBm" name="VAL_6" value="6"/>
+                <value caption="-0.5 dBm" name="VAL_7" value="7"/>
+                <value caption="-1.5 dBm" name="VAL_8" value="8"/>
+                <value caption="-2.5 dBm" name="VAL_9" value="9"/>
+                <value caption="-3.5 dBm" name="VAL_10" value="10"/>
+                <value caption="-4.5 dBm" name="VAL_11" value="11"/>
+                <value caption="-6.5 dBm" name="VAL_12" value="12"/>
+                <value caption="-8.5 dBm" name="VAL_13" value="13"/>
+                <value caption="-11.5 dBm" name="VAL_14" value="14"/>
+                <value caption="-16.5 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V / 1.70V (BATMON_HR=1/0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V / 1.75V (BATMON_HR=1/0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V / 1.80V (BATMON_HR=1/0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V / 1.85V (BATMON_HR=1/0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V / 1.90V (BATMON_HR=1/0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V / 1.95V (BATMON_HR=1/0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V / 2.00V (BATMON_HR=1/0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V / 2.05V (BATMON_HR=1/0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V / 2.10V (BATMON_HR=1/0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V / 2.15V (BATMON_HR=1/0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V / 2.20V (BATMON_HR=1/0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V / 2.25V (BATMON_HR=1/0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V / 2.30V (BATMON_HR=1/0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V / 2.35V (BATMON_HR=1/0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V / 2.40V (BATMON_HR=1/0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_RPC_CTRL_BITF">
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
+                       value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+                <value caption="RFA2 family" name="P_RFA2" value="0x93"/>
+                <value caption="RFR2 family" name="P_RFR2" value="0x94"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_2_BITF">
+                <value caption="Revision A" name="REV_A" value="12"/>
+                <value caption="Revision B" name="REV_B" value="1"/>
+                <value caption="Revision C" name="REV_C" value="3"/>
+                <value caption="Revision D" name="REV_D" value="4"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
+                          offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCTSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
+                          offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCTSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
+                          offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCTSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
+                          offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCTSTRLL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
+                    <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
+                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
+                              name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
+                              name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
+                              name="SCCS1" values="SCCS1_BITF"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
+                          offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCRSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
+                          offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCRSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
+                          offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCRSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
+                          offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCRSTRLL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SCCKDIV_BITF">
+                <value caption="Transceiver Clock divided by 256, (62.5kHz)" name="VAL_0" value="0"/>
+                <value caption="Transceiver Clock divided by 128, (125kHz)" name="VAL_1" value="1"/>
+                <value caption="Transceiver Clock divided by 64,  (250kHz)" name="VAL_2" value="2"/>
+                <value caption="Transceiver Clock divided by 32,  (500kHz)" name="VAL_3" value="3"/>
+                <value caption="Transceiver Clock divided by 16,  (1MHz)" name="VAL_4" value="4"/>
+                <value caption="Transceiver Clock divided by 8,   (2MHz)" name="VAL_5" value="5"/>
+                <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
+            </value-group>
+            <value-group caption="" name="SCCS3_BITF">
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS2_BITF">
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS1_BITF">
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="0"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x03" name="RAMPZ" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="16.0 MHz" name="16_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register #0" name="DRTRAM0" offset="0x135" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #1" name="DRTRAM1" offset="0x134" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #2" name="DRTRAM2" offset="0x133" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #3" name="DRTRAM3" offset="0x132" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
new file mode 100644
index 00000000..4b885634
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA256RFR2.xml
@@ -0,0 +1,2775 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega256RFR2-ZU" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZUR" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZF" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega256RFR2-ZFR" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega256RFR2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x40000">
+                    <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0x3e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
+                               size="0x0300">
+                    <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x8200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x8000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+                <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
+                <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
+                <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
+                <interrupt index="75" name="TRX24_AMI2" caption="Address match interrupt of address filter 2"/>
+                <interrupt index="76" name="TRX24_AMI3" caption="Address match interrupt of address filter 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp">
+                    <parameters>
+                        <param name="SUPPORTS_EEPROM_ERASE" value="0"/>
+                    </parameters>
+                </interface>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <parameters>
+                <param name="SUPPORTS_EEPROM_ERASE" value="1"/>
+            </parameters>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A80203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa8"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="4"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$1FE00" name="512W_1FE00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$1FC00" name="1024W_1FC00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$1F800" name="2048W_1F800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$1F000" name="4096W_1F000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                    <bitfield caption="Reserved Bit" mask="0x01" name="Res"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="Reserved Bit" mask="0x02" name="Res"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="Reserved Bit" mask="0x04" name="Res"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_SPI2X"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_SPI2X">
+                <value caption="fosc/4 / fosc/2 (SPI2X=0/1)" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16 / fosc/8 (SPI2X=0/1)" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64 / fosc/32 (SPI2X=0/1)" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128 / fosc/64 (SPI2X=0/1)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Reserved Bit" mask="0x30" name="Res"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Reserved Bit" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="Power Amplifier Ramp up/down Control Register" name="PARCR" offset="0x138" size="1">
+                    <bitfield caption="ext. PA Ramp Down Lead Time" mask="0xE0" name="PALTD" values="PALTD_bitf"/>
+                    <bitfield caption="ext. PA Ramp Up Lead Time" mask="0x1C" name="PALTU" values="PALTU_bitf"/>
+                    <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
+                    <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
+                          offset="0x10E" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
+                          offset="0x10F" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
+                          name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
+                          name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
+                          offset="0x112" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
+                          offset="0x113" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
+                          name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
+                          name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
+                          offset="0x116" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
+                          offset="0x117" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
+                          name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
+                          name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
+                          offset="0x11A" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
+                          offset="0x11B" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
+                          name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
+                          name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3H"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
+                          size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
+                    <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
+                    <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
+                    <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
+                          size="1">
+                    <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
+                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
+                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
+                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
+                              name="AACK_0_I_AM_COORD"/>
+                </register>
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0x80" name="Res7"/>
+                    <bitfield caption="Enable Phase Measurement Unit" mask="0x40" name="PMU_EN"/>
+                    <bitfield caption="Start of Phase Measurement Unit" mask="0x20" name="PMU_START"/>
+                    <bitfield caption="PMU IF Inverse" mask="0x10" name="PMU_IF_INV"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
+                              name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
+                              name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
+                              name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
+                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 3" mask="0x10" name="MAF_3_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 2" mask="0x08" name="MAF_2_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 1" mask="0x04" name="MAF_1_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
+                    <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
+                    <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
+                </register>
+                <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
+                    <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
+                          size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
+                              values="RX_RPC_CTRL_BITF"/>
+                    <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
+                    <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
+                    <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
+                    <bitfield caption="Reserved" mask="0x04" name="Res0"/>
+                    <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
+                              name="XAH_RPC_EN"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="PALTD_bitf">
+                <value caption="-3us" name="PALTD_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTD_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTD_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTD_0US" value="3"/>
+                <value caption="1us" name="PALTD_1US" value="4"/>
+                <value caption="2us" name="PALTD_2US" value="5"/>
+                <value caption="3us" name="PALTD_3US" value="6"/>
+                <value caption="4us" name="PALTD_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="PALTU_bitf">
+                <value caption="-3us" name="PALTU_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTU_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTU_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTU_0US" value="3"/>
+                <value caption="1us" name="PALTU_1US" value="4"/>
+                <value caption="2us" name="PALTU_2US" value="5"/>
+                <value caption="3us" name="PALTU_3US" value="6"/>
+                <value caption="4us" name="PALTU_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.5 dBm" name="VAL_0" value="0"/>
+                <value caption="3.3 dBm" name="VAL_1" value="1"/>
+                <value caption="2.8 dBm" name="VAL_2" value="2"/>
+                <value caption="2.3 dBm" name="VAL_3" value="3"/>
+                <value caption="1.8 dBm" name="VAL_4" value="4"/>
+                <value caption="1.2 dBm" name="VAL_5" value="5"/>
+                <value caption="0.5 dBm" name="VAL_6" value="6"/>
+                <value caption="-0.5 dBm" name="VAL_7" value="7"/>
+                <value caption="-1.5 dBm" name="VAL_8" value="8"/>
+                <value caption="-2.5 dBm" name="VAL_9" value="9"/>
+                <value caption="-3.5 dBm" name="VAL_10" value="10"/>
+                <value caption="-4.5 dBm" name="VAL_11" value="11"/>
+                <value caption="-6.5 dBm" name="VAL_12" value="12"/>
+                <value caption="-8.5 dBm" name="VAL_13" value="13"/>
+                <value caption="-11.5 dBm" name="VAL_14" value="14"/>
+                <value caption="-16.5 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V / 1.70V (BATMON_HR=1/0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V / 1.75V (BATMON_HR=1/0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V / 1.80V (BATMON_HR=1/0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V / 1.85V (BATMON_HR=1/0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V / 1.90V (BATMON_HR=1/0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V / 1.95V (BATMON_HR=1/0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V / 2.00V (BATMON_HR=1/0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V / 2.05V (BATMON_HR=1/0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V / 2.10V (BATMON_HR=1/0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V / 2.15V (BATMON_HR=1/0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V / 2.20V (BATMON_HR=1/0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V / 2.25V (BATMON_HR=1/0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V / 2.30V (BATMON_HR=1/0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V / 2.35V (BATMON_HR=1/0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V / 2.40V (BATMON_HR=1/0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_RPC_CTRL_BITF">
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
+                       value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+                <value caption="RFA2 family" name="P_RFA2" value="0x93"/>
+                <value caption="RFR2 family" name="P_RFR2" value="0x94"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_2_BITF">
+                <value caption="Revision A" name="REV_A" value="12"/>
+                <value caption="Revision B" name="REV_B" value="1"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
+                          offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCTSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
+                          offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCTSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
+                          offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCTSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
+                          offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCTSTRLL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
+                    <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
+                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
+                              name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
+                              name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
+                              name="SCCS1" values="SCCS1_BITF"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
+                          offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCRSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
+                          offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCRSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
+                          offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCRSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
+                          offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCRSTRLL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SCCKDIV_BITF">
+                <value caption="Transceiver Clock divided by 256, (62.5kHz)" name="VAL_0" value="0"/>
+                <value caption="Transceiver Clock divided by 128, (125kHz)" name="VAL_1" value="1"/>
+                <value caption="Transceiver Clock divided by 64,  (250kHz)" name="VAL_2" value="2"/>
+                <value caption="Transceiver Clock divided by 32,  (500kHz)" name="VAL_3" value="3"/>
+                <value caption="Transceiver Clock divided by 16,  (1MHz)" name="VAL_4" value="4"/>
+                <value caption="Transceiver Clock divided by 8,   (2MHz)" name="VAL_5" value="5"/>
+                <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
+            </value-group>
+            <value-group caption="" name="SCCS3_BITF">
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS2_BITF">
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS1_BITF">
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x03" name="RAMPZ" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register #0" name="DRTRAM0" offset="0x135" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #1" name="DRTRAM1" offset="0x134" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #2" name="DRTRAM2" offset="0x133" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #3" name="DRTRAM3" offset="0x132" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32.xml
new file mode 100644
index 00000000..23af8442
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32.xml
@@ -0,0 +1,1196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega32L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega32-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega32-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0860">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB3"/>
+                            <signal group="T" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="OC" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="SS" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                        </signals>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset  and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RXC" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="15" name="USART_TXC" caption="USART, Tx Complete"/>
+                <interrupt index="16" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="17" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="18" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="20" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Oscillator options" mask="0x10" name="CKOPT"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
+                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                </register>
+                <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="WGM20"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Clear Timer/Counter2 on Compare Match" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Source" mask="0xE0" name="ADTS"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull-up disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Enable" mask="0x80" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x70" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1" mask="0x07"/>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+                <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write secion read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1" mask="0xFF">
+                    <bitfield caption="TWI address bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI general call recognition enable bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN44" caption="TQFPQFN44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="AREF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
new file mode 100644
index 00000000..f46daf9b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3208.xml
@@ -0,0 +1,2530 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega3208-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3208-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3208-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega3208">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x3000" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x30"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2600" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2600" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="QFP32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="SSOP28">
+            <pin pad="PA7" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="PC2" position="4"/>
+            <pin pad="PC3" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="AVDD" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PF0" position="16"/>
+            <pin pad="PF1" position="17"/>
+            <pin pad="PF6" position="18"/>
+            <pin pad="UPDI" position="19"/>
+            <pin pad="VDD0" position="20"/>
+            <pin pad="GND1" position="21"/>
+            <pin pad="PA0" position="22"/>
+            <pin pad="PA1" position="23"/>
+            <pin pad="PA2" position="24"/>
+            <pin pad="PA3" position="25"/>
+            <pin pad="PA4" position="26"/>
+            <pin pad="PA5" position="27"/>
+            <pin pad="PA6" position="28"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml
new file mode 100644
index 00000000..f966ed6b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3209.xml
@@ -0,0 +1,2620 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega3209-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega3209-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega3209">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1000" start="0x3000" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="8" pad="PE0"/>
+                            <signal function="AIN0" group="AIN" index="9" pad="PE1"/>
+                            <signal function="AIN0" group="AIN" index="10" pad="PE2"/>
+                            <signal function="AIN0" group="AIN" index="11" pad="PE3"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
+                                    pad="PC6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
+                                    pad="PB2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
+                                    pad="PC7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
+                                    pad="PE2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MISO" pad="PE1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MOSI" pad="PE0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SCK" pad="PE2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SS" pad="PE3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="0" pad="PE0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="1" pad="PE1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="1" pad="PB1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="2" pad="PE2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="2" pad="PB2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="3" pad="PE3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="3" pad="PB3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="4" pad="PC4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="4" pad="PB4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="5" pad="PC5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="5" pad="PB5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2_ALT" group="WO" index="0" pad="PB4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB3">
+                        <register-group address-space="data" name="TCB3" name-in-module="TCB" offset="0x0AB0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3_ALT" group="WO" index="0" pad="PC1"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3" group="WO" index="0" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="RXD" pad="PC5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="TXD" pad="PC4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XCK" pad="PC6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XDIR" pad="PC7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3">
+                        <register-group address-space="data" name="USART3" name-in-module="USART" offset="0x0860"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="RXD" pad="PB5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="RXD" pad="PB1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="TXD" pad="PB4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="TXD" pad="PB0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XCK" pad="PB2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XDIR" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+                <interrupt index="36" module-instance="TCB3" name="INT"/>
+                <interrupt index="37" module-instance="USART3" name="RXC"/>
+                <interrupt index="38" module-instance="USART3" name="DRE"/>
+                <interrupt index="39" module-instance="USART3" name="TXC"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x31"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2600" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2600" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+                <value caption="Connect user to event channel 6" name="CHANNEL6" value="0x7"/>
+                <value caption="Connect user to event channel 7" name="CHANNEL7" value="0x8"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+                <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PC7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output E select" name="PORTMUX_EVOUTE">
+                <value caption="EVOUT on PE2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+        <pinout name="QFP48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml
new file mode 100644
index 00000000..51fb4ebe
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324A.xml
@@ -0,0 +1,1539 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega324A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-MCH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="DRQFN_44"
+                 package="DRQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324A-CU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VFBGA49"
+                 package="VFBGA49" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega324A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT0" index="0" function="default" pad="PD2"/>
+                            <signal group="INT1" index="1" function="default" pad="PD3"/>
+                            <signal group="INT2" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0951103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x15"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF0"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL0"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X0"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE0"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE0"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD0"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR0"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL0"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA0"/>
+                    <bitfield caption="SPI Clock Rate Select 1" mask="0x02" name="SPR10"/>
+                    <bitfield caption="SPI Clock Rate Select 0" mask="0x01" name="SPR00" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USARTs" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USARTs" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="DRQFN_44">
+            <pin pad="PB5" position="A1"/>
+            <pin pad="PB6" position="B1"/>
+            <pin pad="PB7" position="A2"/>
+            <pin pad="RESET" position="B2"/>
+            <pin pad="VCC" position="A3"/>
+            <pin pad="GND" position="B3"/>
+            <pin pad="XTAL2" position="A4"/>
+            <pin pad="XTAL1" position="B4"/>
+            <pin pad="PD0" position="A5"/>
+            <pin pad="PD1" position="B5"/>
+            <pin pad="PD2" position="A6"/>
+            <pin pad="PD3" position="A7"/>
+            <pin pad="PD4" position="B6"/>
+            <pin pad="PD5" position="A8"/>
+            <pin pad="PD6" position="B7"/>
+            <pin pad="PD7" position="A9"/>
+            <pin pad="VCC" position="B8"/>
+            <pin pad="GND" position="A10"/>
+            <pin pad="PC0" position="B9"/>
+            <pin pad="PC1" position="A11"/>
+            <pin pad="PC2" position="B10"/>
+            <pin pad="PC3" position="A12"/>
+            <pin pad="PC4" position="A13"/>
+            <pin pad="PC5" position="B11"/>
+            <pin pad="PC6" position="A14"/>
+            <pin pad="PC7" position="B12"/>
+            <pin pad="AVCC" position="A15"/>
+            <pin pad="GND" position="B13"/>
+            <pin pad="AREF" position="A16"/>
+            <pin pad="PA7" position="B14"/>
+            <pin pad="PA6" position="A17"/>
+            <pin pad="PA5" position="B15"/>
+            <pin pad="PA4" position="A18"/>
+            <pin pad="PA3" position="A19"/>
+            <pin pad="PA2" position="B16"/>
+            <pin pad="PA1" position="A20"/>
+            <pin pad="PA0" position="B17"/>
+            <pin pad="VCC" position="A21"/>
+            <pin pad="GND" position="B18"/>
+            <pin pad="PB0" position="A22"/>
+            <pin pad="PB1" position="B19"/>
+            <pin pad="PB2" position="A23"/>
+            <pin pad="PB3" position="B20"/>
+            <pin pad="PB4" position="A24"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="VFBGA49" caption="VFBGA49">
+            <pin position="A1" pad="GND"/>
+            <pin position="A2" pad="PB4"/>
+            <pin position="A3" pad="PB2"/>
+            <pin position="A4" pad="GND"/>
+            <pin position="A5" pad="VCC"/>
+            <pin position="A6" pad="PA2"/>
+            <pin position="A7" pad="GND"/>
+            <pin position="B1" pad="PB6"/>
+            <pin position="B2" pad="PB5"/>
+            <pin position="B3" pad="PB3"/>
+            <pin position="B4" pad="PB0"/>
+            <pin position="B5" pad="PA0"/>
+            <pin position="B6" pad="PA3"/>
+            <pin position="B7" pad="PA5"/>
+            <pin position="C1" pad="VCC"/>
+            <pin position="C2" pad="RESET"/>
+            <pin position="C3" pad="PB7"/>
+            <pin position="C4" pad="PB1"/>
+            <pin position="C5" pad="PA1"/>
+            <pin position="C6" pad="PA6"/>
+            <pin position="C7" pad="AREF"/>
+            <pin position="D1" pad="GND"/>
+            <pin position="D2" pad="XTAL2"/>
+            <pin position="D3" pad="PD0"/>
+            <pin position="D4" pad="GND"/>
+            <pin position="D5" pad="PA4"/>
+            <pin position="D6" pad="PA7"/>
+            <pin position="D7" pad="GND"/>
+            <pin position="E1" pad="XTAL1"/>
+            <pin position="E2" pad="PD1"/>
+            <pin position="E3" pad="PD5"/>
+            <pin position="E4" pad="PD7"/>
+            <pin position="E5" pad="PC5"/>
+            <pin position="E6" pad="PC7"/>
+            <pin position="E7" pad="AVCC"/>
+            <pin position="F1" pad="PD2"/>
+            <pin position="F2" pad="PD3"/>
+            <pin position="F3" pad="PD6"/>
+            <pin position="F4" pad="PC0"/>
+            <pin position="F5" pad="PC2"/>
+            <pin position="F6" pad="PC4"/>
+            <pin position="F7" pad="PC6"/>
+            <pin position="G1" pad="GND"/>
+            <pin position="G2" pad="PD4"/>
+            <pin position="G3" pad="VCC"/>
+            <pin position="G4" pad="GND"/>
+            <pin position="G5" pad="PC1"/>
+            <pin position="G6" pad="PC3"/>
+            <pin position="G7" pad="GND"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml
new file mode 100644
index 00000000..60cfec63
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324P.xml
@@ -0,0 +1,1458 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega324PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PV-10MN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega324P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega324P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950803F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x08"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF0"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL0"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X0"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE0"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE0"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD0"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR0"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL0"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA0"/>
+                    <bitfield caption="SPI Clock Rate Select 1" mask="0x02" name="SPR10"/>
+                    <bitfield caption="SPI Clock Rate Select 0" mask="0x01" name="SPR00" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USARTs" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USARTs" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_VQFN_44" caption="TQFP_VQFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml
new file mode 100644
index 00000000..47b0de38
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324PA.xml
@@ -0,0 +1,1579 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega324PA-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="20000000" tempmax="85"
+                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-PU" package="PDIP40" pinout="PDIP_40" speedmax="20000000" tempmax="85"
+                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-MU" package="VQFN44" pinout="QFN_QFP_44" speedmax="20000000" tempmax="85"
+                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-MCH" package="DRQFN44" pinout="DRQFN_44" speedmax="20000000" tempmax="85"
+                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+        <variant ordercode="ATmega324PA-CU" package="VFBGA49" pinout="BGA_49" speedmax="20000000" tempmax="85"
+                 tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega324PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0951103F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x11"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR0"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR1"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF">
+                    <bitfield caption="USART Baud Rate bits" mask="0x0FFF" name="UBRR1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare B bits" mask="0xFF" name="OCR2B"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR2A"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
+                </register>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register A Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register B Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF">
+                    <bitfield caption="EEPROM Address Bits" mask="0x0FFF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR0"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF0"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL0"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X0"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE0"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE0"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD0"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR0"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL0"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA0"/>
+                    <bitfield caption="SPI Clock Rate Select 1" mask="0x02" name="SPR10"/>
+                    <bitfield caption="SPI Clock Rate Select 0" mask="0x01" name="SPR00" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI bit rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI data bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="DRQFN_44">
+            <pin pad="PB5" position="A1"/>
+            <pin pad="PB6" position="B1"/>
+            <pin pad="PB7" position="A2"/>
+            <pin pad="RESET" position="B2"/>
+            <pin pad="VCC" position="A3"/>
+            <pin pad="GND" position="B3"/>
+            <pin pad="XTAL2" position="A4"/>
+            <pin pad="XTAL1" position="B4"/>
+            <pin pad="PD0" position="A5"/>
+            <pin pad="PD1" position="B5"/>
+            <pin pad="PD2" position="A6"/>
+            <pin pad="PD3" position="A7"/>
+            <pin pad="PD4" position="B6"/>
+            <pin pad="PD5" position="A8"/>
+            <pin pad="PD6" position="B7"/>
+            <pin pad="PD7" position="A9"/>
+            <pin pad="VCC" position="B8"/>
+            <pin pad="GND" position="A10"/>
+            <pin pad="PC0" position="B9"/>
+            <pin pad="PC1" position="A11"/>
+            <pin pad="PC2" position="B10"/>
+            <pin pad="PC3" position="A12"/>
+            <pin pad="PC4" position="A13"/>
+            <pin pad="PC5" position="B11"/>
+            <pin pad="PC6" position="A14"/>
+            <pin pad="PC7" position="B12"/>
+            <pin pad="AVCC" position="A15"/>
+            <pin pad="GND" position="B13"/>
+            <pin pad="AREF" position="A16"/>
+            <pin pad="PA7" position="B14"/>
+            <pin pad="PA6" position="A17"/>
+            <pin pad="PA5" position="B15"/>
+            <pin pad="PA4" position="A18"/>
+            <pin pad="PA3" position="A19"/>
+            <pin pad="PA2" position="B16"/>
+            <pin pad="PA1" position="A20"/>
+            <pin pad="PA0" position="B17"/>
+            <pin pad="VCC" position="A21"/>
+            <pin pad="GND" position="B18"/>
+            <pin pad="PB0" position="A22"/>
+            <pin pad="PB1" position="B19"/>
+            <pin pad="PB2" position="A23"/>
+            <pin pad="PB3" position="B20"/>
+            <pin pad="PB4" position="A24"/>
+        </pinout>
+        <pinout name="PDIP_40">
+            <pin pad="PB0" position="1"/>
+            <pin pad="PB1" position="2"/>
+            <pin pad="PB2" position="3"/>
+            <pin pad="PB3" position="4"/>
+            <pin pad="PB4" position="5"/>
+            <pin pad="PB5" position="6"/>
+            <pin pad="PB6" position="7"/>
+            <pin pad="PB7" position="8"/>
+            <pin pad="RESET" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="XTAL2" position="12"/>
+            <pin pad="XTAL1" position="13"/>
+            <pin pad="PD0" position="14"/>
+            <pin pad="PD1" position="15"/>
+            <pin pad="PD2" position="16"/>
+            <pin pad="PD3" position="17"/>
+            <pin pad="PD4" position="18"/>
+            <pin pad="PD5" position="19"/>
+            <pin pad="PD6" position="20"/>
+            <pin pad="PD7" position="21"/>
+            <pin pad="PC0" position="22"/>
+            <pin pad="PC1" position="23"/>
+            <pin pad="PC2" position="24"/>
+            <pin pad="PC3" position="25"/>
+            <pin pad="PC4" position="26"/>
+            <pin pad="PC5" position="27"/>
+            <pin pad="PC6" position="28"/>
+            <pin pad="PC7" position="29"/>
+            <pin pad="AVCC" position="30"/>
+            <pin pad="GND" position="31"/>
+            <pin pad="AREF" position="32"/>
+            <pin pad="PA7" position="33"/>
+            <pin pad="PA6" position="34"/>
+            <pin pad="PA5" position="35"/>
+            <pin pad="PA4" position="36"/>
+            <pin pad="PA3" position="37"/>
+            <pin pad="PA2" position="38"/>
+            <pin pad="PA1" position="39"/>
+            <pin pad="PA0" position="40"/>
+        </pinout>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PB5" position="1"/>
+            <pin pad="PB6" position="2"/>
+            <pin pad="PB7" position="3"/>
+            <pin pad="RESET" position="4"/>
+            <pin pad="VCC" position="5"/>
+            <pin pad="GND" position="6"/>
+            <pin pad="XTAL2" position="7"/>
+            <pin pad="XTAL1" position="8"/>
+            <pin pad="PD0" position="9"/>
+            <pin pad="PD1" position="10"/>
+            <pin pad="PD2" position="11"/>
+            <pin pad="PD3" position="12"/>
+            <pin pad="PD4" position="13"/>
+            <pin pad="PD5" position="14"/>
+            <pin pad="PD6" position="15"/>
+            <pin pad="PD7" position="16"/>
+            <pin pad="VCC" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="PC0" position="19"/>
+            <pin pad="PC1" position="20"/>
+            <pin pad="PC2" position="21"/>
+            <pin pad="PC3" position="22"/>
+            <pin pad="PC4" position="23"/>
+            <pin pad="PC5" position="24"/>
+            <pin pad="PC6" position="25"/>
+            <pin pad="PC7" position="26"/>
+            <pin pad="AVCC" position="27"/>
+            <pin pad="GND" position="28"/>
+            <pin pad="AREF" position="29"/>
+            <pin pad="PA7" position="30"/>
+            <pin pad="PA6" position="31"/>
+            <pin pad="PA5" position="32"/>
+            <pin pad="PA4" position="33"/>
+            <pin pad="PA3" position="34"/>
+            <pin pad="PA2" position="35"/>
+            <pin pad="PA1" position="36"/>
+            <pin pad="PA0" position="37"/>
+            <pin pad="VCC" position="38"/>
+            <pin pad="GND" position="39"/>
+            <pin pad="PB0" position="40"/>
+            <pin pad="PB1" position="41"/>
+            <pin pad="PB2" position="42"/>
+            <pin pad="PB3" position="43"/>
+            <pin pad="PB4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="GND" position="A1"/>
+            <pin pad="PB4" position="A2"/>
+            <pin pad="PB2" position="A3"/>
+            <pin pad="GND" position="A4"/>
+            <pin pad="VCC" position="A5"/>
+            <pin pad="PA2" position="A6"/>
+            <pin pad="GND" position="A7"/>
+            <pin pad="PB6" position="B1"/>
+            <pin pad="PB5" position="B2"/>
+            <pin pad="PB3" position="B3"/>
+            <pin pad="PB0" position="B4"/>
+            <pin pad="PA0" position="B5"/>
+            <pin pad="PA3" position="B6"/>
+            <pin pad="PA5" position="B7"/>
+            <pin pad="VCC" position="C1"/>
+            <pin pad="RESET" position="C2"/>
+            <pin pad="PB7" position="C3"/>
+            <pin pad="PB1" position="C4"/>
+            <pin pad="PA1" position="C5"/>
+            <pin pad="PA6" position="C6"/>
+            <pin pad="AREF" position="C7"/>
+            <pin pad="GND" position="D1"/>
+            <pin pad="XTAL2" position="D2"/>
+            <pin pad="PD0" position="D3"/>
+            <pin pad="GND" position="D4"/>
+            <pin pad="PA4" position="D5"/>
+            <pin pad="PA7" position="D6"/>
+            <pin pad="GND" position="D7"/>
+            <pin pad="XTAL1" position="E1"/>
+            <pin pad="PD1" position="E2"/>
+            <pin pad="PD5" position="E3"/>
+            <pin pad="PD7" position="E4"/>
+            <pin pad="PC5" position="E5"/>
+            <pin pad="PC7" position="E6"/>
+            <pin pad="AVCC" position="E7"/>
+            <pin pad="PD2" position="F1"/>
+            <pin pad="PD3" position="F2"/>
+            <pin pad="PD6" position="F3"/>
+            <pin pad="PC0" position="F4"/>
+            <pin pad="PC2" position="F5"/>
+            <pin pad="PC4" position="F6"/>
+            <pin pad="PC6" position="F7"/>
+            <pin pad="GND" position="G1"/>
+            <pin pad="PD4" position="G2"/>
+            <pin pad="VCC" position="G3"/>
+            <pin pad="GND" position="G4"/>
+            <pin pad="PC1" position="G5"/>
+            <pin pad="PC3" position="G6"/>
+            <pin pad="GND" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml
new file mode 100644
index 00000000..f76b1f88
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA324PB.xml
@@ -0,0 +1,1762 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega324PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-AUR" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MUR" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-ANR" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega324PB-MNR" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega324PB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AC" function="default" pad="PC5"/>
+                            <signal group="AIN0" function="default" pad="PB2"/>
+                            <signal group="AIN1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2" caption="USART">
+                        <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE3"/>
+                            <signal group="RXD" function="default" pad="PE2"/>
+                            <signal group="XCK" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="PORTA" function="default" pad="PA0" index="0"/>
+                            <signal group="PORTA" function="default" pad="PA1" index="1"/>
+                            <signal group="PORTA" function="default" pad="PA2" index="2"/>
+                            <signal group="PORTA" function="default" pad="PA3" index="3"/>
+                            <signal group="PORTA" function="default" pad="PA4" index="4"/>
+                            <signal group="PORTA" function="default" pad="PA5" index="5"/>
+                            <signal group="PORTA" function="default" pad="PA6" index="6"/>
+                            <signal group="PORTA" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="PORTB" function="default" pad="PB0" index="0"/>
+                            <signal group="PORTB" function="default" pad="PB1" index="1"/>
+                            <signal group="PORTB" function="default" pad="PB2" index="2"/>
+                            <signal group="PORTB" function="default" pad="PB3" index="3"/>
+                            <signal group="PORTB" function="default" pad="PB4" index="4"/>
+                            <signal group="PORTB" function="default" pad="PB5" index="5"/>
+                            <signal group="PORTB" function="default" pad="PB6" index="6"/>
+                            <signal group="PORTB" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="PORTC" function="default" pad="PC0" index="0"/>
+                            <signal group="PORTC" function="default" pad="PC1" index="1"/>
+                            <signal group="PORTC" function="default" pad="PC2" index="2"/>
+                            <signal group="PORTC" function="default" pad="PC3" index="3"/>
+                            <signal group="PORTC" function="default" pad="PC4" index="4"/>
+                            <signal group="PORTC" function="default" pad="PC5" index="5"/>
+                            <signal group="PORTC" function="default" pad="PC6" index="6"/>
+                            <signal group="PORTC" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="PORTD" function="default" pad="PD0" index="0"/>
+                            <signal group="PORTD" function="default" pad="PD1" index="1"/>
+                            <signal group="PORTD" function="default" pad="PD2" index="2"/>
+                            <signal group="PORTD" function="default" pad="PD3" index="3"/>
+                            <signal group="PORTD" function="default" pad="PD4" index="4"/>
+                            <signal group="PORTD" function="default" pad="PD5" index="5"/>
+                            <signal group="PORTD" function="default" pad="PD6" index="6"/>
+                            <signal group="PORTD" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="PORTE" function="default" pad="PE0" index="0"/>
+                            <signal group="PORTE" function="default" pad="PE1" index="1"/>
+                            <signal group="PORTE" function="default" pad="PE2" index="2"/>
+                            <signal group="PORTE" function="default" pad="PE3" index="3"/>
+                            <signal group="PORTE" function="default" pad="PE4" index="4"/>
+                            <signal group="PORTE" function="default" pad="PE5" index="5"/>
+                            <signal group="PORTE" function="default" pad="PE6" index="6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD0"/>
+                            <signal group="ICP" function="default" pad="PB5"/>
+                            <signal group="OCA" function="default" pad="PB6"/>
+                            <signal group="OCB" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PC2"/>
+                            <signal group="ICP" function="default" pad="PC3"/>
+                            <signal group="OCA" function="default" pad="PC4"/>
+                            <signal group="OCB" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PTC">
+                    <instance name="PTC" caption="Peripheral Touch Controller">
+                        <signals>
+                            <signal group="X" index="0" function="default" pad="PD0"/>
+                            <signal group="X" index="1" function="default" pad="PD1"/>
+                            <signal group="X" index="2" function="default" pad="PD2"/>
+                            <signal group="X" index="3" function="default" pad="PD3"/>
+                            <signal group="X" index="4" function="default" pad="PD4"/>
+                            <signal group="X" index="5" function="default" pad="PD5"/>
+                            <signal group="X" index="6" function="default" pad="PD6"/>
+                            <signal group="X" index="7" function="default" pad="PD7"/>
+                            <signal group="X" index="8" function="default" pad="PE2"/>
+                            <signal group="X" index="9" function="default" pad="PE3"/>
+                            <signal group="X" index="10" function="default" pad="PC0"/>
+                            <signal group="X" index="11" function="default" pad="PC1"/>
+                            <signal group="X" index="12" function="default" pad="PC2"/>
+                            <signal group="X" index="13" function="default" pad="PC3"/>
+                            <signal group="X" index="14" function="default" pad="PC4"/>
+                            <signal group="X" index="15" function="default" pad="PC5"/>
+                            <signal group="Y" index="0" function="default" pad="PA0"/>
+                            <signal group="Y" index="1" function="default" pad="PA1"/>
+                            <signal group="Y" index="2" function="default" pad="PA2"/>
+                            <signal group="Y" index="3" function="default" pad="PA3"/>
+                            <signal group="Y" index="4" function="default" pad="PA4"/>
+                            <signal group="Y" index="5" function="default" pad="PA5"/>
+                            <signal group="Y" index="6" function="default" pad="PA6"/>
+                            <signal group="Y" index="7" function="default" pad="PA7"/>
+                            <signal group="Y" index="8" function="default" pad="PD0"/>
+                            <signal group="Y" index="9" function="default" pad="PD1"/>
+                            <signal group="Y" index="10" function="default" pad="PD2"/>
+                            <signal group="Y" index="11" function="default" pad="PD3"/>
+                            <signal group="Y" index="12" function="default" pad="PD4"/>
+                            <signal group="Y" index="13" function="default" pad="PD5"/>
+                            <signal group="Y" index="14" function="default" pad="PD6"/>
+                            <signal group="Y" index="15" function="default" pad="PD7"/>
+                            <signal group="Y" index="16" function="default" pad="PE2"/>
+                            <signal group="Y" index="17" function="default" pad="PE3"/>
+                            <signal group="Y" index="18" function="default" pad="PC0"/>
+                            <signal group="Y" index="19" function="default" pad="PC1"/>
+                            <signal group="Y" index="20" function="default" pad="PC2"/>
+                            <signal group="Y" index="21" function="default" pad="PC3"/>
+                            <signal group="Y" index="22" function="default" pad="PC4"/>
+                            <signal group="Y" index="23" function="default" pad="PC5"/>
+                            <signal group="Y" index="24" function="default" pad="PB0"/>
+                            <signal group="Y" index="25" function="default" pad="PB1"/>
+                            <signal group="Y" index="26" function="default" pad="PB2"/>
+                            <signal group="Y" index="27" function="default" pad="PB3"/>
+                            <signal group="Y" index="28" function="default" pad="PB4"/>
+                            <signal group="Y" index="29" function="default" pad="PB5"/>
+                            <signal group="Y" index="30" function="default" pad="PB6"/>
+                            <signal group="Y" index="31" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="32" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="33" function="default" pad="PE1"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC0" function="default" pad="PA0"/>
+                            <signal group="ADC1" function="default" pad="PA1"/>
+                            <signal group="ADC2" function="default" pad="PA2"/>
+                            <signal group="ADC3" function="default" pad="PA3"/>
+                            <signal group="ADC4" function="default" pad="PA4"/>
+                            <signal group="ADC5" function="default" pad="PA5"/>
+                            <signal group="ADC6" function="default" pad="PA6"/>
+                            <signal group="ADC7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI0" caption="Serial Peripheral Interface">
+                        <register-group name="SPI0" name-in-module="SPI0" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPI1" caption="Serial Peripheral Interface">
+                        <register-group name="SPI1" name-in-module="SPI1" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PD6"/>
+                            <signal group="SCK" function="default" pad="PD7"/>
+                            <signal group="MISO" function="default" pad="PE2"/>
+                            <signal group="MOSI" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI0" caption="Two Wire Serial Interface">
+                        <register-group name="TWI0" name-in-module="TWI0" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA0" function="default" pad="PC1"/>
+                            <signal group="SCL0" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWI1" caption="Two Wire Serial Interface">
+                        <register-group name="TWI1" name-in-module="TWI1" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA1" function="default" pad="PE5"/>
+                            <signal group="SCL1" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CFD">
+                    <instance name="CFD" caption="Clock Failure Detection">
+                        <register-group name="CFD" name-in-module="CFD" offset="0x00" address-space="data"
+                                        caption="Clock Failure Detection"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI0_STC" caption="SPI0 Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0 Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0 Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI0" caption="2-wire Serial Interface 0"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="35" name="USART0_RXS" caption="USART0 RX start edge detect"/>
+                <interrupt index="35" name="USART0_START" caption="USART0 RX start edge detect"/>
+                <interrupt index="36" name="USART1_RXS" caption="USART1 RX start edge detect"/>
+                <interrupt index="36" name="USART1_START" caption="USART1 RX start edge detect"/>
+                <interrupt index="37" name="PCINT4" caption="Pin Change Interrupt Request 4"/>
+                <interrupt index="38" name="XOSCFD" caption="Crystal failure detect"/>
+                <interrupt index="39" name="PTC_EOC" caption="PTC end of conversion"/>
+                <interrupt index="40" name="PTC_WCOMP" caption="PTC window comparator interrupt"/>
+                <interrupt index="41" name="SPI1_STC" caption="SPI1 Serial Transfer Complete"/>
+                <interrupt index="42" name="TWI1" caption="2-wire Serial Interface 1"/>
+                <interrupt index="43" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="44" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="45" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="46" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="47" name="USART2_RX" caption="USART2 Rx Complete"/>
+                <interrupt index="48" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="49" name="USART2_TX" caption="USART2 Tx Complete"/>
+                <interrupt index="50" name="USART2_RXS" caption="USART2 RX start edge detect"/>
+                <interrupt index="50" name="USART2_START" caption="USART2 RX start edge detect"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0951703F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x17"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0x07">
+                    <bitfield caption="Clock Failure Detection" mask="0x08" name="CFD" values="ENUM_CFD"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_CFD">
+                <value caption="Disabled" name="CFD_DISABLED" value="0x00"/>
+                <value caption="Enabled" name="CFD_ENABLED" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x4F" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Output enable" mask="0x01" name="ACOE"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR0D" offset="0xC3" size="1">
+                    <bitfield caption="RX Start Frame Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="Start Frame Detect Flag" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="RX Start Frame Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="Start Frame Detect Flag" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART2">
+                <register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR2A" offset="0xD0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR2B" offset="0xD1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR2C" offset="0xD2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR2D" offset="0xD3" size="1">
+                    <bitfield caption="RX Start Frame Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="Start Frame Detect Flag" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x7F"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x7F"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode 2A bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode 2B bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 4" name="PCMSK4" offset="0x75" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="32"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x1F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x1F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Enable GPIO function of PE4" mask="0x80" name="GPIOEN"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                </register>
+                <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode 4A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM4" lsb="2"/>
+                    <bitfield caption="Clock Select4 bits" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                </register>
+                <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Programming Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI0">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Select" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="SPI1">
+                <register caption="SPI Data Register" name="SPDR1" offset="0xAE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR1" offset="0xAD" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR1" offset="0xAC" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Select" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI0">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR0" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM0"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR0" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR0" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR0" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS0" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESCALE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR0" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR0" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <register-group caption="Two Wire Serial Interface" name="TWI1">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR1" offset="0xDD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM1"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR1" offset="0xD8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR1" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR1" offset="0xD9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS0" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESCALE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR1" offset="0xDB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR1" offset="0xDA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESCALE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Clock Failure Detection" name="CFD">
+            <register-group caption="Clock Failure Detection" name="CFD">
+                <register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XFDIF"/>
+                    <bitfield caption="Failure Detection Interrupt Enable" mask="0x01" name="XFDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Peripheral Touch Controller" name="PTC"/>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI0" mask="0x80" name="PRTWI0"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface 0" mask="0x04" name="PRSPI0"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x02" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x01" name="PRTIM3"/>
+                </register>
+                <register caption="Power Reduction Register2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction Peripheral Touch Controller" mask="0x08" name="PRPTC"/>
+                    <bitfield caption="Power Reduction USART2" mask="0x04" name="PRUSART2"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface 1" mask="0x02" name="PRSPI1"/>
+                    <bitfield caption="Power Reduction TWI1" mask="0x01" name="PRTWI1"/>
+                </register>
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP44" caption="TQFP44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="PE0"/>
+            <pin position="8" pad="PE1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="PE2"/>
+            <pin position="18" pad="PE3"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="PE4"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="PE5"/>
+            <pin position="39" pad="PE6"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="VQFN44" caption="VQFN44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="PE0"/>
+            <pin position="8" pad="PE1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="PE2"/>
+            <pin position="18" pad="PE3"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="PE4"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="PE5"/>
+            <pin position="39" pad="PE6"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325.xml
new file mode 100644
index 00000000..fa601aaf
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325.xml
@@ -0,0 +1,1013 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega325" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml
new file mode 100644
index 00000000..71b28e92
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250.xml
@@ -0,0 +1,1040 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3250" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950603F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F">
+                    <bitfield caption="Pin Change Mask bits" mask="0x7F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml
new file mode 100644
index 00000000..9943bc1f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250A.xml
@@ -0,0 +1,1040 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3250A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950E03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F">
+                    <bitfield caption="Pin Change Mask bits" mask="0x7F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml
new file mode 100644
index 00000000..f2689c10
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250P.xml
@@ -0,0 +1,1042 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3250P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950E03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0e"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F">
+                    <bitfield caption="Pin Change Mask bits" mask="0x7F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml
new file mode 100644
index 00000000..2c864f99
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3250PA.xml
@@ -0,0 +1,1036 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3250PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950E03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0e"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml
new file mode 100644
index 00000000..b59dd5b9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325A.xml
@@ -0,0 +1,1015 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega325A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950D03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml
new file mode 100644
index 00000000..0fc16231
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325P.xml
@@ -0,0 +1,1017 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega325P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950D03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0d"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask bits" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml
new file mode 100644
index 00000000..e1a1d3e0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA325PA.xml
@@ -0,0 +1,1013 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega325PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950D03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0d"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328.xml
new file mode 100644
index 00000000..a6261bd7
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328.xml
@@ -0,0 +1,1349 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega328-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega328" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x950F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x14"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="USART I/O Data bits" mask="0xFF" name="UDR0"/>
+                </register>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF">
+                    <bitfield caption="USART Baud rate bits" mask="0x0FFF" name="UBRR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data bits" mask="0xFF" name="TWDR"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare A bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare B bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter2 bits" mask="0xFF" name="TCNT2"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare B bits" mask="0xFF" name="OCR2B"/>
+                </register>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter2 Output Compare A bits" mask="0xFF" name="OCR2A"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
+                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
+                </register>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/2 or fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/8 or fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/32 or fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/64 or fosc/128" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address Bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data Bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose I/O bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose I/O bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose I/O bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml
new file mode 100644
index 00000000..7bf26f87
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328P.xml
@@ -0,0 +1,1315 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega328P-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328P-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega328P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment name="REGISTERS" start="0x0000" size="0x0020" type="regs" external="false"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x950F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0f"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/2 or fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/8 or fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/32 or fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/64 or fosc/128" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml
new file mode 100644
index 00000000..befde730
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA328PB.xml
@@ -0,0 +1,1554 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega328PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega328PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega328PB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PB3"/>
+                            <signal group="RXD" function="default" pad="PB4"/>
+                            <signal group="XCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI0">
+                        <register-group name="TWI0" name-in-module="TWI0" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWI1">
+                        <register-group name="TWI1" name-in-module="TWI1" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PE0"/>
+                            <signal group="SCL" function="default" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE3"/>
+                            <signal group="ICP" function="default" pad="PE2"/>
+                            <signal group="OCA" function="default" pad="PD0"/>
+                            <signal group="OCB" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC4">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE1"/>
+                            <signal group="ICP" function="default" pad="PE0"/>
+                            <signal group="OCA" function="default" pad="PD1"/>
+                            <signal group="OCB" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                            <signal group="ADC" index="6" function="default" pad="PE2"/>
+                            <signal group="ADC" index="7" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="AC" function="default" pad="PE0"/>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="24" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="27" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI0">
+                        <register-group name="SPI0" name-in-module="SPI0" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPI1">
+                        <register-group name="SPI1" name-in-module="SPI1" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PE2"/>
+                            <signal group="SCK" function="default" pad="PC1"/>
+                            <signal group="MISO" function="default" pad="PC0"/>
+                            <signal group="MOSI" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"/>
+                    </instance>
+                </module>
+                <module name="PTC">
+                    <instance name="PTC">
+                        <signals>
+                            <signal group="X" index="00" function="default" pad="PD0"/>
+                            <signal group="X" index="01" function="default" pad="PD1"/>
+                            <signal group="X" index="02" function="default" pad="PD2"/>
+                            <signal group="X" index="03" function="default" pad="PD3"/>
+                            <signal group="X" index="04" function="default" pad="PD4"/>
+                            <signal group="X" index="05" function="default" pad="PD5"/>
+                            <signal group="X" index="06" function="default" pad="PD6"/>
+                            <signal group="X" index="07" function="default" pad="PD7"/>
+                            <signal group="X" index="08" function="default" pad="PE0"/>
+                            <signal group="X" index="09" function="default" pad="PE1"/>
+                            <signal group="X" index="10" function="default" pad="PB0"/>
+                            <signal group="X" index="11" function="default" pad="PB1"/>
+                            <signal group="X" index="12" function="default" pad="PB2"/>
+                            <signal group="X" index="13" function="default" pad="PB3"/>
+                            <signal group="X" index="14" function="default" pad="PB4"/>
+                            <signal group="X" index="15" function="default" pad="PB5"/>
+
+                            <signal group="Y" index="00" function="default" pad="PC0"/>
+                            <signal group="Y" index="01" function="default" pad="PC1"/>
+                            <signal group="Y" index="02" function="default" pad="PC2"/>
+                            <signal group="Y" index="03" function="default" pad="PC3"/>
+                            <signal group="Y" index="04" function="default" pad="PC4"/>
+                            <signal group="Y" index="05" function="default" pad="PC5"/>
+                            <signal group="Y" index="06" function="default" pad="PE2"/>
+                            <signal group="Y" index="07" function="default" pad="PE3"/>
+                            <signal group="Y" index="08" function="default" pad="PD0"/>
+                            <signal group="Y" index="09" function="default" pad="PD1"/>
+                            <signal group="Y" index="10" function="default" pad="PD2"/>
+                            <signal group="Y" index="11" function="default" pad="PD3"/>
+                            <signal group="Y" index="12" function="default" pad="PD4"/>
+                            <signal group="Y" index="13" function="default" pad="PD5"/>
+                            <signal group="Y" index="14" function="default" pad="PD6"/>
+                            <signal group="Y" index="15" function="default" pad="PD7"/>
+                            <signal group="Y" index="16" function="default" pad="PE0"/>
+                            <signal group="Y" index="17" function="default" pad="PE1"/>
+                            <signal group="Y" index="18" function="default" pad="PB0"/>
+                            <signal group="Y" index="19" function="default" pad="PB1"/>
+                            <signal group="Y" index="20" function="default" pad="PB2"/>
+                            <signal group="Y" index="21" function="default" pad="PB3"/>
+                            <signal group="Y" index="22" function="default" pad="PB4"/>
+                            <signal group="Y" index="23" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"/>
+                    </instance>
+                </module>
+                <module name="CFD">
+                    <instance name="CFD">
+                        <register-group name="CFD" name-in-module="CFD" offset="0x00" address-space="data"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI0_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART0_RX" caption="USART0 Rx Complete"/>
+                <interrupt index="19" name="USART0_UDRE" caption="USART0, Data Register Empty"/>
+                <interrupt index="20" name="USART0_TX" caption="USART0 Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI0" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+                <interrupt index="26" name="USART0_START" caption="USART0 Start frame detection"/>
+                <interrupt index="27" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 Rx Complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 Tx Complete"/>
+                <interrupt index="31" name="USART1_START" caption="USART1 Start frame detection"/>
+                <interrupt index="32" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="33" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="34" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="CFD" caption="Clock failure detection interrupt"/>
+                <interrupt index="37" name="PTC_EOC" caption="PTC End of conversion"/>
+                <interrupt index="38" name="PTC_WCOMP" caption="PTC Window comparator mode"/>
+                <interrupt index="39" name="SPI1_STC" caption="SPI1 Serial Transfer Complete"/>
+                <interrupt index="40" name="TWI1" caption="TWI Transfer Complete"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9516"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x16"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF7">
+                    <bitfield caption="Clock Failure Detection" mask="0x08" name="CFD" values="ENUM_CFD"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_CFD">
+                <value caption="Disabled" name="CFD_DISABLED" value="0x00"/>
+                <value caption="Enabled" name="CFD_ENABLED" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register 0" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR0D" offset="0xC3" size="1">
+                    <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="USART RX Start" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start frame detection enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR1C" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ12 in UCSR1B" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE1"/>
+                    <bitfield caption="USART RX Start" mask="0x40" name="RXS1"/>
+                    <bitfield caption="Start frame detection enable" mask="0x20" name="SFDE1"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI0">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR0" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR0" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR0" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR0" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR0" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR0" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <register-group caption="Two Wire Serial Interface" name="TWI1">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR1" offset="0xDD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM1"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR1" offset="0xD8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR1" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT1"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA1"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA1"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO1"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC1"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN1"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE1"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR1" offset="0xD9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS1" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS1" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR1" offset="0xDB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR1" offset="0xDA" size="1">
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="" name="TC16">
+            <register-group caption="" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="" name="TC3">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode bit 3" mask="0x10" name="WGM33"/>
+                    <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM32"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                </register>
+                <register caption="Timer/Counter3 Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="" name="TC4">
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode bit 3" mask="0x10" name="WGM43"/>
+                    <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM42"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS4" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                </register>
+                <register caption="Timer/Counter4 Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC Digital Input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC Digital Input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="ADC Voltage Reference Selection" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="Input Channel Selection" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="" name="AC">
+            <register-group caption="" name="AC">
+                <register caption="Analog Comparator Control And Status Register-A" name="ACSRA" offset="0x50" size="1"
+                          ocd-rw="R">
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register-B" name="ACSRB" offset="0x4F" size="1">
+                    <bitfield caption="Analog Comparator Output Enable" mask="0x01" name="ACOE"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="" name="PORT">
+            <register-group caption="" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x0F"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x0F"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="" name="TC8">
+            <register-group caption="" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWM" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="" name="EXINT">
+            <register-group caption="" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="" name="SPI">
+            <register-group caption="" name="SPI0">
+                <register caption="SPI Data Register" name="SPDR0" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR0" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR0" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <register-group caption="" name="SPI1">
+                <register caption="SPI Data Register" name="SPDR1" offset="0xAE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR1" offset="0xAD" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF1"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL1"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X1"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR1" offset="0xAC" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE1"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE1"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD1"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR1"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL1"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA1"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR1" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/2 or fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/8 or fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/32 or fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/64 or fosc/128" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="" name="WDT">
+            <register-group caption="" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="" name="CFD">
+            <register-group caption="" name="CFD">
+                <register caption="XOSC Failure Detection Control and Status Register" name="XFDCSR" offset="0x62"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XFDIF"/>
+                    <bitfield caption="Failure Detection Interrupt Enable" mask="0x01" name="XFDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="" name="PTC"/>
+        <module caption="" name="CPU">
+            <register-group caption="" name="CPU">
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI0" mask="0x80" name="PRTWI0"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface 1" mask="0x04" name="PRSPI0"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI1" mask="0x20" name="PRTWI1"/>
+                    <bitfield caption="Power Reduction Peripheral Touch Controller" mask="0x10" name="PRPTC"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x08" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface 1" mask="0x04" name="PRSPI1"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x01" name="PRTIM3"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration" mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer" name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="" name="EEPROM">
+            <register-group caption="" name="EEPROM">
+                <register caption="EEPROM Address Register Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="VQFN32" caption="VQFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329.xml
new file mode 100644
index 00000000..2e1b1450
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329.xml
@@ -0,0 +1,1413 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega329V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega329" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR08" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR07" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR06" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR05" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR03" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR02" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF">
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"/>
+                    <bitfield caption="LCD Contrast Control" mask="0x0F" name="LCDCC"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
new file mode 100644
index 00000000..3729ae27
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290.xml
@@ -0,0 +1,1130 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3290" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950403F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x04"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR09" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR08" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR07" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR06" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR05" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR04" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR03" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR02" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF">
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"/>
+                    <bitfield caption="LCD Contrast Control" mask="0x0F" name="LCDCC"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F">
+                    <bitfield caption="Pin Change Mask" mask="0x7F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml
new file mode 100644
index 00000000..962ed08c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290A.xml
@@ -0,0 +1,1130 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3290A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950C03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x04"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR09" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR08" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR07" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR06" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR05" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR04" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR03" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR02" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF">
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"/>
+                    <bitfield caption="LCD Contrast Control" mask="0x0F" name="LCDCC"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F">
+                    <bitfield caption="Pin Change Mask" mask="0x7F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml
new file mode 100644
index 00000000..4bbdaa2d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290P.xml
@@ -0,0 +1,1165 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3290P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950C03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0c"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR09" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR08" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR07" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR06" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR05" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR04" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR03" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR02" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configurations" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Control" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F">
+                    <bitfield caption="Pin Change Mask" mask="0x7F" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml
new file mode 100644
index 00000000..44046d6e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA3290PA.xml
@@ -0,0 +1,1157 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega3290PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950C03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0c"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR9" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR4" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configurations" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml
new file mode 100644
index 00000000..bfdf73b3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329A.xml
@@ -0,0 +1,1590 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega329A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64" package="QFN64"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329A-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega329A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950B03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG324"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG325"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG326"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG327"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG328"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG329"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG330"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG331"/>
+                </register>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG316"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG317"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG318"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG319"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG320"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG321"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG322"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG323"/>
+                </register>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG308"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG309"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG310"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG311"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG312"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG313"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG314"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG315"/>
+                </register>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG300"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG301"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG302"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG303"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG304"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG305"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG306"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG307"/>
+                </register>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG224"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG225"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG226"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG227"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG228"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG229"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG230"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG231"/>
+                </register>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG216"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG217"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG218"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG219"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG220"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG221"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG222"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG223"/>
+                </register>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG208"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG209"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG210"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG211"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG212"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG213"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG214"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG215"/>
+                </register>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG200"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG201"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG202"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG203"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG204"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG205"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG206"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG207"/>
+                </register>
+                <register caption="LCD Data Register 8" name="LCDDR08" offset="0xF4" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG124"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG125"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG126"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG127"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG128"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG129"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG130"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG131"/>
+                </register>
+                <register caption="LCD Data Register 7" name="LCDDR07" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG116"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG117"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG118"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG119"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG120"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG121"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG122"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG123"/>
+                </register>
+                <register caption="LCD Data Register 6" name="LCDDR06" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG108"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG109"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG110"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG111"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG112"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG113"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG114"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG115"/>
+                </register>
+                <register caption="LCD Data Register 5" name="LCDDR05" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG100"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG101"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG102"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG103"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG104"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG105"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG106"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG107"/>
+                </register>
+                <register caption="LCD Data Register 3" name="LCDDR03" offset="0xEF" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG024"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG025"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG026"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG027"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG028"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG029"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG030"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG031"/>
+                </register>
+                <register caption="LCD Data Register 2" name="LCDDR02" offset="0xEE" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG016"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG017"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG018"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG019"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG020"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG021"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG022"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG023"/>
+                </register>
+                <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG008"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG009"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG010"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG011"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG012"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG013"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG014"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG015"/>
+                </register>
+                <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG000"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG001"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG002"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG003"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG004"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG005"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG006"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG007"/>
+                </register>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml
new file mode 100644
index 00000000..70a5eaaa
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329P.xml
@@ -0,0 +1,1609 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega329PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega329P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950B03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0b"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x4000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask Register pin 8" mask="0x01" name="PCINT8"/>
+                    <bitfield caption="Pin Change Mask Register pin 9" mask="0x02" name="PCINT9"/>
+                    <bitfield caption="Pin Change Mask Register pin 10" mask="0x04" name="PCINT10"/>
+                    <bitfield caption="Pin Change Mask Register pin 11" mask="0x08" name="PCINT11"/>
+                    <bitfield caption="Pin Change Mask Register pin 12" mask="0x10" name="PCINT12"/>
+                    <bitfield caption="Pin Change Mask Register pin 13" mask="0x20" name="PCINT13"/>
+                    <bitfield caption="Pin Change Mask Register pin 14" mask="0x40" name="PCINT14"/>
+                    <bitfield caption="Pin Change Mask Register pin 15" mask="0x80" name="PCINT15"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask Register pin 0" mask="0x01" name="PCINT0"/>
+                    <bitfield caption="Pin Change Mask Register pin 1" mask="0x02" name="PCINT1"/>
+                    <bitfield caption="Pin Change Mask Register pin 2" mask="0x04" name="PCINT2"/>
+                    <bitfield caption="Pin Change Mask Register pin 3" mask="0x08" name="PCINT3"/>
+                    <bitfield caption="Pin Change Mask Register pin 4" mask="0x10" name="PCINT4"/>
+                    <bitfield caption="Pin Change Mask Register pin 5" mask="0x20" name="PCINT5"/>
+                    <bitfield caption="Pin Change Mask Register pin 6" mask="0x40" name="PCINT6"/>
+                    <bitfield caption="Pin Change Mask Register pin 7" mask="0x80" name="PCINT7"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG324"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG325"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG326"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG327"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG328"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG329"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG330"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG331"/>
+                </register>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG316"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG317"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG318"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG319"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG320"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG321"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG322"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG323"/>
+                </register>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG308"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG309"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG310"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG311"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG312"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG313"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG314"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG315"/>
+                </register>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG300"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG301"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG302"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG303"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG304"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG305"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG306"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG307"/>
+                </register>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG224"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG225"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG226"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG227"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG228"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG229"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG230"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG231"/>
+                </register>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG216"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG217"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG218"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG219"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG220"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG221"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG222"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG223"/>
+                </register>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG208"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG209"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG210"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG211"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG212"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG213"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG214"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG215"/>
+                </register>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG200"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG201"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG202"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG203"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG204"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG205"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG206"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG207"/>
+                </register>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG124"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG125"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG126"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG127"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG128"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG129"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG130"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG131"/>
+                </register>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG116"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG117"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG118"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG119"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG120"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG121"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG122"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG123"/>
+                </register>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG108"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG109"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG110"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG111"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG112"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG113"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG114"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG115"/>
+                </register>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG100"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG101"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG102"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG103"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG104"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG105"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG106"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG107"/>
+                </register>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG024"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG025"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG026"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG027"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG028"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG029"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG030"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG031"/>
+                </register>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG016"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG017"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG018"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG019"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG020"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG021"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG022"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG023"/>
+                </register>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG008"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG009"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG010"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG011"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG012"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG013"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG014"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG015"/>
+                </register>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG000"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG001"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG002"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG003"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG004"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG005"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG006"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG007"/>
+                </register>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0xE0" name="LCDDC" values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml
new file mode 100644
index 00000000..ee3a0907
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA329PA.xml
@@ -0,0 +1,1592 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega329PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega329PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN64"
+                 package="QFN64" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega329PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950B03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x0b"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM memory through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG324"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG325"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG326"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG327"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG328"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG329"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG330"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG331"/>
+                </register>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG316"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG317"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG318"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG319"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG320"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG321"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG322"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG323"/>
+                </register>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG308"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG309"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG310"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG311"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG312"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG313"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG314"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG315"/>
+                </register>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG300"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG301"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG302"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG303"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG304"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG305"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG306"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG307"/>
+                </register>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG224"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG225"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG226"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG227"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG228"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG229"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG230"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG231"/>
+                </register>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG216"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG217"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG218"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG219"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG220"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG221"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG222"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG223"/>
+                </register>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG208"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG209"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG210"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG211"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG212"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG213"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG214"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG215"/>
+                </register>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG200"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG201"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG202"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG203"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG204"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG205"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG206"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG207"/>
+                </register>
+                <register caption="LCD Data Register 8" name="LCDDR08" offset="0xF4" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG124"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG125"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG126"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG127"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG128"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG129"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG130"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG131"/>
+                </register>
+                <register caption="LCD Data Register 7" name="LCDDR07" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG116"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG117"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG118"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG119"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG120"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG121"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG122"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG123"/>
+                </register>
+                <register caption="LCD Data Register 6" name="LCDDR06" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG108"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG109"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG110"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG111"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG112"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG113"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG114"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG115"/>
+                </register>
+                <register caption="LCD Data Register 5" name="LCDDR05" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG100"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG101"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG102"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG103"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG104"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG105"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG106"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG107"/>
+                </register>
+                <register caption="LCD Data Register 3" name="LCDDR03" offset="0xEF" size="1" mask="0x01">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG024"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG025"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG026"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG027"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG028"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG029"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG030"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG031"/>
+                </register>
+                <register caption="LCD Data Register 2" name="LCDDR02" offset="0xEE" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG016"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG017"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG018"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG019"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG020"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG021"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG022"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG023"/>
+                </register>
+                <register caption="LCD Data Register 1" name="LCDDR01" offset="0xED" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG008"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG009"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG010"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG011"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG012"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG013"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG014"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG015"/>
+                </register>
+                <register caption="LCD Data Register 0" name="LCDDR00" offset="0xEC" size="1" mask="0xFF">
+                    <bitfield caption="LCD memory bit segment" mask="0x01" name="SEG000"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x02" name="SEG001"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x04" name="SEG002"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x08" name="SEG003"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x10" name="SEG004"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x20" name="SEG005"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x40" name="SEG006"/>
+                    <bitfield caption="LCD memory bit segment" mask="0x80" name="SEG007"/>
+                </register>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1">
+                    <bitfield caption="LCD Display Configuration" mask="0xE0" name="LCDDC"
+                              values="LCD_DISP_CONF_DRIVE"/>
+                    <bitfield caption="LCD Maximum Drive Time" mask="0x10" name="LCDMDT"/>
+                    <bitfield caption="LCD Contrast Controls" mask="0x0F" name="LCDCC" values="LCD_CONTRAST"/>
+                </register>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Buffer Disable" mask="0x04" name="LCDBD"/>
+                    <bitfield caption="LCD Contrast Control Disable" mask="0x02" name="LCDCCD"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_DISP_CONF_DRIVE">
+                <value caption="300us" name="VAL_0x00" value="0x00"/>
+                <value caption="70us" name="VAL_0x01" value="0x01"/>
+                <value caption="150us" name="VAL_0x02" value="0x02"/>
+                <value caption="450us" name="VAL_0x03" value="0x03"/>
+                <value caption="575us" name="VAL_0x04" value="0x04"/>
+                <value caption="850us" name="VAL_0x05" value="0x05"/>
+                <value caption="1150us" name="VAL_0x06" value="0x06"/>
+                <value caption="50% of LCD clock" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_CONTRAST">
+                <value caption="2.60V" name="VAL_0x00" value="0x00"/>
+                <value caption="2.65V" name="VAL_0x01" value="0x01"/>
+                <value caption="2.70V" name="VAL_0x02" value="0x02"/>
+                <value caption="2.75V" name="VAL_0x03" value="0x03"/>
+                <value caption="2.80V" name="VAL_0x04" value="0x04"/>
+                <value caption="2.85V" name="VAL_0x05" value="0x05"/>
+                <value caption="2.90V" name="VAL_0x06" value="0x06"/>
+                <value caption="2.95V" name="VAL_0x07" value="0x07"/>
+                <value caption="3.00V" name="VAL_0x08" value="0x08"/>
+                <value caption="3.05V" name="VAL_0x09" value="0x09"/>
+                <value caption="3.10V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="3.15V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="3.20V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="3.25V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="3.30V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="3.35V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Mask" mask="0xFF" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml
new file mode 100644
index 00000000..f05b4f84
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32A.xml
@@ -0,0 +1,1165 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega32A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega32A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0860">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OC" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                            <signal group="SS" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset  and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RXC" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="15" name="USART_TXC" caption="USART, Tx Complete"/>
+                <interrupt index="16" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="17" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="18" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="20" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Oscillator options" mask="0x10" name="CKOPT"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
+                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                </register>
+                <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="WGM20"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Clear Timer/Counter2 on Compare Match" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Source" mask="0xE0" name="ADTS"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull-up disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x0FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Enable" mask="0x80" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x70" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1" mask="0x07"/>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+                <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write secion read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN44" caption="TQFPQFN44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL1"/>
+            <pin position="8" pad="XTAL2"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="AREF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL1"/>
+            <pin position="13" pad="XTAL2"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml
new file mode 100644
index 00000000..dbeda0e3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32C1.xml
@@ -0,0 +1,1421 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega32C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32C1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal function="AC" group="ACMP" index="0" pad="PD7"/>
+                            <signal function="AC" group="ACMP" index="1" pad="PC6"/>
+                            <signal function="AC" group="ACMP" index="2" pad="PD5"/>
+                            <signal function="AC" group="ACMP" index="3" pad="PC5"/>
+                            <signal function="AC" group="ACMPN" index="0" pad="PB2"/>
+                            <signal function="AC" group="ACMPN" index="1" pad="PB5"/>
+                            <signal function="AC" group="ACMPN" index="2" pad="PD6"/>
+                            <signal function="AC" group="ACMPN" index="3" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                        <signals>
+                            <signal function="DAC" group="D2A" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal function="TC0" group="T0" pad="PC2"/>
+                            <signal function="TC0" group="OC0A" pad="PD3"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal function="TC1" group="T1" pad="PC3"/>
+                            <signal function="TC1" group="ICP1A" pad="PD4"/>
+                            <signal function="TC1" group="ICP1B" pad="PC3"/>
+                            <signal function="TC1" group="OC1A" pad="PD2"/>
+                            <signal function="TC1" group="OC1B" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PE2"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB7"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PC4"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PC5"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LINUART">
+                    <instance name="LINUART" caption="Local Interconnect Network">
+                        <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
+                                        caption="Local Interconnect Network"/>
+                        <signals>
+                            <signal function="LIN" group="TXLIN" pad="PD3"/>
+                            <signal function="LIN" group="RXLIN" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal function="SPI" group="MISO" pad="PB0"/>
+                            <signal function="SPI_ALT" group="MISO" pad="PD2"/>
+                            <signal function="SPI" group="MOSI" pad="PB1"/>
+                            <signal function="SPI_ALT" group="MOSI" pad="PD3"/>
+                            <signal function="SPI" group="SCK" pad="PB7"/>
+                            <signal function="SPI_ALT" group="SCK" pad="PD4"/>
+                            <signal function="SPI" group="SS" pad="PD3"/>
+                            <signal function="SPI_ALT" group="SS" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal function="EXINT" group="INT" index="0" pad="PD6"/>
+                            <signal function="EXINT" group="INT" index="1" pad="PB2"/>
+                            <signal function="EXINT" group="INT" index="2" pad="PB5"/>
+                            <signal function="EXINT" group="INT" index="3" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="0" pad="PB0"/>
+                            <signal function="EXINT" group="PCINT" index="1" pad="PB1"/>
+                            <signal function="EXINT" group="PCINT" index="2" pad="PB2"/>
+                            <signal function="EXINT" group="PCINT" index="3" pad="PB3"/>
+                            <signal function="EXINT" group="PCINT" index="4" pad="PB4"/>
+                            <signal function="EXINT" group="PCINT" index="5" pad="PB5"/>
+                            <signal function="EXINT" group="PCINT" index="6" pad="PB6"/>
+                            <signal function="EXINT" group="PCINT" index="7" pad="PB7"/>
+                            <signal function="EXINT" group="PCINT" index="8" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="9" pad="PC1"/>
+                            <signal function="EXINT" group="PCINT" index="10" pad="PC2"/>
+                            <signal function="EXINT" group="PCINT" index="11" pad="PC3"/>
+                            <signal function="EXINT" group="PCINT" index="12" pad="PC4"/>
+                            <signal function="EXINT" group="PCINT" index="13" pad="PC5"/>
+                            <signal function="EXINT" group="PCINT" index="14" pad="PC6"/>
+                            <signal function="EXINT" group="PCINT" index="15" pad="PC7"/>
+                            <signal function="EXINT" group="PCINT" index="16" pad="PD0"/>
+                            <signal function="EXINT" group="PCINT" index="17" pad="PD1"/>
+                            <signal function="EXINT" group="PCINT" index="18" pad="PD2"/>
+                            <signal function="EXINT" group="PCINT" index="19" pad="PD3"/>
+                            <signal function="EXINT" group="PCINT" index="20" pad="PD4"/>
+                            <signal function="EXINT" group="PCINT" index="21" pad="PD5"/>
+                            <signal function="EXINT" group="PCINT" index="22" pad="PD6"/>
+                            <signal function="EXINT" group="PCINT" index="23" pad="PD7"/>
+                            <signal function="EXINT" group="PCINT" index="24" pad="PE0"/>
+                            <signal function="EXINT" group="PCINT" index="25" pad="PE1"/>
+                            <signal function="EXINT" group="PCINT" index="26" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
+                <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
+                <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
+                <interrupt index="4" name="ANACOMP3" caption="Analog Comparator 3"/>
+                <interrupt index="5" name="PSC_FAULT" caption="PSC Fault"/>
+                <interrupt index="6" name="PSC_EC" caption="PSC End of Cycle"/>
+                <interrupt index="7" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="8" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="9" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="10" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer1/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="16" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CAN_INT" caption="CAN MOB, Burst, General Errors"/>
+                <interrupt index="19" name="CAN_TOVF" caption="CAN Timer Overflow"/>
+                <interrupt index="20" name="LIN_TC" caption="LIN Transfer Complete"/>
+                <interrupt index="21" name="LIN_ERR" caption="LIN Error"/>
+                <interrupt index="22" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="23" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="24" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="25" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="26" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="27" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="28" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+                <interrupt index="29" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="30" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9586"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x86"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
+                    <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
+                    <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVFG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register Flags" name="CANGIT" offset="0xDA" size="1">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer Flag" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt Flag" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General Flag" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General Flag" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General Flag" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General Flag" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off Interrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
+                          ocd-rw=""/>
+                <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
+                    <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="CAN Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width bits" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment bits" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="CAN Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segment 2 bits" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1 bits" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="Timer Control bits" mask="0xFF" name="TPRSC"/>
+                </register>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw="">
+                    <bitfield caption="CAN Timer bits" mask="0xFFFF" name="CANTIM"/>
+                </register>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw="">
+                    <bitfield caption="TTC Timer Count" mask="0xFFFF" name="TIMTTC"/>
+                </register>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="">
+                    <bitfield caption="Transmit Error Counter bits" mask="0xFF" name="TEC"/>
+                </register>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="">
+                    <bitfield caption="Receive Error Counter bits" mask="0xFF" name="REC"/>
+                </register>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment (Active Low)" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning on MOb" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK on MOb" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK on MOb" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error on MOb" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error on MOb" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error on MOb" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error on MOb" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error on MOb" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Transmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1" mask="0xFD">
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF">
+                    <bitfield caption="TIMSTM" mask="0xFFFF" name="TIMSTM"/>
+                </register>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF">
+                    <bitfield caption="Message Data bits" mask="0xFF" name="MSG"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bits" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
+                    <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0x91" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register High Byte Bits" mask="0xFF00" name="DACH"/>
+                    <bitfield caption="DAC Data Register Low Byte Bits" mask="0x00FF" name="DACL"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction CAN" mask="0x40" name="PRCAN"/>
+                    <bitfield caption="Power Reduction PSC" mask="0x20" name="PRPSC"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction LIN UART" mask="0x02" name="PRLIN"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF">
+                    <bitfield caption="Timer/Counter0 bits" mask="0xFF" name="TCNT0"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Timer/Counter0 Output Compare bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1A"/>
+                </register>
+                <register caption="Timer/Counter1 Output Compare Register Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Output Compare bits" mask="0xFFFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter1 Input Capture Register Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF">
+                    <bitfield caption="Timer/Counter1 Input Capture bits" mask="0xFFFF" name="ICR1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF">
+                    <bitfield caption="ADC Data bits" mask="0x03FF" name="ADC"/>
+                </register>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
+                    <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AMP2P Pin Digital input Disable" mask="0x40" name="AMP2PD"/>
+                    <bitfield caption="ACMP0 Pin Digital input Disable" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="AMP0P Pin Digital input Disable" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="AMP0N Pin Digital input Disable" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="ADC10 Pin Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Pin Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Pin Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x75" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="Amplifier 0 - Comparator 0 Connection" mask="0x08" name="AMPCMP0"/>
+                    <bitfield caption="" mask="0x07" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="Amplifier 1 - Comparator 1 Connection" mask="0x08" name="AMPCMP1"/>
+                    <bitfield caption="" mask="0x07" name="AMP1TS"/>
+                </register>
+                <register caption="" name="AMP2CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP2EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP2IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP2G"/>
+                    <bitfield caption="Amplifier 2 - Comparator 2 Connection" mask="0x08" name="AMPCMP2"/>
+                    <bitfield caption="" mask="0x07" name="AMP2TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC reference" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ANALOG_ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="ADC0" value="0x0"/>
+                <value caption="ADC input pin 1" name="ADC1" value="0x1"/>
+                <value caption="ADC input pin 2" name="ADC2" value="0x2"/>
+                <value caption="ADC input pin 3" name="ADC3" value="0x3"/>
+                <value caption="ADC input pin 4" name="ADC4" value="0x4"/>
+                <value caption="ADC input pin 5" name="ADC5" value="0x5"/>
+                <value caption="ADC input pin 6" name="ADC6" value="0x6"/>
+                <value caption="ADC input pin 7" name="ADC7" value="0x7"/>
+                <value caption="ADC input pin 8" name="ADC8" value="0x8"/>
+                <value caption="ADC input pin 9" name="ADC9" value="0x9"/>
+                <value caption="ADC input pin 10" name="ADC10" value="0xA"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0xB"/>
+                <value caption="Internal VCC / 4" name="VCC4" value="0xC"/>
+                <value caption="Current source" name="ISRC" value="0xD"/>
+                <value caption="Analog Differential Amplifier 0" name="AMP0" value="0xE"/>
+                <value caption="Analog Differential Amplifier 1" name="AMP1" value="0xF"/>
+                <value caption="Analog Differential Amplifier 2" name="AMP2" value="0x10"/>
+                <value caption="Bandgap" name="BNDGAP" value="0x11"/>
+                <value caption="0V (GND)" name="GND" value="0x12"/>
+            </value-group>
+        </module>
+        <module caption="Local Interconnect Network" name="LINUART">
+            <register-group caption="Local Interconnect Network" name="LINUART">
+                <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+                    <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+                    <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+                    <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+                    <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+                    <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+                </register>
+                <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+                    <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+                    <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+                    <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+                    <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+                    <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+                    <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+                </register>
+                <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+                    <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+                    <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+                    <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+                    <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+                </register>
+                <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+                    <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+                    <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+                    <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+                    <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+                    <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+                    <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+                    <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+                    <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+                </register>
+                <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+                    <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+                    <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+                </register>
+                <register caption="LIN Baud Rate Register" name="LINBRR" offset="0xCD" size="2">
+                    <bitfield caption="" mask="0x0FFF" name="LDIV"/>
+                </register>
+                <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+                    <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+                    <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+                </register>
+                <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+                    <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+                    <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+                </register>
+                <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+                    <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+                    <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+                </register>
+                <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1">
+                    <bitfield caption="" mask="0xFF" name="LDATA"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6D" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x07" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6C" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6A" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming mode" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD2"/>
+            <pin position="2" pad="PD3"/>
+            <pin position="3" pad="PC1"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PC2"/>
+            <pin position="7" pad="PC3"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PE1"/>
+            <pin position="11" pad="PE2"/>
+            <pin position="12" pad="PD4"/>
+            <pin position="13" pad="PD5"/>
+            <pin position="14" pad="PD6"/>
+            <pin position="15" pad="PD7"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PC4"/>
+            <pin position="18" pad="PC5"/>
+            <pin position="19" pad="AVCC"/>
+            <pin position="20" pad="AGND"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="PC6"/>
+            <pin position="23" pad="PB3"/>
+            <pin position="24" pad="PB4"/>
+            <pin position="25" pad="PC7"/>
+            <pin position="26" pad="PB5"/>
+            <pin position="27" pad="PB6"/>
+            <pin position="28" pad="PB7"/>
+            <pin position="29" pad="PD0"/>
+            <pin position="30" pad="PC0"/>
+            <pin position="31" pad="PE0"/>
+            <pin position="32" pad="PD1"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32HVB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32HVB.xml
new file mode 100644
index 00000000..b440811d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32HVB.xml
@@ -0,0 +1,982 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32HVB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="CHARGER_DETECT">
+                    <instance name="CHARGER_DETECT" caption="Charger Detect">
+                        <register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
+                                        address-space="data" caption="Charger Detect"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
+                <interrupt index="11" name="CHDET" caption="Charger Detect"/>
+                <interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM" caption="SPM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9510"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x10"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="50"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
+                    <bitfield caption="Clock Divide mode" mask="0x10" name="CKDIV8"/>
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_OSCSEL">
+                <value caption="Default" name="DEFAULT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF">
+                    <bitfield caption="VADC Data bits" mask="0x0FFF" name="VADC"/>
+                </register>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="SPI Data bits" mask="0xFF" name="SPDR"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF">
+                    <bitfield caption="EEPROM Address bits" mask="0x03FF" name="EEAR"/>
+                </register>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF">
+                    <bitfield caption="EEPROM Data bits" mask="0xFF" name="EEDR"/>
+                </register>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
+                    <bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF">
+                    <bitfield caption="CC-ADC Instantaneous Current" mask="0xFFFF" name="CADIC"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="24"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC" lsb="16"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFC" name="CADAC" lsb="10"/>
+                    <bitfield caption="ADC accumulate current bits" mask="0x03" name="CADAC0" lsb="8"/>
+                </register>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF">
+                    <bitfield caption="ADC accumulate current bits" mask="0xFF" name="CADAC0"/>
+                </register>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Charge Current" mask="0xFF" name="CADRCC"/>
+                </register>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF">
+                    <bitfield caption="CC-ADC Regular Discharge Current" mask="0xFF" name="CADRDC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF">
+                    <bitfield caption="TWI Bit Rate bits" mask="0xFF" name="TWBR"/>
+                </register>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF">
+                    <bitfield caption="TWI Data Bits" mask="0xFF" name="TWD"/>
+                </register>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="4"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F">
+                    <bitfield caption="Pin Change Enable Mask" mask="0x0F" name="PCINT"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1 Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 1 bits" mask="0xFFFF" name="TCNT1"/>
+                </register>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 A bits" mask="0xFF" name="OCR1A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 1 B bits" mask="0xFF" name="OCR1B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0 Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF">
+                    <bitfield caption="Timer Counter 0 bits" mask="0xFFFF" name="TCNT0"/>
+                </register>
+                <register caption="Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 A bits" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF">
+                    <bitfield caption="Output Compare 0 B bits" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x3F" name="HCPT"/>
+                </register>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F">
+                    <bitfield caption="Battery Protection Over-current Timing bits" mask="0x3F" name="OCPT"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F">
+                    <bitfield caption="Battery Protection Short-current Timing bits" mask="0x7F" name="SCPT"/>
+                </register>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-High-current Detection Level bits" mask="0xFF"
+                              name="CHCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-High-current Detection Level bits" mask="0xFF"
+                              name="DHCDL"/>
+                </register>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Charge-Over-current Detection Level bits" mask="0xFF"
+                              name="COCDL"/>
+                </register>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Discharge-Over-current Detection Level bits" mask="0xFF"
+                              name="DOCDL"/>
+                </register>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF">
+                    <bitfield caption="Battery Protection Short-Circuit Detection Level Register bits" mask="0xFF"
+                              name="SCDL"/>
+                </register>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Charger Detect" name="CHARGER_DETECT">
+            <register-group caption="Charger Detect" name="CHARGER_DETECT">
+                <register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
+                    <bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
+                    <bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
+                    <bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
+                    <bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
+                    <bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
+                </register>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap Calibration of Resistor Ladder Bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Fast Oscillator Calibration Value" mask="0xFF" name="FCAL"/>
+                </register>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR2"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR1"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF">
+                    <bitfield caption="General Purpose IO bits" mask="0xFF" name="GPIOR0"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
+                          ocd-rw="R"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32HVBREVB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32HVBREVB.xml
new file mode 100644
index 00000000..db123d65
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32HVBREVB.xml
@@ -0,0 +1,909 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32HVBrevB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="CHARGER_DETECT">
+                    <instance name="CHARGER_DETECT" caption="Charger Detect">
+                        <register-group name="CHARGER_DETECT" name-in-module="CHARGER_DETECT" offset="0x00"
+                                        address-space="data" caption="Charger Detect"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="7" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="8" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="9" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="10" name="BGSCD" caption="Bandgap Buffer Short Circuit Detected"/>
+                <interrupt index="11" name="CHDET" caption="Charger Detect"/>
+                <interrupt index="12" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="16" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="17" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="18" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="19" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="20" name="TWIBUSCD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="21" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="23" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="24" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="25" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="26" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM" caption="SPM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9510"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x10"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="50"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDD">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Select start-up time" mask="0x1C" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x03" name="OSCSEL" values="ENUM_OSCSEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xE9">
+                    <bitfield caption="DUVR mode on" mask="0x10" name="DUVRDINIT"/>
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 4 ms" name="14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 8 ms" name="14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 14 CK + 128 ms" name="14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 14 CK + 256 ms" name="14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 14 CK + 512 ms" name="14CK_512MS" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_OSCSEL">
+                <value caption="Default" name="DEFAULT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register  Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE6" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE7" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register C" name="CADCSRC" offset="0xE8" size="1">
+                    <bitfield caption="CC-ADC Voltage Scaling Enable" mask="0x01" name="CADVSE"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE4" size="2" mask="0xFFFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF"/>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE9" size="1" mask="0xFF"/>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xEA" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x0F"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0  Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="External Protection Input Disable" mask="0x20" name="EPID"/>
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F"/>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F"/>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F"/>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF"/>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Charger Detect" name="CHARGER_DETECT">
+            <register-group caption="Charger Detect" name="CHARGER_DETECT">
+                <register caption="Charger Detect Control and Status Register" name="CHGDCSR" offset="0xD4" size="1">
+                    <bitfield caption="BATT Pin Voltage Level" mask="0x10" name="BATTPVL"/>
+                    <bitfield caption="Charger Detect Interrupt Sense Control" mask="0x0C" name="CHGDISC"/>
+                    <bitfield caption="Charger Detect Interrupt Flag" mask="0x02" name="CHGDIF"/>
+                    <bitfield caption="Charger Detect Interrupt Enable" mask="0x01" name="CHGDIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Disable" mask="0x10" name="ROCD"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register" name="BGCSR" offset="0xD2" size="1">
+                    <bitfield caption="Bandgap Disable" mask="0x20" name="BGD"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Enabled" mask="0x10" name="BGSCDE"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Flag" mask="0x02" name="BGSCDIF"/>
+                    <bitfield caption="Bandgap Short Circuit Detection Interrupt Enable" mask="0x01" name="BGSCDIE"/>
+                </register>
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF"/>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
+                          mask="0xFF"/>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x0F" ocd-rw="R"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x0F"
+                          ocd-rw="R"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x3F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml
new file mode 100644
index 00000000..54f924d3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32M1.xml
@@ -0,0 +1,1484 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega32M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32M1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal function="AC" group="ACMP" index="0" pad="PD7"/>
+                            <signal function="AC" group="ACMP" index="1" pad="PC6"/>
+                            <signal function="AC" group="ACMP" index="2" pad="PD5"/>
+                            <signal function="AC" group="ACMP" index="3" pad="PC5"/>
+                            <signal function="AC" group="ACMPN" index="0" pad="PB2"/>
+                            <signal function="AC" group="ACMPN" index="1" pad="PB5"/>
+                            <signal function="AC" group="ACMPN" index="2" pad="PD6"/>
+                            <signal function="AC" group="ACMPN" index="3" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                        <signals>
+                            <signal function="DAC" group="D2A" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal function="TC0" group="T0" pad="PC2"/>
+                            <signal function="TC0" group="OC0A" pad="PD3"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal function="TC1" group="T1" pad="PC3"/>
+                            <signal function="TC1" group="ICP1A" pad="PD4"/>
+                            <signal function="TC1" group="ICP1B" pad="PC3"/>
+                            <signal function="TC1" group="OC1A" pad="PD2"/>
+                            <signal function="TC1" group="OC1B" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PE2"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB7"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PC4"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PC5"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LINUART">
+                    <instance name="LINUART" caption="Local Interconnect Network">
+                        <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
+                                        caption="Local Interconnect Network"/>
+                        <signals>
+                            <signal function="LIN" group="TXLIN" pad="PD3"/>
+                            <signal function="LIN" group="RXLIN" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal function="SPI" group="MISO" pad="PB0"/>
+                            <signal function="SPI_ALT" group="MISO" pad="PD2"/>
+                            <signal function="SPI" group="MOSI" pad="PB1"/>
+                            <signal function="SPI_ALT" group="MOSI" pad="PD3"/>
+                            <signal function="SPI" group="SCK" pad="PB7"/>
+                            <signal function="SPI_ALT" group="SCK" pad="PD4"/>
+                            <signal function="SPI" group="SS" pad="PD3"/>
+                            <signal function="SPI_ALT" group="SS" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal function="EXINT" group="INT" index="0" pad="PD6"/>
+                            <signal function="EXINT" group="INT" index="1" pad="PB2"/>
+                            <signal function="EXINT" group="INT" index="2" pad="PB5"/>
+                            <signal function="EXINT" group="INT" index="3" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="0" pad="PB0"/>
+                            <signal function="EXINT" group="PCINT" index="1" pad="PB1"/>
+                            <signal function="EXINT" group="PCINT" index="2" pad="PB2"/>
+                            <signal function="EXINT" group="PCINT" index="3" pad="PB3"/>
+                            <signal function="EXINT" group="PCINT" index="4" pad="PB4"/>
+                            <signal function="EXINT" group="PCINT" index="5" pad="PB5"/>
+                            <signal function="EXINT" group="PCINT" index="6" pad="PB6"/>
+                            <signal function="EXINT" group="PCINT" index="7" pad="PB7"/>
+                            <signal function="EXINT" group="PCINT" index="8" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="9" pad="PC1"/>
+                            <signal function="EXINT" group="PCINT" index="10" pad="PC2"/>
+                            <signal function="EXINT" group="PCINT" index="11" pad="PC3"/>
+                            <signal function="EXINT" group="PCINT" index="12" pad="PC4"/>
+                            <signal function="EXINT" group="PCINT" index="13" pad="PC5"/>
+                            <signal function="EXINT" group="PCINT" index="14" pad="PC6"/>
+                            <signal function="EXINT" group="PCINT" index="15" pad="PC7"/>
+                            <signal function="EXINT" group="PCINT" index="16" pad="PD0"/>
+                            <signal function="EXINT" group="PCINT" index="17" pad="PD1"/>
+                            <signal function="EXINT" group="PCINT" index="18" pad="PD2"/>
+                            <signal function="EXINT" group="PCINT" index="19" pad="PD3"/>
+                            <signal function="EXINT" group="PCINT" index="20" pad="PD4"/>
+                            <signal function="EXINT" group="PCINT" index="21" pad="PD5"/>
+                            <signal function="EXINT" group="PCINT" index="22" pad="PD6"/>
+                            <signal function="EXINT" group="PCINT" index="23" pad="PD7"/>
+                            <signal function="EXINT" group="PCINT" index="24" pad="PE0"/>
+                            <signal function="EXINT" group="PCINT" index="25" pad="PE1"/>
+                            <signal function="EXINT" group="PCINT" index="26" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC" caption="Power Stage Controller">
+                        <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                        <signals>
+                            <signal function="PSC" group="PSCIN2" pad="PD2"/>
+                            <signal function="PSC" group="PSCOUT2A" pad="PB0"/>
+                            <signal function="PSC" group="PSCOUT2B" pad="PB1"/>
+                            <signal function="PSC" group="PSCIN1" pad="PC1"/>
+                            <signal function="PSC" group="PSCOUT1A" pad="PC0"/>
+                            <signal function="PSC" group="PSCOUT1B" pad="PB6"/>
+                            <signal function="PSC" group="PSCIN0" pad="PD1"/>
+                            <signal function="PSC" group="PSCOUT0A" pad="PD0"/>
+                            <signal function="PSC" group="PSCOUT0B" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
+                <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
+                <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
+                <interrupt index="4" name="ANACOMP3" caption="Analog Comparator 3"/>
+                <interrupt index="5" name="PSC_FAULT" caption="PSC Fault"/>
+                <interrupt index="6" name="PSC_EC" caption="PSC End of Cycle"/>
+                <interrupt index="7" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="8" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="9" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="10" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer1/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="16" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CAN_INT" caption="CAN MOB, Burst, General Errors"/>
+                <interrupt index="19" name="CAN_TOVF" caption="CAN Timer Overflow"/>
+                <interrupt index="20" name="LIN_TC" caption="LIN Transfer Complete"/>
+                <interrupt index="21" name="LIN_ERR" caption="LIN Error"/>
+                <interrupt index="22" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="23" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="24" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="25" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="26" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="27" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="28" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+                <interrupt index="29" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="30" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9584"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x84"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
+                    <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
+                    <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVFG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register Flags" name="CANGIT" offset="0xDA" size="1">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer Flag" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt Flag" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General Flag" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General Flag" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General Flag" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General Flag" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off Interrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
+                          ocd-rw=""/>
+                <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
+                    <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="CAN Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width bits" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment bits" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="CAN Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segment 2 bits" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1 bits" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw=""/>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw=""/>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment (Active Low)" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning on MOb" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK on MOb" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK on MOb" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error on MOb" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error on MOb" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error on MOb" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error on MOb" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error on MOb" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Transmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1" mask="0xFD">
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF"/>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bits" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
+                    <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0x91" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction CAN" mask="0x40" name="PRCAN"/>
+                    <bitfield caption="Power Reduction PSC" mask="0x20" name="PRPSC"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction LIN UART" mask="0x02" name="PRLIN"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Timer/Counter Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Timer/Counter Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="ADC channel selection bits" mask="0x1F" name="MUX" values="ANALOG_ADC_MUXPOS"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
+                    <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AMP2P Pin Digital input Disable" mask="0x40" name="AMP2PD"/>
+                    <bitfield caption="ACMP0 Pin Digital input Disable" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="AMP0P Pin Digital input Disable" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="AMP0N Pin Digital input Disable" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="ADC10 Pin Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Pin Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Pin Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Amplifier 0 Control and Status Register" name="AMP0CSR" offset="0x75" size="1">
+                    <bitfield caption="Amplifier 0 Enable" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="Amplifier 0 Input Shunt" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="Amplifier 0 Gain Selection" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="Amplifier 0 - Comparator 0 connection" mask="0x08" name="AMPCMP0"/>
+                    <bitfield caption="Amplifier 0 Clock Source Selection" mask="0x07" name="AMP0TS"/>
+                </register>
+                <register caption="Amplifier 1 Control and Status Register" name="AMP1CSR" offset="0x76" size="1">
+                    <bitfield caption="Amplifier 1 Enable" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="Amplifier 1 Input Shunt" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="Amplifier 1 Gain Selection" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="Amplifier 1 - Comparator 1 Connection" mask="0x08" name="AMPCMP1"/>
+                    <bitfield caption="Amplifier 1 Clock Source Selection" mask="0x07" name="AMP1TS"/>
+                </register>
+                <register caption="Amplifier 2 Control and Status Register" name="AMP2CSR" offset="0x77" size="1">
+                    <bitfield caption="Amplifier 2 Enable" mask="0x80" name="AMP2EN"/>
+                    <bitfield caption="Amplifier 2 Input Shunt" mask="0x40" name="AMP2IS"/>
+                    <bitfield caption="Amplifier 2 Gain Selection" mask="0x30" name="AMP2G"/>
+                    <bitfield caption="Amplifier 2 - Comparator 2 Connection" mask="0x08" name="AMPCMP2"/>
+                    <bitfield caption="Amplifier 2 Clock Source Selection" mask="0x07" name="AMP2TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC reference" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ANALOG_ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="ADC0" value="0x0"/>
+                <value caption="ADC input pin 1" name="ADC1" value="0x1"/>
+                <value caption="ADC input pin 2" name="ADC2" value="0x2"/>
+                <value caption="ADC input pin 3" name="ADC3" value="0x3"/>
+                <value caption="ADC input pin 4" name="ADC4" value="0x4"/>
+                <value caption="ADC input pin 5" name="ADC5" value="0x5"/>
+                <value caption="ADC input pin 6" name="ADC6" value="0x6"/>
+                <value caption="ADC input pin 7" name="ADC7" value="0x7"/>
+                <value caption="ADC input pin 8" name="ADC8" value="0x8"/>
+                <value caption="ADC input pin 9" name="ADC9" value="0x9"/>
+                <value caption="ADC input pin 10" name="ADC10" value="0xA"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0xB"/>
+                <value caption="Internal VCC / 4" name="VCC4" value="0xC"/>
+                <value caption="Current source" name="ISRC" value="0xD"/>
+                <value caption="Analog Differential Amplifier 0" name="AMP0" value="0xE"/>
+                <value caption="Analog Differential Amplifier 1" name="AMP1" value="0xF"/>
+                <value caption="Analog Differential Amplifier 2" name="AMP2" value="0x10"/>
+                <value caption="Bandgap" name="BNDGAP" value="0x11"/>
+                <value caption="0V (GND)" name="GND" value="0x12"/>
+            </value-group>
+        </module>
+        <module caption="Local Interconnect Network" name="LINUART">
+            <register-group caption="Local Interconnect Network" name="LINUART">
+                <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+                    <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+                    <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+                    <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+                    <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+                    <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+                </register>
+                <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+                    <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+                    <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+                    <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+                    <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+                    <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+                    <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+                </register>
+                <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+                    <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+                    <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+                    <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+                    <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+                </register>
+                <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+                    <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+                    <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+                    <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+                    <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+                    <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+                    <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+                    <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+                    <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+                </register>
+                <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+                    <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+                    <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+                </register>
+                <register caption="LIN Baud Rate Register" name="LINBRR" offset="0xCD" size="2">
+                    <bitfield caption="" mask="0x0FFF" name="LDIV"/>
+                </register>
+                <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+                    <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+                    <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+                </register>
+                <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+                    <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+                    <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+                </register>
+                <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+                    <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+                    <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+                </register>
+                <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1">
+                    <bitfield caption="LIN Data In / Data out" mask="0xFF" name="LDATA"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6D" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x07" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6C" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6A" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming mode" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC">
+                <register caption="PSC Interrupt Flag Register" name="PIFR" offset="0xBC" size="1" ocd-rw="">
+                    <bitfield caption="PSC External Event 2 Interrupt" mask="0x0E" name="PEV"/>
+                    <bitfield caption="PSC End of Cycle Interrupt" mask="0x01" name="PEOP"/>
+                </register>
+                <register caption="PSC Interrupt Mask Register" name="PIM" offset="0xBB" size="1" ocd-rw="">
+                    <bitfield caption="External Event 2 Interrupt Enable" mask="0x0E" name="PEVE"/>
+                    <bitfield caption="PSC End of Cycle Interrupt Enable" mask="0x01" name="PEOPE"/>
+                </register>
+                <register caption="PSC Module 2 Input Control Register" name="PMIC2" offset="0xBA" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 2 Overlap Enable" mask="0x80" name="POVEN2"/>
+                    <bitfield caption="PSC Module 2 Input Select" mask="0x40" name="PISEL2"/>
+                    <bitfield caption="PSC Module 2 Input Level Selector" mask="0x20" name="PELEV2"/>
+                    <bitfield caption="PSC Module 2 Input Filter Enable" mask="0x10" name="PFLTE2"/>
+                    <bitfield caption="PSC Module 2 Asynchronous Output Control" mask="0x08" name="PAOC2"/>
+                    <bitfield caption="PSC Module 2 Input Mode bits" mask="0x07" name="PRFM2"/>
+                </register>
+                <register caption="PSC Module 1 Input Control Register" name="PMIC1" offset="0xB9" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 1 Overlap Enable" mask="0x80" name="POVEN1"/>
+                    <bitfield caption="PSC Module 1 Input Select" mask="0x40" name="PISEL1"/>
+                    <bitfield caption="PSC Module 1 Input Level Selector" mask="0x20" name="PELEV1"/>
+                    <bitfield caption="PSC Module 1 Input Filter Enable" mask="0x10" name="PFLTE1"/>
+                    <bitfield caption="PSC Module 1 Asynchronous Output Control" mask="0x08" name="PAOC1"/>
+                    <bitfield caption="PSC Module 1 Input Mode bits" mask="0x07" name="PRFM1"/>
+                </register>
+                <register caption="PSC Module 0 Input Control Register" name="PMIC0" offset="0xB8" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 0 Overlap Enable" mask="0x80" name="POVEN0"/>
+                    <bitfield caption="PSC Module 0 Input Select" mask="0x40" name="PISEL0"/>
+                    <bitfield caption="PSC Module 0 Input Level Selector" mask="0x20" name="PELEV0"/>
+                    <bitfield caption="PSC Module 0 Input Filter Enable" mask="0x10" name="PFLTE0"/>
+                    <bitfield caption="PSC Module 0 Asynchronous Output Control" mask="0x08" name="PAOC0"/>
+                    <bitfield caption="PSC Module 0 Input Mode bits" mask="0x07" name="PRFM0"/>
+                </register>
+                <register caption="PSC Control Register" name="PCTL" offset="0xB7" size="1" ocd-rw="">
+                    <bitfield caption="PSC Prescaler Select bits" mask="0xC0" name="PPRE"/>
+                    <bitfield caption="PSC Input Clock Select" mask="0x20" name="PCLKSEL"/>
+                    <bitfield caption="PSC Complete Cycle" mask="0x02" name="PCCYC"/>
+                    <bitfield caption="PSC Run" mask="0x01" name="PRUN"/>
+                </register>
+                <register caption="PSC Output Configuration" name="POC" offset="0xB6" size="1" ocd-rw="">
+                    <bitfield caption="PSC Output 2B Enable" mask="0x20" name="POEN2B"/>
+                    <bitfield caption="PSC Output 2A Enable" mask="0x10" name="POEN2A"/>
+                    <bitfield caption="PSC Output 1B Enable" mask="0x08" name="POEN1B"/>
+                    <bitfield caption="PSC Output 1A Enable" mask="0x04" name="POEN1A"/>
+                    <bitfield caption="PSC Output 0B Enable" mask="0x02" name="POEN0B"/>
+                    <bitfield caption="PSC Output 0A Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC Configuration Register" name="PCNF" offset="0xB5" size="1" ocd-rw="">
+                    <bitfield caption="PSC Update Lock" mask="0x20" name="PULOCK"/>
+                    <bitfield caption="PSC Mode" mask="0x10" name="PMODE"/>
+                    <bitfield caption="PSC Output B Polarity" mask="0x08" name="POPB"/>
+                    <bitfield caption="PSC Output A Polarity" mask="0x04" name="POPA"/>
+                </register>
+                <register caption="PSC Synchro Configuration" name="PSYNC" offset="0xB4" size="1" ocd-rw="">
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x0C" name="PSYNC1"/>
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x03" name="PSYNC0"/>
+                </register>
+                <register caption="PSC Output Compare RB Register " name="POCR_RB" offset="0xB2" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SB Register " name="POCR2SB" offset="0xB0" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare RA Register " name="POCR2RA" offset="0xAE" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SA Register " name="POCR2SA" offset="0xAC" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare SB Register " name="POCR1SB" offset="0xAA" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare RA Register " name="POCR1RA" offset="0xA8" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Output Compare SA Register " name="POCR1SA" offset="0xA6" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Output Compare SB Register " name="POCR0SB" offset="0xA4" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare RA Register " name="POCR0RA" offset="0xA2" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare SA Register " name="POCR0SA" offset="0xA0" size="2"
+                          mask="0x0FFF"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD2"/>
+            <pin position="2" pad="PD3"/>
+            <pin position="3" pad="PC1"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PC2"/>
+            <pin position="7" pad="PC3"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PE1"/>
+            <pin position="11" pad="PE2"/>
+            <pin position="12" pad="PD4"/>
+            <pin position="13" pad="PD5"/>
+            <pin position="14" pad="PD6"/>
+            <pin position="15" pad="PD7"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PC4"/>
+            <pin position="18" pad="PC5"/>
+            <pin position="19" pad="AVCC"/>
+            <pin position="20" pad="AGND"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="PC6"/>
+            <pin position="23" pad="PB3"/>
+            <pin position="24" pad="PB4"/>
+            <pin position="25" pad="PC7"/>
+            <pin position="26" pad="PB5"/>
+            <pin position="27" pad="PB6"/>
+            <pin position="28" pad="PB7"/>
+            <pin position="29" pad="PD0"/>
+            <pin position="30" pad="PC0"/>
+            <pin position="31" pad="PE0"/>
+            <pin position="32" pad="PD1"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
new file mode 100644
index 00000000..0fe931cc
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega32U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="TQFP32" pinout="QUAD"/>
+        <variant ordercode="ATmega32U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="QFN32" pinout="QUAD"/>
+    </variants>
+    <devices>
+        <device name="ATmega32U2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" pad="PB3" function="default"/>
+                            <signal group="MOSI" pad="PB2" function="default"/>
+                            <signal group="SCLK" pad="PB1" function="default"/>
+                            <signal group="SS" pad="PB0" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OCA" pad="PB7" function="default"/>
+                            <signal group="OCB" pad="PD0" function="default"/>
+                            <signal group="T" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" pad="PC7" function="default"/>
+                            <signal group="OCA" pad="PC6" function="default"/>
+                            <signal group="OCB" pad="PC5" function="default"/>
+                            <signal group="OCC" pad="PB7" function="default"/>
+                            <signal group="T" pad="PB4" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" pad="PD0" function="default"/>
+                            <signal group="INT" index="1" pad="PD1" function="default"/>
+                            <signal group="INT" index="2" pad="PD2" function="default"/>
+                            <signal group="INT" index="3" pad="PD3" function="default"/>
+                            <signal group="INT" index="4" pad="PC7" function="default"/>
+                            <signal group="INT" index="5" pad="PD4" function="default"/>
+                            <signal group="INT" index="6" pad="PD6" function="default"/>
+                            <signal group="INT" index="7" pad="PD7" function="default"/>
+                            <signal group="PCINT" index="0" pad="PB0" function="default"/>
+                            <signal group="PCINT" index="1" pad="PB1" function="default"/>
+                            <signal group="PCINT" index="2" pad="PB2" function="default"/>
+                            <signal group="PCINT" index="3" pad="PB3" function="default"/>
+                            <signal group="PCINT" index="4" pad="PB4" function="default"/>
+                            <signal group="PCINT" index="5" pad="PB5" function="default"/>
+                            <signal group="PCINT" index="6" pad="PB6" function="default"/>
+                            <signal group="PCINT" index="7" pad="PB7" function="default"/>
+                            <signal group="PCINT" index="8" pad="PC6" function="default"/>
+                            <signal group="PCINT" index="9" pad="PC5" function="default"/>
+                            <signal group="PCINT" index="10" pad="PC4" function="default"/>
+                            <signal group="PCINT" index="11" pad="PC2" function="default"/>
+                            <signal group="PCINT" index="12" pad="PD5" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" pad="PD2" function="default"/>
+                            <signal group="TXD" pad="PD3" function="default"/>
+                            <signal group="XCK" pad="PD5" function="default"/>
+                            <signal group="RTS" pad="PD6" function="default"/>
+                            <signal group="CTS" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" pad="PD1" function="default"/>
+                            <signal group="AIN" index="1" pad="PD2" function="default"/>
+                            <signal group="AIN" index="2" pad="PC2" function="default"/>
+                            <signal group="AIN" index="3" pad="PD4" function="default"/>
+                            <signal group="AIN" index="4" pad="PD5" function="default"/>
+                            <signal group="AIN" index="5" pad="PD6" function="default"/>
+                            <signal group="AIN" index="6" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="12" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="13" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="14" name="TIMER1_CAPT" caption="Timer/Counter2 Capture Event"/>
+                <interrupt index="15" name="TIMER1_COMPA" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="16" name="TIMER1_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="17" name="TIMER1_COMPC" caption="Timer/Counter2 Compare Match C"/>
+                <interrupt index="18" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="19" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="20" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="21" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="23" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="24" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="25" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="26" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x958A"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x8a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x40" name="RSTDISBL"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x06"/>
+                <value caption="Brown-out detection level at VCC=2.9 V" name="2V9" value="0x05"/>
+                <value caption="Brown-out detection level at VCC=3.0 V" name="3V0" value="0x04"/>
+                <value caption="Brown-out detection level at VCC=3.5 V" name="3V5" value="0x03"/>
+                <value caption="Brown-out detection level at VCC=3.6 V" name="3V6" value="0x02"/>
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x01"/>
+                <value caption="Brown-out detection level at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1">
+                    <bitfield caption="Port C Data Register bits" mask="0xF0" name="PORTC" lsb="4"/>
+                    <bitfield caption="Port C Data Register bits" mask="0x07" name="PORTC"/>
+                </register>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1">
+                    <bitfield caption="Port C Data Direction Register bits" mask="0xF0" name="DDC" lsb="4"/>
+                    <bitfield caption="Port C Data Direction Register bits" mask="0x07" name="DDC"/>
+                </register>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="Port C Input Pins bits" mask="0xF0" name="PINC" lsb="4"/>
+                    <bitfield caption="Port C Input Pins bits" mask="0x07" name="PINC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="USB Software Output Enable register" name="UPOE" offset="0xFB" size="1">
+                    <bitfield caption="USB Buffers Direct Drive enable configuration" mask="0xC0" name="UPWE"/>
+                    <bitfield caption="USB direct drive values" mask="0x30" name="UPDRV"/>
+                    <bitfield caption="D+ Input value" mask="0x02" name="DPI"/>
+                    <bitfield caption="D- Input value" mask="0x01" name="DMI"/>
+                </register>
+                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1"
+                          mask="0x1F">
+                    <bitfield caption="Byte Count bits" mask="0x1F" name="EPINT"/>
+                </register>
+                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Byte Count bits" mask="0xFF" name="BYCT"/>
+                </register>
+                <register caption="USB Data Endpoint" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="Data bits" mask="0xFF" name="DAT"/>
+                </register>
+                <register caption="USB Endpoint Interrupt Enable Register" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="Flow Error Interrupt Enable Flag" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="NAK IN Interrupt Enable Bit" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="NAK OUT Interrupt Enable Bit" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="Received SETUP Interrupt Enable Flag" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="Received OUT Data Interrupt Enable Flag" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="Stalled Interrupt Enable Flag" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="Transmitter Ready Interrupt Enable Flag" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="USB Endpoint Status 1 Register" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="Control Direction" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="Current Bank" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="USB Endpoint Status 0 Register" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="Configuration Status Flag" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="Overflow Error Interrupt Flag" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="Underflow Error Interrupt Flag" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="Data Toggle Sequencing Flag" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="Busy Bank Flag" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="USB Endpoint Configuration 1 Register" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="Endpoint Size Bits" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="Endpoint Bank Bits" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="Endpoint Allocation Bit" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="USB Endpoint Configuration 0 Register" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="Endpoint Type Bits" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="Endpoint Direction Bit" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="USB Endpoint Control Register" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="STALL Request Handshake Bit" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="STALL Request Clear Handshake Bit" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="Reset Data Toggle Bit" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="Endpoint Enable Bit" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="USB Endpoint Reset Register" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="Endpoint FIFO Reset Bits" mask="0x1F" name="EPRST"/>
+                </register>
+                <register caption="USB Endpoint Number" name="UENUM" offset="0xE9" size="1" mask="0x07">
+                    <bitfield caption="Endpoint Number bits" mask="0x07" name="EPNUM"/>
+                </register>
+                <register caption="USB Endpoint Interrupt Register" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="FIFO Control Bit" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="NAK IN Received Interrupt Flag" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="Read/Write Allowed Flag" mask="0x20" name="RWAL"/>
+                    <bitfield caption="NAK OUT Received Interrupt Flag" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="Received SETUP Interrupt Flag" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="Received OUT Data Interrupt Flag" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="STALLEDI Interrupt Flag" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="Transmitter Ready Interrupt Flag" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="USB Device Micro Frame Number" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Number CRC Error Flag" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2"
+                          mask="0x07FF">
+                    <bitfield caption="Frame Number Upper Flag" mask="0x07FF" name="FNUM"/>
+                </register>
+                <register caption="USB Device Address Register" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="Address Enable Bit" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="USB Address Bits" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="USB Device Interrupt Enable Register" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="Upstream Resume Interrupt Enable Bit" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="End Of Resume Interrupt Enable Bit" mask="0x20" name="EORSME"/>
+                    <bitfield caption="Wake-up CPU Interrupt Enable Bit" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="End Of Reset Interrupt Enable Bit" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="Start Of Frame Interrupt Enable Bit" mask="0x04" name="SOFE"/>
+                    <bitfield caption="Suspend Interrupt Enable Bit" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="USB Device Interrupt Register" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="Upstream Resume Interrupt Flag" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="End Of Resume Interrupt Flag" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="Wake-up CPU Interrupt Flag" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="End Of Reset Interrupt Flag" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x04" name="SOFI"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="USB Device Control Registers" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="USB Reset CPU Bit" mask="0x04" name="RSTCPU"/>
+                    <bitfield caption="Remote Wake-up Bit" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="Detach Bit" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="USB macro Enable Bit" mask="0x80" name="USBE"/>
+                    <bitfield caption="Freeze USB Clock Bit" mask="0x20" name="FRZCLK"/>
+                </register>
+                <register caption="Regulator Control Register" name="REGCR" offset="0x63" size="1" ocd-rw="R">
+                    <bitfield caption="Regulator Disable" mask="0x01" name="REGDIS"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="USB reset flag" mask="0x20" name="USBRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xD2" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xD1" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xD0" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
+                          ocd-rw=""/>
+            </register-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="" mask="0x1F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="W"/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+                <register caption="Watchdog Timer Clock Divider" name="WDTCKD" offset="0x62" size="1">
+                    <bitfield caption="Watchdog Early Warning Interrupt Flag" mask="0x08" name="WDEWIF"/>
+                    <bitfield caption="Watchdog Early Warning Interrupt Enable" mask="0x04" name="WDEWIE"/>
+                    <bitfield caption="Watchdog Timer Clock Dividers" mask="0x03" name="WCLKD"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Analog Comparator Input Multiplexer" name="ACMUX" offset="0x7D" size="1">
+                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX"
+                              values="ANALOG_COMP_SELECTION_BITS"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
+                    <bitfield caption="AIN7 Digital Input Disable" mask="0x80" name="AIN7D"/>
+                    <bitfield caption="AIN6 Digital Input Disable" mask="0x40" name="AIN6D"/>
+                    <bitfield caption="AIN5 Digital Input Disable" mask="0x20" name="AIN5D"/>
+                    <bitfield caption="AIN4 Digital Input Disable" mask="0x10" name="AIN4D"/>
+                    <bitfield caption="AIN3 Digital Input Disable" mask="0x08" name="AIN3D"/>
+                    <bitfield caption="AIN2 Digital Input Disable" mask="0x04" name="AIN2D"/>
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_COMP_SELECTION_BITS">
+                <value caption="AIN1" name="AIN1" value="0x00"/>
+                <value caption="AIN2" name="AIN2" value="0x01"/>
+                <value caption="AIN3" name="AIN3" value="0x02"/>
+                <value caption="AIN4" name="AIN4" value="0x03"/>
+                <value caption="AIN5" name="AIN5" value="0x04"/>
+                <value caption="AIN6" name="AIN6" value="0x05"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QUAD">
+            <pin pad="XTAL1" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="PC2" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="PB0" position="14"/>
+            <pin pad="PB1" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PB3" position="17"/>
+            <pin pad="PB4" position="18"/>
+            <pin pad="PB5" position="19"/>
+            <pin pad="PB6" position="20"/>
+            <pin pad="PB7" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="PC6" position="23"/>
+            <pin pad="PC1" position="24"/>
+            <pin pad="PC5" position="25"/>
+            <pin pad="PC4" position="26"/>
+            <pin pad="UCAP" position="27"/>
+            <pin pad="UGND" position="28"/>
+            <pin pad="D+" position="29"/>
+            <pin pad="D-" position="30"/>
+            <pin pad="UVCC" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
new file mode 100644
index 00000000..a46de44b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA32U4.xml
@@ -0,0 +1,1575 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega32U4-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4RC-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44" package="QFN44"
+                 vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega32U4RC-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega32U4" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x8000">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0b00">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0a00" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="PDI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="PDO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                            <signal group="RTS" function="default" pad="PB7"/>
+                            <signal group="CTS" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                        <signals>
+                            <signal group="HWB" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" function="default" pad="PC7"/>
+                            <signal group="OCA" function="default" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC10">
+                    <instance name="TC4" caption="Timer/Counter, 10-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 10-bit"/>
+                        <signals>
+                            <signal group="_OCA" function="default" pad="PC6"/>
+                            <signal group="OCA" function="default" pad="PC7"/>
+                            <signal group="_OCB" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="_OCD" function="default" pad="PD6"/>
+                            <signal group="OCD" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="8" function="default" pad="PD4"/>
+                            <signal group="ADC" index="9" function="default" pad="PD6"/>
+                            <signal group="ADC" index="10" function="default" pad="PD7"/>
+                            <signal group="ADC" index="11" function="default" pad="PB4"/>
+                            <signal group="ADC" index="12" function="default" pad="PB5"/>
+                            <signal group="ADC" index="13" function="default" pad="PB6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PC7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="Reserved1" caption="Reserved1"/>
+                <interrupt index="6" name="Reserved2" caption="Reserved2"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="Reserved3" caption="Reserved3"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="11" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="Reserved4" caption="Reserved4"/>
+                <interrupt index="14" name="Reserved5" caption="Reserved5"/>
+                <interrupt index="15" name="Reserved6" caption="Reserved6"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="26" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="27" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="TWI" caption="2-wire Serial Interface        "/>
+                <interrupt index="37" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="38" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="39" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="40" name="TIMER4_COMPD" caption="Timer/Counter4 Compare Match D"/>
+                <interrupt index="41" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="42" name="TIMER4_FPF" caption="Timer/Counter4 Fault Protection Interrupt"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0958703F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x87"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFB">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x52">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$3F00" name="256W_3F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$3E00" name="512W_3E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$3C00" name="1024W_3C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$3800" name="2048W_3800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x03"/>
+                <value caption="Brown-out detection at VCC=3.4 V" name="3V4" value="0x02"/>
+                <value caption="Brown-out detection at VCC=3.5 V" name="3V5" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xC0"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xC0"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xC0" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0x44"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0x44"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0x44" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xF3"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xF3"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xF3" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 10-bit" name="TC10">
+            <register-group caption="Timer/Counter, 10-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xC0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Force Output Compare Match 4A" mask="0x08" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare Match 4B" mask="0x04" name="FOC4B"/>
+                    <bitfield caption="" mask="0x02" name="PWM4A"/>
+                    <bitfield caption="" mask="0x01" name="PWM4B"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xC1" size="1">
+                    <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM4X"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter 4" mask="0x40" name="PSR4"/>
+                    <bitfield caption="Dead Time Prescaler Bits" mask="0x30" name="DTPS4"/>
+                    <bitfield caption="Clock Select Bits" mask="0x0F" name="CS4"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xC2" size="1">
+                    <bitfield caption="Comparator A Output Mode" mask="0x80" name="COM4A1S"/>
+                    <bitfield caption="Comparator A Output Mode" mask="0x40" name="COM4A0S"/>
+                    <bitfield caption="Comparator B Output Mode" mask="0x20" name="COM4B1S"/>
+                    <bitfield caption="Comparator B Output Mode" mask="0x10" name="COM4B0S"/>
+                    <bitfield caption="Comparator D Output Mode" mask="0x0C" name="COM4D"/>
+                    <bitfield caption="Force Output Compare Match 4D" mask="0x02" name="FOC4D"/>
+                    <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM4D"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register D" name="TCCR4D" offset="0xC3" size="1">
+                    <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE4"/>
+                    <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN4"/>
+                    <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC4"/>
+                    <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES4"/>
+                    <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC4"/>
+                    <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF4"/>
+                    <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register E" name="TCCR4E" offset="0xC4" size="1">
+                    <bitfield caption="Register Update Lock" mask="0x80" name="TLOCK4"/>
+                    <bitfield caption="Enhanced Compare/PWM Mode" mask="0x40" name="ENHC4"/>
+                    <bitfield caption="Output Compare Override Enable bit" mask="0x3F" name="OC4OE"/>
+                </register>
+                <register caption="Timer/Counter4 Low Bytes" name="TCNT4" offset="0xBE" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter4" name="TC4H" offset="0xBF" size="1" mask="0x07"/>
+                <register caption="Timer/Counter4 Output Compare Register A" name="OCR4A" offset="0xCF" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B" name="OCR4B" offset="0xD0" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C" name="OCR4C" offset="0xD1" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter4 Output Compare Register D" name="OCR4D" offset="0xD2" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Output Compare D Match Interrupt Enable" mask="0x80"
+                              name="OCIE4D"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x40"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x20"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x04" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 4D" mask="0x80" name="OCF4D"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x40" name="OCF4A"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x20" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x04" name="TOV4"/>
+                </register>
+                <register caption="Timer/Counter 4 Dead Time Value" name="DT4" offset="0xD4" size="1">
+                    <bitfield caption="Timer/Counter 4 Dead Time Value Bits" mask="0xFF" name="DT4L"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x20" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x17" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER2"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="ADC13 Digital input Disable" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="ADC12 Digital input Disable" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="ADC11 Digital input Disable" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="ADC10 Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Oscillator Control Register" name="RCCTRL" offset="0x67" size="1">
+                    <bitfield caption="" mask="0x01" name="RCFREQ"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="Extended Z-pointer Register for ELPM/SPM" name="RAMPZ" offset="0x5B" size="1">
+                    <bitfield caption="Reserved" mask="0xFC" name="Res"/>
+                    <bitfield caption="Extended Z-Pointer Value" mask="0x03" name="RAMPZ" values="RAMPZ_BITF"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xC7" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xC6" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xC5" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="RAMPZ_BITF">
+                <value caption="Default value of Z-pointer MSB's." name="VAL_0" value="0"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bit 2" mask="0x10" name="PINDIV"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="PLL Frequency Control Register" name="PLLFRQ" offset="0x52" size="1">
+                    <bitfield caption="" mask="0x80" name="PINMUX"/>
+                    <bitfield caption="" mask="0x40" name="PLLUSB"/>
+                    <bitfield caption="" mask="0x30" name="PLLTM"/>
+                    <bitfield caption="" mask="0x0F" name="PDIV"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="" name="UEINT" offset="0xF4" size="1" mask="0x7F"/>
+                <register caption="" name="UEBCHX" offset="0xF3" size="1" mask="0x07" ocd-rw="R"/>
+                <register caption="" name="UEBCLX" offset="0xF2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="" name="UEDATX" offset="0xF1" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0xFF" name="DAT"/>
+                </register>
+                <register caption="" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="" mask="0x7F" name="EPRST"/>
+                </register>
+                <register caption="" name="UENUM" offset="0xE9" size="1" mask="0x07"/>
+                <register caption="" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="" mask="0x20" name="RWAL"/>
+                    <bitfield caption="" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="" name="UDFNUM" offset="0xE4" size="2" mask="0x07FF"/>
+                <register caption="" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="" mask="0x20" name="EORSME"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="" mask="0x04" name="SOFE"/>
+                    <bitfield caption="" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="" mask="0x04" name="SOFI"/>
+                    <bitfield caption="" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="USB low speed mode" mask="0x04" name="LSM"/>
+                    <bitfield caption="" mask="0x08" name="RSTCPU"/>
+                    <bitfield caption="" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="" mask="0x80" name="USBE"/>
+                    <bitfield caption="" mask="0x20" name="FRZCLK"/>
+                    <bitfield caption="" mask="0x10" name="OTGPADE"/>
+                    <bitfield caption="" mask="0x01" name="VBUSTE"/>
+                </register>
+                <register caption="" name="USBINT" offset="0xDA" size="1">
+                    <bitfield caption="" mask="0x01" name="VBUSTI"/>
+                </register>
+                <register caption="" name="USBSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x08" name="SPEED"/>
+                    <bitfield caption="" mask="0x01" name="VBUS"/>
+                </register>
+                <register caption="" name="UHWCON" offset="0xD7" size="1">
+                    <bitfield caption="" mask="0x01" name="UVREGE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP44" caption="TQFP44">
+            <pin position="1" pad="PE6"/>
+            <pin position="2" pad="UVCC"/>
+            <pin position="3" pad="DM"/>
+            <pin position="4" pad="DP"/>
+            <pin position="5" pad="UGND"/>
+            <pin position="6" pad="UCAP"/>
+            <pin position="7" pad="VBUS"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PB2"/>
+            <pin position="11" pad="PB3"/>
+            <pin position="12" pad="PB7"/>
+            <pin position="13" pad="RESET"/>
+            <pin position="14" pad="VCC"/>
+            <pin position="15" pad="GND"/>
+            <pin position="16" pad="XTAL2"/>
+            <pin position="17" pad="XTAL1"/>
+            <pin position="18" pad="PD0"/>
+            <pin position="19" pad="PD1"/>
+            <pin position="20" pad="PD2"/>
+            <pin position="21" pad="PD3"/>
+            <pin position="22" pad="PD5"/>
+            <pin position="23" pad="GND"/>
+            <pin position="24" pad="AVCC"/>
+            <pin position="25" pad="PD4"/>
+            <pin position="26" pad="PD6"/>
+            <pin position="27" pad="PD7"/>
+            <pin position="28" pad="PB4"/>
+            <pin position="29" pad="PB5"/>
+            <pin position="30" pad="PB6"/>
+            <pin position="31" pad="PC6"/>
+            <pin position="32" pad="PC7"/>
+            <pin position="33" pad="PE2"/>
+            <pin position="34" pad="VCC"/>
+            <pin position="35" pad="GND"/>
+            <pin position="36" pad="PF7"/>
+            <pin position="37" pad="PF6"/>
+            <pin position="38" pad="PF5"/>
+            <pin position="39" pad="PF4"/>
+            <pin position="40" pad="PF1"/>
+            <pin position="41" pad="PF0"/>
+            <pin position="42" pad="AREF"/>
+            <pin position="43" pad="GND"/>
+            <pin position="44" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN44" caption="QFN44">
+            <pin position="1" pad="PE6"/>
+            <pin position="2" pad="UVCC"/>
+            <pin position="3" pad="DM"/>
+            <pin position="4" pad="DP"/>
+            <pin position="5" pad="UGND"/>
+            <pin position="6" pad="UCAP"/>
+            <pin position="7" pad="VBUS"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PB2"/>
+            <pin position="11" pad="PB3"/>
+            <pin position="12" pad="PB7"/>
+            <pin position="13" pad="RESET"/>
+            <pin position="14" pad="VCC"/>
+            <pin position="15" pad="GND"/>
+            <pin position="16" pad="XTAL2"/>
+            <pin position="17" pad="XTAL1"/>
+            <pin position="18" pad="PD0"/>
+            <pin position="19" pad="PD1"/>
+            <pin position="20" pad="PD2"/>
+            <pin position="21" pad="PD3"/>
+            <pin position="22" pad="PD5"/>
+            <pin position="23" pad="GND"/>
+            <pin position="24" pad="AVCC"/>
+            <pin position="25" pad="PD4"/>
+            <pin position="26" pad="PD6"/>
+            <pin position="27" pad="PD7"/>
+            <pin position="28" pad="PB4"/>
+            <pin position="29" pad="PB5"/>
+            <pin position="30" pad="PB6"/>
+            <pin position="31" pad="PC6"/>
+            <pin position="32" pad="PC7"/>
+            <pin position="33" pad="PE2"/>
+            <pin position="34" pad="VCC"/>
+            <pin position="35" pad="GND"/>
+            <pin position="36" pad="PF7"/>
+            <pin position="37" pad="PF6"/>
+            <pin position="38" pad="PF5"/>
+            <pin position="39" pad="PF4"/>
+            <pin position="40" pad="PF1"/>
+            <pin position="41" pad="PF0"/>
+            <pin position="42" pad="AREF"/>
+            <pin position="43" pad="GND"/>
+            <pin position="44" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA406.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA406.xml
new file mode 100644
index 00000000..2a3128d7
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA406.xml
@@ -0,0 +1,841 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="4.0" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega406" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0xa000">
+                    <memory-segment start="0x0000" size="0xa000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x9e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x9c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x9800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x9000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0900">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0800" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WAKEUP_TIMER">
+                    <instance name="WAKEUP_TIMER" caption="Wakeup Timer">
+                        <register-group name="WAKEUP_TIMER" name-in-module="WAKEUP_TIMER" offset="0x00"
+                                        address-space="data" caption="Wakeup Timer"/>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="CELL_BALANCING">
+                    <instance name="CELL_BALANCING" caption="Cell Balancing">
+                        <register-group name="CELL_BALANCING" name-in-module="CELL_BALANCING" offset="0x00"
+                                        address-space="data" caption="Cell Balancing"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="3" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="4" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="5" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="6" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="7" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="9" name="WAKE_UP" caption="Wakeup timer overflow"/>
+                <interrupt index="10" name="TIM1_COMP" caption="Timer/Counter 1 Compare Match"/>
+                <interrupt index="11" name="TIM1_OVF" caption="Timer/Counter 1 Overflow"/>
+                <interrupt index="12" name="TIM0_COMPA" caption="Timer/Counter0 Compare A Match"/>
+                <interrupt index="13" name="TIM0_COMPB" caption="Timer/Counter0 Compare B Match"/>
+                <interrupt index="14" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="15" name="TWI_BUS_CD" caption="Two-Wire Bus Connect/Disconnect"/>
+                <interrupt index="16" name="TWI" caption="Two-Wire Serial Interface"/>
+                <interrupt index="17" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="18" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="19" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="20" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="21" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="22" name="SPM_READY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0950703F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x07"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xFE">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x02" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xCD">
+                    <bitfield caption="Watchdog timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Select boot size" mask="0x30" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x08" name="BOOTRST"/>
+                    <bitfield caption="Clock Selection" mask="0x07" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words Boot address=$4F00" name="256W_4F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words Boot address=$4E00" name="512W_4E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words Boot address=$4C00" name="1024W_4C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words Boot address=$4800" name="2048W_4800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Start-up time: 14 CK + 0 ms" name="14CK_0MS" value="0x00"/>
+                <value caption="Start-up time: 14 CK + 3.9 ms" name="14CK_3MS9" value="0x02"/>
+                <value caption="Start-up time: 14 CK + 62.5 ms" name="14CK_62MS5" value="0x04"/>
+                <value caption="Start-up time: 14 CK + 0 ms" name="14CK_0MS" value="0x01"/>
+                <value caption="Start-up time: 14 CK + 3.9 ms" name="14CK_3MS9" value="0x03"/>
+                <value caption="Start-up time: 14 CK + 62.5 ms" name="14CK_62MS5" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register  Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 3 Bits" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x08" name="CTC1"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer Counter 1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 1A Low byte" name="OCR1AL" offset="0x88" size="1"
+                          mask="0xFF"/>
+                <register caption="Output Compare Register 1A High byte" name="OCR1AH" offset="0x89" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Output Compare Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Wakeup Timer" name="WAKEUP_TIMER">
+            <register-group caption="Wakeup Timer" name="WAKEUP_TIMER">
+                <register caption="Wake-up Timer Control Register" name="WUTCSR" offset="0x62" size="1" ocd-rw="R">
+                    <bitfield caption="Wake-up Timer Interrupt Flag" mask="0x80" name="WUTIF"/>
+                    <bitfield caption="Wake-up Timer Interrupt Enable" mask="0x40" name="WUTIE"/>
+                    <bitfield caption="Wake-up timer Calibration Flag" mask="0x20" name="WUTCF"/>
+                    <bitfield caption="Wake-up Timer Reset" mask="0x10" name="WUTR"/>
+                    <bitfield caption="Wake-up Timer Enable" mask="0x08" name="WUTE"/>
+                    <bitfield caption="Wake-up Timer Prescaler Bits" mask="0x07" name="WUTP"
+                              values="CLK_SEL_3BIT_ONLY_PRESCALE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_ONLY_PRESCALE">
+                <value caption="4K(Slow RC) / 1K (32kHz)" name="VAL_0x00" value="0x00"/>
+                <value caption="8K(Slow RC) / 2K (32kHz)" name="VAL_0x01" value="0x01"/>
+                <value caption="16K(Slow RC) / 4K (32kHz)" name="VAL_0x02" value="0x02"/>
+                <value caption="32K(Slow RC) / 8K (32kHz)" name="VAL_0x03" value="0x03"/>
+                <value caption="64K(Slow RC) / 16K (32kHz)" name="VAL_0x04" value="0x04"/>
+                <value caption="128K(Slow RC) / 32K (32kHz)" name="VAL_0x05" value="0x05"/>
+                <value caption="256K(Slow RC) / 64K (32kHz)" name="VAL_0x06" value="0x06"/>
+                <value caption="512K(Slow RC) / 128K (32kHz)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xF8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xF7" size="1">
+                    <bitfield caption="" mask="0x08" name="DUVD"/>
+                    <bitfield caption="" mask="0x04" name="SCD"/>
+                    <bitfield caption="" mask="0x02" name="DCD"/>
+                    <bitfield caption="" mask="0x01" name="CCD"/>
+                </register>
+                <register caption="Current Battery Protection Timing Register" name="CBPTR" offset="0xF6" size="1">
+                    <bitfield caption="" mask="0xF0" name="SCPT" values="BAT_SHORT_CIRC_DELAY"/>
+                    <bitfield caption="" mask="0x0F" name="OCPT" values="BAT_OVER_CURRENT_DELAY"/>
+                </register>
+                <register caption="Battery Protection OverCurrent Detection Level Register" name="BPOCD" offset="0xF5"
+                          size="1">
+                    <bitfield caption="" mask="0xF0" name="DCDL" values="BAT_VOLT_SENSE"/>
+                    <bitfield caption="" mask="0x0F" name="CCDL" values="BAT_VOLT_SENSE"/>
+                </register>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF4"
+                          size="1">
+                    <bitfield caption="" mask="0x0F" name="SCDL" values="BAT_VOLT_SENSE2"/>
+                </register>
+                <register caption="Battery Protection Deep Under Voltage Register" name="BPDUV" offset="0xF3" size="1">
+                    <bitfield caption="" mask="0x30" name="DUVT" values="BAT_DEEP_UNDER_DELAY"/>
+                    <bitfield caption="" mask="0x0F" name="DUDL" values="BAT_DEEP_UNDER_LEVEL"/>
+                </register>
+                <register caption="Battery Protection Interrupt Register" name="BPIR" offset="0xF2" size="1" ocd-rw="R">
+                    <bitfield caption="Deep Under-voltage Early Warning Interrupt Flag" mask="0x80" name="DUVIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x40"
+                              name="COCIF"/>
+                    <bitfield caption="" mask="0x20" name="DOCIF"/>
+                    <bitfield caption="" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Deep Under-voltage Early Warning Interrupt Enable" mask="0x08" name="DUVIE"/>
+                    <bitfield caption="" mask="0x04" name="COCIE"/>
+                    <bitfield caption="" mask="0x02" name="DOCIE"/>
+                    <bitfield caption="" mask="0x01" name="SCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="BAT_SHORT_CIRC_DELAY">
+                <value caption="61 us" name="VAL_0x00" value="0x00"/>
+                <value caption="122 us" name="VAL_0x01" value="0x01"/>
+                <value caption="183 us" name="VAL_0x02" value="0x02"/>
+                <value caption="244 us" name="VAL_0x03" value="0x03"/>
+                <value caption="305 us" name="VAL_0x04" value="0x04"/>
+                <value caption="366 us" name="VAL_0x05" value="0x05"/>
+                <value caption="427 us" name="VAL_0x06" value="0x06"/>
+                <value caption="488 us" name="VAL_0x07" value="0x07"/>
+                <value caption="610 us" name="VAL_0x08" value="0x08"/>
+                <value caption="732 us" name="VAL_0x09" value="0x09"/>
+                <value caption="854 us" name="VAL_0x0A" value="0x0A"/>
+                <value caption="976 us" name="VAL_0x0B" value="0x0B"/>
+                <value caption="1098 us" name="VAL_0x0C" value="0x0C"/>
+                <value caption="1220 us" name="VAL_0x0D" value="0x0D"/>
+                <value caption="1342 us" name="VAL_0x0E" value="0x0E"/>
+                <value caption="1464 us" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="BAT_OVER_CURRENT_DELAY">
+                <value caption="1 ms" name="VAL_0x00" value="0x00"/>
+                <value caption="2 ms" name="VAL_0x01" value="0x01"/>
+                <value caption="4 ms" name="VAL_0x02" value="0x02"/>
+                <value caption="6 ms" name="VAL_0x03" value="0x03"/>
+                <value caption="8 ms" name="VAL_0x04" value="0x04"/>
+                <value caption="10 ms" name="VAL_0x05" value="0x05"/>
+                <value caption="12 ms" name="VAL_0x06" value="0x06"/>
+                <value caption="14 ms" name="VAL_0x07" value="0x07"/>
+                <value caption="16 ms" name="VAL_0x08" value="0x08"/>
+                <value caption="18 ms" name="VAL_0x09" value="0x09"/>
+                <value caption="20 ms" name="VAL_0x0A" value="0x0A"/>
+                <value caption="22 ms" name="VAL_0x0B" value="0x0B"/>
+                <value caption="24 ms" name="VAL_0x0C" value="0x0C"/>
+                <value caption="26 ms" name="VAL_0x0D" value="0x0D"/>
+                <value caption="28 ms" name="VAL_0x0E" value="0x0E"/>
+                <value caption="30 ms" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="BAT_VOLT_SENSE">
+                <value caption="0.050V" name="VAL_0x00" value="0x00"/>
+                <value caption="0.055V" name="VAL_0x01" value="0x01"/>
+                <value caption="0.060V" name="VAL_0x02" value="0x02"/>
+                <value caption="0.065V" name="VAL_0x03" value="0x03"/>
+                <value caption="0.070V" name="VAL_0x04" value="0x04"/>
+                <value caption="0.080V" name="VAL_0x05" value="0x05"/>
+                <value caption="0.090V" name="VAL_0x06" value="0x06"/>
+                <value caption="0.100V" name="VAL_0x07" value="0x07"/>
+                <value caption="0.110V" name="VAL_0x08" value="0x08"/>
+                <value caption="0.120V" name="VAL_0x09" value="0x09"/>
+                <value caption="0.130V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="0.140V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="0.160V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="0.180V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="0.200V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="0.220V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="BAT_VOLT_SENSE2">
+                <value caption="0.100V" name="VAL_0x00" value="0x00"/>
+                <value caption="0.110V" name="VAL_0x01" value="0x01"/>
+                <value caption="0.120V" name="VAL_0x02" value="0x02"/>
+                <value caption="0.130V" name="VAL_0x03" value="0x03"/>
+                <value caption="0.140V" name="VAL_0x04" value="0x04"/>
+                <value caption="0.160V" name="VAL_0x05" value="0x05"/>
+                <value caption="0.180V" name="VAL_0x06" value="0x06"/>
+                <value caption="0.200V" name="VAL_0x07" value="0x07"/>
+                <value caption="0.220V" name="VAL_0x08" value="0x08"/>
+                <value caption="0.240V" name="VAL_0x09" value="0x09"/>
+                <value caption="0.260V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="0.280V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="0.320V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="0.360V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="0.400V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="0.440V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="BAT_DEEP_UNDER_DELAY">
+                <value caption="750ms" name="VAL_0x00" value="0x00"/>
+                <value caption="1000ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1250ms" name="VAL_0x02" value="0x02"/>
+                <value caption="1500ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="BAT_DEEP_UNDER_LEVEL">
+                <value caption="4.71V" name="VAL_0x00" value="0x00"/>
+                <value caption="5.03V" name="VAL_0x01" value="0x01"/>
+                <value caption="5.34V" name="VAL_0x02" value="0x02"/>
+                <value caption="5.66V" name="VAL_0x03" value="0x03"/>
+                <value caption="5.97V" name="VAL_0x04" value="0x04"/>
+                <value caption="6.29V" name="VAL_0x05" value="0x05"/>
+                <value caption="6.60V" name="VAL_0x06" value="0x06"/>
+                <value caption="6.91V" name="VAL_0x07" value="0x07"/>
+                <value caption="7.23V" name="VAL_0x08" value="0x08"/>
+                <value caption="7.54V" name="VAL_0x09" value="0x09"/>
+                <value caption="7.86V" name="VAL_0x0A" value="0x0A"/>
+                <value caption="8.17V" name="VAL_0x0B" value="0x0B"/>
+                <value caption="8.49V" name="VAL_0x0C" value="0x0C"/>
+                <value caption="8.80V" name="VAL_0x0D" value="0x0D"/>
+                <value caption="9.11V" name="VAL_0x0E" value="0x0E"/>
+                <value caption="9.43V" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Pulse Width Modulation of OC output" mask="0x20" name="PWMOC"/>
+                    <bitfield caption="Pulse Width Modulation Modulation of OPC output" mask="0x10" name="PWMOPC"/>
+                    <bitfield caption="Current Protection Status" mask="0x08" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x04" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x02" name="CFE"/>
+                    <bitfield caption="Precharge FET disable" mask="0x01" name="PFD"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"
+                              values="ANALOG_CADA_ACC_TIME"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI" values="ANALOG_CADA_ACC_TIME"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE8" size="2" mask="0xFFFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="CC-ADC Regular Charge Current" name="CADRCC" offset="0xE6" size="1" mask="0xFF"/>
+                <register caption="CC-ADC Regular Discharge Current" name="CADRDC" offset="0xE7" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="ANALOG_CADA_ACC_TIME">
+                <value caption="125ms" name="VAL_0x00" value="0x00"/>
+                <value caption="250ms" name="VAL_0x01" value="0x01"/>
+                <value caption="500ms" name="VAL_0x02" value="0x02"/>
+                <value caption="1000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Cell Balancing" name="CELL_BALANCING">
+            <register-group caption="Cell Balancing" name="CELL_BALANCING">
+                <register caption="Cell Balancing Control Register" name="CBCR" offset="0xF1" size="1">
+                    <bitfield caption="Cell Balancing Enables" mask="0x0F" name="CBE" lsb="1"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
+                          mask="0xFF"/>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS3"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Clock Control and Status Register" name="CCSR" offset="0xC0" size="1">
+                    <bitfield caption="32 kHz Crystal Oscillator Enable" mask="0x02" name="XOE"/>
+                    <bitfield caption="Asynchronous Clock Select" mask="0x01" name="ACS"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1" mask="0x0F"/>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x08" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS3">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Clock Select0 bits" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select0 bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer Counter 0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Output compare Register A" name="OCR0A" offset="0x47" size="1">
+                    <bitfield caption="" mask="0xFF" name="OCR0A"/>
+                </register>
+                <register caption="Output compare Register B" name="OCR0B" offset="0x48" size="1">
+                    <bitfield caption="" mask="0xFF" name="OCR0B"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x01"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Data Register, Port D" name="PORTD" offset="0x2B" size="1" mask="0x03"/>
+                <register caption="Data Direction Register, Port D" name="DDRD" offset="0x2A" size="1" mask="0x03"/>
+                <register caption="Input Pins, Port D" name="PIND" offset="0x29" size="1" mask="0x03"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bus Control and Status Register" name="TWBCSR" offset="0xBE" size="1">
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Flag" mask="0x80" name="TWBCIF"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Enable" mask="0x40" name="TWBCIE"/>
+                    <bitfield caption="TWI Bus Disconnect Time-out Period" mask="0x06" name="TWBDT"
+                              values="COMM_TW_BUS_TIMEOUT"/>
+                    <bitfield caption="TWI Bus Connect/Disconnect Interrupt Polarity" mask="0x01" name="TWBCIP"/>
+                </register>
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TW_BUS_TIMEOUT">
+                <value caption="250ms" name="VAL_0x00" value="0x00"/>
+                <value caption="500ms" name="VAL_0x01" value="0x01"/>
+                <value caption="1000ms" name="VAL_0x02" value="0x02"/>
+                <value caption="2000ms" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF"/>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield
+                            caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
+                            mask="0x80" name="BGD"/>
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Programming Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48.xml
new file mode 100644
index 00000000..dfbb5dd2
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48.xml
@@ -0,0 +1,1290 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega48V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10MMU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10MMH" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20MMU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega48" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9205"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x92"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x1800"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
+                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
new file mode 100644
index 00000000..8d38b674
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA4808.xml
@@ -0,0 +1,2532 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega4808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega4808">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x2800" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0xC000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x50"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2600" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2600" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PB4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PB5" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="QFP32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="SSOP28">
+            <pin pad="PA7" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="PC2" position="4"/>
+            <pin pad="PC3" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="AVDD" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PF0" position="16"/>
+            <pin pad="PF1" position="17"/>
+            <pin pad="PF6" position="18"/>
+            <pin pad="UPDI" position="19"/>
+            <pin pad="VDD0" position="20"/>
+            <pin pad="GND1" position="21"/>
+            <pin pad="PA0" position="22"/>
+            <pin pad="PA1" position="23"/>
+            <pin pad="PA2" position="24"/>
+            <pin pad="PA3" position="25"/>
+            <pin pad="PA4" position="26"/>
+            <pin pad="PA5" position="27"/>
+            <pin pad="PA6" position="28"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml
new file mode 100644
index 00000000..ae3b2255
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA4809.xml
@@ -0,0 +1,2622 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega4809-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega4809-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega4809">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x1800" start="0x2800" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0xC000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x7D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0xC000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0xC000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="8" pad="PE0"/>
+                            <signal function="AIN0" group="AIN" index="9" pad="PE1"/>
+                            <signal function="AIN0" group="AIN" index="10" pad="PE2"/>
+                            <signal function="AIN0" group="AIN" index="11" pad="PE3"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
+                                    pad="PC6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1"
+                                    pad="PB2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS_ALT" group="EVOUT" index="2"
+                                    pad="PC7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTD" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTE" function="EVSYS" group="EVOUT" index="4"
+                                    pad="PE2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUTF" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MISO" pad="PE1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MOSI" pad="PE0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SCK" pad="PE2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SS" pad="PE3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="0" pad="PE0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="1" pad="PE1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="1" pad="PB1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="2" pad="PE2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="2" pad="PB2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="3" pad="PE3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="3" pad="PB3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="4" pad="PC4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="4" pad="PB4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="5" pad="PC5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="5" pad="PB5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2_ALT" group="WO" index="0" pad="PB4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB3">
+                        <register-group address-space="data" name="TCB3" name-in-module="TCB" offset="0x0AB0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3_ALT" group="WO" index="0" pad="PC1"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3" group="WO" index="0" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="RXD" pad="PC5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="TXD" pad="PC4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XCK" pad="PC6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XDIR" pad="PC7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3">
+                        <register-group address-space="data" name="USART3" name-in-module="USART" offset="0x0860"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="RXD" pad="PB5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="RXD" pad="PB1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="TXD" pad="PB4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="TXD" pad="PB0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XCK" pad="PB2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XDIR" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+                <interrupt index="36" module-instance="TCB3" name="INT"/>
+                <interrupt index="37" module-instance="USART3" name="RXC"/>
+                <interrupt index="38" module-instance="USART3" name="DRE"/>
+                <interrupt index="39" module-instance="USART3" name="TXC"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x51"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2600" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2600" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+                <value caption="Connect user to event channel 6" name="CHANNEL6" value="0x7"/>
+                <value caption="Connect user to event channel 7" name="CHANNEL7" value="0x8"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+                <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PC7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output E select" name="PORTMUX_EVOUTE">
+                <value caption="EVOUT on PE2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PB4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PB5" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+        <pinout name="QFP48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
new file mode 100644
index 00000000..2152a662
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
@@ -0,0 +1,1321 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega48A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
+                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega48A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x920A"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x92"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register High Byte" name="EEARH" offset="0x42" size="1" mask="0x03">
+                    <bitfield mask="0x01" name="EEAR8"/>
+                    <bitfield mask="0x02" name="EEAR9"/>
+                </register>
+                <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="UFBGA32" caption="UFBGA32">
+            <pin position="B1" pad="PD3"/>
+            <pin position="B2" pad="PD4"/>
+            <pin position="C1" pad="GND"/>
+            <pin position="D1" pad="VDD"/>
+            <pin position="D2" pad="VDD"/>
+            <pin position="E1" pad="PB6"/>
+            <pin position="F1" pad="PB7"/>
+            <pin position="F2" pad="PD5"/>
+            <pin position="E2" pad="PD6"/>
+            <pin position="F3" pad="PD7"/>
+            <pin position="E3" pad="PB0"/>
+            <pin position="F4" pad="PB1"/>
+            <pin position="E4" pad="PB2"/>
+            <pin position="F5" pad="PB3"/>
+            <pin position="F6" pad="PB4"/>
+            <pin position="E6" pad="PB5"/>
+            <pin position="E5" pad="AVCC"/>
+            <pin position="D6" pad="ADC6"/>
+            <pin position="D5" pad="AREF"/>
+            <pin position="C6" pad="GND"/>
+            <pin position="C5" pad="ADC7"/>
+            <pin position="B6" pad="PC0"/>
+            <pin position="A6" pad="PC1"/>
+            <pin position="A5" pad="PC2"/>
+            <pin position="B5" pad="PC3"/>
+            <pin position="A4" pad="PC4"/>
+            <pin position="B4" pad="PC5"/>
+            <pin position="A3" pad="PC6"/>
+            <pin position="B3" pad="PD0"/>
+            <pin position="A2" pad="PD1"/>
+            <pin position="A1" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml
new file mode 100644
index 00000000..3b224238
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48P.xml
@@ -0,0 +1,1289 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega48PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10MMU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20MMU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega48P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega48P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x920A"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x92"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
new file mode 100644
index 00000000..8e9f3dfd
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
@@ -0,0 +1,1331 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega48PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
+                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MMN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega48PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x920A"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x92"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register High Byte" name="EEARH" offset="0x42" size="1" mask="0x03">
+                    <bitfield mask="0x01" name="EEAR8"/>
+                    <bitfield mask="0x02" name="EEAR9"/>
+                </register>
+                <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="UFBGA32" caption="UFBGA32">
+            <pin position="B1" pad="PD3"/>
+            <pin position="B2" pad="PD4"/>
+            <pin position="C1" pad="GND"/>
+            <pin position="D1" pad="VDD"/>
+            <pin position="D2" pad="VDD"/>
+            <pin position="E1" pad="PB6"/>
+            <pin position="F1" pad="PB7"/>
+            <pin position="F2" pad="PD5"/>
+            <pin position="E2" pad="PD6"/>
+            <pin position="F3" pad="PD7"/>
+            <pin position="E3" pad="PB0"/>
+            <pin position="F4" pad="PB1"/>
+            <pin position="E4" pad="PB2"/>
+            <pin position="F5" pad="PB3"/>
+            <pin position="F6" pad="PB4"/>
+            <pin position="E6" pad="PB5"/>
+            <pin position="E5" pad="AVCC"/>
+            <pin position="D6" pad="ADC6"/>
+            <pin position="D5" pad="AREF"/>
+            <pin position="C6" pad="GND"/>
+            <pin position="C5" pad="ADC7"/>
+            <pin position="B6" pad="PC0"/>
+            <pin position="A6" pad="PC1"/>
+            <pin position="A5" pad="PC2"/>
+            <pin position="B5" pad="PC3"/>
+            <pin position="A4" pad="PC4"/>
+            <pin position="B4" pad="PC5"/>
+            <pin position="A3" pad="PC6"/>
+            <pin position="B3" pad="PD0"/>
+            <pin position="A2" pad="PD1"/>
+            <pin position="A1" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml
new file mode 100644
index 00000000..69706abd
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA48PB.xml
@@ -0,0 +1,1251 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega48PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega48PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega48PB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                            <signal group="ADC" index="6" function="default" pad="PE2"/>
+                            <signal group="ADC" index="7" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AC" function="default" pad="PE0"/>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="DEVICEID">
+                    <instance name="DEVICEID" caption="Device ID">
+                        <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data"
+                                        caption="Device ID"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+                <interrupt index="26" name="USART_START" caption="USART Start Edge Interrupt"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9210"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x92"/>
+                    <property name="SIGNATURE2" value="0x10"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Device ID" name="DEVICEID">
+            <register-group caption="Device ID" name="DEVICEID">
+                <register caption="" name="DEVID0" offset="0xF0" size="1"/>
+                <register caption="" name="DEVID1" offset="0xF1" size="1"/>
+                <register caption="" name="DEVID2" offset="0xF2" size="1"/>
+                <register caption="" name="DEVID3" offset="0xF3" size="1"/>
+                <register caption="" name="DEVID4" offset="0xF4" size="1"/>
+                <register caption="" name="DEVID5" offset="0xF5" size="1"/>
+                <register caption="" name="DEVID6" offset="0xF6" size="1"/>
+                <register caption="" name="DEVID7" offset="0xF7" size="1"/>
+                <register caption="" name="DEVID8" offset="0xF8" size="1"/>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR0D" offset="0xC3" size="1">
+                    <bitfield caption="RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="RX Start" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+                <register caption="Analog Comparator Status Register B" name="ACSRB" offset="0x4F" size="1">
+                    <bitfield caption="Analog Comparator Output Enable" mask="0x01" name="ACOE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x0F"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x0F"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="VQFN32" caption="VQFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64.xml
new file mode 100644
index 00000000..426d79b5
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64.xml
@@ -0,0 +1,1439 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega64L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega64-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega64-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+
+        <variant ordercode="ATmega64L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega64-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega64-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega64" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="SS" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="MISC">
+                    <instance name="MISC" caption="Other Registers">
+                        <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
+                                        caption="Other Registers"/>
+                        <signals>
+                            <signal group="AD" index="7" function="default" pad="PA7"/>
+                            <signal group="AD" index="6" function="default" pad="PA6"/>
+                            <signal group="AD" index="5" function="default" pad="PA5"/>
+                            <signal group="AD" index="4" function="default" pad="PA4"/>
+                            <signal group="AD" index="3" function="default" pad="PA3"/>
+                            <signal group="AD" index="2" function="default" pad="PA2"/>
+                            <signal group="AD" index="1" function="default" pad="PA1"/>
+                            <signal group="AD" index="0" function="default" pad="PA0"/>
+                            <signal group="A" index="15" function="default" pad="PC7"/>
+                            <signal group="A" index="14" function="default" pad="PC6"/>
+                            <signal group="A" index="13" function="default" pad="PC5"/>
+                            <signal group="A" index="12" function="default" pad="PC4"/>
+                            <signal group="A" index="11" function="default" pad="PC3"/>
+                            <signal group="A" index="10" function="default" pad="PC2"/>
+                            <signal group="A" index="9" function="default" pad="PC1"/>
+                            <signal group="A" index="8" function="default" pad="PC0"/>
+                            <signal group="PDO" function="default" pad="PE1"/>
+                            <signal group="PDI" function="default" pad="PE0"/>
+                            <signal group="ALE" function="default" pad="PG2"/>
+                            <signal group="RD" function="default" pad="PG1"/>
+                            <signal group="WD" function="default" pad="PG0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB4"/>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB7"/>
+                            <signal group="T" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="19" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="20" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="25" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="26" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="27" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="28" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="29" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="30" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="31" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="32" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="33" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="34" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x22"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
+                    <bitfield caption="ATmega103 Compatibility Mode" mask="0x02" name="M103C"/>
+                    <bitfield caption="Watchdog Timer always on" mask="0x01" name="WDTON"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x8E" size="1">
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x70" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x74" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x71" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x73" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x72" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x95" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0x9C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x9B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x9A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x9D" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="External SRAM Wait State Select" mask="0x40" name="SRW10"/>
+                    <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x18" name="SM"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x04" name="SM2" values="CPU_SLEEP_MODE_2BITS1"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x6F" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="XTAL Divide Control Register" name="XDIV" offset="0x5C" size="1">
+                    <bitfield caption="XTAL Divide Enable" mask="0x80" name="XDIVEN"/>
+                    <bitfield caption="XTAl Divide Select Bits" mask="0x7F" name="XDIV"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x1100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x1100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x1100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x1100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x1100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x1100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x1100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
+                <value value="0x01" caption="2.0 MHz " name="2_0_MHz_"/>
+                <value value="0x02" caption="4.0 MHz " name="4_0_MHz_"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_2BITS1">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x02"/>
+                <value caption="Power Down" name="PDOWN" value="0x04"/>
+                <value caption="Power Save" name="PSAVE" value="0x06"/>
+                <value caption="Standby" name="STDBY" value="0x05"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x68" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Other Registers" name="MISC">
+            <register-group caption="Other Registers" name="MISC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
+                              name="PSR321"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x21" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x62" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x61" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x65" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x64" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x63" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x51" size="1" mask="0xFF"/>
+                <register caption="Asynchronus Status Register" name="ASSR" offset="0x50" size="1">
+                    <bitfield caption="Asynchronus Timer/Counter 0" mask="0x08" name="AS0"/>
+                    <bitfield caption="Timer/Counter0 Update Busy" mask="0x04" name="TCN0UB"/>
+                    <bitfield caption="Output Compare register 0 Busy" mask="0x02" name="OCR0UB"/>
+                    <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
+                              name="OCIE1C"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x7A" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x78" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
+                              name="OCIE3C"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x04" name="TOV3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x02" name="OCF3C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x8B" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 3  Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x8C" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x84" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C  Bytes" name="OCR3C" offset="0x82" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x80" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC2">
+                <register caption="Timer/Counter Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Wafeform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Mode" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="" mask="0x40" name="TOIE2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN64" caption="TQFPQFN64">
+            <pin position="1" pad="PEN"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA640.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
new file mode 100644
index 00000000..a8d4cd10
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
@@ -0,0 +1,2062 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega640V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
+                 package="TQFP100" pinout="TQFP"/>
+        <variant ordercode="ATmega640V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
+                 package="CBGA100" pinout="CBGA"/>
+        <variant ordercode="ATmega640-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="TQFP100" pinout="TQFP"/>
+        <variant ordercode="ATmega640-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="CBGA100" pinout="CBGA"/>
+    </variants>
+    <devices>
+        <device name="ATmega640" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2" caption="USART">
+                        <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" pad="PH2" function="default"/>
+                            <signal group="TXD" pad="PH1" function="default"/>
+                            <signal group="RXD" pad="PH0" function="default"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3" caption="USART">
+                        <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" pad="PJ2" function="default"/>
+                            <signal group="TXD" pad="PJ1" function="default"/>
+                            <signal group="RXD" pad="PJ0" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="5"/>
+                            <signal group="P" function="default" pad="PG6" index="6"/>
+                            <signal group="P" function="default" pad="PG7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PH0" index="0"/>
+                            <signal group="P" function="default" pad="PH1" index="1"/>
+                            <signal group="P" function="default" pad="PH2" index="2"/>
+                            <signal group="P" function="default" pad="PH3" index="3"/>
+                            <signal group="P" function="default" pad="PH4" index="4"/>
+                            <signal group="P" function="default" pad="PH5" index="5"/>
+                            <signal group="P" function="default" pad="PH6" index="6"/>
+                            <signal group="P" function="default" pad="PH7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PJ0" index="0"/>
+                            <signal group="P" function="default" pad="PJ1" index="1"/>
+                            <signal group="P" function="default" pad="PJ2" index="2"/>
+                            <signal group="P" function="default" pad="PJ3" index="3"/>
+                            <signal group="P" function="default" pad="PJ4" index="4"/>
+                            <signal group="P" function="default" pad="PJ5" index="5"/>
+                            <signal group="P" function="default" pad="PJ6" index="6"/>
+                            <signal group="P" function="default" pad="PJ7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTK" caption="I/O Port">
+                        <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PK0" index="0"/>
+                            <signal group="P" function="default" pad="PK1" index="1"/>
+                            <signal group="P" function="default" pad="PK2" index="2"/>
+                            <signal group="P" function="default" pad="PK3" index="3"/>
+                            <signal group="P" function="default" pad="PK4" index="4"/>
+                            <signal group="P" function="default" pad="PK5" index="5"/>
+                            <signal group="P" function="default" pad="PK6" index="6"/>
+                            <signal group="P" function="default" pad="PK7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTL" caption="I/O Port">
+                        <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PL0" index="0"/>
+                            <signal group="P" function="default" pad="PL1" index="1"/>
+                            <signal group="P" function="default" pad="PL2" index="2"/>
+                            <signal group="P" function="default" pad="PL3" index="3"/>
+                            <signal group="P" function="default" pad="PL4" index="4"/>
+                            <signal group="P" function="default" pad="PL5" index="5"/>
+                            <signal group="P" function="default" pad="PL6" index="6"/>
+                            <signal group="P" function="default" pad="PL7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PG5"/>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="OCB" function="default" pad="PH6"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCC" pad="PL5" function="default"/>
+                            <signal group="OCB" pad="PL4" function="default"/>
+                            <signal group="OCA" pad="PL3" function="default"/>
+                            <signal group="T" pad="PL2" function="default"/>
+                            <signal group="ICP" pad="PL1" function="default"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" pad="PH7" function="default"/>
+                            <signal group="OCC" pad="PH5" function="default"/>
+                            <signal group="OCB" pad="PH4" function="default"/>
+                            <signal group="OCA" pad="PH3" function="default"/>
+                            <signal group="ICP" pad="PL0" function="default"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="OCC" function="default" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PJ0"/>
+                            <signal group="PCINT" index="10" function="default" pad="PJ1"/>
+                            <signal group="PCINT" index="11" function="default" pad="PJ2"/>
+                            <signal group="PCINT" index="12" function="default" pad="PJ3"/>
+                            <signal group="PCINT" index="13" function="default" pad="PJ4"/>
+                            <signal group="PCINT" index="14" function="default" pad="PJ5"/>
+                            <signal group="PCINT" index="15" function="default" pad="PJ6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PK0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PK1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PK2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PK3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PK4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PK5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PK6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PK7"/>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                            <signal group="ADC" index="8" function="default" pad="PK0"/>
+                            <signal group="ADC" index="9" function="default" pad="PK1"/>
+                            <signal group="ADC" index="10" function="default" pad="PK2"/>
+                            <signal group="ADC" index="11" function="default" pad="PK3"/>
+                            <signal group="ADC" index="12" function="default" pad="PK4"/>
+                            <signal group="ADC" index="13" function="default" pad="PK5"/>
+                            <signal group="ADC" index="14" function="default" pad="PK6"/>
+                            <signal group="ADC" index="15" function="default" pad="PK7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
+                <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
+                <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
+                <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
+                <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
+                <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960803F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x08"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled (default address=$0000)" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART2">
+                <register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR2A" offset="0xD0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC2"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC2"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE2"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE2"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR2"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE2"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X2"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM2"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR2B" offset="0xD1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE2"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE2"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE2"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN2"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN2"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ22"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB82"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB82"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR2C" offset="0xD2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL2" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM2" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS2" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART3">
+                <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE3"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR3"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE3"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X3"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM3"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR3B" offset="0x131" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE3"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE3"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE3"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN3"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN3"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ32"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB83"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB83"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR3C" offset="0x132" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL3" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM3" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS3" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ3"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL3"/>
+                </register>
+                <register caption="USART Baud Rate Register Bytes" name="UBRR3" offset="0x134" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x3F"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0x102" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0x101" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0x100" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0x105" size="1" mask="0xFF"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0x104" size="1" mask="0xFF"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0x103" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTK">
+                <register caption="PORT K Data Register" name="PORTK" offset="0x108" size="1" mask="0xFF"/>
+                <register caption="PORT K Data Direction Register" name="DDRK" offset="0x107" size="1" mask="0xFF"/>
+                <register caption="PORT K Input Pins" name="PINK" offset="0x106" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTL">
+                <register caption="PORT L Data Register" name="PORTL" offset="0x10B" size="1" mask="0xFF"/>
+                <register caption="PORT L Data Direction Register" name="DDRL" offset="0x10A" size="1" mask="0xFF"/>
+                <register caption="PORT L Input Pins" name="PINL" offset="0x109" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM5A"/>
+                    <bitfield caption="Compare Output Mode 5B, bits" mask="0x30" name="COM5B"/>
+                    <bitfield caption="Compare Output Mode 5C, bits" mask="0x0C" name="COM5C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Output Compare Flag 5A" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
+                    <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
+                    <bitfield caption="Compare Output Mode 4C, bits" mask="0x0C" name="COM4C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART3" mask="0x04" name="PRUSART3"/>
+                    <bitfield caption="Power Reduction USART2" mask="0x02" name="PRUSART2"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS2">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x2200 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x2200 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x2200 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x2200 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x2200 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x2200 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x2200 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF6"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF6">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+                <value caption="ADC Single Ended Input pin 8" name="ADC8" value="0x20"/>
+                <value caption="ADC Single Ended Input pin 9" name="ADC9" value="0x21"/>
+                <value caption="ADC Single Ended Input pin 10" name="ADC10" value="0x22"/>
+                <value caption="ADC Single Ended Input pin 11" name="ADC11" value="0x23"/>
+                <value caption="ADC Single Ended Input pin 12" name="ADC12" value="0x24"/>
+                <value caption="ADC Single Ended Input pin 13" name="ADC13" value="0x25"/>
+                <value caption="ADC Single Ended Input pin 14" name="ADC14" value="0x26"/>
+                <value caption="ADC Single Ended Input pin 15" name="ADC15" value="0x27"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 10x Gain" name="ADC8_ADC8_10X"
+                       value="0x28"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 10x Gain" name="ADC9_ADC8_10X"
+                       value="0x29"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 8 200x Gain" name="ADC8_ADC8_200x"
+                       value="0x2A"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 8 200x Gain" name="ADC9_ADC8_200X"
+                       value="0x2B"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 10x Gain" name="ADC10_ADC10_10X"
+                       value="0x2C"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 10x Gain" name="ADC11_ADC10_10X"
+                       value="0x2D"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 200x Gain"
+                       name="ADC10_ADC10_200X" value="0x2E"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 200x Gain"
+                       name="ADC11_ADC10_200X" value="0x2F"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 9 1x Gain" name="ADC8_ADC9_1X"
+                       value="0x30"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 9 1x Gain" name="ADC9_ADC9_1X"
+                       value="0x31"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 9 1x Gain" name="ADC10_ADC9_1X"
+                       value="0x32"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 9 1x Gain" name="ADC11_ADC9_1X"
+                       value="0x33"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 9 1x Gain" name="ADC12_ADC9_1X"
+                       value="0x34"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 9 1x Gain" name="ADC13_ADC9_1X"
+                       value="0x35"/>
+                <value caption="ADC Differential Inputs Postive pin 14 Negative pin 9 1x Gain" name="ADC14_ADC9_1X"
+                       value="0x36"/>
+                <value caption="ADC Differential Inputs Postive pin 15 Negative pin 9 1x Gain" name="ADC15_ADC9_1X"
+                       value="0x37"/>
+                <value caption="ADC Differential Inputs Postive pin 8 Negative pin 10 1x Gain" name="ADC8_ADC10_1X"
+                       value="0x38"/>
+                <value caption="ADC Differential Inputs Postive pin 9 Negative pin 10 1x Gain" name="ADC9_ADC10_1X"
+                       value="0x39"/>
+                <value caption="ADC Differential Inputs Postive pin 10 Negative pin 10 1x Gain" name="ADC10_ADC10_1X"
+                       value="0x3A"/>
+                <value caption="ADC Differential Inputs Postive pin 11 Negative pin 10 1x Gain" name="ADC11_ADC10_1X"
+                       value="0x3B"/>
+                <value caption="ADC Differential Inputs Postive pin 12 Negative pin 10 1x Gain" name="ADC12_ADC10_1X"
+                       value="0x3C"/>
+                <value caption="ADC Differential Inputs Postive pin 13 Negative pin 10 1x Gain" name="ADC13_ADC10_1X"
+                       value="0x3D"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP">
+            <pin pad="PG5" position="1"/>
+            <pin pad="PE0" position="2"/>
+            <pin pad="PE1" position="3"/>
+            <pin pad="PE2" position="4"/>
+            <pin pad="PE3" position="5"/>
+            <pin pad="PE4" position="6"/>
+            <pin pad="PE5" position="7"/>
+            <pin pad="PE6" position="8"/>
+            <pin pad="PE7" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="GND" position="11"/>
+            <pin pad="PH0" position="12"/>
+            <pin pad="PH1" position="13"/>
+            <pin pad="PH2" position="14"/>
+            <pin pad="PH3" position="15"/>
+            <pin pad="PH4" position="16"/>
+            <pin pad="PH5" position="17"/>
+            <pin pad="PH6" position="18"/>
+            <pin pad="PB0" position="19"/>
+            <pin pad="PB1" position="20"/>
+            <pin pad="PB2" position="21"/>
+            <pin pad="PB3" position="22"/>
+            <pin pad="PB4" position="23"/>
+            <pin pad="PB5" position="24"/>
+            <pin pad="PB6" position="25"/>
+            <pin pad="PB7" position="26"/>
+            <pin pad="PH7" position="27"/>
+            <pin pad="PG3" position="28"/>
+            <pin pad="PG4" position="29"/>
+            <pin pad="RESET" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="GND" position="32"/>
+            <pin pad="XTAL2" position="33"/>
+            <pin pad="XTAL1" position="34"/>
+            <pin pad="PL0" position="35"/>
+            <pin pad="PL1" position="36"/>
+            <pin pad="PL2" position="37"/>
+            <pin pad="PL3" position="38"/>
+            <pin pad="PL4" position="39"/>
+            <pin pad="PL5" position="40"/>
+            <pin pad="PL6" position="41"/>
+            <pin pad="PL7" position="42"/>
+            <pin pad="PD0" position="43"/>
+            <pin pad="PD1" position="44"/>
+            <pin pad="PD2" position="45"/>
+            <pin pad="PD3" position="46"/>
+            <pin pad="PD4" position="47"/>
+            <pin pad="PD5" position="48"/>
+            <pin pad="PD6" position="49"/>
+            <pin pad="PD7" position="50"/>
+            <pin pad="PG0" position="51"/>
+            <pin pad="PG1" position="52"/>
+            <pin pad="PC0" position="53"/>
+            <pin pad="PC1" position="54"/>
+            <pin pad="PC2" position="55"/>
+            <pin pad="PC3" position="56"/>
+            <pin pad="PC4" position="57"/>
+            <pin pad="PC5" position="58"/>
+            <pin pad="PC6" position="59"/>
+            <pin pad="PC7" position="60"/>
+            <pin pad="VCC" position="61"/>
+            <pin pad="GND" position="62"/>
+            <pin pad="PJ0" position="63"/>
+            <pin pad="PJ1" position="64"/>
+            <pin pad="PJ2" position="65"/>
+            <pin pad="PJ3" position="66"/>
+            <pin pad="PJ4" position="67"/>
+            <pin pad="PJ5" position="68"/>
+            <pin pad="PJ6" position="69"/>
+            <pin pad="PG2" position="70"/>
+            <pin pad="PA7" position="71"/>
+            <pin pad="PA6" position="72"/>
+            <pin pad="PA5" position="73"/>
+            <pin pad="PA4" position="74"/>
+            <pin pad="PA3" position="75"/>
+            <pin pad="PA2" position="76"/>
+            <pin pad="PA1" position="77"/>
+            <pin pad="PA0" position="78"/>
+            <pin pad="PJ7" position="79"/>
+            <pin pad="VCC" position="80"/>
+            <pin pad="GND" position="81"/>
+            <pin pad="PK7" position="82"/>
+            <pin pad="PK6" position="83"/>
+            <pin pad="PK5" position="84"/>
+            <pin pad="PK4" position="85"/>
+            <pin pad="PK3" position="86"/>
+            <pin pad="PK2" position="87"/>
+            <pin pad="PK1" position="88"/>
+            <pin pad="PK0" position="89"/>
+            <pin pad="PF7" position="90"/>
+            <pin pad="PF6" position="91"/>
+            <pin pad="PF5" position="92"/>
+            <pin pad="PF4" position="93"/>
+            <pin pad="PF3" position="94"/>
+            <pin pad="PF2" position="95"/>
+            <pin pad="PF1" position="96"/>
+            <pin pad="PF0" position="97"/>
+            <pin pad="AREF" position="98"/>
+            <pin pad="GND" position="99"/>
+            <pin pad="AVCC" position="100"/>
+        </pinout>
+        <pinout name="CBGA">
+            <pin pad="GND" position="A1"/>
+            <pin pad="AVCC" position="B1"/>
+            <pin pad="PE2" position="C1"/>
+            <pin pad="PE3" position="D1"/>
+            <pin pad="PE7" position="E1"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="GND" position="G1"/>
+            <pin pad="PB3" position="H1"/>
+            <pin pad="PH7" position="J1"/>
+            <pin pad="PB7" position="K1"/>
+            <pin pad="AREF" position="A2"/>
+            <pin pad="PG5" position="B2"/>
+            <pin pad="PE0" position="C2"/>
+            <pin pad="PE4" position="D2"/>
+            <pin pad="PH0" position="E2"/>
+            <pin pad="PH4" position="F2"/>
+            <pin pad="PB1" position="G2"/>
+            <pin pad="PB4" position="H2"/>
+            <pin pad="PG3" position="J2"/>
+            <pin pad="PG4" position="K2"/>
+            <pin pad="PF0" position="A3"/>
+            <pin pad="PF1" position="B3"/>
+            <pin pad="PE1" position="C3"/>
+            <pin pad="PE5" position="D3"/>
+            <pin pad="PH1" position="E3"/>
+            <pin pad="PH6" position="F3"/>
+            <pin pad="PB2" position="G3"/>
+            <pin pad="RESET" position="H3"/>
+            <pin pad="PB6" position="J3"/>
+            <pin pad="VCC" position="K3"/>
+            <pin pad="PF2" position="A4"/>
+            <pin pad="PF3" position="B4"/>
+            <pin pad="PF4" position="C4"/>
+            <pin pad="PE6" position="D4"/>
+            <pin pad="PH3" position="E4"/>
+            <pin pad="PB0" position="F4"/>
+            <pin pad="PB5" position="G4"/>
+            <pin pad="PL1" position="H4"/>
+            <pin pad="PL0" position="J4"/>
+            <pin pad="GND" position="K4"/>
+            <pin pad="PF5" position="A5"/>
+            <pin pad="PF6" position="B5"/>
+            <pin pad="PF7" position="C5"/>
+            <pin pad="PH2" position="D5"/>
+            <pin pad="PH5" position="E5"/>
+            <pin pad="PL4" position="F5"/>
+            <pin pad="PL2" position="G5"/>
+            <pin pad="PL3" position="H5"/>
+            <pin pad="XTAL2" position="J5"/>
+            <pin pad="XTAL1" position="K5"/>
+            <pin pad="PK0" position="A6"/>
+            <pin pad="PK1" position="B6"/>
+            <pin pad="PK2" position="C6"/>
+            <pin pad="PA4" position="D6"/>
+            <pin pad="PJ6" position="E6"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD0" position="G6"/>
+            <pin pad="PL7" position="H6"/>
+            <pin pad="PL6" position="J6"/>
+            <pin pad="PL5" position="K6"/>
+            <pin pad="PK3" position="A7"/>
+            <pin pad="PK4" position="B7"/>
+            <pin pad="PK5" position="C7"/>
+            <pin pad="PA5" position="D7"/>
+            <pin pad="PJ5" position="E7"/>
+            <pin pad="PJ1" position="F7"/>
+            <pin pad="PD5" position="G7"/>
+            <pin pad="PD4" position="H7"/>
+            <pin pad="PD3" position="J7"/>
+            <pin pad="PD2" position="K7"/>
+            <pin pad="PK6" position="A8"/>
+            <pin pad="PK7" position="B8"/>
+            <pin pad="PJ7" position="C8"/>
+            <pin pad="PA6" position="D8"/>
+            <pin pad="PJ4" position="E8"/>
+            <pin pad="PJ0" position="F8"/>
+            <pin pad="PC5" position="G8"/>
+            <pin pad="PC4" position="H8"/>
+            <pin pad="PC1" position="J8"/>
+            <pin pad="PD6" position="K8"/>
+            <pin pad="GND" position="A9"/>
+            <pin pad="PA0" position="B9"/>
+            <pin pad="PA1" position="C9"/>
+            <pin pad="PA7" position="D9"/>
+            <pin pad="PJ3" position="E9"/>
+            <pin pad="PC7" position="F9"/>
+            <pin pad="PC6" position="G9"/>
+            <pin pad="PC3" position="H9"/>
+            <pin pad="PC0" position="J9"/>
+            <pin pad="PD7" position="K9"/>
+            <pin pad="VCC" position="A10"/>
+            <pin pad="PA2" position="B10"/>
+            <pin pad="PA3" position="C10"/>
+            <pin pad="PG2" position="D10"/>
+            <pin pad="PJ2" position="E10"/>
+            <pin pad="GND" position="F10"/>
+            <pin pad="VCC" position="G10"/>
+            <pin pad="PC2" position="H10"/>
+            <pin pad="PG1" position="J10"/>
+            <pin pad="PG0" position="K10"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644.xml
new file mode 100644
index 00000000..f2be131f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644.xml
@@ -0,0 +1,1400 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega644V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_QFN_44"
+                 package="QFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="QFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega644" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" index="0" function="default" pad="PD1"/>
+                            <signal group="RXD" index="0" function="default" pad="PD0"/>
+                            <signal group="XCK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="PCINT27" index="27" function="default" pad="PD3"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT28" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT29" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT30" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT31" index="31" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960903f"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x09"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml
new file mode 100644
index 00000000..587ab8b7
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644A.xml
@@ -0,0 +1,1439 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega644A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega644A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960A03f"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x09"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml
new file mode 100644
index 00000000..5968e1e2
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644P.xml
@@ -0,0 +1,1459 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega644PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10AN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10PN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PV-10MN" tempmin="-40" tempmax="105" speedmax="10000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="TQFP44" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega644P-20MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_VQFN_44"
+                 package="VQFN44" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega644P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="TOSC" index="1" function="default" pad="PC6"/>
+                            <signal group="TOSC" index="2" function="default" pad="PC7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960A03f"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_VQFN_44" caption="TQFP_VQFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml
new file mode 100644
index 00000000..991f6895
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644PA.xml
@@ -0,0 +1,1445 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega644PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="TQFP44" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP40"
+                 package="PDIP40" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega644PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP_QFN_44"
+                 package="VQFN44" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega644PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PB2"/>
+                            <signal group="AIN" index="1" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB0"/>
+                            <signal group="OCB" function="default" pad="PB4"/>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PD7"/>
+                            <signal group="OCB" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PC2"/>
+                            <signal group="TMS" function="default" pad="PC3"/>
+                            <signal group="TDO" function="default" pad="PC4"/>
+                            <signal group="TDI" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PA0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PA1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PA2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PA3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PA4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PA5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PA6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PA7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="16" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="19" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="21" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PC7"/>
+                            <signal group="PCINT" index="24" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="25" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="26" function="default" pad="PD2"/>
+                            <signal group="PCINT" index="27" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="28" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="29" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="30" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="31" function="default" pad="PD7"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="2" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PA0"/>
+                            <signal group="ADC" index="1" function="default" pad="PA1"/>
+                            <signal group="ADC" index="2" function="default" pad="PA2"/>
+                            <signal group="ADC" index="3" function="default" pad="PA3"/>
+                            <signal group="ADC" index="4" function="default" pad="PA4"/>
+                            <signal group="ADC" index="5" function="default" pad="PA5"/>
+                            <signal group="ADC" index="6" function="default" pad="PA6"/>
+                            <signal group="ADC" index="7" function="default" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PD6"/>
+                            <signal group="OCA" function="default" pad="PD5"/>
+                            <signal group="OCB" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC1"/>
+                            <signal group="SCL" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLKO" index="0" function="default" pad="PB1"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB6"/>
+                            <signal group="SCK" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="7" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="8" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="9" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="10" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="11" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="12" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="13" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="14" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="15" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="16" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="17" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="18" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="19" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="20" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="21" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="22" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="25" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="26" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="27" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="28" name="USART1_RX" caption="USART1 RX complete"/>
+                <interrupt index="29" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+                <interrupt index="30" name="USART1_TX" caption="USART1 TX complete"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960A03f"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x02"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
+                <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable"
+                       name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power"
+                       name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
+                <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power"
+                       name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled"
+                       name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power"
+                       name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
+                <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power"
+                       name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ADC_MUX_DIFF"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF6">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_DIFF">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain" name="ADC0_ADC0_10X"
+                       value="0x08"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain" name="ADC1_ADC0_10X"
+                       value="0x09"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain" name="ADC0_ADC0_200x"
+                       value="0x0A"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain" name="ADC1_ADC0_200X"
+                       value="0x0B"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain" name="ADC2_ADC2_10X"
+                       value="0x0C"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain" name="ADC3_ADC2_10X"
+                       value="0x0D"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain" name="ADC2_ADC2_200X"
+                       value="0x0E"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain" name="ADC3_ADC2_200X"
+                       value="0x0F"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain" name="ADC0_ADC1_1X"
+                       value="0x10"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain" name="ADC1_ADC1_1X"
+                       value="0x11"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain" name="ADC2_ADC1_1X"
+                       value="0x12"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain" name="ADC3_ADC1_1X"
+                       value="0x13"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain" name="ADC4_ADC1_1X"
+                       value="0x14"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain" name="ADC5_ADC1_1X"
+                       value="0x15"/>
+                <value caption="ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain" name="ADC6_ADC1_1X"
+                       value="0x16"/>
+                <value caption="ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain" name="ADC7_ADC1_1X"
+                       value="0x17"/>
+                <value caption="ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain" name="ADC0_ADC2_1X"
+                       value="0x18"/>
+                <value caption="ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain" name="ADC1_ADC2_1X"
+                       value="0x19"/>
+                <value caption="ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain" name="ADC2_ADC2_1X"
+                       value="0x1A"/>
+                <value caption="ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain" name="ADC3_ADC2_1X"
+                       value="0x1B"/>
+                <value caption="ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain" name="ADC4_ADC2_1X"
+                       value="0x1C"/>
+                <value caption="ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain" name="ADC5_ADC2_1X"
+                       value="0x1D"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x1E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x1FFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="BOD Power Down in Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Power Down in Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x10" name="PRUSART1"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP40" caption="PDIP40">
+            <pin position="1" pad="PB0"/>
+            <pin position="2" pad="PB1"/>
+            <pin position="3" pad="PB2"/>
+            <pin position="4" pad="PB3"/>
+            <pin position="5" pad="PB4"/>
+            <pin position="6" pad="PB5"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="RESET"/>
+            <pin position="10" pad="VCC"/>
+            <pin position="11" pad="GND"/>
+            <pin position="12" pad="XTAL2"/>
+            <pin position="13" pad="XTAL1"/>
+            <pin position="14" pad="PD0"/>
+            <pin position="15" pad="PD1"/>
+            <pin position="16" pad="PD2"/>
+            <pin position="17" pad="PD3"/>
+            <pin position="18" pad="PD4"/>
+            <pin position="19" pad="PD5"/>
+            <pin position="20" pad="PD6"/>
+            <pin position="21" pad="PD7"/>
+            <pin position="22" pad="PC0"/>
+            <pin position="23" pad="PC1"/>
+            <pin position="24" pad="PC2"/>
+            <pin position="25" pad="PC3"/>
+            <pin position="26" pad="PC4"/>
+            <pin position="27" pad="PC5"/>
+            <pin position="28" pad="PC6"/>
+            <pin position="29" pad="PC7"/>
+            <pin position="30" pad="AVCC"/>
+            <pin position="31" pad="GND"/>
+            <pin position="32" pad="AREF"/>
+            <pin position="33" pad="PA7"/>
+            <pin position="34" pad="PA6"/>
+            <pin position="35" pad="PA5"/>
+            <pin position="36" pad="PA4"/>
+            <pin position="37" pad="PA3"/>
+            <pin position="38" pad="PA2"/>
+            <pin position="39" pad="PA1"/>
+            <pin position="40" pad="PA0"/>
+        </pinout>
+        <pinout name="TQFP_QFN_44" caption="TQFP_QFN_44">
+            <pin position="1" pad="PB5"/>
+            <pin position="2" pad="PB6"/>
+            <pin position="3" pad="PB7"/>
+            <pin position="4" pad="RESET"/>
+            <pin position="5" pad="VCC"/>
+            <pin position="6" pad="GND"/>
+            <pin position="7" pad="XTAL2"/>
+            <pin position="8" pad="XTAL1"/>
+            <pin position="9" pad="PD0"/>
+            <pin position="10" pad="PD1"/>
+            <pin position="11" pad="PD2"/>
+            <pin position="12" pad="PD3"/>
+            <pin position="13" pad="PD4"/>
+            <pin position="14" pad="PD5"/>
+            <pin position="15" pad="PD6"/>
+            <pin position="16" pad="PD7"/>
+            <pin position="17" pad="VCC"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PC7"/>
+            <pin position="27" pad="AVCC"/>
+            <pin position="28" pad="GND"/>
+            <pin position="29" pad="REF"/>
+            <pin position="30" pad="PA7"/>
+            <pin position="31" pad="PA6"/>
+            <pin position="32" pad="PA5"/>
+            <pin position="33" pad="PA4"/>
+            <pin position="34" pad="PA3"/>
+            <pin position="35" pad="PA2"/>
+            <pin position="36" pad="PA1"/>
+            <pin position="37" pad="PA0"/>
+            <pin position="38" pad="VCC"/>
+            <pin position="39" pad="GND"/>
+            <pin position="40" pad="PB0"/>
+            <pin position="41" pad="PB1"/>
+            <pin position="42" pad="PB2"/>
+            <pin position="43" pad="PB3"/>
+            <pin position="44" pad="PB4"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
new file mode 100644
index 00000000..cf2cf609
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA644RFR2.xml
@@ -0,0 +1,2761 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega644RFR2-ZU" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZUR" package="VQFN48" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZF" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega644RFR2-ZFR" package="VQFN48" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega644RFR2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
+                               size="0x0300">
+                    <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x2200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+                <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
+                <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
+                <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
+                <interrupt index="75" name="TRX24_AMI2" caption="Address match interrupt of address filter 2"/>
+                <interrupt index="76" name="TRX24_AMI3" caption="Address match interrupt of address filter 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A60303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa6"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                    <bitfield caption="Reserved Bit" mask="0x01" name="Res"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="Reserved Bit" mask="0x02" name="Res"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="Reserved Bit" mask="0x04" name="Res"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_SPI2X"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_SPI2X">
+                <value caption="fosc/4 / fosc/2 (SPI2X=0/1)" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16 / fosc/8 (SPI2X=0/1)" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64 / fosc/32 (SPI2X=0/1)" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128 / fosc/64 (SPI2X=0/1)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="Reserved Bit" mask="0x30" name="Res"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Reserved Bit" mask="0x0C" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Reserved Bit" mask="0x20" name="Res"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="Power Amplifier Ramp up/down Control Register" name="PARCR" offset="0x138" size="1">
+                    <bitfield caption="ext. PA Ramp Down Lead Time" mask="0xE0" name="PALTD" values="PALTD_bitf"/>
+                    <bitfield caption="ext. PA Ramp Up Lead Time" mask="0x1C" name="PALTU" values="PALTU_bitf"/>
+                    <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
+                    <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
+                          offset="0x10E" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
+                          offset="0x10F" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
+                          name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
+                          name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
+                          offset="0x112" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
+                          offset="0x113" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
+                          name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
+                          name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
+                          offset="0x116" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
+                          offset="0x117" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
+                          name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
+                          name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
+                          offset="0x11A" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
+                          offset="0x11B" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
+                          name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
+                          name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3H"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
+                          size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF0" name="Res"/>
+                    <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
+                    <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
+                    <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
+                    <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
+                          size="1">
+                    <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
+                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
+                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
+                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
+                              name="AACK_0_I_AM_COORD"/>
+                </register>
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0x80" name="Res7"/>
+                    <bitfield caption="Enable Phase Measurement Unit" mask="0x40" name="PMU_EN"/>
+                    <bitfield caption="Start of Phase Measurement Unit" mask="0x20" name="PMU_START"/>
+                    <bitfield caption="PMU IF Inverse" mask="0x10" name="PMU_IF_INV"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
+                              name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
+                              name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
+                              name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
+                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 3" mask="0x10" name="MAF_3_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 2" mask="0x08" name="MAF_2_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 1" mask="0x04" name="MAF_1_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
+                    <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
+                    <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
+                </register>
+                <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
+                    <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
+                          size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
+                              values="RX_RPC_CTRL_BITF"/>
+                    <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
+                    <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
+                    <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
+                    <bitfield caption="Reserved" mask="0x04" name="Res0"/>
+                    <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
+                              name="XAH_RPC_EN"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="PALTD_bitf">
+                <value caption="-3us" name="PALTD_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTD_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTD_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTD_0US" value="3"/>
+                <value caption="1us" name="PALTD_1US" value="4"/>
+                <value caption="2us" name="PALTD_2US" value="5"/>
+                <value caption="3us" name="PALTD_3US" value="6"/>
+                <value caption="4us" name="PALTD_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="PALTU_bitf">
+                <value caption="-3us" name="PALTU_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTU_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTU_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTU_0US" value="3"/>
+                <value caption="1us" name="PALTU_1US" value="4"/>
+                <value caption="2us" name="PALTU_2US" value="5"/>
+                <value caption="3us" name="PALTU_3US" value="6"/>
+                <value caption="4us" name="PALTU_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.5 dBm" name="VAL_0" value="0"/>
+                <value caption="3.3 dBm" name="VAL_1" value="1"/>
+                <value caption="2.8 dBm" name="VAL_2" value="2"/>
+                <value caption="2.3 dBm" name="VAL_3" value="3"/>
+                <value caption="1.8 dBm" name="VAL_4" value="4"/>
+                <value caption="1.2 dBm" name="VAL_5" value="5"/>
+                <value caption="0.5 dBm" name="VAL_6" value="6"/>
+                <value caption="-0.5 dBm" name="VAL_7" value="7"/>
+                <value caption="-1.5 dBm" name="VAL_8" value="8"/>
+                <value caption="-2.5 dBm" name="VAL_9" value="9"/>
+                <value caption="-3.5 dBm" name="VAL_10" value="10"/>
+                <value caption="-4.5 dBm" name="VAL_11" value="11"/>
+                <value caption="-6.5 dBm" name="VAL_12" value="12"/>
+                <value caption="-8.5 dBm" name="VAL_13" value="13"/>
+                <value caption="-11.5 dBm" name="VAL_14" value="14"/>
+                <value caption="-16.5 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V / 1.70V (BATMON_HR=1/0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V / 1.75V (BATMON_HR=1/0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V / 1.80V (BATMON_HR=1/0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V / 1.85V (BATMON_HR=1/0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V / 1.90V (BATMON_HR=1/0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V / 1.95V (BATMON_HR=1/0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V / 2.00V (BATMON_HR=1/0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V / 2.05V (BATMON_HR=1/0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V / 2.10V (BATMON_HR=1/0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V / 2.15V (BATMON_HR=1/0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V / 2.20V (BATMON_HR=1/0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V / 2.25V (BATMON_HR=1/0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V / 2.30V (BATMON_HR=1/0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V / 2.35V (BATMON_HR=1/0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V / 2.40V (BATMON_HR=1/0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_RPC_CTRL_BITF">
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
+                       value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+                <value caption="RFA2 family" name="P_RFA2" value="0x93"/>
+                <value caption="RFR2 family" name="P_RFR2" value="0x94"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_2_BITF">
+                <value caption="Revision A" name="REV_A" value="12"/>
+                <value caption="Revision B" name="REV_B" value="1"/>
+                <value caption="Revision C" name="REV_C" value="3"/>
+                <value caption="Revision D" name="REV_D" value="4"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
+                          offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCTSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
+                          offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCTSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
+                          offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCTSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
+                          offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCTSTRLL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xE0" name="Res"/>
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xFE" name="Res"/>
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
+                    <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
+                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
+                              name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
+                              name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
+                              name="SCCS1" values="SCCS1_BITF"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
+                          offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCRSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
+                          offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCRSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
+                          offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCRSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
+                          offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCRSTRLL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SCCKDIV_BITF">
+                <value caption="Transceiver Clock divided by 256, (62.5kHz)" name="VAL_0" value="0"/>
+                <value caption="Transceiver Clock divided by 128, (125kHz)" name="VAL_1" value="1"/>
+                <value caption="Transceiver Clock divided by 64,  (250kHz)" name="VAL_2" value="2"/>
+                <value caption="Transceiver Clock divided by 32,  (500kHz)" name="VAL_3" value="3"/>
+                <value caption="Transceiver Clock divided by 16,  (1MHz)" name="VAL_4" value="4"/>
+                <value caption="Transceiver Clock divided by 8,   (2MHz)" name="VAL_5" value="5"/>
+                <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
+            </value-group>
+            <value-group caption="" name="SCCS3_BITF">
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS2_BITF">
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS1_BITF">
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="0"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xF8" name="Res"/>
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="16.0 MHz" name="16_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x80" name="Res"/>
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register #0" name="DRTRAM0" offset="0x135" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #1" name="DRTRAM1" offset="0x134" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #2" name="DRTRAM2" offset="0x133" size="1">
+                    <bitfield caption="Reserved Bit" mask="0x40" name="Res"/>
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #3" name="DRTRAM3" offset="0x132" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res"/>
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645.xml
new file mode 100644
index 00000000..65de0030
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645.xml
@@ -0,0 +1,1009 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega645" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960503F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml
new file mode 100644
index 00000000..f00bdb3a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450.xml
@@ -0,0 +1,1032 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega6450" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960603F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml
new file mode 100644
index 00000000..58e930dc
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450A.xml
@@ -0,0 +1,1032 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega6450A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960E03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml
new file mode 100644
index 00000000..325b6382
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6450P.xml
@@ -0,0 +1,1032 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega6450P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="NOT_USED" caption="RESERVED"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960E03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x0e"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml
new file mode 100644
index 00000000..9696afab
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645A.xml
@@ -0,0 +1,1010 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega645A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960D03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x05"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml
new file mode 100644
index 00000000..9ebe30f5
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA645P.xml
@@ -0,0 +1,1012 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega645P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960D03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x0D"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649.xml
new file mode 100644
index 00000000..5c2cb4ae
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649.xml
@@ -0,0 +1,1406 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega649V-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649V-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="QFN64" package="QFN64"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64 " vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega649-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega649" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960303F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF"/>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
new file mode 100644
index 00000000..9ee60f7d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490.xml
@@ -0,0 +1,1119 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega6490" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960403F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x04"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR9" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR4" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF"/>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
new file mode 100644
index 00000000..f984d4a2
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490A.xml
@@ -0,0 +1,1119 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega6490A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960C03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x04"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR9" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR4" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF"/>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
new file mode 100644
index 00000000..c1cb4ef4
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA6490P.xml
@@ -0,0 +1,1119 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega6490P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTH" caption="I/O Port">
+                        <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTJ" caption="I/O Port">
+                        <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="14" name="USART_UDRE" caption="USART Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+                <interrupt index="23" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="24" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960C03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x0C"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTH">
+                <register caption="PORT H Data Register" name="PORTH" offset="0xDA" size="1" mask="0xFF"/>
+                <register caption="PORT H Data Direction Register" name="DDRH" offset="0xD9" size="1" mask="0xFF"/>
+                <register caption="PORT H Input Pins" name="PINH" offset="0xD8" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTJ">
+                <register caption="PORT J Data Register" name="PORTJ" offset="0xDD" size="1" mask="0x7F"/>
+                <register caption="PORT J Data Direction Register" name="DDRJ" offset="0xDC" size="1" mask="0x7F"/>
+                <register caption="PORT J Input Pins" name="PINJ" offset="0xDB" size="1" mask="0x7F"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 19" name="LCDDR19" offset="0xFF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 14" name="LCDDR14" offset="0xFA" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 9" name="LCDDR9" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 4" name="LCDDR4" offset="0xF0" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF"/>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control and Status Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1" mask="0x7F"/>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml
new file mode 100644
index 00000000..9c191d55
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649A.xml
@@ -0,0 +1,1402 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega649A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64"
+                 vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega649A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960B03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x03"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF"/>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR310"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml
new file mode 100644
index 00000000..30822cb1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA649P.xml
@@ -0,0 +1,1402 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega649P-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFP64"
+                 package="TQFP64" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega649P-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="QFN64" package="QFN64"
+                 vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega649P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG4"/>
+                            <signal group="OCA" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PG3"/>
+                            <signal group="ICP" function="default" pad="PD0"/>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="TOSC" function="default" pad="XTAL1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB7"/>
+                            <signal group="TOSC" function="default" pad="XTAL2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB0"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                            <signal group="P" function="default" pad="PG5" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LCD">
+                    <instance name="LCD" caption="Liquid Crystal Display">
+                        <register-group name="LCD" name-in-module="LCD" offset="0x00" address-space="data"
+                                        caption="Liquid Crystal Display"/>
+                        <signals>
+                            <signal group="SEG" index="0" function="default" pad="PA4"/>
+                            <signal group="SEG" index="1" function="default" pad="PA5"/>
+                            <signal group="SEG" index="2" function="default" pad="PA6"/>
+                            <signal group="SEG" index="3" function="default" pad="PA7"/>
+                            <signal group="SEG" index="4" function="default" pad="PG2"/>
+                            <signal group="SEG" index="5" function="default" pad="PC7"/>
+                            <signal group="SEG" index="6" function="default" pad="PC6"/>
+                            <signal group="SEG" index="7" function="default" pad="PC5"/>
+                            <signal group="SEG" index="8" function="default" pad="PC4"/>
+                            <signal group="SEG" index="9" function="default" pad="PC3"/>
+                            <signal group="SEG" index="10" function="default" pad="PC2"/>
+                            <signal group="SEG" index="11" function="default" pad="PC1"/>
+                            <signal group="SEG" index="12" function="default" pad="PC0"/>
+                            <signal group="SEG" index="13" function="default" pad="PG1"/>
+                            <signal group="SEG" index="14" function="default" pad="PG2"/>
+                            <signal group="SEG" index="15" function="default" pad="PD7"/>
+                            <signal group="SEG" index="16" function="default" pad="PD6"/>
+                            <signal group="SEG" index="17" function="default" pad="PD5"/>
+                            <signal group="SEG" index="18" function="default" pad="PD4"/>
+                            <signal group="SEG" index="19" function="default" pad="PD3"/>
+                            <signal group="SEG" index="20" function="default" pad="PD2"/>
+                            <signal group="SEG" index="21" function="default" pad="PD1"/>
+                            <signal group="SEG" index="22" function="default" pad="PD0"/>
+                            <signal group="SEG" index="23" function="default" pad="PG4"/>
+                            <signal group="SEG" index="24" function="default" pad="PG3"/>
+                            <signal group="COM" index="0" function="default" pad="PA0"/>
+                            <signal group="COM" index="1" function="default" pad="PA1"/>
+                            <signal group="COM" index="2" function="default" pad="PA2"/>
+                            <signal group="COM" index="3" function="default" pad="PA3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="PCINT" index="0" function="default" pad="PE0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PE1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PE2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PE3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PE4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PE5"/>
+                            <signal group="PCINT" index="6" function="default" pad="PE6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PE7"/>
+                            <signal group="PCINT" index="8" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="15" function="default" pad="PB7"/>
+                            <signal group="INT" index="0" function="default" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PE7"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="USI">
+                    <instance name="USI" caption="Universal Serial Interface">
+                        <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data"
+                                        caption="Universal Serial Interface"/>
+                        <signals>
+                            <signal group="DI" function="default" pad="PE5"/>
+                            <signal group="DO" function="default" pad="PE6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                            <signal group="USCK" function="default" pad="PE4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="4" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="5" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="10" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="12" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="13" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="14" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="15" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="16" name="USI_START" caption="USI Start Condition"/>
+                <interrupt index="17" name="USI_OVERFLOW" caption="USI Overflow"/>
+                <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="19" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="21" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="22" name="LCD" caption="LCD Start of Frame"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960B03F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x0b"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x06" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="External Reset Disable" mask="0x01" name="RSTDISBL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x26"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Universal Serial Interface" name="USI">
+            <register-group caption="Universal Serial Interface" name="USI">
+                <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+                <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+                    <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+                    <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+                    <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+                    <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+                    <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+                </register>
+                <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+                    <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+                    <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+                    <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+                    <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+                    <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+                    <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_USI_OP">
+                <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+                <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+                <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LCD" mask="0x10" name="PRLCD"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1"
+                          mask="0xFF" ocd-rw=""/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Liquid Crystal Display" name="LCD">
+            <register-group caption="Liquid Crystal Display" name="LCD">
+                <register caption="LCD Data Register 18" name="LCDDR18" offset="0xFE" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 17" name="LCDDR17" offset="0xFD" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 16" name="LCDDR16" offset="0xFC" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 15" name="LCDDR15" offset="0xFB" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 13" name="LCDDR13" offset="0xF9" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 12" name="LCDDR12" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 11" name="LCDDR11" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 10" name="LCDDR10" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 8" name="LCDDR8" offset="0xF4" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 7" name="LCDDR7" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 6" name="LCDDR6" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 5" name="LCDDR5" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 3" name="LCDDR3" offset="0xEF" size="1" mask="0x01"/>
+                <register caption="LCD Data Register 2" name="LCDDR2" offset="0xEE" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 1" name="LCDDR1" offset="0xED" size="1" mask="0xFF"/>
+                <register caption="LCD Data Register 0" name="LCDDR0" offset="0xEC" size="1" mask="0xFF"/>
+                <register caption="LCD Contrast Control Register" name="LCDCCR" offset="0xE7" size="1" mask="0xEF"/>
+                <register caption="LCD Frame Rate Register" name="LCDFRR" offset="0xE6" size="1">
+                    <bitfield caption="LCD Prescaler Selects" mask="0x70" name="LCDPS" values="LCD_PRESCALE"/>
+                    <bitfield caption="LCD Clock Dividers" mask="0x07" name="LCDCD" values="MISC_3BIT_COUNT"/>
+                </register>
+                <register caption="LCD Control and Status Register B" name="LCDCRB" offset="0xE5" size="1">
+                    <bitfield caption="LCD CLock Select" mask="0x80" name="LCDCS"/>
+                    <bitfield caption="LCD 1/2 Bias Select" mask="0x40" name="LCD2B"/>
+                    <bitfield caption="LCD Mux Selects" mask="0x30" name="LCDMUX"/>
+                    <bitfield caption="LCD Port Masks" mask="0x0F" name="LCDPM" values="LCD_PORT_MASK_4BIT"/>
+                </register>
+                <register caption="LCD Control Register A" name="LCDCRA" offset="0xE4" size="1" ocd-rw="R">
+                    <bitfield caption="LCD Enable" mask="0x80" name="LCDEN"/>
+                    <bitfield caption="LCD A or B waveform" mask="0x40" name="LCDAB"/>
+                    <bitfield caption="LCD Interrupt Flag" mask="0x10" name="LCDIF"/>
+                    <bitfield caption="LCD Interrupt Enable" mask="0x08" name="LCDIE"/>
+                    <bitfield caption="LCD Blanking" mask="0x01" name="LCDBL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LCD_PRESCALE">
+                <value caption="ClkLCD/16" name="VAL_0x00" value="0x00"/>
+                <value caption="ClkLCD/64" name="VAL_0x01" value="0x01"/>
+                <value caption="ClkLCD/128" name="VAL_0x02" value="0x02"/>
+                <value caption="ClkLCD/256" name="VAL_0x03" value="0x03"/>
+                <value caption="ClkLCD/512" name="VAL_0x04" value="0x04"/>
+                <value caption="ClkLCD/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="ClkLCD/2048" name="VAL_0x06" value="0x06"/>
+                <value caption="ClkLCD/4096" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="MISC_3BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="LCD_PORT_MASK_4BIT">
+                <value caption="SEG0:12" name="VAL_0x00" value="0x00"/>
+                <value caption="SEG0:14" name="VAL_0x01" value="0x01"/>
+                <value caption="SEG0:15" name="VAL_0x02" value="0x02"/>
+                <value caption="SEG0:18" name="VAL_0x03" value="0x03"/>
+                <value caption="SEG0:20" name="VAL_0x04" value="0x04"/>
+                <value caption="SEG0:22" name="VAL_0x05" value="0x05"/>
+                <value caption="SEG0:23" name="VAL_0x06" value="0x06"/>
+                <value caption="SEG0:24" name="VAL_0x07" value="0x07"/>
+                <value caption="SEG0:26" name="VAL_0x08" value="0x08"/>
+                <value caption="SEG0:28" name="VAL_0x09" value="0x09"/>
+                <value caption="SEG0:30" name="VAL_0x0A" value="0x0A"/>
+                <value caption="SEG0:32" name="VAL_0x0B" value="0x0B"/>
+                <value caption="SEG0:34" name="VAL_0x0C" value="0x0C"/>
+                <value caption="SEG0:36" name="VAL_0x0D" value="0x0D"/>
+                <value caption="SEG0:38" name="VAL_0x0E" value="0x0E"/>
+                <value caption="SEG0:39" name="VAL_0x0F" value="0x0F"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0xF0" name="PCIE"/>
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0xF0" name="PCIF"/>
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0x1F"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0x1F"/>
+                <register caption="Port G Input Pins" name="PING" offset="0x32" size="1" mask="0x3F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0A"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter2 Control Register" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2A"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter2 Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter2 Output Compare Flag 2" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Interrupt" mask="0x10" name="EXCLK"/>
+                    <bitfield caption="AS2: Asynchronous Timer/Counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="TCN2UB: Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="TCR2UB: Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP64" caption="TQFP64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+        <pinout name="QFN64" caption="QFN64">
+            <pin position="1" pad="LCDCAP"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="PG5"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml
new file mode 100644
index 00000000..b7d9b12e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64A.xml
@@ -0,0 +1,1429 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega64A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega64A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
+                 package="TQFP64" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN64"
+                 package="QFN64" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega64A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x1100" size="0xef00" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PE2"/>
+                            <signal group="AIN" index="1" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PF0"/>
+                            <signal group="ADC" index="1" function="default" pad="PF1"/>
+                            <signal group="ADC" index="2" function="default" pad="PF2"/>
+                            <signal group="ADC" index="3" function="default" pad="PF3"/>
+                            <signal group="ADC" index="4" function="default" pad="PF4"/>
+                            <signal group="ADC" index="5" function="default" pad="PF5"/>
+                            <signal group="ADC" index="6" function="default" pad="PF6"/>
+                            <signal group="ADC" index="7" function="default" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" function="default" pad="PB3"/>
+                            <signal group="MOSI" function="default" pad="PB2"/>
+                            <signal group="SCK" function="default" pad="PB1"/>
+                            <signal group="SS" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PD1"/>
+                            <signal group="SCL" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PE0"/>
+                            <signal group="TXD" function="default" pad="PE1"/>
+                            <signal group="XCK" function="default" pad="PE2"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PD2"/>
+                            <signal group="TXD" function="default" pad="PD3"/>
+                            <signal group="XCK" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                        <signals>
+                            <signal group="TCK" function="default" pad="PF4"/>
+                            <signal group="TMS" function="default" pad="PF5"/>
+                            <signal group="TDI" function="default" pad="PF7"/>
+                            <signal group="TDO" function="default" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="MISC">
+                    <instance name="MISC" caption="Other Registers">
+                        <register-group name="MISC" name-in-module="MISC" offset="0x00" address-space="data"
+                                        caption="Other Registers"/>
+                        <signals>
+                            <signal group="PDI" function="default" pad="PE0"/>
+                            <signal group="PDO" function="default" pad="PE1"/>
+                            <signal group="OC3C" function="default" pad="PE5"/>
+                            <signal group="TOSC" index="2" function="default" pad="PG3"/>
+                            <signal group="TOSC" index="1" function="default" pad="PG4"/>
+                            <signal group="WR" function="default" pad="PG0"/>
+                            <signal group="RD" function="default" pad="PG1"/>
+                            <signal group="A" index="8" function="default" pad="PC0"/>
+                            <signal group="A" index="9" function="default" pad="PC1"/>
+                            <signal group="A" index="10" function="default" pad="PC2"/>
+                            <signal group="A" index="11" function="default" pad="PC3"/>
+                            <signal group="A" index="12" function="default" pad="PC4"/>
+                            <signal group="A" index="13" function="default" pad="PC5"/>
+                            <signal group="A" index="14" function="default" pad="PC6"/>
+                            <signal group="A" index="15" function="default" pad="PC7"/>
+                            <signal group="ALE" function="default" pad="PG2"/>
+                            <signal group="AD" index="7" function="default" pad="PA7"/>
+                            <signal group="AD" index="6" function="default" pad="PA6"/>
+                            <signal group="AD" index="5" function="default" pad="PA5"/>
+                            <signal group="AD" index="4" function="default" pad="PA4"/>
+                            <signal group="AD" index="3" function="default" pad="PA3"/>
+                            <signal group="AD" index="2" function="default" pad="PA2"/>
+                            <signal group="AD" index="1" function="default" pad="PA1"/>
+                            <signal group="AD" index="0" function="default" pad="PA0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" function="default" pad="PD0"/>
+                            <signal group="INT" index="1" function="default" pad="PD1"/>
+                            <signal group="INT" index="2" function="default" pad="PD2"/>
+                            <signal group="INT" index="3" function="default" pad="PD3"/>
+                            <signal group="INT" index="4" function="default" pad="PE4"/>
+                            <signal group="INT" index="5" function="default" pad="PE5"/>
+                            <signal group="INT" index="6" function="default" pad="PE6"/>
+                            <signal group="INT" index="7" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PA0" index="0"/>
+                            <signal group="P" function="default" pad="PA1" index="1"/>
+                            <signal group="P" function="default" pad="PA2" index="2"/>
+                            <signal group="P" function="default" pad="PA3" index="3"/>
+                            <signal group="P" function="default" pad="PA4" index="4"/>
+                            <signal group="P" function="default" pad="PA5" index="5"/>
+                            <signal group="P" function="default" pad="PA6" index="6"/>
+                            <signal group="P" function="default" pad="PA7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                            <signal group="P" function="default" pad="PE4" index="4"/>
+                            <signal group="P" function="default" pad="PE5" index="5"/>
+                            <signal group="P" function="default" pad="PE6" index="6"/>
+                            <signal group="P" function="default" pad="PE7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PF0" index="0"/>
+                            <signal group="P" function="default" pad="PF1" index="1"/>
+                            <signal group="P" function="default" pad="PF2" index="2"/>
+                            <signal group="P" function="default" pad="PF3" index="3"/>
+                            <signal group="P" function="default" pad="PF4" index="4"/>
+                            <signal group="P" function="default" pad="PF5" index="5"/>
+                            <signal group="P" function="default" pad="PF6" index="6"/>
+                            <signal group="P" function="default" pad="PF7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PG0" index="0"/>
+                            <signal group="P" function="default" pad="PG1" index="1"/>
+                            <signal group="P" function="default" pad="PG2" index="2"/>
+                            <signal group="P" function="default" pad="PG3" index="3"/>
+                            <signal group="P" function="default" pad="PG4" index="4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB5"/>
+                            <signal group="OCB" function="default" pad="PB6"/>
+                            <signal group="OCC" function="default" pad="PB7"/>
+                            <signal group="T" function="default" pad="PD6"/>
+                            <signal group="ICP" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PE3"/>
+                            <signal group="OCB" function="default" pad="PE4"/>
+                            <signal group="T" function="default" pad="PE6"/>
+                            <signal group="ICP" function="default" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD7"/>
+                            <signal group="OC" function="default" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="10" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMP" caption="Timer/Counter0 Compare Match"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="19" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+                <interrupt index="20" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="25" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="26" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="27" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="28" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="29" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="30" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="31" name="USART1_UDRE" caption="USART1, Data Register Empty"/>
+                <interrupt index="32" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="33" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="34" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0960203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="2"/>
+                    <property name="OCD_DATAREG" value="0x22"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x01"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
+                    <bitfield caption="ATmega103 Compatibility Mode" mask="0x02" name="M103C"/>
+                    <bitfield caption="Watchdog Timer always on" mask="0x01" name="WDTON"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x26" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x8E" size="1">
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x70" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x74" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x71" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x73" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x72" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x95" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL0" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR0H" offset="0x90" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR0L" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0x9C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x9B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x9A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x9D" size="1">
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL1" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRR1H" offset="0x98" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRR1L" offset="0x99" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="External SRAM Wait State Select" mask="0x40" name="SRW10"/>
+                    <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x18" name="SM"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x04" name="SM2" values="CPU_SLEEP_MODE_2BITS1"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="External Memory Control Register A" name="XMCRA" offset="0x6D" size="1">
+                    <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS"/>
+                    <bitfield caption="Wait state select bit lower page" mask="0x0C" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait state select bit upper page" mask="0x02" name="SRW11"/>
+                </register>
+                <register caption="External Memory Control Register B" name="XMCRB" offset="0x6C" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x6F" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="XTAL Divide Control Register" name="XDIV" offset="0x5C" size="1">
+                    <bitfield caption="XTAL Divide Enable" mask="0x80" name="XDIVEN"/>
+                    <bitfield caption="XTAl Divide Select Bits" mask="0x7F" name="XDIV"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x1100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x1100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x1100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x1100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x1100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x1100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x1100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz " name="1_0_MHz_"/>
+                <value value="0x01" caption="2.0 MHz " name="2_0_MHz_"/>
+                <value value="0x02" caption="4.0 MHz " name="4_0_MHz_"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_2BITS1">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x02"/>
+                <value caption="Power Down" name="PDOWN" value="0x04"/>
+                <value caption="Power Save" name="PSAVE" value="0x06"/>
+                <value caption="Standby" name="STDBY" value="0x05"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x68" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x42" size="1"
+                          ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Bits" mask="0xFF" name="OCDR"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Other Registers" name="MISC">
+            <register-group caption="Other Registers" name="MISC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull Up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter3, Timer/Counter2, and Timer/Counter1" mask="0x01"
+                              name="PSR321"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x59" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Data Register, Port E" name="PORTE" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port E" name="DDRE" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port E" name="PINE" offset="0x21" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Data Register, Port F" name="PORTF" offset="0x62" size="1" mask="0xFF"/>
+                <register caption="Data Direction Register, Port F" name="DDRF" offset="0x61" size="1" mask="0xFF"/>
+                <register caption="Input Pins, Port F" name="PINF" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Data Register, Port G" name="PORTG" offset="0x65" size="1" mask="0x1F"/>
+                <register caption="Data Direction Register, Port G" name="DDRG" offset="0x64" size="1" mask="0x1F"/>
+                <register caption="Input Pins, Port G" name="PING" offset="0x63" size="1" mask="0x1F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x51" size="1" mask="0xFF"/>
+                <register caption="Asynchronus Status Register" name="ASSR" offset="0x50" size="1">
+                    <bitfield caption="Asynchronus Timer/Counter 0" mask="0x08" name="AS0"/>
+                    <bitfield caption="Timer/Counter0 Update Busy" mask="0x04" name="TCN0UB"/>
+                    <bitfield caption="Output Compare register 0 Busy" mask="0x02" name="OCR0UB"/>
+                    <bitfield caption="Timer/Counter Control Register 0 Update Busy" mask="0x01" name="TCR0UB"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x02" name="PSR0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter 1, Output Compare Match C Interrupt Enable" mask="0x01"
+                              name="OCIE1C"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1, Output Compare C Match Flag" mask="0x01" name="OCF1C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x7A" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1C" offset="0x78" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Extended Timer/Counter Interrupt Mask Register" name="ETIMSK" offset="0x7D" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="TICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x04" name="TOIE3"/>
+                    <bitfield caption="Timer/Counter3, Output Compare Match Interrupt Enable" mask="0x02"
+                              name="OCIE3C"/>
+                </register>
+                <register caption="Extended Timer/Counter Interrupt Flag register" name="ETIFR" offset="0x7C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Output Compare Flag 3A" mask="0x10" name="OCF3A"/>
+                    <bitfield caption="Output Compare Flag 3B" mask="0x08" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x04" name="TOV3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x02" name="OCF3C"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x40" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset, T/C3, T/C2, T/C1" mask="0x01" name="PSR321"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x8B" size="1">
+                    <bitfield caption="Compare Output Mode 3A, bits" mask="0xC0" name="COM3A"/>
+                    <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
+                    <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
+                    <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM3"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x8A" size="1">
+                    <bitfield caption="Input Capture 3  Noise Canceler" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
+                    <bitfield caption="Clock Select3 bits" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x8C" size="1">
+                    <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x88" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x84" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output compare Register C  Bytes" name="OCR3C" offset="0x82" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x80" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC2">
+                <register caption="Timer/Counter Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Wafeform Generation Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Mode" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR2" offset="0x43" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="" name="TIMSK" offset="0x57" size="1">
+                    <bitfield caption="" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="" mask="0x40" name="TOIE2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN64" caption="TQFPQFN64">
+            <pin position="1" pad="PEN"/>
+            <pin position="2" pad="PE0"/>
+            <pin position="3" pad="PE1"/>
+            <pin position="4" pad="PE2"/>
+            <pin position="5" pad="PE3"/>
+            <pin position="6" pad="PE4"/>
+            <pin position="7" pad="PE5"/>
+            <pin position="8" pad="PE6"/>
+            <pin position="9" pad="PE7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="PB6"/>
+            <pin position="17" pad="PB7"/>
+            <pin position="18" pad="PG3"/>
+            <pin position="19" pad="PG4"/>
+            <pin position="20" pad="RESET"/>
+            <pin position="21" pad="VCC"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="XTAL2"/>
+            <pin position="24" pad="XTAL1"/>
+            <pin position="25" pad="PD0"/>
+            <pin position="26" pad="PD1"/>
+            <pin position="27" pad="PD2"/>
+            <pin position="28" pad="PD3"/>
+            <pin position="29" pad="PD4"/>
+            <pin position="30" pad="PD5"/>
+            <pin position="31" pad="PD6"/>
+            <pin position="32" pad="PD7"/>
+            <pin position="33" pad="PG0"/>
+            <pin position="34" pad="PG1"/>
+            <pin position="35" pad="PC0"/>
+            <pin position="36" pad="PC1"/>
+            <pin position="37" pad="PC2"/>
+            <pin position="38" pad="PC3"/>
+            <pin position="39" pad="PC4"/>
+            <pin position="40" pad="PC5"/>
+            <pin position="41" pad="PC6"/>
+            <pin position="42" pad="PC7"/>
+            <pin position="43" pad="PG2"/>
+            <pin position="44" pad="PA7"/>
+            <pin position="45" pad="PA6"/>
+            <pin position="46" pad="PA5"/>
+            <pin position="47" pad="PA4"/>
+            <pin position="48" pad="PA3"/>
+            <pin position="49" pad="PA2"/>
+            <pin position="50" pad="PA1"/>
+            <pin position="51" pad="PA0"/>
+            <pin position="52" pad="VCC"/>
+            <pin position="53" pad="GND"/>
+            <pin position="54" pad="PF7"/>
+            <pin position="55" pad="PF6"/>
+            <pin position="56" pad="PF5"/>
+            <pin position="57" pad="PF4"/>
+            <pin position="58" pad="PF3"/>
+            <pin position="59" pad="PF2"/>
+            <pin position="60" pad="PF1"/>
+            <pin position="61" pad="PF0"/>
+            <pin position="62" pad="AREF"/>
+            <pin position="63" pad="GND"/>
+            <pin position="64" pad="AVCC"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml
new file mode 100644
index 00000000..80658986
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64C1.xml
@@ -0,0 +1,1378 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega64C1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64C1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega64C1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal function="AC" group="ACMP" index="0" pad="PD7"/>
+                            <signal function="AC" group="ACMP" index="1" pad="PC6"/>
+                            <signal function="AC" group="ACMP" index="2" pad="PD5"/>
+                            <signal function="AC" group="ACMP" index="3" pad="PC5"/>
+                            <signal function="AC" group="ACMPN" index="0" pad="PB2"/>
+                            <signal function="AC" group="ACMPN" index="1" pad="PB5"/>
+                            <signal function="AC" group="ACMPN" index="2" pad="PD6"/>
+                            <signal function="AC" group="ACMPN" index="3" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                        <signals>
+                            <signal function="DAC" group="D2A" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal function="TC0" group="T0" pad="PC2"/>
+                            <signal function="TC0" group="OC0A" pad="PD3"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal function="TC1" group="T1" pad="PC3"/>
+                            <signal function="TC1" group="ICP1A" pad="PD4"/>
+                            <signal function="TC1" group="ICP1B" pad="PC3"/>
+                            <signal function="TC1" group="OC1A" pad="PD2"/>
+                            <signal function="TC1" group="OC1B" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PE2"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB7"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PC4"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PC5"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LINUART">
+                    <instance name="LINUART" caption="Local Interconnect Network">
+                        <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
+                                        caption="Local Interconnect Network"/>
+                        <signals>
+                            <signal function="LIN" group="TXLIN" pad="PD3"/>
+                            <signal function="LIN" group="RXLIN" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal function="SPI" group="MISO" pad="PB0"/>
+                            <signal function="SPI_ALT" group="MISO" pad="PD2"/>
+                            <signal function="SPI" group="MOSI" pad="PB1"/>
+                            <signal function="SPI_ALT" group="MOSI" pad="PD3"/>
+                            <signal function="SPI" group="SCK" pad="PB7"/>
+                            <signal function="SPI_ALT" group="SCK" pad="PD4"/>
+                            <signal function="SPI" group="SS" pad="PD3"/>
+                            <signal function="SPI_ALT" group="SS" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal function="EXINT" group="INT" index="0" pad="PD6"/>
+                            <signal function="EXINT" group="INT" index="1" pad="PB2"/>
+                            <signal function="EXINT" group="INT" index="2" pad="PB5"/>
+                            <signal function="EXINT" group="INT" index="3" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="0" pad="PB0"/>
+                            <signal function="EXINT" group="PCINT" index="1" pad="PB1"/>
+                            <signal function="EXINT" group="PCINT" index="2" pad="PB2"/>
+                            <signal function="EXINT" group="PCINT" index="3" pad="PB3"/>
+                            <signal function="EXINT" group="PCINT" index="4" pad="PB4"/>
+                            <signal function="EXINT" group="PCINT" index="5" pad="PB5"/>
+                            <signal function="EXINT" group="PCINT" index="6" pad="PB6"/>
+                            <signal function="EXINT" group="PCINT" index="7" pad="PB7"/>
+                            <signal function="EXINT" group="PCINT" index="8" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="9" pad="PC1"/>
+                            <signal function="EXINT" group="PCINT" index="10" pad="PC2"/>
+                            <signal function="EXINT" group="PCINT" index="11" pad="PC3"/>
+                            <signal function="EXINT" group="PCINT" index="12" pad="PC4"/>
+                            <signal function="EXINT" group="PCINT" index="13" pad="PC5"/>
+                            <signal function="EXINT" group="PCINT" index="14" pad="PC6"/>
+                            <signal function="EXINT" group="PCINT" index="15" pad="PC7"/>
+                            <signal function="EXINT" group="PCINT" index="16" pad="PD0"/>
+                            <signal function="EXINT" group="PCINT" index="17" pad="PD1"/>
+                            <signal function="EXINT" group="PCINT" index="18" pad="PD2"/>
+                            <signal function="EXINT" group="PCINT" index="19" pad="PD3"/>
+                            <signal function="EXINT" group="PCINT" index="20" pad="PD4"/>
+                            <signal function="EXINT" group="PCINT" index="21" pad="PD5"/>
+                            <signal function="EXINT" group="PCINT" index="22" pad="PD6"/>
+                            <signal function="EXINT" group="PCINT" index="23" pad="PD7"/>
+                            <signal function="EXINT" group="PCINT" index="24" pad="PE0"/>
+                            <signal function="EXINT" group="PCINT" index="25" pad="PE1"/>
+                            <signal function="EXINT" group="PCINT" index="26" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
+                <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
+                <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
+                <interrupt index="4" name="ANACOMP3" caption="Analog Comparator 3"/>
+                <interrupt index="5" name="PSC_FAULT" caption="PSC Fault"/>
+                <interrupt index="6" name="PSC_EC" caption="PSC End of Cycle"/>
+                <interrupt index="7" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="8" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="9" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="10" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer1/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="16" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CAN_INT" caption="CAN MOB, Burst, General Errors"/>
+                <interrupt index="19" name="CAN_TOVF" caption="CAN Timer Overflow"/>
+                <interrupt index="20" name="LIN_TC" caption="LIN Transfer Complete"/>
+                <interrupt index="21" name="LIN_ERR" caption="LIN Error"/>
+                <interrupt index="22" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="23" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="24" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="25" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="26" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="27" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="28" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+                <interrupt index="29" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="30" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9686"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x86"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
+                    <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
+                    <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVFG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register Flags" name="CANGIT" offset="0xDA" size="1">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer Flag" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt Flag" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General Flag" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General Flag" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General Flag" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General Flag" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off Interrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
+                          ocd-rw=""/>
+                <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
+                    <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="CAN Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width bits" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment bits" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="CAN Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segment 2 bits" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1 bits" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="Timer Register Low" name="CANTIML" offset="0xE6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="Timer Register High" name="CANTIMH" offset="0xE7" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="TTC Timer Register Low" name="CANTTCL" offset="0xE8" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="TTC Timer Register High" name="CANTTCH" offset="0xE9" size="1" mask="0xFF"
+                          ocd-rw=""/>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment (Active Low)" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning on MOb" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK on MOb" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK on MOb" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error on MOb" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error on MOb" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error on MOb" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error on MOb" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error on MOb" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1">
+                    <bitfield caption="" mask="0xF8" name="IDT"/>
+                    <bitfield caption="" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF"/>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF"/>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF"/>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1" mask="0xFD"/>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1" mask="0xFF"/>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="Time Stamp Register Low" name="CANSTML" offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="Time Stamp Register High" name="CANSTMH" offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bits" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
+                    <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register High Byte" name="DACH" offset="0x92" size="1" ocd-rw="">
+                    <bitfield caption="DAC Data Register High Byte Bits" mask="0xFF" name="DACH"/>
+                </register>
+                <register caption="DAC Data Register Low Byte" name="DACL" offset="0x91" size="1" ocd-rw="">
+                    <bitfield caption="DAC Data Register Low Byte Bits" mask="0xFF" name="DACL"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction CAN" mask="0x40" name="PRCAN"/>
+                    <bitfield caption="Power Reduction PSC" mask="0x20" name="PRPSC"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction LIN UART" mask="0x02" name="PRLIN"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer1 Input Capture Selection Bit" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"
+                              values="ANALOG_ADC_MUXPOS"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
+                    <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AMP2P Pin Digital input Disable" mask="0x40" name="AMP2PD"/>
+                    <bitfield caption="ACMP0 Pin Digital input Disable" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="AMP0P Pin Digital input Disable" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="AMP0N Pin Digital input Disable" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="ADC10 Pin Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Pin Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Pin Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="" name="AMP0CSR" offset="0x75" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="Amplifier 0 - Comparator 0 Connection" mask="0x08" name="AMPCMP0"/>
+                    <bitfield caption="" mask="0x07" name="AMP0TS"/>
+                </register>
+                <register caption="" name="AMP1CSR" offset="0x76" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="Amplifier 1 - Comparator 1 Connection" mask="0x08" name="AMPCMP1"/>
+                    <bitfield caption="" mask="0x07" name="AMP1TS"/>
+                </register>
+                <register caption="" name="AMP2CSR" offset="0x77" size="1">
+                    <bitfield caption="" mask="0x80" name="AMP2EN"/>
+                    <bitfield caption="" mask="0x40" name="AMP2IS"/>
+                    <bitfield caption="" mask="0x30" name="AMP2G"/>
+                    <bitfield caption="Amplifier 2 - Comparator 2 Connection" mask="0x08" name="AMPCMP2"/>
+                    <bitfield caption="" mask="0x07" name="AMP2TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC reference" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ANALOG_ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="ADC0" value="0x0"/>
+                <value caption="ADC input pin 1" name="ADC1" value="0x1"/>
+                <value caption="ADC input pin 2" name="ADC2" value="0x2"/>
+                <value caption="ADC input pin 3" name="ADC3" value="0x3"/>
+                <value caption="ADC input pin 4" name="ADC4" value="0x4"/>
+                <value caption="ADC input pin 5" name="ADC5" value="0x5"/>
+                <value caption="ADC input pin 6" name="ADC6" value="0x6"/>
+                <value caption="ADC input pin 7" name="ADC7" value="0x7"/>
+                <value caption="ADC input pin 8" name="ADC8" value="0x8"/>
+                <value caption="ADC input pin 9" name="ADC9" value="0x9"/>
+                <value caption="ADC input pin 10" name="ADC10" value="0xA"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0xB"/>
+                <value caption="Internal VCC / 4" name="VCC4" value="0xC"/>
+                <value caption="Current source" name="ISRC" value="0xD"/>
+                <value caption="Analog Differential Amplifier 0" name="AMP0" value="0xE"/>
+                <value caption="Analog Differential Amplifier 1" name="AMP1" value="0xF"/>
+                <value caption="Analog Differential Amplifier 2" name="AMP2" value="0x10"/>
+                <value caption="Bandgap" name="BNDGAP" value="0x11"/>
+                <value caption="0V (GND)" name="GND" value="0x12"/>
+            </value-group>
+        </module>
+        <module caption="Local Interconnect Network" name="LINUART">
+            <register-group caption="Local Interconnect Network" name="LINUART">
+                <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+                    <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+                    <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+                    <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+                    <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+                    <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+                </register>
+                <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+                    <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+                    <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+                    <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+                    <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+                    <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+                    <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+                </register>
+                <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+                    <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+                    <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+                    <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+                    <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+                </register>
+                <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+                    <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+                    <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+                    <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+                    <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+                    <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+                    <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+                    <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+                    <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+                </register>
+                <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+                    <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+                    <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+                </register>
+                <register caption="LIN Baud Rate Low Register" name="LINBRRL" offset="0xCD" size="1">
+                    <bitfield caption="" mask="0xFF" name="LDIV"/>
+                </register>
+                <register caption="LIN Baud Rate High Register" name="LINBRRH" offset="0xCE" size="1">
+                    <bitfield caption="" mask="0x0F" name="LDIV" lsb="8"/>
+                </register>
+                <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+                    <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+                    <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+                </register>
+                <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+                    <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+                    <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+                </register>
+                <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+                    <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+                    <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+                </register>
+                <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1">
+                    <bitfield caption="" mask="0xFF" name="LDATA"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6D" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x07" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6C" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6A" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD2"/>
+            <pin position="2" pad="PD3"/>
+            <pin position="3" pad="PC1"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PC2"/>
+            <pin position="7" pad="PC3"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PE1"/>
+            <pin position="11" pad="PE2"/>
+            <pin position="12" pad="PD4"/>
+            <pin position="13" pad="PD5"/>
+            <pin position="14" pad="PD6"/>
+            <pin position="15" pad="PD7"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PC4"/>
+            <pin position="18" pad="PC5"/>
+            <pin position="19" pad="AVCC"/>
+            <pin position="20" pad="AGND"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="PC6"/>
+            <pin position="23" pad="PB3"/>
+            <pin position="24" pad="PB4"/>
+            <pin position="25" pad="PC7"/>
+            <pin position="26" pad="PB5"/>
+            <pin position="27" pad="PB6"/>
+            <pin position="28" pad="PB7"/>
+            <pin position="29" pad="PD0"/>
+            <pin position="30" pad="PC0"/>
+            <pin position="31" pad="PE0"/>
+            <pin position="32" pad="PD1"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64HVE2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64HVE2.xml
new file mode 100644
index 00000000..95472c7c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64HVE2.xml
@@ -0,0 +1,932 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="3.0" vccmax="3.6"/>
+    </variants>
+    <devices>
+        <device name="ATmega64HVE2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="LINUART">
+                    <instance name="LINUART" caption="Local Interconnect Network">
+                        <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
+                                        caption="Local Interconnect Network"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="WAKEUP_TIMER">
+                    <instance name="WAKEUP_TIMER" caption="Wakeup Timer">
+                        <register-group name="WAKEUP_TIMER" name-in-module="WAKEUP_TIMER" offset="0x00"
+                                        address-space="data" caption="Wakeup Timer"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt 0"/>
+                <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt 1"/>
+                <interrupt index="4" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="5" name="WAKEUP" caption="Wakeup Timer Overflow"/>
+                <interrupt index="6" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="7" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="8" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="9" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="10" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="11" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="12" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="13" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="14" name="LIN_STATUS" caption="LIN Status Interrupt"/>
+                <interrupt index="15" name="LIN_ERROR" caption="LIN Error Interrupt"/>
+                <interrupt index="16" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="17" name="VADC_CONV" caption="Voltage ADC Instantaneous Conversion Complete"/>
+                <interrupt index="18" name="VADC_ACC" caption="Voltage ADC Accumulated Conversion Complete"/>
+                <interrupt index="19" name="CADC_CONV" caption="C-ADC Instantaneous Conversion Complete"/>
+                <interrupt index="20" name="CADC_REG_CUR" caption="C-ADC Regular Current"/>
+                <interrupt index="21" name="CADC_ACC" caption="C-ADC Accumulated Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="SPM" caption="SPM Ready"/>
+                <interrupt index="24" name="PLL" caption="PLL Lock Change Interrupt"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVSP" type="hvsp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9610"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x10"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="64"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="HVSP_INTERFACE_STK600">
+                    <property name="HvspControlStack"
+                              value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                    <property name="HvspEnterProgMode_stabDelay" value="100"/>
+                    <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+                    <property name="HvspEnterProgMode_synchCycles" value="6"/>
+                    <property name="HvspEnterProgMode_latchCycles" value="1"/>
+                    <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+                    <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+                    <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+                    <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+                    <property name="HvspLeaveProgMode_stabDelay" value="101"/>
+                    <property name="HvspLeaveProgMode_resetDelay" value="26"/>
+                    <property name="HvspChipErase_pollTimeout" value="40"/>
+                    <property name="HvspChipErase_eraseTime" value="1"/>
+                    <property name="HvspProgramFlash_mode" value="0x0D"/>
+                    <property name="HvspProgramFlash_blockSize" value="256"/>
+                    <property name="HvspProgramFlash_pollTimeout" value="6"/>
+                    <property name="HvspReadFlash_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_mode" value="0x05"/>
+                    <property name="HvspProgramEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+                    <property name="HvspReadEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramFuse_pollTimeout" value="25"/>
+                    <property name="HvspProgramLock_pollTimeout" value="25"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="HVSP_INTERFACE">
+                    <property name="HvspControlStack"
+                              value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                    <property name="HvspEnterProgMode_stabDelay" value="100"/>
+                    <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+                    <property name="HvspEnterProgMode_synchCycles" value="6"/>
+                    <property name="HvspEnterProgMode_latchCycles" value="1"/>
+                    <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+                    <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+                    <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+                    <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+                    <property name="HvspLeaveProgMode_stabDelay" value="101"/>
+                    <property name="HvspLeaveProgMode_resetDelay" value="26"/>
+                    <property name="HvspChipErase_pollTimeout" value="40"/>
+                    <property name="HvspChipErase_eraseTime" value="1"/>
+                    <property name="HvspProgramFlash_mode" value="0x0D"/>
+                    <property name="HvspProgramFlash_blockSize" value="256"/>
+                    <property name="HvspProgramFlash_pollTimeout" value="6"/>
+                    <property name="HvspReadFlash_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_mode" value="0x05"/>
+                    <property name="HvspProgramEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+                    <property name="HvspReadEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramFuse_pollTimeout" value="25"/>
+                    <property name="HvspProgramLock_pollTimeout" value="25"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xD7">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x10" name="BODEN"/>
+                    <bitfield caption="Divide clock by 8" mask="0x08" name="CKDIV8"/>
+                    <bitfield caption="Select start-up time" mask="0x6" name="SUT" values="ENUM_SUT"/>
+                    <bitfield caption="Oscillator select" mask="0x01" name="OSCSEL0"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xF9">
+                    <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 14 CK + 0 ms" name="14CK_0MS" value="0x00"/>
+                <value caption="Start-up time 14 CK + 16 ms" name="14CK_16MS" value="0x01"/>
+                <value caption="Start-up time 14 CK + 32 ms" name="14CK_32MS" value="0x02"/>
+                <value caption="Start-up time 14 CK + 64 ms" name="14CK_64MS" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x03FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" values="CLK_SEL_3BIT_EXT" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer Counter 0  Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 0A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 0 Input Capture Flag" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="Port B Override" name="PBOV" offset="0xdc" size="1">
+                    <bitfield caption="Port B Override Change Enable" mask="0x80" name="PBOVCE"/>
+                    <bitfield caption="Port B Override Enable 3" mask="0x08" name="PBOE3"/>
+                    <bitfield caption="Port B Override Enable 0" mask="0x01" name="PBOE0"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Lock Bit Set" mask="0x08" name="LBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="ADC Synchronization Control and Status Register" name="ADSCSRA" offset="0xe0"
+                          size="1">
+                    <bitfield caption="Synchronization Busy" mask="0x04" name="SBSY"/>
+                    <bitfield caption="Synchronization Command" mask="0x03" name="SCMD"
+                              values="SYNCHRONIZATION_COMMAND"/>
+                </register>
+                <register caption="ADC Synchronization Control and Status Register" name="ADSCSRB" offset="0xe1"
+                          size="1">
+                    <bitfield caption="V-ADC Instantaneous Conversion Polarity Status" mask="0x40" name="VADICPS"/>
+                    <bitfield caption="VADAC Data Read Out Busy" mask="0x20" name="VADACRB"/>
+                    <bitfield caption="VADIC Data Read Out Busy" mask="0x10" name="VADICRB"/>
+                    <bitfield caption="C-ADC Instantaneous Conversion Polarity Status" mask="0x04" name="CADICPS"/>
+                    <bitfield caption="CADAC Data Read Out Busy" mask="0x02" name="CADACRB"/>
+                    <bitfield caption="CADIC Data Read Out Busy" mask="0x01" name="CADICRB"/>
+                </register>
+                <register caption="ADC Control Register A" name="ADCRA" offset="0xe2" size="1">
+                    <bitfield caption="ADC Polarity Select" mask="0x08" name="ADPSEL"/>
+                    <bitfield caption="C-ADC Chopper Mode Select" mask="0x06" name="ADCMS"
+                              values="C_ADC_CHOPPER_MODE_SELECT"/>
+                    <bitfield caption="Sampling Clock Select" mask="0x01" name="CKSEL" values="SAMPLING_CLOCK_SELECT"/>
+                </register>
+                <register caption="ADC Control Register B" name="ADCRB" offset="0xe3" size="1">
+                    <bitfield caption="Instantaneous Decimation Ratio Select" mask="0x18" name="ADIDES"
+                              values="INSTANTANEOUS_DECIMATION_RATIO_SELECT"/>
+                    <bitfield caption="Accumulated Decimation Ratio Select" mask="0x07" name="ADADES"
+                              values="ACCUMULATED_DECIMATION_RATIO_SELECT"/>
+                </register>
+                <register caption="ADC Control Register B" name="ADCRC" offset="0xe4" size="1">
+                    <bitfield caption="C-ADC Enable" mask="0x80" name="CADEN"/>
+                    <bitfield caption="C-ADC Regular Current Comparator Mode" mask="0x30" name="CADRCM"
+                              values="C_ADC_REGULAR_CURRENT_COMPARATOR_MODE"/>
+                    <bitfield caption="C-ADC Regular Current Count Threshold" mask="0x0F" name="CADRCT"
+                              values="MISC_4BIT_COUNT"/>
+                </register>
+                <register caption="ADC Control Register D" name="ADCRD" offset="0xe5" size="1">
+                    <bitfield caption="C-ADC Gain" mask="0x38" name="CADG" values="C_ADC_INPUT_GAIN"/>
+                    <bitfield caption="C-ADC Pin Diagnostics Mode" mask="0x06" name="CADPDM"
+                              values="C_ADC_PIN_DIAGNOSIS_MODE"/>
+                    <bitfield caption="C-ADC Diagnostics Channel Select" mask="0x01" name="CADDSEL"/>
+                </register>
+                <register caption="ADC Control Register E" name="ADCRE" offset="0xe6" size="1">
+                    <bitfield caption="V-ADC Enable" mask="0x80" name="VADEN"/>
+                    <bitfield caption="V-ADC Reference Select" mask="0x20" name="VADREFS"
+                              values="V_ADC_REFERENCE_SELECT"/>
+                    <bitfield caption="V-ADC Pin Diagnostics Mode" mask="0x18" name="VADPDM"
+                              values="V_ADC_PIN_DIAGNOSIS_MODE"/>
+                    <bitfield caption="V-ADC Channel Select" mask="0x07" name="VADMUX" values="V_ADC_CHANNEL_SELECT"/>
+                </register>
+                <register caption="ADC Interrupt Flag Register" name="ADIFR" offset="0xe7" size="1">
+                    <bitfield caption="V-ADC Accumulated Voltage Interrupt Flag" mask="0x20" name="VADACIF"/>
+                    <bitfield caption="V-DAC Instantaneous Voltage Interrupt Flag" mask="0x10" name="VADICIF"/>
+                    <bitfield caption="C-ADC Regulator Current Interrupt Flag" mask="0x04" name="CADRCIF"/>
+                    <bitfield caption="C-ADC Accumulated Current Interrupt Flag" mask="0x02" name="CADACIF"/>
+                    <bitfield caption="C-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="ADC Interrupt Mask Register" name="ADIMR" offset="0xe8" size="1">
+                    <bitfield caption="V-ADC Accumulated Voltage Interrupt Enable" mask="0x20" name="VADACIE"/>
+                    <bitfield caption="V-DAC Instantaneous Voltage Interrupt Enable" mask="0x10" name="VADICIE"/>
+                    <bitfield caption="C-ADC Regulator Current Interrupt Enable" mask="0x04" name="CADRCIE"/>
+                    <bitfield caption="C-ADC Accumulated Current Interrupt Enable" mask="0x02" name="CADACIE"/>
+                    <bitfield caption="C-ADC Instantaneous Current Interrupt Enable" mask="0x01" name="CADICIE"/>
+                </register>
+                <register caption="CC-ADC Regulator Current Comparator Threshold Level" name="CADRCL" offset="0xe9"
+                          size="2" mask="0xFFFF"/>
+                <register caption="V-ADC Instantaneous Conversion Result" name="VADIC" offset="0xf1" size="2"
+                          mask="0xFFFF"/>
+                <register caption="V-ADC Accumulated Conversion Result" name="VADAC3" offset="0xf6" size="1"
+                          mask="0xFF"/>
+                <register caption="V-ADC Accumulated Conversion Result" name="VADAC2" offset="0xf5" size="1"
+                          mask="0xFF"/>
+                <register caption="V-ADC Accumulated Conversion Result" name="VADAC1" offset="0xf4" size="1"
+                          mask="0xFF"/>
+                <register caption="V-ADC Accumulated Conversion Result" name="VADAC0" offset="0xf3" size="1"
+                          mask="0xFF"/>
+                <register caption="C-ADC Instantaneous Conversion Result" name="CADIC" offset="0xeb" size="2"
+                          mask="0xFFFF"/>
+                <register caption="C-ADC Accumulated Conversion Result" name="CADAC3" offset="0xf0" size="1"
+                          mask="0xFF"/>
+                <register caption="C-ADC Accumulated Conversion Result" name="CADAC2" offset="0xef" size="1"
+                          mask="0xFF"/>
+                <register caption="C-ADC Accumulated Conversion Result" name="CADAC1" offset="0xee" size="1"
+                          mask="0xFF"/>
+                <register caption="C-ADC Accumulated Conversion Result" name="CADAC0" offset="0xed" size="1"
+                          mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="SYNCHRONIZATION_COMMAND">
+                <value caption="Reserved" name="VAL_0x00" value="0x00"/>
+                <value caption="Reset and Synchronize" name="VAL_0x01" value="0x01"/>
+                <value caption="Synchronize on next Instantaneous Conversion" name="VAL_0x02" value="0x02"/>
+                <value caption="Synchronize on next Accumulated Conversion" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="C_ADC_CHOPPER_MODE_SELECT">
+                <value caption="Chopping Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Automatic Fast Chopping" name="VAL_0x01" value="0x01"/>
+                <value caption="Automatic Slow Chopping" name="VAL_0x02" value="0x02"/>
+                <value caption="Software Polarity Control" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="SAMPLING_CLOCK_SELECT">
+                <value caption="PLL (512kHz output) as sampling clock" name="VAL_0x00" value="0x00"/>
+                <value caption="Slow RC Oscillator as sampling clock" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="INSTANTANEOUS_DECIMATION_RATIO_SELECT">
+                <value caption="512" name="VAL_0x00" value="0x00"/>
+                <value caption="256" name="VAL_0x01" value="0x01"/>
+                <value caption="128" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ACCUMULATED_DECIMATION_RATIO_SELECT">
+                <value caption="512" name="VAL_0x00" value="0x00"/>
+                <value caption="256" name="VAL_0x01" value="0x01"/>
+                <value caption="128" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+                <value caption="32" name="VAL_0x04" value="0x04"/>
+                <value caption="16" name="VAL_0x05" value="0x05"/>
+                <value caption="8" name="VAL_0x06" value="0x06"/>
+                <value caption="4" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="C_ADC_REGULAR_CURRENT_COMPARATOR_MODE">
+                <value caption="Comparator Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Comparator Enabled. Regular Current Counter counts up if Accumulated Current is above threshold and is reset if Accumulated Current is below threshold."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="Comparator Enabled. Regular Current Counter counts up if Accumulated Current is above threshold and down if Accumulated Current is below threshold."
+                       name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="MISC_4BIT_COUNT">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="3" name="VAL_0x02" value="0x02"/>
+                <value caption="4" name="VAL_0x03" value="0x03"/>
+                <value caption="5" name="VAL_0x04" value="0x04"/>
+                <value caption="6" name="VAL_0x05" value="0x05"/>
+                <value caption="7" name="VAL_0x06" value="0x06"/>
+                <value caption="8" name="VAL_0x07" value="0x07"/>
+                <value caption="9" name="VAL_0x08" value="0x08"/>
+                <value caption="10" name="VAL_0x09" value="0x09"/>
+                <value caption="11" name="VAL_0x0a" value="0x0a"/>
+                <value caption="12" name="VAL_0x0b" value="0x0b"/>
+                <value caption="13" name="VAL_0x0c" value="0x0c"/>
+                <value caption="14" name="VAL_0x0d" value="0x0d"/>
+                <value caption="15" name="VAL_0x0e" value="0x0e"/>
+                <value caption="16" name="VAL_0x0f" value="0x0f"/>
+            </value-group>
+            <value-group caption="" name="C_ADC_INPUT_GAIN">
+                <value caption="4x" name="VAL_0x00" value="0x00"/>
+                <value caption="8x" name="VAL_0x01" value="0x01"/>
+                <value caption="16x" name="VAL_0x02" value="0x02"/>
+                <value caption="32x" name="VAL_0x03" value="0x03"/>
+                <value caption="64x" name="VAL_0x04" value="0x04"/>
+                <value caption="128x" name="VAL_0x05" value="0x05"/>
+                <value caption="256x" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="C_ADC_PIN_DIAGNOSIS_MODE">
+                <value caption="No current source is enabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Current source on PI pin enabled" name="VAL_0x01" value="0x01"/>
+                <value caption="Current source on NI pin enabled" name="VAL_0x02" value="0x02"/>
+                <value caption="Current source on both PI/NI pins enabled" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="V_ADC_REFERENCE_SELECT">
+                <value caption="VREF as reference" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD/3 as reference (for diagnosis purpose)" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="V_ADC_PIN_DIAGNOSIS_MODE">
+                <value caption="No current source is enabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Current source on PV pin enabled" name="VAL_0x01" value="0x01"/>
+                <value caption="Current source on NV pin enabled" name="VAL_0x02" value="0x02"/>
+                <value caption="Current source on both PV/NV pins enabled" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="V_ADC_CHANNEL_SELECT">
+                <value caption="PV - NV" name="VAL_0x00" value="0x00"/>
+                <value caption="ADC0 - SGND" name="VAL_0x01" value="0x01"/>
+                <value caption="ADC1 - SGND" name="VAL_0x02" value="0x02"/>
+                <value caption="VTEMP - GND" name="VAL_0x03" value="0x03"/>
+                <value caption="DIAGNOSIS - GND (VREF/TBD)" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Control and Status Register A" name="BGCSRA" offset="0xd1" size="1">
+                    <bitfield caption="Band Gap Sample Configuration" mask="0x07" name="BGSC"/>
+                </register>
+                <register caption="Band Gap Calibration Register A" name="BGCRA" offset="0xd3" size="1">
+                    <bitfield caption="Band Gap Calibration Nominal" mask="0xFF" name="BGCN"/>
+                </register>
+                <register caption="Band Gap Calibration Register B" name="BGCRB" offset="0xd2" size="1">
+                    <bitfield caption="Band Gap Calibration Linear" mask="0xFF" name="BGCL"/>
+                </register>
+                <register caption="Band Gap Lock Register" name="BGLR" offset="0xd4" size="1">
+                    <bitfield caption="Band Gap Lock Enable" mask="0x02" name="BGPLE"/>
+                    <bitfield caption="Band Gap Lock" mask="0x01" name="BGPL"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Local Interconnect Network" name="LINUART">
+            <register-group caption="Local Interconnect Network" name="LINUART">
+                <register caption="LIN Control Register" name="LINCR" offset="0xc0" size="1">
+                    <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+                    <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+                    <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+                    <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+                    <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+                </register>
+                <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xc1" size="1">
+                    <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+                    <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+                    <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+                    <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+                    <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+                    <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+                </register>
+                <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xc2" size="1">
+                    <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+                    <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+                    <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+                    <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+                </register>
+                <register caption="LIN Error Register" name="LINERR" offset="0xc3" size="1" ocd-rw="R">
+                    <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+                    <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+                    <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+                    <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+                    <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+                    <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+                    <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+                    <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+                </register>
+                <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xc4" size="1">
+                    <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+                    <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+                </register>
+                <register caption="LIN Baud Rate Low Register" name="LINBRRL" offset="0xc5" size="1">
+                    <bitfield caption="" mask="0xFF" name="LDIV"/>
+                </register>
+                <register caption="LIN Baud Rate High Register" name="LINBRRH" offset="0xc6" size="1">
+                    <bitfield caption="" mask="0x0F" name="LDIV" lsb="8"/>
+                </register>
+                <register caption="LIN Data Length Register" name="LINDLR" offset="0xc7" size="1">
+                    <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+                    <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+                </register>
+                <register caption="LIN Identifier Register" name="LINIDR" offset="0xc8" size="1">
+                    <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+                    <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+                </register>
+                <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xc9" size="1">
+                    <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+                    <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+                </register>
+                <register caption="LIN Data Register" name="LINDAT" offset="0xcA" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0xFF" name="LDATA"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Slow Oscillator Calibration Register A" name="SOSCCALA" offset="0x66" size="1"
+                          mask="0xFF"/>
+                <register caption="Oscillator Calibration Register B" name="SOSCCALB" offset="0x67" size="1"
+                          mask="0xFF"/>
+                <register caption="PLL Control and Status Register" name="PLLCSR" offset="0xd8" size="1">
+                    <bitfield caption="PLL Software Enable" mask="0x20" name="SWEN"/>
+                    <bitfield caption="PLL Lock" mask="0x10" name="LOCK"/>
+                    <bitfield caption="PLL Lock Change Interrupt Flag" mask="0x02" name="PLLCIF"/>
+                    <bitfield caption="PLL Lock Change Interrupt Enable" mask="0x01" name="PLLCIE"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction LIN UART Interface" mask="0x08" name="PRLIN"/>
+                    <bitfield caption="Power reduction SPI" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x02" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Enable Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF"/>
+                <register caption="Pin Change Enable Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0x03"/>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+                <register caption="Watchdog Timer Configuration Lock Register" name="WDTCLR" offset="0x63" size="1">
+                    <bitfield caption="Watchdog Timer Comfiguration Lock bits" mask="0x06" name="WDCL"/>
+                    <bitfield caption="Watchdog Timer Comfiguration Lock Enable" mask="0x01" name="WDCLE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Wakeup Timer" name="WAKEUP_TIMER">
+            <register-group caption="Wakeup Timer" name="WAKEUP_TIMER">
+                <register caption="Wake-up Timer Control and Status Register" name="WUTCSR" offset="0x62" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Wake-up Timer Interrupt Flag" mask="0x80" name="WUTIF"/>
+                    <bitfield caption="Wake-up Timer Interrupt Enable" mask="0x40" name="WUTIE"/>
+                    <bitfield caption="Wake-up Timer Reset" mask="0x10" name="WUTR"/>
+                    <bitfield caption="Wake-up Timer Enable" mask="0x08" name="WUTE"/>
+                    <bitfield caption="Wake-up Timer Prescaler Bits" mask="0x07" name="WUTP"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml
new file mode 100644
index 00000000..2142b4ac
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64M1.xml
@@ -0,0 +1,1484 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega64M1-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega64M1-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega64M1" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x1100">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x1000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CAN">
+                    <instance name="CAN" caption="Controller Area Network">
+                        <register-group name="CAN" name-in-module="CAN" offset="0x00" address-space="data"
+                                        caption="Controller Area Network"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal function="AC" group="ACMP" index="0" pad="PD7"/>
+                            <signal function="AC" group="ACMP" index="1" pad="PC6"/>
+                            <signal function="AC" group="ACMP" index="2" pad="PD5"/>
+                            <signal function="AC" group="ACMP" index="3" pad="PC5"/>
+                            <signal function="AC" group="ACMPN" index="0" pad="PB2"/>
+                            <signal function="AC" group="ACMPN" index="1" pad="PB5"/>
+                            <signal function="AC" group="ACMPN" index="2" pad="PD6"/>
+                            <signal function="AC" group="ACMPN" index="3" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC">
+                    <instance name="DAC" caption="Digital-to-Analog Converter">
+                        <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data"
+                                        caption="Digital-to-Analog Converter"/>
+                        <signals>
+                            <signal function="DAC" group="D2A" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal function="TC0" group="T0" pad="PC2"/>
+                            <signal function="TC0" group="OC0A" pad="PD3"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal function="TC1" group="T1" pad="PC3"/>
+                            <signal function="TC1" group="ICP1A" pad="PD4"/>
+                            <signal function="TC1" group="ICP1B" pad="PC3"/>
+                            <signal function="TC1" group="OC1A" pad="PD2"/>
+                            <signal function="TC1" group="OC1B" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PE2"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB7"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PC4"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PC5"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="LINUART">
+                    <instance name="LINUART" caption="Local Interconnect Network">
+                        <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data"
+                                        caption="Local Interconnect Network"/>
+                        <signals>
+                            <signal function="LIN" group="TXLIN" pad="PD3"/>
+                            <signal function="LIN" group="RXLIN" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal function="SPI" group="MISO" pad="PB0"/>
+                            <signal function="SPI_ALT" group="MISO" pad="PD2"/>
+                            <signal function="SPI" group="MOSI" pad="PB1"/>
+                            <signal function="SPI_ALT" group="MOSI" pad="PD3"/>
+                            <signal function="SPI" group="SCK" pad="PB7"/>
+                            <signal function="SPI_ALT" group="SCK" pad="PD4"/>
+                            <signal function="SPI" group="SS" pad="PD3"/>
+                            <signal function="SPI_ALT" group="SS" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal function="EXINT" group="INT" index="0" pad="PD6"/>
+                            <signal function="EXINT" group="INT" index="1" pad="PB2"/>
+                            <signal function="EXINT" group="INT" index="2" pad="PB5"/>
+                            <signal function="EXINT" group="INT" index="3" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="0" pad="PB0"/>
+                            <signal function="EXINT" group="PCINT" index="1" pad="PB1"/>
+                            <signal function="EXINT" group="PCINT" index="2" pad="PB2"/>
+                            <signal function="EXINT" group="PCINT" index="3" pad="PB3"/>
+                            <signal function="EXINT" group="PCINT" index="4" pad="PB4"/>
+                            <signal function="EXINT" group="PCINT" index="5" pad="PB5"/>
+                            <signal function="EXINT" group="PCINT" index="6" pad="PB6"/>
+                            <signal function="EXINT" group="PCINT" index="7" pad="PB7"/>
+                            <signal function="EXINT" group="PCINT" index="8" pad="PC0"/>
+                            <signal function="EXINT" group="PCINT" index="9" pad="PC1"/>
+                            <signal function="EXINT" group="PCINT" index="10" pad="PC2"/>
+                            <signal function="EXINT" group="PCINT" index="11" pad="PC3"/>
+                            <signal function="EXINT" group="PCINT" index="12" pad="PC4"/>
+                            <signal function="EXINT" group="PCINT" index="13" pad="PC5"/>
+                            <signal function="EXINT" group="PCINT" index="14" pad="PC6"/>
+                            <signal function="EXINT" group="PCINT" index="15" pad="PC7"/>
+                            <signal function="EXINT" group="PCINT" index="16" pad="PD0"/>
+                            <signal function="EXINT" group="PCINT" index="17" pad="PD1"/>
+                            <signal function="EXINT" group="PCINT" index="18" pad="PD2"/>
+                            <signal function="EXINT" group="PCINT" index="19" pad="PD3"/>
+                            <signal function="EXINT" group="PCINT" index="20" pad="PD4"/>
+                            <signal function="EXINT" group="PCINT" index="21" pad="PD5"/>
+                            <signal function="EXINT" group="PCINT" index="22" pad="PD6"/>
+                            <signal function="EXINT" group="PCINT" index="23" pad="PD7"/>
+                            <signal function="EXINT" group="PCINT" index="24" pad="PE0"/>
+                            <signal function="EXINT" group="PCINT" index="25" pad="PE1"/>
+                            <signal function="EXINT" group="PCINT" index="26" pad="PE2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="PSC">
+                    <instance name="PSC" caption="Power Stage Controller">
+                        <register-group name="PSC" name-in-module="PSC" offset="0x00" address-space="data"
+                                        caption="Power Stage Controller"/>
+                        <signals>
+                            <signal function="PSC" group="PSCIN2" pad="PD2"/>
+                            <signal function="PSC" group="PSCOUT2A" pad="PB0"/>
+                            <signal function="PSC" group="PSCOUT2B" pad="PB1"/>
+                            <signal function="PSC" group="PSCIN1" pad="PC1"/>
+                            <signal function="PSC" group="PSCOUT1A" pad="PC0"/>
+                            <signal function="PSC" group="PSCOUT1B" pad="PB6"/>
+                            <signal function="PSC" group="PSCIN0" pad="PD1"/>
+                            <signal function="PSC" group="PSCOUT0A" pad="PD0"/>
+                            <signal function="PSC" group="PSCOUT0B" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
+                <interrupt index="1" name="ANACOMP0" caption="Analog Comparator 0"/>
+                <interrupt index="2" name="ANACOMP1" caption="Analog Comparator 1"/>
+                <interrupt index="3" name="ANACOMP2" caption="Analog Comparator 2"/>
+                <interrupt index="4" name="ANACOMP3" caption="Analog Comparator 3"/>
+                <interrupt index="5" name="PSC_FAULT" caption="PSC Fault"/>
+                <interrupt index="6" name="PSC_EC" caption="PSC End of Cycle"/>
+                <interrupt index="7" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="8" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="9" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="10" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="12" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="13" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="14" name="TIMER1_OVF" caption="Timer1/Counter1 Overflow"/>
+                <interrupt index="15" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="16" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="17" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="18" name="CAN_INT" caption="CAN MOB, Burst, General Errors"/>
+                <interrupt index="19" name="CAN_TOVF" caption="CAN Timer Overflow"/>
+                <interrupt index="20" name="LIN_TC" caption="LIN Transfer Complete"/>
+                <interrupt index="21" name="LIN_ERR" caption="LIN Error"/>
+                <interrupt index="22" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="23" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="24" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="25" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+                <interrupt index="26" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="27" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="28" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+                <interrupt index="29" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="30" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9684"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x84"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="PSC Reset Behavior" mask="0x20" name="PSCRB"/>
+                    <bitfield caption="PSCOUTnA Reset Value" mask="0x10" name="PSCRVA"/>
+                    <bitfield caption="PSC0UTnB Reset Value" mask="0x08" name="PSCRVB"/>
+                    <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_0MS" value="0x03"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_4MS1" value="0x13"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="PLLCLK_16MHZ_1KCK_14CK_65MS" value="0x23"/>
+                <value caption="PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="PLLCLK_16MHZ_16KCK_14CK_0MS" value="0x33"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_0MS" value="0x01"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_4MS" value="0x11"/>
+                <value caption="PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTCLK_6KCK_14CK_64MS" value="0x21"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x05"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x15"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x25"/>
+                <value caption="PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="PLLCLK_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x35"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_1KCK_14CK_4MS" value="0x14"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_4MS" value="0x24"/>
+                <value caption="Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms"
+                       name="EXTXOSC_PLLIN_EXTXOSC_16KCK_14CK_64MS" value="0x34"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=4.5 V" name="4V5" value="0x06"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=4.4 V" name="4V4" value="0x03"/>
+                <value caption="Brown-out detection at VCC=4.2 V" name="4V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.8 V" name="2V8" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.6 V" name="2V6" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words Boot address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words Boot address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words Boot address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words Boot address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Controller Area Network" name="CAN">
+            <register-group caption="Controller Area Network" name="CAN">
+                <register caption="CAN General Control Register" name="CANGCON" offset="0xD8" size="1">
+                    <bitfield caption="Abort Request" mask="0x80" name="ABRQ"/>
+                    <bitfield caption="Overload Frame Request" mask="0x40" name="OVRQ"/>
+                    <bitfield caption="Time Trigger Communication" mask="0x20" name="TTC"/>
+                    <bitfield caption="Synchronization of TTC" mask="0x10" name="SYNTTC"/>
+                    <bitfield caption="Listening Mode" mask="0x08" name="LISTEN"/>
+                    <bitfield caption="Test Mode" mask="0x04" name="TEST"/>
+                    <bitfield caption="Enable / Standby" mask="0x02" name="ENASTB"/>
+                    <bitfield caption="Software Reset Request" mask="0x01" name="SWRES"/>
+                </register>
+                <register caption="CAN General Status Register" name="CANGSTA" offset="0xD9" size="1" ocd-rw="R">
+                    <bitfield caption="Overload Frame Flag" mask="0x40" name="OVFG"/>
+                    <bitfield caption="Transmitter Busy" mask="0x10" name="TXBSY"/>
+                    <bitfield caption="Receiver Busy" mask="0x08" name="RXBSY"/>
+                    <bitfield caption="Enable Flag" mask="0x04" name="ENFG"/>
+                    <bitfield caption="Bus Off Mode" mask="0x02" name="BOFF"/>
+                    <bitfield caption="Error Passive Mode" mask="0x01" name="ERRP"/>
+                </register>
+                <register caption="CAN General Interrupt Register Flags" name="CANGIT" offset="0xDA" size="1">
+                    <bitfield caption="General Interrupt Flag" mask="0x80" name="CANIT"/>
+                    <bitfield caption="Bus Off Interrupt Flag" mask="0x40" name="BOFFIT"/>
+                    <bitfield caption="Overrun CAN Timer Flag" mask="0x20" name="OVRTIM"/>
+                    <bitfield caption="Burst Receive Interrupt Flag" mask="0x10" name="BXOK"/>
+                    <bitfield caption="Stuff Error General Flag" mask="0x08" name="SERG"/>
+                    <bitfield caption="CRC Error General Flag" mask="0x04" name="CERG"/>
+                    <bitfield caption="Form Error General Flag" mask="0x02" name="FERG"/>
+                    <bitfield caption="Ackknowledgement Error General Flag" mask="0x01" name="AERG"/>
+                </register>
+                <register caption="CAN General Interrupt Enable Register" name="CANGIE" offset="0xDB" size="1">
+                    <bitfield caption="Enable all Interrupts" mask="0x80" name="ENIT"/>
+                    <bitfield caption="Enable Bus Off Interrupt" mask="0x40" name="ENBOFF"/>
+                    <bitfield caption="Enable Receive Interrupt" mask="0x20" name="ENRX"/>
+                    <bitfield caption="Enable Transmitt Interrupt" mask="0x10" name="ENTX"/>
+                    <bitfield caption="Enable MOb Error Interrupt" mask="0x08" name="ENERR"/>
+                    <bitfield caption="Enable Burst Receive Interrupt" mask="0x04" name="ENBX"/>
+                    <bitfield caption="Enable General Error Interrupt" mask="0x02" name="ENERG"/>
+                    <bitfield caption="Enable CAN Timer Overrun Interrupt" mask="0x01" name="ENOVRT"/>
+                </register>
+                <register caption="Enable MOb Register 2" name="CANEN2" offset="0xDC" size="1" ocd-rw="R">
+                    <bitfield caption="Enable MObs" mask="0x3F" name="ENMOB"/>
+                </register>
+                <register caption="Enable MOb Register 1(empty)" name="CANEN1" offset="0xDD" size="1" mask="0x00"
+                          ocd-rw=""/>
+                <register caption="Enable Interrupt MOb Register 2" name="CANIE2" offset="0xDE" size="1">
+                    <bitfield caption="Interrupt Enable  MObs" mask="0x3F" name="IEMOB"/>
+                </register>
+                <register caption="Enable Interrupt MOb Register 1 (empty)" name="CANIE1" offset="0xDF" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Status Interrupt MOb Register 2" name="CANSIT2" offset="0xE0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Status of Interrupt MObs" mask="0x3F" name="SIT"/>
+                </register>
+                <register caption="CAN Status Interrupt MOb Register 1 (empty)" name="CANSIT1" offset="0xE1" size="1"
+                          mask="0x00" ocd-rw=""/>
+                <register caption="CAN Bit Timing Register 1" name="CANBT1" offset="0xE2" size="1">
+                    <bitfield caption="Baud Rate Prescaler bits" mask="0x7E" name="BRP"/>
+                </register>
+                <register caption="CAN Bit Timing Register 2" name="CANBT2" offset="0xE3" size="1">
+                    <bitfield caption="Re-Sync Jump Width bits" mask="0x60" name="SJW"/>
+                    <bitfield caption="Propagation Time Segment bits" mask="0x0E" name="PRS"/>
+                </register>
+                <register caption="CAN Bit Timing Register 3" name="CANBT3" offset="0xE4" size="1">
+                    <bitfield caption="Phase Segment 2 bits" mask="0x70" name="PHS2"/>
+                    <bitfield caption="Phase Segment 1 bits" mask="0x0E" name="PHS1"/>
+                    <bitfield caption="Sample Type" mask="0x01" name="SMP"/>
+                </register>
+                <register caption="Timer Control Register" name="CANTCON" offset="0xE5" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="Timer Register" name="CANTIM" offset="0xE6" size="2" mask="0xFFFF" ocd-rw=""/>
+                <register caption="TTC Timer Register" name="CANTTC" offset="0xE8" size="2" mask="0xFFFF" ocd-rw=""/>
+                <register caption="Transmit Error Counter Register" name="CANTEC" offset="0xEA" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="Receive Error Counter Register" name="CANREC" offset="0xEB" size="1" mask="0xFF"
+                          ocd-rw="R"/>
+                <register caption="Highest Priority MOb Register" name="CANHPMOB" offset="0xEC" size="1">
+                    <bitfield caption="Highest Priority MOb Number bits" mask="0xF0" name="HPMOB"/>
+                    <bitfield caption="CAN General Purpose bits" mask="0x0F" name="CGP"/>
+                </register>
+                <register caption="Page MOb Register" name="CANPAGE" offset="0xED" size="1">
+                    <bitfield caption="MOb Number bits" mask="0xF0" name="MOBNB"/>
+                    <bitfield caption="MOb Data Buffer Auto Increment (Active Low)" mask="0x08" name="AINC"/>
+                    <bitfield caption="Data Buffer Index bits" mask="0x07" name="INDX"/>
+                </register>
+                <register caption="MOb Status Register" name="CANSTMOB" offset="0xEE" size="1">
+                    <bitfield caption="Data Length Code Warning on MOb" mask="0x80" name="DLCW"/>
+                    <bitfield caption="Transmit OK on MOb" mask="0x40" name="TXOK"/>
+                    <bitfield caption="Receive OK on MOb" mask="0x20" name="RXOK"/>
+                    <bitfield caption="Bit Error on MOb" mask="0x10" name="BERR"/>
+                    <bitfield caption="Stuff Error on MOb" mask="0x08" name="SERR"/>
+                    <bitfield caption="CRC Error on MOb" mask="0x04" name="CERR"/>
+                    <bitfield caption="Form Error on MOb" mask="0x02" name="FERR"/>
+                    <bitfield caption="Ackknowledgement Error on MOb" mask="0x01" name="AERR"/>
+                </register>
+                <register caption="MOb Control and DLC Register" name="CANCDMOB" offset="0xEF" size="1">
+                    <bitfield caption="MOb Config bits" mask="0xC0" name="CONMOB"/>
+                    <bitfield caption="Reply Valid" mask="0x20" name="RPLV"/>
+                    <bitfield caption="Identifier Extension" mask="0x10" name="IDE"/>
+                    <bitfield caption="Data Length Code bits" mask="0x0F" name="DLC"/>
+                </register>
+                <register caption="Identifier Tag Register 4" name="CANIDT4" offset="0xF0" size="1">
+                    <bitfield caption="Identifier Tag" mask="0xF8" name="IDT"/>
+                    <bitfield caption="Remote Transmission Request Tag" mask="0x04" name="RTRTAG"/>
+                    <bitfield caption="Reserved Bit 1 Tag" mask="0x02" name="RB1TAG"/>
+                    <bitfield caption="Reserved Bit 0 Tag" mask="0x01" name="RB0TAG"/>
+                </register>
+                <register caption="Identifier Tag Register 3" name="CANIDT3" offset="0xF1" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="5"/>
+                </register>
+                <register caption="Identifier Tag Register 2" name="CANIDT2" offset="0xF2" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="13"/>
+                </register>
+                <register caption="Identifier Tag Register 1" name="CANIDT1" offset="0xF3" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Tag" mask="0xFF" name="IDT" lsb="21"/>
+                </register>
+                <register caption="Identifier Mask Register 4" name="CANIDM4" offset="0xF4" size="1" mask="0xFD">
+                    <bitfield caption="Identifier Extension Mask" mask="0x01" name="IDEMSK"/>
+                    <bitfield caption="Remote Transmission Request Mask" mask="0x04" name="RTRMSK"/>
+                    <bitfield caption="Identifier Mask" mask="0xF8" name="IDMSK"/>
+                </register>
+                <register caption="Identifier Mask Register 3" name="CANIDM3" offset="0xF5" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="5"/>
+                </register>
+                <register caption="Identifier Mask Register 2" name="CANIDM2" offset="0xF6" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="13"/>
+                </register>
+                <register caption="Identifier Mask Register 1" name="CANIDM1" offset="0xF7" size="1" mask="0xFF">
+                    <bitfield caption="Identifier Mask" mask="0xFF" name="IDMSK" lsb="21"/>
+                </register>
+                <register caption="Time Stamp Register" name="CANSTM" offset="0xF8" size="2" mask="0xFFFF"/>
+                <register caption="Message Data Register" name="CANMSG" offset="0xFA" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator 0 Control Register" name="AC0CON" offset="0x94" size="1">
+                    <bitfield caption="Analog Comparator 0 Enable Bit" mask="0x80" name="AC0EN"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable Bit" mask="0x40" name="AC0IE"/>
+                    <bitfield caption="Analog Comparator 0  Interrupt Select Bits" mask="0x30" name="AC0IS"/>
+                    <bitfield caption="Analog Comparator Clock Select" mask="0x08" name="ACCKSEL"/>
+                    <bitfield caption="Analog Comparator 0 Multiplexer Register" mask="0x07" name="AC0M"/>
+                </register>
+                <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x95" size="1">
+                    <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Capture Enable Bit" mask="0x08" name="AC1ICE"/>
+                    <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
+                </register>
+                <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x96" size="1">
+                    <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
+                    <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
+                </register>
+                <register caption="Analog Comparator 3 Control Register" name="AC3CON" offset="0x97" size="1">
+                    <bitfield caption="Analog Comparator 3 Enable Bit" mask="0x80" name="AC3EN"/>
+                    <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
+                    <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                    <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
+                </register>
+                <register caption="Analog Comparator Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+                    <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
+                    <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
+                    <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag Bit" mask="0x10" name="AC0IF"/>
+                    <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
+                    <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
+                    <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
+                    <bitfield caption="Analog Comparator 0 Output Bit" mask="0x01" name="AC0O"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Digital-to-Analog Converter" name="DAC">
+            <register-group caption="Digital-to-Analog Converter" name="DAC">
+                <register caption="DAC Data Register" name="DAC" offset="0x91" size="2" ocd-rw="">
+                    <bitfield caption="DAC Data Register Bits" mask="0xFFFF" name="DAC"/>
+                </register>
+                <register caption="DAC Control Register" name="DACON" offset="0x90" size="1">
+                    <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
+                    <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS"
+                              values="ANALOG_DAC_AUTO_TRIGGER"/>
+                    <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
+                    <bitfield caption="DAC Output Enable" mask="0x02" name="DAOE"/>
+                    <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
+                <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="SPI Pin Select" mask="0x80" name="SPIPS"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0x7F"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3A" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x39" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL Factor" mask="0x04" name="PLLF"/>
+                    <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+                </register>
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction CAN" mask="0x40" name="PRCAN"/>
+                    <bitfield caption="Power Reduction PSC" mask="0x20" name="PRPSC"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x08" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction LIN UART" mask="0x02" name="PRLIN"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Timer/Counter Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Selection" mask="0x40" name="ICPSEL1"/>
+                    <bitfield caption="Timer/Counter Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="ADC channel selection bits" mask="0x1F" name="MUX" values="ANALOG_ADC_MUXPOS"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
+                    <bitfield caption="Current Source Enable" mask="0x40" name="ISRCEN"/>
+                    <bitfield caption="Analog Reference pin Enable" mask="0x20" name="AREFEN"/>
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AMP2P Pin Digital input Disable" mask="0x40" name="AMP2PD"/>
+                    <bitfield caption="ACMP0 Pin Digital input Disable" mask="0x20" name="ACMP0D"/>
+                    <bitfield caption="AMP0P Pin Digital input Disable" mask="0x10" name="AMP0PD"/>
+                    <bitfield caption="AMP0N Pin Digital input Disable" mask="0x08" name="AMP0ND"/>
+                    <bitfield caption="ADC10 Pin Digital input Disable" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="ADC9 Pin Digital input Disable" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="ADC8 Pin Digital input Disable" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Amplifier 0 Control and Status Register" name="AMP0CSR" offset="0x75" size="1">
+                    <bitfield caption="Amplifier 0 Enable" mask="0x80" name="AMP0EN"/>
+                    <bitfield caption="Amplifier 0 Input Shunt" mask="0x40" name="AMP0IS"/>
+                    <bitfield caption="Amplifier 0 Gain Selection" mask="0x30" name="AMP0G"/>
+                    <bitfield caption="Amplifier 0 - Comparator 0 connection" mask="0x08" name="AMPCMP0"/>
+                    <bitfield caption="Amplifier 0 Clock Source Selection" mask="0x07" name="AMP0TS"/>
+                </register>
+                <register caption="Amplifier 1 Control and Status Register" name="AMP1CSR" offset="0x76" size="1">
+                    <bitfield caption="Amplifier 1 Enable" mask="0x80" name="AMP1EN"/>
+                    <bitfield caption="Amplifier 1 Input Shunt" mask="0x40" name="AMP1IS"/>
+                    <bitfield caption="Amplifier 1 Gain Selection" mask="0x30" name="AMP1G"/>
+                    <bitfield caption="Amplifier 1 - Comparator 1 Connection" mask="0x08" name="AMPCMP1"/>
+                    <bitfield caption="Amplifier 1 Clock Source Selection" mask="0x07" name="AMP1TS"/>
+                </register>
+                <register caption="Amplifier 2 Control and Status Register" name="AMP2CSR" offset="0x77" size="1">
+                    <bitfield caption="Amplifier 2 Enable" mask="0x80" name="AMP2EN"/>
+                    <bitfield caption="Amplifier 2 Input Shunt" mask="0x40" name="AMP2IS"/>
+                    <bitfield caption="Amplifier 2 Gain Selection" mask="0x30" name="AMP2G"/>
+                    <bitfield caption="Amplifier 2 - Comparator 2 Connection" mask="0x08" name="AMPCMP2"/>
+                    <bitfield caption="Amplifier 2 Clock Source Selection" mask="0x07" name="AMP2TS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC reference" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+                <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
+                <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
+                <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
+                <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
+                <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ANALOG_ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="ADC0" value="0x0"/>
+                <value caption="ADC input pin 1" name="ADC1" value="0x1"/>
+                <value caption="ADC input pin 2" name="ADC2" value="0x2"/>
+                <value caption="ADC input pin 3" name="ADC3" value="0x3"/>
+                <value caption="ADC input pin 4" name="ADC4" value="0x4"/>
+                <value caption="ADC input pin 5" name="ADC5" value="0x5"/>
+                <value caption="ADC input pin 6" name="ADC6" value="0x6"/>
+                <value caption="ADC input pin 7" name="ADC7" value="0x7"/>
+                <value caption="ADC input pin 8" name="ADC8" value="0x8"/>
+                <value caption="ADC input pin 9" name="ADC9" value="0x9"/>
+                <value caption="ADC input pin 10" name="ADC10" value="0xA"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0xB"/>
+                <value caption="Internal VCC / 4" name="VCC4" value="0xC"/>
+                <value caption="Current source" name="ISRC" value="0xD"/>
+                <value caption="Analog Differential Amplifier 0" name="AMP0" value="0xE"/>
+                <value caption="Analog Differential Amplifier 1" name="AMP1" value="0xF"/>
+                <value caption="Analog Differential Amplifier 2" name="AMP2" value="0x10"/>
+                <value caption="Bandgap" name="BNDGAP" value="0x11"/>
+                <value caption="0V (GND)" name="GND" value="0x12"/>
+            </value-group>
+        </module>
+        <module caption="Local Interconnect Network" name="LINUART">
+            <register-group caption="Local Interconnect Network" name="LINUART">
+                <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+                    <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+                    <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+                    <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+                    <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+                    <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+                </register>
+                <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+                    <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+                    <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+                    <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+                    <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+                    <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+                    <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+                </register>
+                <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+                    <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+                    <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+                    <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+                    <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+                </register>
+                <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+                    <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+                    <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+                    <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+                    <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+                    <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+                    <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+                    <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+                    <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+                </register>
+                <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+                    <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+                    <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+                </register>
+                <register caption="LIN Baud Rate Register" name="LINBRR" offset="0xCD" size="2">
+                    <bitfield caption="" mask="0x0FFF" name="LDIV"/>
+                </register>
+                <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+                    <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+                    <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+                </register>
+                <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+                    <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+                    <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+                </register>
+                <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+                    <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+                    <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+                </register>
+                <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1">
+                    <bitfield caption="LIN Data In / Data out" mask="0xFF" name="LDATA"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 3 Enable" mask="0x0F" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x0F" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6D" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x07" name="PCINT" lsb="24"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6C" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6A" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="2" mask="0x07FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming mode" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Power Stage Controller" name="PSC">
+            <register-group caption="Power Stage Controller" name="PSC">
+                <register caption="PSC Interrupt Flag Register" name="PIFR" offset="0xBC" size="1" ocd-rw="">
+                    <bitfield caption="PSC External Event 2 Interrupt" mask="0x0E" name="PEV"/>
+                    <bitfield caption="PSC End of Cycle Interrupt" mask="0x01" name="PEOP"/>
+                </register>
+                <register caption="PSC Interrupt Mask Register" name="PIM" offset="0xBB" size="1" ocd-rw="">
+                    <bitfield caption="External Event 2 Interrupt Enable" mask="0x0E" name="PEVE"/>
+                    <bitfield caption="PSC End of Cycle Interrupt Enable" mask="0x01" name="PEOPE"/>
+                </register>
+                <register caption="PSC Module 2 Input Control Register" name="PMIC2" offset="0xBA" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 2 Overlap Enable" mask="0x80" name="POVEN2"/>
+                    <bitfield caption="PSC Module 2 Input Select" mask="0x40" name="PISEL2"/>
+                    <bitfield caption="PSC Module 2 Input Level Selector" mask="0x20" name="PELEV2"/>
+                    <bitfield caption="PSC Module 2 Input Filter Enable" mask="0x10" name="PFLTE2"/>
+                    <bitfield caption="PSC Module 2 Asynchronous Output Control" mask="0x08" name="PAOC2"/>
+                    <bitfield caption="PSC Module 2 Input Mode bits" mask="0x07" name="PRFM2"/>
+                </register>
+                <register caption="PSC Module 1 Input Control Register" name="PMIC1" offset="0xB9" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 1 Overlap Enable" mask="0x80" name="POVEN1"/>
+                    <bitfield caption="PSC Module 1 Input Select" mask="0x40" name="PISEL1"/>
+                    <bitfield caption="PSC Module 1 Input Level Selector" mask="0x20" name="PELEV1"/>
+                    <bitfield caption="PSC Module 1 Input Filter Enable" mask="0x10" name="PFLTE1"/>
+                    <bitfield caption="PSC Module 1 Asynchronous Output Control" mask="0x08" name="PAOC1"/>
+                    <bitfield caption="PSC Module 1 Input Mode bits" mask="0x07" name="PRFM1"/>
+                </register>
+                <register caption="PSC Module 0 Input Control Register" name="PMIC0" offset="0xB8" size="1" ocd-rw="">
+                    <bitfield caption="PSC Module 0 Overlap Enable" mask="0x80" name="POVEN0"/>
+                    <bitfield caption="PSC Module 0 Input Select" mask="0x40" name="PISEL0"/>
+                    <bitfield caption="PSC Module 0 Input Level Selector" mask="0x20" name="PELEV0"/>
+                    <bitfield caption="PSC Module 0 Input Filter Enable" mask="0x10" name="PFLTE0"/>
+                    <bitfield caption="PSC Module 0 Asynchronous Output Control" mask="0x08" name="PAOC0"/>
+                    <bitfield caption="PSC Module 0 Input Mode bits" mask="0x07" name="PRFM0"/>
+                </register>
+                <register caption="PSC Control Register" name="PCTL" offset="0xB7" size="1" ocd-rw="">
+                    <bitfield caption="PSC Prescaler Select bits" mask="0xC0" name="PPRE"/>
+                    <bitfield caption="PSC Input Clock Select" mask="0x20" name="PCLKSEL"/>
+                    <bitfield caption="PSC Complete Cycle" mask="0x02" name="PCCYC"/>
+                    <bitfield caption="PSC Run" mask="0x01" name="PRUN"/>
+                </register>
+                <register caption="PSC Output Configuration" name="POC" offset="0xB6" size="1" ocd-rw="">
+                    <bitfield caption="PSC Output 2B Enable" mask="0x20" name="POEN2B"/>
+                    <bitfield caption="PSC Output 2A Enable" mask="0x10" name="POEN2A"/>
+                    <bitfield caption="PSC Output 1B Enable" mask="0x08" name="POEN1B"/>
+                    <bitfield caption="PSC Output 1A Enable" mask="0x04" name="POEN1A"/>
+                    <bitfield caption="PSC Output 0B Enable" mask="0x02" name="POEN0B"/>
+                    <bitfield caption="PSC Output 0A Enable" mask="0x01" name="POEN0A"/>
+                </register>
+                <register caption="PSC Configuration Register" name="PCNF" offset="0xB5" size="1" ocd-rw="">
+                    <bitfield caption="PSC Update Lock" mask="0x20" name="PULOCK"/>
+                    <bitfield caption="PSC Mode" mask="0x10" name="PMODE"/>
+                    <bitfield caption="PSC Output B Polarity" mask="0x08" name="POPB"/>
+                    <bitfield caption="PSC Output A Polarity" mask="0x04" name="POPA"/>
+                </register>
+                <register caption="PSC Synchro Configuration" name="PSYNC" offset="0xB4" size="1" ocd-rw="">
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x30" name="PSYNC2"/>
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x0C" name="PSYNC1"/>
+                    <bitfield caption="Selection of Synchronization Out for ADC" mask="0x03" name="PSYNC0"/>
+                </register>
+                <register caption="PSC Output Compare RB Register " name="POCR_RB" offset="0xB2" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SB Register " name="POCR2SB" offset="0xB0" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare RA Register " name="POCR2RA" offset="0xAE" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 2 Output Compare SA Register " name="POCR2SA" offset="0xAC" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare SB Register " name="POCR1SB" offset="0xAA" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 1 Output Compare RA Register " name="POCR1RA" offset="0xA8" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Output Compare SA Register " name="POCR1SA" offset="0xA6" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Output Compare SB Register " name="POCR0SB" offset="0xA4" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare RA Register " name="POCR0RA" offset="0xA2" size="2"
+                          mask="0x0FFF"/>
+                <register caption="PSC Module 0 Output Compare SA Register " name="POCR0SA" offset="0xA0" size="2"
+                          mask="0x0FFF"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD2"/>
+            <pin position="2" pad="PD3"/>
+            <pin position="3" pad="PC1"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PC2"/>
+            <pin position="7" pad="PC3"/>
+            <pin position="8" pad="PB0"/>
+            <pin position="9" pad="PB1"/>
+            <pin position="10" pad="PE1"/>
+            <pin position="11" pad="PE2"/>
+            <pin position="12" pad="PD4"/>
+            <pin position="13" pad="PD5"/>
+            <pin position="14" pad="PD6"/>
+            <pin position="15" pad="PD7"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PC4"/>
+            <pin position="18" pad="PC5"/>
+            <pin position="19" pad="AVCC"/>
+            <pin position="20" pad="AGND"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="PC6"/>
+            <pin position="23" pad="PB3"/>
+            <pin position="24" pad="PB4"/>
+            <pin position="25" pad="PC7"/>
+            <pin position="26" pad="PB5"/>
+            <pin position="27" pad="PB6"/>
+            <pin position="28" pad="PB7"/>
+            <pin position="29" pad="PD0"/>
+            <pin position="30" pad="PC0"/>
+            <pin position="31" pad="PE0"/>
+            <pin position="32" pad="PD1"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
new file mode 100644
index 00000000..64b5a4cf
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA64RFR2.xml
@@ -0,0 +1,2737 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega64RFR2-ZU" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="3.6"
+                 vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZUR" package="QFN64" speedmax="16000000" tempmax="85" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZF" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+        <variant ordercode="ATmega64RFR2-ZFR" package="QFN64" speedmax="16000000" tempmax="125" tempmin="-40"
+                 vccmax="3.6" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device name="ATmega64RFR2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x10000">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xfc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xf000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x100"/>
+                    <memory-segment start="0xe000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="user_signatures" id="user_signatures" start="0x0100"
+                               size="0x0300">
+                    <memory-segment start="0x0100" size="0x0300" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="0x100"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x2200">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x08"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART0_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART0_SPI" name-in-module="USART0_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                    <instance name="USART1_SPI" caption="Serial Peripheral Interface">
+                        <register-group name="USART1_SPI" name-in-module="USART1_SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTF" caption="I/O Port">
+                        <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTG" caption="I/O Port">
+                        <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC5" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC4" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC3" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TRX24">
+                    <instance name="TRX24" caption="Low-Power 2.4 GHz Transceiver">
+                        <register-group name="TRX24" name-in-module="TRX24" offset="0x00" address-space="data"
+                                        caption="Low-Power 2.4 GHz Transceiver"/>
+                    </instance>
+                </module>
+                <module name="SYMCNT">
+                    <instance name="SYMCNT" caption="MAC Symbol Counter">
+                        <register-group name="SYMCNT" name-in-module="SYMCNT" offset="0x00" address-space="data"
+                                        caption="MAC Symbol Counter"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="JTAG">
+                    <instance name="JTAG" caption="JTAG Interface">
+                        <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data"
+                                        caption="JTAG Interface"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FLASH">
+                    <instance name="FLASH" caption="FLASH Controller">
+                        <register-group name="FLASH" name-in-module="FLASH" offset="0x00" address-space="data"
+                                        caption="FLASH Controller"/>
+                    </instance>
+                </module>
+                <module name="PWRCTRL">
+                    <instance name="PWRCTRL" caption="Power Controller">
+                        <register-group name="PWRCTRL" name-in-module="PWRCTRL" offset="0x00" address-space="data"
+                                        caption="Power Controller"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet."/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+                <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
+                <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
+                <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
+                <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
+                <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
+                <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
+                <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
+                <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
+                <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
+                <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
+                <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
+                <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
+                <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
+                <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
+                <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
+                <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
+                <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
+                <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
+                <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
+                <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
+                <interrupt index="57" name="TRX24_PLL_LOCK" caption="TRX24 - PLL lock interrupt"/>
+                <interrupt index="58" name="TRX24_PLL_UNLOCK" caption="TRX24 - PLL unlock interrupt"/>
+                <interrupt index="59" name="TRX24_RX_START" caption="TRX24 - Receive start interrupt"/>
+                <interrupt index="60" name="TRX24_RX_END" caption="TRX24 - RX_END interrupt"/>
+                <interrupt index="61" name="TRX24_CCA_ED_DONE" caption="TRX24 - CCA/ED done interrupt"/>
+                <interrupt index="62" name="TRX24_XAH_AMI" caption="TRX24 - XAH - AMI"/>
+                <interrupt index="63" name="TRX24_TX_END" caption="TRX24 - TX_END interrupt"/>
+                <interrupt index="64" name="TRX24_AWAKE" caption="TRX24 AWAKE - tranceiver is reaching state TRX_OFF"/>
+                <interrupt index="65" name="SCNT_CMP1" caption="Symbol counter - compare match 1 interrupt"/>
+                <interrupt index="66" name="SCNT_CMP2" caption="Symbol counter - compare match 2 interrupt"/>
+                <interrupt index="67" name="SCNT_CMP3" caption="Symbol counter - compare match 3 interrupt"/>
+                <interrupt index="68" name="SCNT_OVFL" caption="Symbol counter - overflow interrupt"/>
+                <interrupt index="69" name="SCNT_BACKOFF" caption="Symbol counter - backoff interrupt"/>
+                <interrupt index="70" name="AES_READY" caption="AES engine ready interrupt"/>
+                <interrupt index="71" name="BAT_LOW"
+                           caption="Battery monitor indicates supply voltage below threshold"/>
+                <interrupt index="72" name="TRX24_TX_START" caption="TRX24 TX start interrupt"/>
+                <interrupt index="73" name="TRX24_AMI0" caption="Address match interrupt of address filter 0"/>
+                <interrupt index="74" name="TRX24_AMI1" caption="Address match interrupt of address filter 1"/>
+                <interrupt index="75" name="TRX24_AMI2" caption="Address match interrupt of address filter 2"/>
+                <interrupt index="76" name="TRX24_AMI3" caption="Address match interrupt of address filter 3"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="JTAG" type="megajtag"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0A60203F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0xa6"/>
+                    <property name="SIGNATURE2" value="0x02"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="3"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="256"/>
+                    <property name="IspProgramFlash_delay" value="50"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="8"/>
+                    <property name="IspProgramEeprom_delay" value="50"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x01"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x07"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFE">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
+                    <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
+                    <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source : Start-up time" mask="0x3F" name="CKSEL_SUT"
+                              values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_4MS1"
+                       value="0x13"/>
+                <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_65MS"
+                       value="0x23"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x06"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x16"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x26"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x36"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x07"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x17"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x27"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x37"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x08"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x18"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x28"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x38"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x09"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x19"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x29"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x39"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3A"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3B"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3C"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3D"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 4.1 ms" name="TOSC_258CK_4MS1"
+                       value="0x0E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 258 CK + 65 ms" name="TOSC_258CK_65MS"
+                       value="0x1E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 0 ms" name="TOSC_1KCK_0MS" value="0x2E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 4.1 ms" name="TOSC_1KCK_4MS1"
+                       value="0x3E"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 1K CK + 65 ms" name="TOSC_1KCK_65MS"
+                       value="0x0F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 0 ms" name="TOSC_16KCK_0MS"
+                       value="0x1F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 4.1 ms" name="TOSC_16KCK_4MS1"
+                       value="0x2F"/>
+                <value caption="Tranceiver Oscillator; Start-up time: 16K CK + 65 ms" name="TOSC_16KCK_65MS"
+                       value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=512 words start address=$7E00" name="512W_7E00" value="0x03"/>
+                <value caption="Boot Flash size=1024 words start address=$7C00" name="1024W_7C00" value="0x02"/>
+                <value caption="Boot Flash size=2048 words start address=$7800" name="2048W_7800" value="0x01"/>
+                <value caption="Boot Flash size=4096 words start address=$7000" name="4096W_7000" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x05"/>
+                <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.1 V" name="2V1" value="0x03"/>
+                <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+                <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x01"/>
+                <value caption="Brown-out detection at VCC=2.4 V" name="2V4" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART0 I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART0 Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART0 Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART0 Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART0 Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0xFFFF"/>
+            </register-group>
+            <register-group caption="USART" name="USART1">
+                <register caption="USART1 I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART1 Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data OverRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="USART Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART1 Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART1 Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"
+                              values="COMM_USART_MODE_2BIT_MEGARF"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1" values="USART_CHAR_SIZE_BITF"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1" values="USART_CLK_POLARITY_BITF"/>
+                </register>
+                <register caption="USART1 Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT_MEGARF">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Master SPI (MSPIM)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="USART_CHAR_SIZE_BITF">
+                <value caption="5-bit" name="VAL_0" value="0"/>
+                <value caption="6-bit" name="VAL_1" value="1"/>
+                <value caption="7-bit" name="VAL_2" value="2"/>
+                <value caption="8-bit" name="VAL_3" value="3"/>
+                <value caption="Reserved" name="VAL_4" value="4"/>
+                <value caption="Reserved" name="VAL_5" value="5"/>
+                <value caption="Reserved" name="VAL_6" value="6"/>
+                <value caption="9-bit" name="VAL_7" value="7"/>
+            </value-group>
+            <value-group caption="" name="USART_CLK_POLARITY_BITF">
+                <value caption="Rising XCKn Edge (Transmitted Data Changed), Falling XCKn Edge (Received Data Sampled)"
+                       name="VAL_0" value="0"/>
+                <value caption="Falling XCKn Edge (Transmitted Data Changed), Rising XCKn Edge (Received Data Sampled)"
+                       name="VAL_1" value="1"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="TWI Address Mask" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate Register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI START Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI STOP Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collision Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" values="TWI_STATUS_BITF" lsb="3"/>
+                    <bitfield caption="TWI Prescaler Bits" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data Register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address Register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TWI_STATUS_BITF">
+                <value caption="Bus error due to illegal START or STOP condition." name="VAL_0x00" value="0x00"/>
+                <value caption="A START condition has been transmitted." name="VAL_0x08" value="0x08"/>
+                <value caption="A repeated START condition has been transmitted." name="VAL_0x10" value="0x10"/>
+                <value caption="SLA+W has been transmitted; ACK has been received." name="VAL_0x18" value="0x18"/>
+                <value caption="SLA+W has been transmitted; NOT ACK has been received." name="VAL_0x20" value="0x20"/>
+                <value caption="Data byte has been transmitted; ACK has been received." name="VAL_0x28" value="0x28"/>
+                <value caption="Data byte has been transmitted; NOT ACK has been received." name="VAL_0x30"
+                       value="0x30"/>
+                <value caption="Arbitration lost in SLA+W or data bytes (Transmitter); Arbitration lost in SLA+R or NOT ACK bit (Receiver)."
+                       name="VAL_0x38" value="0x38"/>
+                <value caption="SLA+R has been transmitted; ACK has been received." name="VAL_0x40" value="0x40"/>
+                <value caption="SLA+R has been transmitted; NOT ACK has been received." name="VAL_0x48" value="0x48"/>
+                <value caption="Data byte has been received; ACK has been returned." name="VAL_0x50" value="0x50"/>
+                <value caption="Data byte has been received; NOT ACK has been returned." name="VAL_0x58" value="0x58"/>
+                <value caption="Own SLA+W has been received; ACK has been returned." name="VAL_0x60" value="0x60"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned."
+                       name="VAL_0x68" value="0x68"/>
+                <value caption="General call address has been received; ACK has been returned." name="VAL_0x70"
+                       value="0x70"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; general call address has been received; ACK has been returned."
+                       name="VAL_0x78" value="0x78"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; ACK has been returned."
+                       name="VAL_0x80" value="0x80"/>
+                <value caption="Previously addressed with own SLA+W; data has been received; NOT ACK has been returned."
+                       name="VAL_0x88" value="0x88"/>
+                <value caption="Previously addressed with general call; data has been received; ACK has been returned."
+                       name="VAL_0x90" value="0x90"/>
+                <value caption="Previously addressed with general call; data has been received; NOT ACK has been returned."
+                       name="VAL_0x98" value="0x98"/>
+                <value caption="A STOP condition or repeated START condition has been received while still addressed as Slave."
+                       name="VAL_0xA0" value="0xA0"/>
+                <value caption="Own SLA+R has been received; ACK has been returned." name="VAL_0xA8" value="0xA8"/>
+                <value caption="Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned."
+                       name="VAL_0xB0" value="0xB0"/>
+                <value caption="Data byte in TWDR has been transmitted; ACK has been received." name="VAL_0xB8"
+                       value="0xB8"/>
+                <value caption="Data byte in TWDR has been transmitted; NO ACK has been received." name="VAL_0xC0"
+                       value="0xC0"/>
+                <value caption="Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received."
+                       name="VAL_0xC8" value="0xC8"/>
+                <value caption="No relevant state information available; TWINT = 0." name="VAL_0xF8" value="0xF8"/>
+            </value-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL" values="SPI_CPOL_BITF"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA" values="SPI_CPHA_BITF"/>
+                    <bitfield caption="SPI Clock Rate Select 1 and 0" mask="0x03" name="SPR"
+                              values="COMM_SCK_RATE_SPI2X"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART0_SPI">
+                <register caption="USART0 MSPIM Control and Status Register A" name="UCSR0A" offset="0xC0" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                </register>
+                <register caption="USART0 MSPIM Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD0"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+            </register-group>
+            <register-group caption="Serial Peripheral Interface" name="USART1_SPI">
+                <register caption="USART1 MSPIM Control and Status Register A" name="UCSR1A" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmit Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data Register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                </register>
+                <register caption="USART1 MSPIM Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="Data Order" mask="0x04" name="UDORD1"/>
+                    <bitfield caption="Clock Phase" mask="0x02" name="UCPHA1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SPI_CPOL_BITF">
+                <value caption="Rising (Leading Edge), Falling (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Falling (Leading Egde), Rising (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="SPI_CPHA_BITF">
+                <value caption="Sample (Leading Edge), Setup (Trailing Edge)" name="VAL_0" value="0"/>
+                <value caption="Setup (Leading Edge), Sample (Trailing Edge)" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="COMM_SCK_RATE_SPI2X">
+                <value caption="fosc/4 / fosc/2 (SPI2X=0/1)" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16 / fosc/8 (SPI2X=0/1)" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64 / fosc/32 (SPI2X=0/1)" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128 / fosc/64 (SPI2X=0/1)" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins Address" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins Address" name="PINB" offset="0x23" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins Address" name="PINC" offset="0x26" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins Address" name="PIND" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
+                <register caption="Port E Input Pins Address" name="PINE" offset="0x2C" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTF">
+                <register caption="Port F Data Register" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port F Data Direction Register" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
+                <register caption="Port F Input Pins Address" name="PINF" offset="0x2F" size="1" mask="0xFF"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTG">
+                <register caption="Port G Data Register" name="PORTG" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port G Data Direction Register" name="DDRG" offset="0x33" size="1" mask="0xFF"/>
+                <register caption="Port G Input Pins Address" name="PING" offset="0x32" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Register" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="TC0_CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A" values="TC0_COM0A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B" values="TC0_COM0B_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare B Match Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare A Match Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                    <bitfield caption="Prescaler Reset for Synchronous Timer/Counters" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC0_CLK_SEL_3BIT_EXT">
+                <value caption="No clock source (Timer/Counter0 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on T0 pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on T0 pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0A_BITF">
+                <value caption="Normal port operation, OC0A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_COM0B_BITF">
+                <value caption="Normal port operation, OC0B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC0B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC0B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC0B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2 B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2 A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM2A" values="TC2_COM2A_BITF"/>
+                    <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM2B" values="TC2_COM2B_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM2" values="TC0_WGM_BITF"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS2" values="TC2_CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input for AMR" mask="0x80" name="EXCLKAMR"/>
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Timer/Counter2 Asynchronous Mode" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register A Update Busy" mask="0x08"
+                              name="OCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Register B Update Busy" mask="0x04"
+                              name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register A Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter2 Control Register B Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC2_COM2A_BITF">
+                <value caption="Normal port operation, OC2A disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2A on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2A on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2A on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC2_COM2B_BITF">
+                <value caption="Normal port operation, OC2B disconnected" name="VAL_0" value="0"/>
+                <value caption="Toggle OC2B on Compare Match" name="VAL_1" value="1"/>
+                <value caption="Clear OC2B on Compare Match" name="VAL_2" value="2"/>
+                <value caption="Set OC2B on Compare Match" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC0_WGM_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, TOP=0xFF" name="VAL_0x1" value="0x1"/>
+                <value caption="CTC, TOP = OCRA" name="VAL_0x2" value="0x2"/>
+                <value caption="Fast PWM, TOP=0xFF" name="VAL_0x3" value="0x3"/>
+                <value caption="Reserved" name="VAL_0x4" value="0x4"/>
+                <value caption="PWM, Phase correct, TOP = OCRA" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, TOP=OCRA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="TC2_CLK_SEL_3BIT">
+                <value caption="No clock source (Timer/Counter2 stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_T2S/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_T2S/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_T2S/32 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_T2S/64 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_T2S/128 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="clk_T2S/256 (from prescaler)" name="VAL_0x06" value="0x06"/>
+                <value caption="clk_T2S/1024 (from prescaler)" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC5">
+                <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM5A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM5B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM5C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
+                    <bitfield caption="Input Capture 5 Noise Canceller" mask="0x80" name="ICNC5"/>
+                    <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS5" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter5 Control Register C" name="TCCR5C" offset="0x122" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC5A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC5B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC5C"/>
+                </register>
+                <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Output Compare Register C  Bytes" name="OCR5C" offset="0x12C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
+                    <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
+                </register>
+                <register caption="Timer/Counter5 Interrupt Flag Register" name="TIFR5" offset="0x3A" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter5 Input Capture Flag" mask="0x20" name="ICF5"/>
+                    <bitfield caption="Timer/Counter5 Output Compare C Match Flag" mask="0x08" name="OCF5C"/>
+                    <bitfield caption="Timer/Counter5 Output Compare B Match Flag" mask="0x04" name="OCF5B"/>
+                    <bitfield caption="Timer/Counter5 Output Compare A Match Flag" mask="0x02" name="OCF5A"/>
+                    <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC4">
+                <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM4A"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM4B"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM4C"
+                              values="TC4_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
+                    <bitfield caption="Input Capture 4 Noise Canceller" mask="0x80" name="ICNC4"/>
+                    <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS4" values="CLK_SEL_3BIT_NOEXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC4A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC4B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC4C"/>
+                </register>
+                <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Output Compare Register C  Bytes" name="OCR4C" offset="0xAC" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
+                    <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
+                </register>
+                <register caption="Timer/Counter4 Interrupt Flag Register" name="TIFR4" offset="0x39" size="1"
+                          ocd-rw="">
+                    <bitfield caption="Timer/Counter4 Input Capture Flag" mask="0x20" name="ICF4"/>
+                    <bitfield caption="Timer/Counter4 Output Compare C Match Flag" mask="0x08" name="OCF4C"/>
+                    <bitfield caption="Timer/Counter4 Output Compare B Match Flag" mask="0x04" name="OCF4B"/>
+                    <bitfield caption="Timer/Counter4 Output Compare A Match Flag" mask="0x02" name="OCF4A"/>
+                    <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC3">
+                <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM3A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM3B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM3C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
+                    <bitfield caption="Input Capture 3 Noise Canceller" mask="0x80" name="ICNC3"/>
+                    <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter3 Control Register C" name="TCCR3C" offset="0x92" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC3A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC3B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC3C"/>
+                </register>
+                <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Output Compare Register C  Bytes" name="OCR3C" offset="0x9C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
+                    <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
+                </register>
+                <register caption="Timer/Counter3 Interrupt Flag Register" name="TIFR3" offset="0x38" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter3 Input Capture Flag" mask="0x20" name="ICF3"/>
+                    <bitfield caption="Timer/Counter3 Output Compare C Match Flag" mask="0x08" name="OCF3C"/>
+                    <bitfield caption="Timer/Counter3 Output Compare B Match Flag" mask="0x04" name="OCF3B"/>
+                    <bitfield caption="Timer/Counter3 Output Compare A Match Flag" mask="0x02" name="OCF3A"/>
+                    <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode for Channel A" mask="0xC0" name="COM1A"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel B" mask="0x30" name="COM1B"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Compare Output Mode for Channel C" mask="0x0C" name="COM1C"
+                              values="TC1_COMNX_BITF"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1" values="TC1_WGMX_BITF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceller" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" values="TC1_WGMX_BITF"
+                              lsb="2"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT_MEGARF"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare for Channel C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Flag" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="TC4_COMNX_BITF">
+                <value caption="Normal operation" name="VAL_0" value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Reserved" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="TC1_WGMX_BITF">
+                <value caption="Normal mode of operation" name="VAL_0x0" value="0x0"/>
+                <value caption="PWM, phase correct, 8-bit" name="VAL_0x1" value="0x1"/>
+                <value caption="PWM, phase correct, 9-bit" name="VAL_0x2" value="0x2"/>
+                <value caption="PWM, phase correct, 10-bit" name="VAL_0x3" value="0x3"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0x4" value="0x4"/>
+                <value caption="Fast PWM, 8-bit" name="VAL_0x5" value="0x5"/>
+                <value caption="Fast PWM, 9-bit" name="VAL_0x6" value="0x6"/>
+                <value caption="Fast PWM, 10-bit" name="VAL_0x7" value="0x7"/>
+                <value caption="PWM, Phase and frequency correct, TOP = ICRn" name="VAL_0x8" value="0x8"/>
+                <value caption="PWM, Phase and frequency correct, TOP = OCRnA" name="VAL_0x9" value="0x9"/>
+                <value caption="PWM, Phase correct, TOP = ICRn" name="VAL_0xA" value="0xA"/>
+                <value caption="PWM, Phase correct, TOP = OCRnA" name="VAL_0xB" value="0xB"/>
+                <value caption="CTC, TOP = OCRnA" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Fast PWM, TOP = ICRn" name="VAL_0xE" value="0xE"/>
+                <value caption="Fast PWM, TOP = OCRnA" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_NOEXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="TC1_COMNX_BITF">
+                <value caption="Normal port operation, OCnA/OCnB/OCnC disconnected." name="VAL_0" value="0"/>
+                <value caption="Toggle OCnA/OCnB/OCnC on Compare Match." name="VAL_1" value="1"/>
+                <value caption="Clear OCnA/OCnB/OCnC on Compare Match (set output to low level)." name="VAL_2"
+                       value="2"/>
+                <value caption="Set OCnA/OCnB/OCnC on Compare Match (set output to high level)." name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT_MEGARF">
+                <value caption="No clock source (Timer/Counter stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="clk_IO/1 (no prescaling)" name="VAL_0x01" value="0x01"/>
+                <value caption="clk_IO/8 (from prescaler)" name="VAL_0x02" value="0x02"/>
+                <value caption="clk_IO/64 (from prescaler)" name="VAL_0x03" value="0x03"/>
+                <value caption="clk_IO/256 (from prescaler)" name="VAL_0x04" value="0x04"/>
+                <value caption="clk_IO/1024 (from prescaler)" name="VAL_0x05" value="0x05"/>
+                <value caption="External clock source on Tn pin, clock on falling edge" name="VAL_0x06" value="0x06"/>
+                <value caption="External clock source on Tn pin, clock on rising edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+            <register-group caption="Low-Power 2.4 GHz Transceiver" name="TRX24">
+                <register caption="Power Amplifier Ramp up/down Control Register" name="PARCR" offset="0x138" size="1">
+                    <bitfield caption="ext. PA Ramp Down Lead Time" mask="0xE0" name="PALTD" values="PALTD_bitf"/>
+                    <bitfield caption="ext. PA Ramp Up Lead Time" mask="0x1C" name="PALTU" values="PALTU_bitf"/>
+                    <bitfield caption="Power Amplifier Ramp Down Frequency Inversion" mask="0x02" name="PARDFI"/>
+                    <bitfield caption="Power Amplifier Ramp Up Frequency Inversion" mask="0x01" name="PARUFI"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (Low Byte)" name="MAFSA0L"
+                          offset="0x10E" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 0" mask="0xFF" name="MAFSA0L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 0 (High Byte)" name="MAFSA0H"
+                          offset="0x10F" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 0" mask="0xFF" name="MAFSA0H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (Low Byte)"
+                          name="MAFPA0L" offset="0x110" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 0 (High Byte)"
+                          name="MAFPA0H" offset="0x111" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 0" mask="0xFF"
+                              name="MAFPA0H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (Low Byte)" name="MAFSA1L"
+                          offset="0x112" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 1" mask="0xFF" name="MAFSA1L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 1 (High Byte)" name="MAFSA1H"
+                          offset="0x113" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 1" mask="0xFF" name="MAFSA1H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (Low Byte)"
+                          name="MAFPA1L" offset="0x114" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 1 (High Byte)"
+                          name="MAFPA1H" offset="0x115" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 1" mask="0xFF"
+                              name="MAFPA1H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (Low Byte)" name="MAFSA2L"
+                          offset="0x116" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 2" mask="0xFF" name="MAFSA2L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 2 (High Byte)" name="MAFSA2H"
+                          offset="0x117" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 2" mask="0xFF" name="MAFSA2H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (Low Byte)"
+                          name="MAFPA2L" offset="0x118" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 2 (High Byte)"
+                          name="MAFPA2H" offset="0x119" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 2" mask="0xFF"
+                              name="MAFPA2H"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (Low Byte)" name="MAFSA3L"
+                          offset="0x11A" size="1">
+                    <bitfield caption="MAC Short Address low Byte for Frame Filter 3" mask="0xFF" name="MAFSA3L"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register for Frame Filter 3 (High Byte)" name="MAFSA3H"
+                          offset="0x11B" size="1">
+                    <bitfield caption="MAC Short Address high Byte for Frame Filter 3" mask="0xFF" name="MAFSA3H"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (Low Byte)"
+                          name="MAFPA3L" offset="0x11C" size="1">
+                    <bitfield caption="MAC Personal Area Network ID low Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3L"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register for Frame Filter 3 (High Byte)"
+                          name="MAFPA3H" offset="0x11D" size="1">
+                    <bitfield caption="MAC Personal Area Network ID high Byte for Frame Filter 3" mask="0xFF"
+                              name="MAFPA3H"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 0" name="MAFCR0" offset="0x10C"
+                          size="1">
+                    <bitfield caption="Multiple Address Filter 3 Enable" mask="0x08" name="MAF3EN"/>
+                    <bitfield caption="Multiple Address Filter 2 Enable" mask="0x04" name="MAF2EN"/>
+                    <bitfield caption="Multiple Address Filter 1 Enable" mask="0x02" name="MAF1EN"/>
+                    <bitfield caption="Multiple Address Filter 0 Enable" mask="0x01" name="MAF0EN"/>
+                </register>
+                <register caption="Multiple Address Filter Configuration Register 1" name="MAFCR1" offset="0x10D"
+                          size="1">
+                    <bitfield caption="Set Data Pending bit for address filter 3." mask="0x80" name="AACK_3_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 3." mask="0x40"
+                              name="AACK_3_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 2." mask="0x20" name="AACK_2_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 2." mask="0x10"
+                              name="AACK_2_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 1." mask="0x08" name="AACK_1_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 1." mask="0x04"
+                              name="AACK_1_I_AM_COORD"/>
+                    <bitfield caption="Set Data Pending bit for address filter 0." mask="0x02" name="AACK_0_SET_PD"/>
+                    <bitfield caption="Enable PAN Coordinator mode for address filter 0." mask="0x01"
+                              name="AACK_0_I_AM_COORD"/>
+                </register>
+                <register caption="AES Control Register" name="AES_CTRL" offset="0x13C" size="1">
+                    <bitfield caption="Request AES Operation." mask="0x80" name="AES_REQUEST"/>
+                    <bitfield caption="Set AES Operation Mode" mask="0x20" name="AES_MODE" values="AES_MODE_BITF"/>
+                    <bitfield caption="Set AES Operation Direction" mask="0x08" name="AES_DIR"
+                              values="AES_DIRECTION_BITF"/>
+                    <bitfield caption="AES Interrupt Enable" mask="0x04" name="AES_IM"/>
+                </register>
+                <register caption="AES Status Register" name="AES_STATUS" offset="0x13D" size="1" ocd-rw="R">
+                    <bitfield caption="AES Operation Finished with Error" mask="0x80" name="AES_ER"/>
+                    <bitfield caption="AES Operation Finished with Success" mask="0x01" name="AES_DONE"/>
+                </register>
+                <register caption="AES Plain and Cipher Text Buffer Register" name="AES_STATE" offset="0x13E" size="1">
+                    <bitfield caption="AES Plain and Cipher Text Buffer" mask="0xFF" name="AES_STATE"/>
+                </register>
+                <register caption="AES Encryption and Decryption Key Buffer Register" name="AES_KEY" offset="0x13F"
+                          size="1">
+                    <bitfield caption="AES Encryption/Decryption Key Buffer" mask="0xFF" name="AES_KEY"/>
+                </register>
+                <register caption="Transceiver Status Register" name="TRX_STATUS" offset="0x141" size="1" ocd-rw="R">
+                    <bitfield caption="CCA Algorithm Status" mask="0x80" name="CCA_DONE" values="CCA_DONE_bitf"/>
+                    <bitfield caption="CCA Status Result" mask="0x40" name="CCA_STATUS" values="CCA_STATUS_bitf"/>
+                    <bitfield caption="Test mode status" mask="0x20" name="TST_STATUS" values="TST_STATUS_bitf"/>
+                    <bitfield caption="Transceiver Main Status" mask="0x1F" name="TRX_STATUS" values="TRX_STATUS_bitf"/>
+                </register>
+                <register caption="Transceiver State Control Register" name="TRX_STATE" offset="0x142" size="1">
+                    <bitfield caption="Transaction Status" mask="0xE0" name="TRAC_STATUS" values="TRAC_STATUS_bitf"/>
+                    <bitfield caption="State Control Command" mask="0x1F" name="TRX_CMD" values="TRX_CMD_bitf"/>
+                </register>
+                <register caption="Reserved" name="TRX_CTRL_0" offset="0x143" size="1">
+                    <bitfield caption="Reserved" mask="0x80" name="Res7"/>
+                    <bitfield caption="Enable Phase Measurement Unit" mask="0x40" name="PMU_EN"/>
+                    <bitfield caption="Start of Phase Measurement Unit" mask="0x20" name="PMU_START"/>
+                    <bitfield caption="PMU IF Inverse" mask="0x10" name="PMU_IF_INV"/>
+                </register>
+                <register caption="Transceiver Control Register 1" name="TRX_CTRL_1" offset="0x144" size="1">
+                    <bitfield caption="External PA support enable" mask="0x80" name="PA_EXT_EN"/>
+                    <bitfield caption="Connect Frame Start IRQ to TC1" mask="0x40" name="IRQ_2_EXT_EN"/>
+                    <bitfield caption="Enable Automatic CRC Calculation" mask="0x20" name="TX_AUTO_CRC_ON"/>
+                    <bitfield caption="Enable PLL TX filter" mask="0x10" name="PLL_TX_FLT"/>
+                </register>
+                <register caption="Transceiver Transmit Power Control Register" name="PHY_TX_PWR" offset="0x145"
+                          size="1">
+                    <bitfield caption="Transmit Power Setting" mask="0x0F" name="TX_PWR" values="TX_PWR_bitf"/>
+                </register>
+                <register caption="Receiver Signal Strength Indicator Register" name="PHY_RSSI" offset="0x146" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Received Frame CRC Status" mask="0x80" name="RX_CRC_VALID"
+                              values="RX_CRC_VALID_bitf"/>
+                    <bitfield caption="Random Value" mask="0x60" name="RND_VALUE"/>
+                    <bitfield caption="Receiver Signal Strength Indicator" mask="0x1F" name="RSSI"
+                              values="RSSI_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Energy Detection Level Register" name="PHY_ED_LEVEL" offset="0x147"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Energy Detection Level" mask="0xFF" name="ED_LEVEL" values="ED_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Clear Channel Assessment (CCA) Control Register" name="PHY_CC_CCA"
+                          offset="0x148" size="1">
+                    <bitfield caption="Manual CCA Measurement Request" mask="0x80" name="CCA_REQUEST"/>
+                    <bitfield caption="Select CCA Measurement Mode" mask="0x60" name="CCA_MODE" values="CCA_MODE_bitf"/>
+                    <bitfield caption="RX/TX Channel Selection" mask="0x1F" name="CHANNEL" values="CHANNEL_bitf"/>
+                </register>
+                <register caption="Transceiver CCA Threshold Setting Register" name="CCA_THRES" offset="0x149" size="1">
+                    <bitfield caption="CS Threshold Level for CCA Measurement" mask="0xF0" name="CCA_CS_THRES"/>
+                    <bitfield caption="ED Threshold Level for CCA Measurement" mask="0x0F" name="CCA_ED_THRES"/>
+                </register>
+                <register caption="Transceiver Receive Control Register" name="RX_CTRL" offset="0x14A" size="1">
+                    <bitfield caption="Receiver Sensitivity Control" mask="0x0F" name="PDT_THRES"
+                              values="PDT_THRES_bitf"/>
+                </register>
+                <register caption="Start of Frame Delimiter Value Register" name="SFD_VALUE" offset="0x14B" size="1">
+                    <bitfield caption="Start of Frame Delimiter Value" mask="0xFF" name="SFD_VALUE"
+                              values="SFD_VALUE_BITF"/>
+                </register>
+                <register caption="Transceiver Control Register 2" name="TRX_CTRL_2" offset="0x14C" size="1">
+                    <bitfield caption="RX Safe Mode" mask="0x80" name="RX_SAFE_MODE"/>
+                    <bitfield caption="Data Rate Selection" mask="0x03" name="OQPSK_DATA_RATE"
+                              values="OQPSK_DATA_RATE_bitf"/>
+                </register>
+                <register caption="Antenna Diversity Control Register" name="ANT_DIV" offset="0x14D" size="1">
+                    <bitfield caption="Antenna Diversity Antenna Status" mask="0x80" name="ANT_SEL"
+                              values="ANT_SEL_bitf"/>
+                    <bitfield caption="Enable Antenna Diversity" mask="0x08" name="ANT_DIV_EN"
+                              values="ANT_DIV_EN_bitf"/>
+                    <bitfield caption="Enable External Antenna Switch Control" mask="0x04" name="ANT_EXT_SW_EN"
+                              values="ANT_EXT_SW_EN_bitf"/>
+                    <bitfield caption="Static Antenna Diversity Switch Control" mask="0x03" name="ANT_CTRL"
+                              values="ANT_CTRL_bitf"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register" name="IRQ_MASK" offset="0x14E" size="1">
+                    <bitfield caption="Awake Interrupt Enable" mask="0x80" name="AWAKE_EN"/>
+                    <bitfield caption="TX_END Interrupt Enable" mask="0x40" name="TX_END_EN"/>
+                    <bitfield caption="Address Match Interrupt Enable" mask="0x20" name="AMI_EN"/>
+                    <bitfield caption="End of ED Measurement Interrupt Enable" mask="0x10" name="CCA_ED_DONE_EN"/>
+                    <bitfield caption="RX_END Interrupt Enable" mask="0x08" name="RX_END_EN"/>
+                    <bitfield caption="RX_START Interrupt Enable" mask="0x04" name="RX_START_EN"/>
+                    <bitfield caption="PLL Unlock Interrupt Enable" mask="0x02" name="PLL_UNLOCK_EN"/>
+                    <bitfield caption="PLL Lock Interrupt Enable" mask="0x01" name="PLL_LOCK_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register" name="IRQ_STATUS" offset="0x14F" size="1">
+                    <bitfield caption="Awake Interrupt Status" mask="0x80" name="AWAKE"/>
+                    <bitfield caption="TX_END Interrupt Status" mask="0x40" name="TX_END"/>
+                    <bitfield caption="Address Match Interrupt Status" mask="0x20" name="AMI"/>
+                    <bitfield caption="End of ED Measurement Interrupt Status" mask="0x10" name="CCA_ED_DONE"/>
+                    <bitfield caption="RX_END Interrupt Status" mask="0x08" name="RX_END"/>
+                    <bitfield caption="RX_START Interrupt Status" mask="0x04" name="RX_START"/>
+                    <bitfield caption="PLL Unlock Interrupt Status" mask="0x02" name="PLL_UNLOCK"/>
+                    <bitfield caption="PLL Lock Interrupt Status" mask="0x01" name="PLL_LOCK"/>
+                </register>
+                <register caption="Transceiver Interrupt Enable Register 1" name="IRQ_MASK1" offset="0xBE" size="1">
+                    <bitfield caption="Address Match Interrupt enable Address filter 3" mask="0x10"
+                              name="MAF_3_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 2" mask="0x08"
+                              name="MAF_2_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 1" mask="0x04"
+                              name="MAF_1_AMI_EN"/>
+                    <bitfield caption="Address Match Interrupt enable Address filter 0" mask="0x02"
+                              name="MAF_0_AMI_EN"/>
+                    <bitfield caption="Transmit Start Interrupt enable" mask="0x01" name="TX_START_EN"/>
+                </register>
+                <register caption="Transceiver Interrupt Status Register 1" name="IRQ_STATUS1" offset="0xBF" size="1">
+                    <bitfield caption="Address Match Interrupt Status Address filter 3" mask="0x10" name="MAF_3_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 2" mask="0x08" name="MAF_2_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 1" mask="0x04" name="MAF_1_AMI"/>
+                    <bitfield caption="Address Match Interrupt Status Address filter 0" mask="0x02" name="MAF_0_AMI"/>
+                    <bitfield caption="Transmit Start Interrupt Status" mask="0x01" name="TX_START"/>
+                </register>
+                <register caption="Voltage Regulator Control and Status Register" name="VREG_CTRL" offset="0x150"
+                          size="1">
+                    <bitfield caption="Use External AVDD Regulator" mask="0x80" name="AVREG_EXT"
+                              values="AVREG_EXT_BITF"/>
+                    <bitfield caption="AVDD Supply Voltage Valid" mask="0x40" name="AVDD_OK" values="AVDD_OK_BITF"/>
+                    <bitfield caption="Use External DVDD Regulator" mask="0x08" name="DVREG_EXT"
+                              values="DVREG_EXT_BITF"/>
+                    <bitfield caption="DVDD Supply Voltage Valid" mask="0x04" name="DVDD_OK" values="DVDD_OK_BITF"/>
+                </register>
+                <register caption="Battery Monitor Control and Status Register" name="BATMON" offset="0x151" size="1">
+                    <bitfield caption="Battery Monitor Interrupt Status" mask="0x80" name="BAT_LOW"/>
+                    <bitfield caption="Battery Monitor Interrupt Enable" mask="0x40" name="BAT_LOW_EN"/>
+                    <bitfield caption="Battery Monitor Status" mask="0x20" name="BATMON_OK" values="BATMON_OK_bitf"/>
+                    <bitfield caption="Battery Monitor Voltage Range" mask="0x10" name="BATMON_HR"
+                              values="BATMON_HR_bitf"/>
+                    <bitfield caption="Battery Monitor Threshold Voltage" mask="0x0F" name="BATMON_VTH"
+                              values="BATMON_VTH_bitf"/>
+                </register>
+                <register caption="Crystal Oscillator Control Register" name="XOSC_CTRL" offset="0x152" size="1">
+                    <bitfield caption="Crystal Oscillator Operating Mode" mask="0xF0" name="XTAL_MODE"
+                              values="XTAL_MODE_BITF"/>
+                    <bitfield caption="Crystal Oscillator Load Capacitance Trimming" mask="0x0F" name="XTAL_TRIM"
+                              values="XTAL_TRIM_bitf"/>
+                </register>
+                <register caption="Channel Control Register 0" name="CC_CTRL_0" offset="0x153" size="1">
+                    <bitfield caption="Channel Number" mask="0xFF" name="CC_NUMBER"/>
+                </register>
+                <register caption="Channel Control Register 1" name="CC_CTRL_1" offset="0x154" size="1">
+                    <bitfield caption="Channel Band" mask="0x0F" name="CC_BAND"/>
+                </register>
+                <register caption="Transceiver Receiver Sensitivity Control Register" name="RX_SYN" offset="0x155"
+                          size="1">
+                    <bitfield caption="Prevent Frame Reception" mask="0x80" name="RX_PDT_DIS"/>
+                    <bitfield caption="Receiver Override Function" mask="0x40" name="RX_OVERRIDE"/>
+                    <bitfield caption="Reduce Receiver Sensitivity" mask="0x0F" name="RX_PDT_LEVEL"
+                              values="RX_PDT_LEVEL_BITF"/>
+                </register>
+                <register caption="Transceiver Reduced Power Consumption Control" name="TRX_RPC" offset="0x156"
+                          size="1">
+                    <bitfield caption="Smart Receiving Mode Timing" mask="0xC0" name="RX_RPC_CTRL"
+                              values="RX_RPC_CTRL_BITF"/>
+                    <bitfield caption="Reciver Smart Receiving Mode Enable" mask="0x20" name="RX_RPC_EN"/>
+                    <bitfield caption="Smart Receiving Mode Reduced Sensitivity Enable" mask="0x10" name="PDT_RPC_EN"/>
+                    <bitfield caption="PLL Smart Receiving Mode Enable" mask="0x08" name="PLL_RPC_EN"/>
+                    <bitfield caption="Reserved" mask="0x04" name="Res0"/>
+                    <bitfield caption="Smart Receiving Mode IPAN Handling Enable" mask="0x02" name="IPAN_RPC_EN"/>
+                    <bitfield caption="Smart Receiving in Extended Operating Modes Enable" mask="0x01"
+                              name="XAH_RPC_EN"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 1" name="XAH_CTRL_1" offset="0x157"
+                          size="1">
+                    <bitfield caption="Filter Reserved Frames" mask="0x20" name="AACK_FLTR_RES_FT"/>
+                    <bitfield caption="Process Reserved Frames" mask="0x10" name="AACK_UPLD_RES_FT"/>
+                    <bitfield caption="Reduce Acknowledgment Time" mask="0x04" name="AACK_ACK_TIME"
+                              values="AACK_ACK_TIME_bitf"/>
+                    <bitfield caption="Enable Promiscuous Mode" mask="0x02" name="AACK_PROM_MODE"/>
+                </register>
+                <register caption="Transceiver Filter Tuning Control Register" name="FTN_CTRL" offset="0x158" size="1">
+                    <bitfield caption="Start Calibration Loop of Filter Tuning Network" mask="0x80" name="FTN_START"/>
+                </register>
+                <register caption="Transceiver Center Frequency Calibration Control Register" name="PLL_CF"
+                          offset="0x15A" size="1">
+                    <bitfield caption="Start Center Frequency Calibration" mask="0x80" name="PLL_CF_START"/>
+                </register>
+                <register caption="Transceiver Delay Cell Calibration Control Register" name="PLL_DCU" offset="0x15B"
+                          size="1">
+                    <bitfield caption="Start Delay Cell Calibration" mask="0x80" name="PLL_DCU_START"/>
+                </register>
+                <register caption="Device Identification Register (Part Number)" name="PART_NUM" offset="0x15C" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Part Number" mask="0xFF" name="PART_NUM" values="PART_NUM_bitf"/>
+                </register>
+                <register caption="Device Identification Register (Version Number)" name="VERSION_NUM" offset="0x15D"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Version Number" mask="0xFF" name="VERSION_NUM" values="VERSION_NUM_2_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID Low Byte)" name="MAN_ID_0"
+                          offset="0x15E" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x80" name="MAN_ID_07"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x40" name="MAN_ID_06"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x20" name="MAN_ID_05"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x10" name="MAN_ID_04"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x08" name="MAN_ID_03"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x04" name="MAN_ID_02"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x02" name="MAN_ID_01"/>
+                    <bitfield caption="Manufacturer ID (Low Byte)" mask="0x01" name="MAN_ID_00" values="MAN_ID_0_BITF"/>
+                </register>
+                <register caption="Device Identification Register (Manufacture ID High Byte)" name="MAN_ID_1"
+                          offset="0x15F" size="1" ocd-rw="R">
+                    <bitfield caption="Manufacturer ID (High Byte)" mask="0xFF" name="MAN_ID_" values="MAN_ID_1_BITF"
+                              lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (Low Byte)" name="SHORT_ADDR_0" offset="0x160"
+                          size="1">
+                    <bitfield caption="MAC Short Address" mask="0x80" name="SHORT_ADDR_07"/>
+                    <bitfield caption="MAC Short Address" mask="0x40" name="SHORT_ADDR_06"/>
+                    <bitfield caption="MAC Short Address" mask="0x20" name="SHORT_ADDR_05"/>
+                    <bitfield caption="MAC Short Address" mask="0x10" name="SHORT_ADDR_04"/>
+                    <bitfield caption="MAC Short Address" mask="0x08" name="SHORT_ADDR_03"/>
+                    <bitfield caption="MAC Short Address" mask="0x04" name="SHORT_ADDR_02"/>
+                    <bitfield caption="MAC Short Address" mask="0x02" name="SHORT_ADDR_01"/>
+                    <bitfield caption="MAC Short Address" mask="0x01" name="SHORT_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC Short Address Register (High Byte)" name="SHORT_ADDR_1"
+                          offset="0x161" size="1">
+                    <bitfield caption="MAC Short Address" mask="0xFF" name="SHORT_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (Low Byte)" name="PAN_ID_0"
+                          offset="0x162" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x80" name="PAN_ID_07"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x40" name="PAN_ID_06"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x20" name="PAN_ID_05"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x10" name="PAN_ID_04"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x08" name="PAN_ID_03"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x04" name="PAN_ID_02"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x02" name="PAN_ID_01"/>
+                    <bitfield caption="MAC Personal Area Network ID" mask="0x01" name="PAN_ID_00"/>
+                </register>
+                <register caption="Transceiver Personal Area Network ID Register (High Byte)" name="PAN_ID_1"
+                          offset="0x163" size="1">
+                    <bitfield caption="MAC Personal Area Network ID" mask="0xFF" name="PAN_ID_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 0" name="IEEE_ADDR_0" offset="0x164" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0x80" name="IEEE_ADDR_07"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x40" name="IEEE_ADDR_06"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x20" name="IEEE_ADDR_05"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x10" name="IEEE_ADDR_04"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x08" name="IEEE_ADDR_03"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x04" name="IEEE_ADDR_02"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x02" name="IEEE_ADDR_01"/>
+                    <bitfield caption="MAC IEEE Address" mask="0x01" name="IEEE_ADDR_00"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 1" name="IEEE_ADDR_1" offset="0x165" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="10"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 2" name="IEEE_ADDR_2" offset="0x166" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="20"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 3" name="IEEE_ADDR_3" offset="0x167" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="30"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 4" name="IEEE_ADDR_4" offset="0x168" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="40"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 5" name="IEEE_ADDR_5" offset="0x169" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="50"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 6" name="IEEE_ADDR_6" offset="0x16A" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="60"/>
+                </register>
+                <register caption="Transceiver MAC IEEE Address Register 7" name="IEEE_ADDR_7" offset="0x16B" size="1">
+                    <bitfield caption="MAC IEEE Address" mask="0xFF" name="IEEE_ADDR_" lsb="70"/>
+                </register>
+                <register caption="Transceiver Extended Operating Mode Control Register" name="XAH_CTRL_0"
+                          offset="0x16C" size="1">
+                    <bitfield caption="Maximum Number of Frame Re-transmission Attempts" mask="0xF0"
+                              name="MAX_FRAME_RETRIES" values="MAX_FRAME_RETRIES_bitf"/>
+                    <bitfield caption="Maximum Number of CSMA-CA Procedure Repetition Attempts" mask="0x0E"
+                              name="MAX_CSMA_RETRIES" values="MAX_CSMA_RETRIES_bitf"/>
+                    <bitfield caption="Set Slotted Acknowledgment" mask="0x01" name="SLOTTED_OPERATION"
+                              values="SLOTTED_OPERATION_BITF"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Random Number Generator Seed Register" name="CSMA_SEED_0"
+                          offset="0x16D" size="1">
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x80" name="CSMA_SEED_07"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x40" name="CSMA_SEED_06"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x20" name="CSMA_SEED_05"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x10" name="CSMA_SEED_04"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x08" name="CSMA_SEED_03"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x04" name="CSMA_SEED_02"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x02" name="CSMA_SEED_01"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x01" name="CSMA_SEED_00"/>
+                </register>
+                <register caption="Transceiver Acknowledgment Frame Control Register 2" name="CSMA_SEED_1"
+                          offset="0x16E" size="1">
+                    <bitfield caption="Acknowledgment Frame Filter Mode" mask="0xC0" name="AACK_FVN_MODE"
+                              values="AACK_FVN_MODE_bitf"/>
+                    <bitfield caption="Set Frame Pending Sub-field" mask="0x20" name="AACK_SET_PD"/>
+                    <bitfield caption="Disable Acknowledgment Frame Transmission" mask="0x10" name="AACK_DIS_ACK"/>
+                    <bitfield caption="Set Personal Area Network Coordinator" mask="0x08" name="AACK_I_AM_COORD"/>
+                    <bitfield caption="Seed Value for CSMA Random Number Generator" mask="0x07" name="CSMA_SEED_1"/>
+                </register>
+                <register caption="Transceiver CSMA-CA Back-off Exponent Control Register" name="CSMA_BE" offset="0x16F"
+                          size="1">
+                    <bitfield caption="Maximum Back-off Exponent" mask="0xF0" name="MAX_BE" values="MAX_BE_bitf"/>
+                    <bitfield caption="Minimum Back-off Exponent" mask="0x0F" name="MIN_BE" values="MIN_BE_bitf"/>
+                </register>
+                <register caption="Transceiver Digital Test Control Register" name="TST_CTRL_DIGI" offset="0x176"
+                          size="1">
+                    <bitfield caption="Digital Test Controller Register" mask="0x0F" name="TST_CTRL_DIG"
+                              values="TST_CTRL_DIG_BITF"/>
+                </register>
+                <register caption="Transceiver Received Frame Length Register" name="TST_RX_LENGTH" offset="0x17B"
+                          size="1">
+                    <bitfield caption="Received Frame Length" mask="0xFF" name="RX_LENGTH"/>
+                </register>
+                <register caption="Start of frame buffer" name="TRXFBST" offset="0x180" size="1" mask="0xFF"/>
+                <register caption="End of frame buffer" name="TRXFBEND" offset="0x1FF" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="PALTD_bitf">
+                <value caption="-3us" name="PALTD_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTD_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTD_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTD_0US" value="3"/>
+                <value caption="1us" name="PALTD_1US" value="4"/>
+                <value caption="2us" name="PALTD_2US" value="5"/>
+                <value caption="3us" name="PALTD_3US" value="6"/>
+                <value caption="4us" name="PALTD_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="PALTU_bitf">
+                <value caption="-3us" name="PALTU_MINUS_3US" value="0"/>
+                <value caption="-2us" name="PALTU_MINUS_2US" value="1"/>
+                <value caption="-1us" name="PALTU_MINUS_1US" value="2"/>
+                <value caption="0us" name="PALTU_0US" value="3"/>
+                <value caption="1us" name="PALTU_1US" value="4"/>
+                <value caption="2us" name="PALTU_2US" value="5"/>
+                <value caption="3us" name="PALTU_3US" value="6"/>
+                <value caption="4us" name="PALTU_4US" value="7"/>
+            </value-group>
+            <value-group caption="" name="AES_MODE_BITF">
+                <value caption="AES Mode is ECB (Electronic Code Book)." name="AES_MODE_ECB" value="0"/>
+                <value caption="AES Mode is CBC (Cipher Block Chaining)." name="AES_MODE_CBC" value="1"/>
+            </value-group>
+            <value-group caption="" name="AES_DIRECTION_BITF">
+                <value caption="AES operation is encryption." name="AES_DIR_ENC" value="0"/>
+                <value caption="AES operation is decryption." name="AES_DIR_DEC" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_DONE_bitf">
+                <value caption="CCA calculation not finished" name="CCA_NOT_FIN" value="0"/>
+                <value caption="CCA calculation finished" name="CCA_FIN" value="1"/>
+            </value-group>
+            <value-group caption="" name="CCA_STATUS_bitf">
+                <value caption="Channel indicated as busy." name="CCA_BUSY" value="0"/>
+                <value caption="Channel indicated as idle." name="CCA_IDLE" value="1"/>
+            </value-group>
+            <value-group caption="" name="TST_STATUS_bitf">
+                <value caption="Test mode is disabled." name="TST_DISABLED" value="0"/>
+                <value caption="Test mode is active." name="TST_ENABLED" value="1"/>
+            </value-group>
+            <value-group caption="" name="TRX_STATUS_bitf">
+                <value caption="P_ON" name="P_ON" value="0x00"/>
+                <value caption="BUSY_RX" name="BUSY_RX" value="0x01"/>
+                <value caption="BUSY_TX" name="BUSY_TX" value="0x02"/>
+                <value caption="RX_ON" name="RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON" name="PLL_ON" value="0x09"/>
+                <value caption="SLEEP" name="SLEEP" value="0x0F"/>
+                <value caption="BUSY_RX_AACK" name="BUSY_RX_AACK" value="0x11"/>
+                <value caption="BUSY_TX_ARET" name="BUSY_TX_ARET" value="0x12"/>
+                <value caption="RX_AACK_ON" name="RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="TX_ARET_ON" value="0x19"/>
+                <value caption="STATE_TRANSITION_IN_PROGRESS" name="STATE_TRANSITION_IN_PROGRESS" value="0x1F"/>
+            </value-group>
+            <value-group caption="" name="TRAC_STATUS_bitf">
+                <value caption="SUCCESS (RX_AACK, TX_ARET)" name="TRAC_SUCCESS" value="0"/>
+                <value caption="SUCCESS_DATA_PENDING (TX_ARET)" name="TRAC_SUCCESS_DATA_PENDING" value="1"/>
+                <value caption="SUCCESS_WAIT_FOR_ACK (RX_AACK)" name="TRAC_SUCCESS_WAIT_FOR_ACK" value="2"/>
+                <value caption="CHANNEL_ACCESS_FAILURE (TX_ARET)" name="TRAC_CHANNEL_ACCESS_FAILURE" value="3"/>
+                <value caption="NO_ACK (TX_ARET)" name="TRAC_NO_ACK" value="5"/>
+                <value caption="INVALID (RX_AACK, TX_ARET)" name="TRAC_INVALID" value="7"/>
+            </value-group>
+            <value-group caption="" name="TRX_CMD_bitf">
+                <value caption="NOP" name="CMD_NOP" value="0x00"/>
+                <value caption="TX_START" name="CMD_TX_START" value="0x02"/>
+                <value caption="FORCE_TRX_OFF" name="CMD_FORCE_TRX_OFF" value="0x03"/>
+                <value caption="FORCE_PLL_ON" name="CMD_FORCE_PLL_ON" value="0x04"/>
+                <value caption="RX_ON" name="CMD_RX_ON" value="0x06"/>
+                <value caption="TRX_OFF" name="CMD_TRX_OFF" value="0x08"/>
+                <value caption="PLL_ON (TX_ON)" name="CMD_PLL_ON" value="0x09"/>
+                <value caption="RX_AACK_ON" name="CMD_RX_AACK_ON" value="0x16"/>
+                <value caption="TX_ARET_ON" name="CMD_TX_ARET_ON" value="0x19"/>
+            </value-group>
+            <value-group caption="" name="TX_PWR_bitf">
+                <value caption="3.5 dBm" name="VAL_0" value="0"/>
+                <value caption="3.3 dBm" name="VAL_1" value="1"/>
+                <value caption="2.8 dBm" name="VAL_2" value="2"/>
+                <value caption="2.3 dBm" name="VAL_3" value="3"/>
+                <value caption="1.8 dBm" name="VAL_4" value="4"/>
+                <value caption="1.2 dBm" name="VAL_5" value="5"/>
+                <value caption="0.5 dBm" name="VAL_6" value="6"/>
+                <value caption="-0.5 dBm" name="VAL_7" value="7"/>
+                <value caption="-1.5 dBm" name="VAL_8" value="8"/>
+                <value caption="-2.5 dBm" name="VAL_9" value="9"/>
+                <value caption="-3.5 dBm" name="VAL_10" value="10"/>
+                <value caption="-4.5 dBm" name="VAL_11" value="11"/>
+                <value caption="-6.5 dBm" name="VAL_12" value="12"/>
+                <value caption="-8.5 dBm" name="VAL_13" value="13"/>
+                <value caption="-11.5 dBm" name="VAL_14" value="14"/>
+                <value caption="-16.5 dBm" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="RX_CRC_VALID_bitf">
+                <value caption="CRC (FCS) not valid" name="CRC_INVALID" value="0"/>
+                <value caption="CRC (FCS) valid" name="CRC_VALID" value="1"/>
+            </value-group>
+            <value-group caption="" name="RSSI_VALUE_BITF">
+                <value caption="Minimum RSSI value: P(RF) &lt; -90 dBm" name="RSSI_MIN" value="0"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+3 · (RSSI-1) [dBm]" name="RSSI_MIN_PLUS_3dB" value="1"/>
+                <value caption="..." name="VAL_2" value="2"/>
+                <value caption="Maximum RSSI value: P(RF) ≥ -10 dBm" name="RSSI_MAX" value="28"/>
+            </value-group>
+            <value-group caption="" name="ED_LEVEL_BITF">
+                <value caption="Minimum result of last ED measurement" name="ED_MIN" value="0x00"/>
+                <value caption="P(RF) = RSSI_BASE_VAL+ED [dBm]" name="ED_MIN_PLUS_1dB" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="Maximum result of last ED measurement" name="ED_MAX" value="0x54"/>
+                <value caption="Reset value" name="ED_RESET" value="0xFF"/>
+            </value-group>
+            <value-group caption="" name="CCA_MODE_bitf">
+                <value caption="Mode 3a, Carrier sense OR energy above threshold" name="CCA_CS_OR_ED" value="0"/>
+                <value caption="Mode 1, Energy above threshold" name="CCA_ED" value="1"/>
+                <value caption="Mode 2, Carrier sense only" name="CCA_CS" value="2"/>
+                <value caption="Mode 3b, Carrier sense AND energy above threshold" name="CCA_CS_AND_ED" value="3"/>
+            </value-group>
+            <value-group caption="" name="CHANNEL_bitf">
+                <value caption="2405 MHz" name="F_2405MHZ" value="11"/>
+                <value caption="2410 MHz" name="F_2410MHZ" value="12"/>
+                <value caption="2415 MHz" name="F_2415MHZ" value="13"/>
+                <value caption="2420 MHz" name="F_2420MHZ" value="14"/>
+                <value caption="2425 MHz" name="F_2425MHZ" value="15"/>
+                <value caption="2430 MHz" name="F_2430MHZ" value="16"/>
+                <value caption="2435 MHz" name="F_2435MHZ" value="17"/>
+                <value caption="2440 MHz" name="F_2440MHZ" value="18"/>
+                <value caption="2445 MHz" name="F_2445MHZ" value="19"/>
+                <value caption="2450 MHz" name="F_2450MHZ" value="20"/>
+                <value caption="2455 MHz" name="F_2455MHZ" value="21"/>
+                <value caption="2460 MHz" name="F_2460MHZ" value="22"/>
+                <value caption="2465 MHz" name="F_2465MHZ" value="23"/>
+                <value caption="2470 MHz" name="F_2470MHZ" value="24"/>
+                <value caption="2475 MHz" name="F_2475MHZ" value="25"/>
+                <value caption="2480 MHz" name="F_2480MHZ" value="26"/>
+            </value-group>
+            <value-group caption="" name="PDT_THRES_bitf">
+                <value caption="Reset value, to be used if Antenna Diversity algorithm is disabled"
+                       name="PDT_THRES_ANT_DIV_OFF" value="0x7"/>
+                <value caption="Recommended correlator threshold for Antenna Diversity operation"
+                       name="PDT_THRES_ANT_DIV_ON" value="0x3"/>
+            </value-group>
+            <value-group caption="" name="SFD_VALUE_BITF">
+                <value caption="IEEE 802.15.4 compliant value of the SFD" name="IEEE_SFD" value="0xA7"/>
+            </value-group>
+            <value-group caption="" name="OQPSK_DATA_RATE_bitf">
+                <value caption="250 kb/s (IEEE 802.15.4 compliant)" name="RATE_250KB" value="0"/>
+                <value caption="500 kb/s" name="RATE_500KB" value="1"/>
+                <value caption="1000 kb/s" name="RATE_1000KB" value="2"/>
+                <value caption="2000 kb/s" name="RATE_2000KB" value="3"/>
+            </value-group>
+            <value-group caption="" name="ANT_SEL_bitf">
+                <value caption="Antenna 0" name="ANTENNA_0" value="0"/>
+                <value caption="Antenna 1" name="ANTENNA_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_DIV_EN_bitf">
+                <value caption="Antenna Diversity algorithm disabled" name="VAL_0" value="0"/>
+                <value caption="Antenna Diversity algorithm enabled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_EXT_SW_EN_bitf">
+                <value caption="Antenna Diversity RF switch control disabled" name="ANT_DIV_EXT_SW_DIS" value="0"/>
+                <value caption="Antenna Diversity RF switch control enabled" name="ANT_DIV_EXT_SW_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="ANT_CTRL_bitf">
+                <value caption="Reserved" name="VAL_0" value="0"/>
+                <value caption="Antenna 1: DIG1=H, DIG2=L" name="ANT_1" value="1"/>
+                <value caption="Antenna 0: DIG1=L, DIG2=H" name="ANT_0" value="2"/>
+                <value caption="Default value for ANT_EXT_SW_EN=0; Mandatory setting for applications not using Antenna Diversity"
+                       name="ANT_RESET" value="3"/>
+            </value-group>
+            <value-group caption="" name="AVREG_EXT_BITF">
+                <value caption="Internal AVDD voltage regulator for the analog section is enabled." name="AVDD_INT"
+                       value="0"/>
+                <value caption="Internal AVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the analog section."
+                       name="AVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="AVDD_OK_BITF">
+                <value caption="Analog voltage regulator disabled or supply voltage not stable" name="VAL_0" value="0"/>
+                <value caption="Analog supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVREG_EXT_BITF">
+                <value caption="Internal DVDD voltage regulator for the digital section is enabled." name="DVDD_INT"
+                       value="0"/>
+                <value caption="Internal DVDD voltage regulator is disabled; use external regulated 1.8V supply voltage for the digital section."
+                       name="DVDD_EXT" value="1"/>
+            </value-group>
+            <value-group caption="" name="DVDD_OK_BITF">
+                <value caption="Digital voltage regulator disabled or supply voltage not stable" name="VAL_0"
+                       value="0"/>
+                <value caption="Digital supply voltage has settled" name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_OK_bitf">
+                <value caption="The battery voltage is below the threshold." name="VAL_0" value="0"/>
+                <value caption="The battery voltage is above the threshold." name="VAL_1" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_HR_bitf">
+                <value caption="Enables the low range, see BATMON_VTH" name="BATMON_HR_DIS" value="0"/>
+                <value caption="Enables the high range, see BATMON_VTH" name="BATMON_HR_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="BATMON_VTH_bitf">
+                <value caption="2.550V / 1.70V (BATMON_HR=1/0)" name="VAL_0x0" value="0x0"/>
+                <value caption="2.625V / 1.75V (BATMON_HR=1/0)" name="VAL_0x1" value="0x1"/>
+                <value caption="2.700V / 1.80V (BATMON_HR=1/0)" name="VAL_0x2" value="0x2"/>
+                <value caption="2.775V / 1.85V (BATMON_HR=1/0)" name="VAL_0x3" value="0x3"/>
+                <value caption="2.850V / 1.90V (BATMON_HR=1/0)" name="VAL_0x4" value="0x4"/>
+                <value caption="2.925V / 1.95V (BATMON_HR=1/0)" name="VAL_0x5" value="0x5"/>
+                <value caption="3.000V / 2.00V (BATMON_HR=1/0)" name="VAL_0x6" value="0x6"/>
+                <value caption="3.075V / 2.05V (BATMON_HR=1/0)" name="VAL_0x7" value="0x7"/>
+                <value caption="3.150V / 2.10V (BATMON_HR=1/0)" name="VAL_0x8" value="0x8"/>
+                <value caption="3.225V / 2.15V (BATMON_HR=1/0)" name="VAL_0x9" value="0x9"/>
+                <value caption="3.300V / 2.20V (BATMON_HR=1/0)" name="VAL_0xA" value="0xA"/>
+                <value caption="3.375V / 2.25V (BATMON_HR=1/0)" name="VAL_0xB" value="0xB"/>
+                <value caption="3.450V / 2.30V (BATMON_HR=1/0)" name="VAL_0xC" value="0xC"/>
+                <value caption="3.525V / 2.35V (BATMON_HR=1/0)" name="VAL_0xD" value="0xD"/>
+                <value caption="3.600V / 2.40V (BATMON_HR=1/0)" name="VAL_0xE" value="0xE"/>
+                <value caption="3.675V / 2.45V (BATMON_HR=1/0)" name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_MODE_BITF">
+                <value caption="Internal crystal oscillator disabled; use external reference frequency." name="VAL_0x4"
+                       value="0x4"/>
+                <value caption="Internal crystal oscillator enabled; amplitude regulation of oscillation enabled."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="XTAL_TRIM_bitf">
+                <value caption="0.0 pF, trimming capacitors disconnected" name="XTAL_TRIM_MIN" value="0x0"/>
+                <value caption="0.3 pF, trimming capacitor switched on" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="4.5 pF, trimming capacitor switched on" name="XTAL_TRIM_MAX" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_PDT_LEVEL_BITF">
+                <value caption="RX_THRES ≤ RSSI_BASE_VAL (Reset value); RSSI value not considered"
+                       name="RX_PDT_LEVEL_MIN" value="0x0"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 0 · 3; RSSI &gt; -90 dBm" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 13 · 3; RSSI &gt; -51 dBm" name="VAL_0xE" value="0xE"/>
+                <value caption="RX_THRES &gt; RSSI_BASE_VAL + 14 · 3; RSSI &gt; -48 dBm" name="RX_PDT_LEVEL_MAX"
+                       value="0xF"/>
+            </value-group>
+            <value-group caption="" name="RX_RPC_CTRL_BITF">
+                <value caption="Activates minimum power saving behaviour for smart receiving mode" name="VAL_0"
+                       value="0"/>
+                <value caption="Reserved" name="VAL_1" value="1"/>
+                <value caption="Reserved" name="VAL_2" value="2"/>
+                <value caption="Activates maximum power saving behaviour for smart receiving mode" name="VAL_3"
+                       value="3"/>
+            </value-group>
+            <value-group caption="" name="AACK_ACK_TIME_bitf">
+                <value caption="12 symbols acknowledgment time" name="AACK_ACK_TIME_12_SYM" value="0"/>
+                <value caption=" 2 symbols acknowledgment time" name="AACK_ACK_TIME_2_SYM" value="1"/>
+            </value-group>
+            <value-group caption="" name="PART_NUM_bitf">
+                <value caption="ATmega128RFA1 part number" name="P_ATmega128RFA1" value="0x83"/>
+                <value caption="RFA2 family" name="P_RFA2" value="0x93"/>
+                <value caption="RFR2 family" name="P_RFR2" value="0x94"/>
+            </value-group>
+            <value-group caption="" name="VERSION_NUM_2_BITF">
+                <value caption="Revision A" name="REV_A" value="12"/>
+                <value caption="Revision B" name="REV_B" value="1"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_0_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [7:0] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_0" value="0x1f"/>
+            </value-group>
+            <value-group caption="" name="MAN_ID_1_BITF">
+                <value caption="Atmel JEDEC manufacturer ID, bits [15:8] of 32 bit manufacturer ID: 00 00 00 1F"
+                       name="ATMEL_BYTE_1" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="MAX_FRAME_RETRIES_bitf">
+                <value caption="Retransmission of frame is not attempted." name="VAL_0x0" value="0x0"/>
+                <value caption="Retransmission of frame is attempted once." name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Retransmission of frame is attempted 15 times." name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="MAX_CSMA_RETRIES_bitf">
+                <value caption="No repetition of CSMA-CA procedure" name="VAL_0x0" value="0x0"/>
+                <value caption="One repetition of CSMA-CA procedure" name="VAL_0x1" value="0x1"/>
+                <value caption="..." name="VAL_0x2" value="0x2"/>
+                <value caption="Five repetitions (highest IEEE 802.15.4 compliant value)" name="VAL_0x5" value="0x5"/>
+                <value caption="Reserved" name="VAL_0x6" value="0x6"/>
+                <value caption="Immediate frame re-transmission without performing CSMA-CA" name="VAL_0x7" value="0x7"/>
+            </value-group>
+            <value-group caption="" name="SLOTTED_OPERATION_BITF">
+                <value caption="The radio transceiver operates in unslotted mode. An acknowledgment frame is automatically sent if requested."
+                       name="SLOTTED_OP_DIS" value="0"/>
+                <value caption="The transmission of an acknowledgment frame has to be controlled by the microcontroller."
+                       name="SLOTTED_OP_EN" value="1"/>
+            </value-group>
+            <value-group caption="" name="AACK_FVN_MODE_bitf">
+                <value caption="Acknowledge frames with version number 0" name="VAL_0" value="0"/>
+                <value caption="Acknowledge frames with version number 0 or 1" name="VAL_1" value="1"/>
+                <value caption="Acknowledge frames with version number 0 or 1 or 2" name="VAL_2" value="2"/>
+                <value caption="Acknowledge frames independent of frame version number" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="MAX_BE_bitf">
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_1" value="1"/>
+                <value caption="This value is not valid for the maximum back-off exponent." name="VAL_2" value="2"/>
+                <value caption="Minimum, IEEE compliant value for the maximum back-off exponent." name="VAL_3"
+                       value="3"/>
+                <value caption="..." name="VAL_4" value="4"/>
+                <value caption="Maximum, IEEE compliant value for the maximum back-off exponent." name="VAL_8"
+                       value="8"/>
+            </value-group>
+            <value-group caption="" name="MIN_BE_bitf">
+                <value caption="Minimum value of minimum back-off exponent." name="VAL_0" value="0"/>
+                <value caption="..." name="VAL_1" value="1"/>
+                <value caption="Maximum value of minimum back-off exponent. MIN_BE must be smaller or equal to MAX_BE."
+                       name="VAL_8" value="8"/>
+            </value-group>
+            <value-group caption="" name="TST_CTRL_DIG_BITF">
+                <value caption="NORMAL (no test is active)" name="VAL_0" value="0"/>
+                <value caption="TST_CONT_TX (continuous transmit)" name="VAL_15" value="15"/>
+            </value-group>
+        </module>
+        <module caption="MAC Symbol Counter" name="SYMCNT">
+            <register-group caption="MAC Symbol Counter" name="SYMCNT">
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" name="SCTSTRHH"
+                          offset="0xFC" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCTSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" name="SCTSTRHL"
+                          offset="0xFB" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCTSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" name="SCTSTRLH"
+                          offset="0xFA" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCTSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" name="SCTSTRLL"
+                          offset="0xF9" size="1">
+                    <bitfield caption="Symbol Counter Transmit Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCTSTRLL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HH-Byte" name="SCOCR1HH" offset="0xF8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HH-Byte" mask="0xFF" name="SCOCR1HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 HL-Byte" name="SCOCR1HL" offset="0xF7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 HL-Byte" mask="0xFF" name="SCOCR1HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LH-Byte" name="SCOCR1LH" offset="0xF6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LH-Byte" mask="0xFF" name="SCOCR1LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 1 LL-Byte" name="SCOCR1LL" offset="0xF5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 1 LL-Byte" mask="0xFF" name="SCOCR1LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HH-Byte" name="SCOCR2HH" offset="0xF4"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HH-Byte" mask="0xFF" name="SCOCR2HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 HL-Byte" name="SCOCR2HL" offset="0xF3"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 HL-Byte" mask="0xFF" name="SCOCR2HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LH-Byte" name="SCOCR2LH" offset="0xF2"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LH-Byte" mask="0xFF" name="SCOCR2LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 2 LL-Byte" name="SCOCR2LL" offset="0xF1"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 2 LL-Byte" mask="0xFF" name="SCOCR2LL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HH-Byte" name="SCOCR3HH" offset="0xF0"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HH-Byte" mask="0xFF" name="SCOCR3HH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 HL-Byte" name="SCOCR3HL" offset="0xEF"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 HL-Byte" mask="0xFF" name="SCOCR3HL"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LH-Byte" name="SCOCR3LH" offset="0xEE"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LH-Byte" mask="0xFF" name="SCOCR3LH"/>
+                </register>
+                <register caption="Symbol Counter Output Compare Register 3 LL-Byte" name="SCOCR3LL" offset="0xED"
+                          size="1">
+                    <bitfield caption="Symbol Counter Output Compare Register 3 LL-Byte" mask="0xFF" name="SCOCR3LL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HH-Byte" name="SCTSRHH" offset="0xEC"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HH-Byte" mask="0xFF" name="SCTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register HL-Byte" name="SCTSRHL" offset="0xEB"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register HL-Byte" mask="0xFF" name="SCTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LH-Byte" name="SCTSRLH" offset="0xEA"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LH-Byte" mask="0xFF" name="SCTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Frame Timestamp Register LL-Byte" name="SCTSRLL" offset="0xE9"
+                          size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter Frame Timestamp Register LL-Byte" mask="0xFF" name="SCTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HH-Byte" name="SCBTSRHH" offset="0xE8"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HH-Byte" mask="0xFF" name="SCBTSRHH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register HL-Byte" name="SCBTSRHL" offset="0xE7"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register HL-Byte" mask="0xFF" name="SCBTSRHL"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LH-Byte" name="SCBTSRLH" offset="0xE6"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LH-Byte" mask="0xFF" name="SCBTSRLH"/>
+                </register>
+                <register caption="Symbol Counter Beacon Timestamp Register LL-Byte" name="SCBTSRLL" offset="0xE5"
+                          size="1">
+                    <bitfield caption="Symbol Counter Beacon Timestamp Register LL-Byte" mask="0xFF" name="SCBTSRLL"/>
+                </register>
+                <register caption="Symbol Counter Register HH-Byte" name="SCCNTHH" offset="0xE4" size="1">
+                    <bitfield caption="Symbol Counter Register HH-Byte" mask="0xFF" name="SCCNTHH"/>
+                </register>
+                <register caption="Symbol Counter Register HL-Byte" name="SCCNTHL" offset="0xE3" size="1">
+                    <bitfield caption="Symbol Counter Register HL-Byte" mask="0xFF" name="SCCNTHL"/>
+                </register>
+                <register caption="Symbol Counter Register LH-Byte" name="SCCNTLH" offset="0xE2" size="1">
+                    <bitfield caption="Symbol Counter Register LH-Byte" mask="0xFF" name="SCCNTLH"/>
+                </register>
+                <register caption="Symbol Counter Register LL-Byte" name="SCCNTLL" offset="0xE1" size="1">
+                    <bitfield caption="Symbol Counter Register LL-Byte" mask="0xFF" name="SCCNTLL"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Status Register" name="SCIRQS" offset="0xE0" size="1">
+                    <bitfield caption="Backoff Slot Counter IRQ" mask="0x10" name="IRQSBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ" mask="0x08" name="IRQSOF"/>
+                    <bitfield caption="Compare Unit 3 Compare Match IRQ" mask="0x07" name="IRQSCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Interrupt Mask Register" name="SCIRQM" offset="0xDF" size="1">
+                    <bitfield caption="Backoff Slot Counter IRQ enable" mask="0x10" name="IRQMBO"/>
+                    <bitfield caption="Symbol Counter Overflow IRQ enable" mask="0x08" name="IRQMOF"/>
+                    <bitfield caption="Symbol Counter Compare Match 3 IRQ enable" mask="0x07" name="IRQMCP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Status Register" name="SCSR" offset="0xDE" size="1" ocd-rw="R">
+                    <bitfield caption="Symbol Counter busy" mask="0x01" name="SCBSY"/>
+                </register>
+                <register caption="Symbol Counter Control Register 1" name="SCCR1" offset="0xDD" size="1">
+                    <bitfield caption="Reserved Bit" mask="0xC0" name="Res" lsb="5"/>
+                    <bitfield caption="Symbol Counter Beacon Timestamp Mask Register" mask="0x20" name="SCBTSM"/>
+                    <bitfield caption="Clock divider for synchronous clock source (16MHz Transceiver Clock)" mask="0x1C"
+                              name="SCCKDIV" values="SCCKDIV_BITF"/>
+                    <bitfield caption="Enable External Clock Source on PG2" mask="0x02" name="SCEECLK"/>
+                    <bitfield caption="Backoff Slot Counter enable" mask="0x01" name="SCENBO"/>
+                </register>
+                <register caption="Symbol Counter Control Register 0" name="SCCR0" offset="0xDC" size="1">
+                    <bitfield caption="Symbol Counter Synchronization" mask="0x80" name="SCRES"/>
+                    <bitfield caption="Manual Beacon Timestamp" mask="0x40" name="SCMBTS"/>
+                    <bitfield caption="Symbol Counter enable" mask="0x20" name="SCEN"/>
+                    <bitfield caption="Symbol Counter Clock Source select" mask="0x10" name="SCCKSEL"/>
+                    <bitfield caption="Symbol Counter Automatic Timestamping enable" mask="0x08" name="SCTSE"/>
+                    <bitfield caption="Symbol Counter Compare Unit 3 Mode select" mask="0x07" name="SCCMP" lsb="1"/>
+                </register>
+                <register caption="Symbol Counter Compare Source Register" name="SCCSR" offset="0xDB" size="1">
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 3" mask="0x30"
+                              name="SCCS3" values="SCCS3_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Unit 2" mask="0x0C"
+                              name="SCCS2" values="SCCS2_BITF"/>
+                    <bitfield caption="Symbol Counter Compare Source select register for Compare Units" mask="0x03"
+                              name="SCCS1" values="SCCS1_BITF"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HH-Byte" name="SCRSTRHH"
+                          offset="0xDA" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HH-Byte" mask="0xFF"
+                              name="SCRSTRHH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register HL-Byte" name="SCRSTRHL"
+                          offset="0xD9" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register HL-Byte" mask="0xFF"
+                              name="SCRSTRHL"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LH-Byte" name="SCRSTRLH"
+                          offset="0xD8" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LH-Byte" mask="0xFF"
+                              name="SCRSTRLH"/>
+                </register>
+                <register caption="Symbol Counter Received Frame Timestamp Register LL-Byte" name="SCRSTRLL"
+                          offset="0xD7" size="1">
+                    <bitfield caption="Symbol Counter Received Frame Timestamp Register LL-Byte" mask="0xFF"
+                              name="SCRSTRLL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="SCCKDIV_BITF">
+                <value caption="Transceiver Clock divided by 256, (62.5kHz)" name="VAL_0" value="0"/>
+                <value caption="Transceiver Clock divided by 128, (125kHz)" name="VAL_1" value="1"/>
+                <value caption="Transceiver Clock divided by 64,  (250kHz)" name="VAL_2" value="2"/>
+                <value caption="Transceiver Clock divided by 32,  (500kHz)" name="VAL_3" value="3"/>
+                <value caption="Transceiver Clock divided by 16,  (1MHz)" name="VAL_4" value="4"/>
+                <value caption="Transceiver Clock divided by 8,   (2MHz)" name="VAL_5" value="5"/>
+                <value caption="Transceiver Clock divided by 4,   (4MHz)" name="VAL_6" value="6"/>
+            </value-group>
+            <value-group caption="" name="SCCS3_BITF">
+                <value caption="Compare Unit 3 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 3 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS2_BITF">
+                <value caption="Compare Unit 2 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 2 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+            <value-group caption="" name="SCCS1_BITF">
+                <value caption="Compare Unit 1 Relative Compare Source = Beacon Timestamp Register" name="VAL_0"
+                       value="0"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Transmit Frame Timestamp Register" name="VAL_1"
+                       value="1"/>
+                <value caption="Compare Unit 1 Relative Compare Source = Received Frame Timestamp Register" name="VAL_2"
+                       value="2"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0xFFFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM" values="EEP_MODE2"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Programming Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE2">
+                <value caption="Erase and Write in one operation (Atomic Operation)" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write only" name="VAL_0x02" value="0x02"/>
+                <value caption="Reserved for future use" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="JTAG Interface" name="JTAG">
+            <register-group caption="JTAG Interface" name="JTAG">
+                <register caption="On-Chip Debug Register" name="OCDR" offset="0x51" size="1" ocd-rw="">
+                    <bitfield caption="On-Chip Debug Register Data" mask="0xFF" name="OCDR" values="OCDR_DATA_BITF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OCDR_DATA_BITF">
+                <value caption="Refer to the debugger documentation for further information on how to use this register."
+                       name="VAL_0" value="0"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt 3 Sense Control Bit" mask="0xC0" name="ISC3"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 2 Sense Control Bit" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 1 Sense Control Bit" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 0 Sense Control Bit" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7 Sense Control Bit" mask="0xC0" name="ISC7"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 6 Sense Control Bit" mask="0x30" name="ISC6"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 5 Sense Control Bit" mask="0x0C" name="ISC5"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                    <bitfield caption="External Interrupt 4 Sense Control Bit" mask="0x03" name="ISC4"
+                              values="INTERRUPT_SENSE_CONTROL3"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request Enable" mask="0xFF" name="INT"
+                              values="INTERRUPT_REQ_ENABLE_BITF"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flag" mask="0xFF" name="INTF"
+                              values="INTERRUPT_EXT_FLAG_BITF"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Mask" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL3">
+                <value caption="The low level of INTn generates an interrupt request." name="VAL_0x00" value="0x00"/>
+                <value caption="Any edge of INTn generates asynchronously an interrupt request." name="VAL_0x01"
+                       value="0x01"/>
+                <value caption="The falling edge of INTn generates asynchronously an interrupt request." name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="The rising edge of INTn generates asynchronously an interrupt request." name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_REQ_ENABLE_BITF">
+                <value caption="All external pin interrupts are disabled." name="VAL_0x00" value="0x00"/>
+                <value caption="All external pin interrupts are enabled." name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_EXT_FLAG_BITF">
+                <value caption="No edge or logic change on INT7:0 occurred." name="VAL_0x00" value="0x00"/>
+                <value caption="A edge or logic change on INT0 occurred and triggered an interrupt request."
+                       name="VAL_0x01" value="0x01"/>
+                <value caption="..." name="VAL_0x02" value="0x02"/>
+                <value caption="A edge or logic change on INT7 occurred and triggered an interrupt request."
+                       name="VAL_0x80" value="0x80"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC Multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF9"/>
+                    <bitfield caption="ADC Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status Register A" name="ADCSRA" offset="0x7A" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="AVDD Supply Voltage OK" mask="0x80" name="AVDDOK"/>
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+                    <bitfield caption="Reference Voltage OK" mask="0x20" name="REFOK"/>
+                    <bitfield caption="Analog Channel Change" mask="0x10" name="ACCH"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
+                    <bitfield caption="ADC Auto Trigger Source" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="The ADC Control and Status Register C" name="ADCSRC" offset="0x77" size="1">
+                    <bitfield caption="ADC Track-and-Hold Time" mask="0xC0" name="ADTHT"
+                              values="ANALOG_ADC_TRACK_AND_HOLD_TIME"/>
+                    <bitfield caption="Reserved" mask="0x20" name="Res0"/>
+                    <bitfield caption="ADC Start-up Time" mask="0x1F" name="ADSUT" values="ANALOG_ADC_STARTUP_TIME"/>
+                </register>
+                <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x7D" size="1">
+                    <bitfield caption="Reserved Bits" mask="0x80" name="ADC15D"/>
+                    <bitfield caption="Reserved Bits" mask="0x40" name="ADC14D"/>
+                    <bitfield caption="Reserved Bits" mask="0x20" name="ADC13D"/>
+                    <bitfield caption="Reserved Bits" mask="0x10" name="ADC12D"/>
+                    <bitfield caption="Reserved Bits" mask="0x08" name="ADC11D"/>
+                    <bitfield caption="Reserved Bits" mask="0x04" name="ADC10D"/>
+                    <bitfield caption="Reserved Bits" mask="0x02" name="ADC9D"/>
+                    <bitfield caption="Reserved Bits" mask="0x01" name="ADC8D"/>
+                </register>
+                <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x80" name="ADC7D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x40" name="ADC6D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="Disable ADC7:0 Digital Input" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF9">
+                <value caption="AREF, Internal reference voltage generation turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVDD with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Internal 1.5V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x02"
+                       value="0x02"/>
+                <value caption="Internal 1.6V Voltage Reference (no external capacitor at AREF pin)" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_TRACK_AND_HOLD_TIME">
+                <value caption="Single ended: 1, differential 3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="Single ended: 2, differential 5 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="Single ended: 3, differential 7 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="Single ended: 4, differential 9 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_STARTUP_TIME">
+                <value caption="3 ADC clock cycles" name="VAL_0x00" value="0x00"/>
+                <value caption="7 ADC clock cycles" name="VAL_0x01" value="0x01"/>
+                <value caption="11 ADC clock cycles" name="VAL_0x02" value="0x02"/>
+                <value caption="15 ADC clock cycles" name="VAL_0x03" value="0x03"/>
+                <value caption="..." name="VAL_0x04" value="0x04"/>
+                <value caption="251 ADC clock cycles" name="VAL_0x3E" value="0x3E"/>
+                <value caption="255 ADC clock cycles" name="VAL_0x3F" value="0x3F"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1">
+                    <bitfield caption="Oscillator Calibration Tuning Value" mask="0xFF" name="CAL"
+                              values="OSCCAL_BITF"/>
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose I/O Register 2 Value" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose I/O Register 1 Value" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose I/O Register 0 Value" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register 2" name="PRR2" offset="0x63" size="1">
+                    <bitfield caption="Power Reduction SRAM3" mask="0x08" name="PRRAM3"/>
+                    <bitfield caption="Power Reduction SRAM2" mask="0x04" name="PRRAM2"/>
+                    <bitfield caption="Power Reduction SRAM1" mask="0x02" name="PRRAM1"/>
+                    <bitfield caption="Power Reduction SRAM0" mask="0x01" name="PRRAM0"/>
+                </register>
+                <register caption="Power Reduction Register 1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction Transceiver" mask="0x40" name="PRTRX24"/>
+                    <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
+                    <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
+                    <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction PGA" mask="0x10" name="PRPGA"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="OSCCAL_BITF">
+                <value caption="Calibration value for lowest oscillator frequency" name="VAL_0x00" value="0x00"/>
+                <value caption="End value of low frequency range calibration" name="VAL_0x7f" value="0x7f"/>
+                <value caption="Start value of high frequency range calibration" name="VAL_0x80" value="0x80"/>
+                <value caption="Calibration value for highest oscillator frequency" name="VAL_0xff" value="0xff"/>
+            </value-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL_MEGARF">
+                <value caption="Division factor 1   / RC-Oscillator   2" name="VAL_0x0" value="0x0"/>
+                <value caption="Division factor 2   / RC-Oscillator   4" name="VAL_0x1" value="0x1"/>
+                <value caption="Division factor 4   / RC-Oscillator   8" name="VAL_0x2" value="0x2"/>
+                <value caption="Division factor 8   / RC-Oscillator  16" name="VAL_0x3" value="0x3"/>
+                <value caption="Division factor 16  / RC-Oscillator  32" name="VAL_0x4" value="0x4"/>
+                <value caption="Division factor 32  / RC-Oscillator  64" name="VAL_0x5" value="0x5"/>
+                <value caption="Division factor 64  / RC-Oscillator 128" name="VAL_0x6" value="0x6"/>
+                <value caption="Division factor 128 / RC-Oscillator 256" name="VAL_0x7" value="0x7"/>
+                <value caption="Division factor 256 / RC-Oscillator 512" name="VAL_0x8" value="0x8"/>
+                <value caption="Reserved" name="VAL_0x9" value="0x9"/>
+                <value caption="Reserved" name="VAL_0xA" value="0xA"/>
+                <value caption="Reserved" name="VAL_0xB" value="0xB"/>
+                <value caption="Reserved" name="VAL_0xC" value="0xC"/>
+                <value caption="Reserved" name="VAL_0xD" value="0xD"/>
+                <value caption="Reserved" name="VAL_0xE" value="0xE"/>
+                <value caption="Division factor 1 only permitted for RC-Oscillator. Flash and EEPROM programming is not allowed."
+                       name="VAL_0xF" value="0xF"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="FLASH Controller" name="FLASH">
+            <register-group caption="FLASH Controller" name="FLASH">
+                <register caption="Flash Extended-Mode Control-Register" name="NEMCR" offset="0x75" size="1">
+                    <bitfield caption="Enable Extended Address Mode for Extra Rows" mask="0x40" name="ENEAM"/>
+                    <bitfield caption="Address for Extended Address Mode of Extra Rows" mask="0x30" name="AEAM"
+                              values="NEMCR_ADDRESS_BITF"/>
+                </register>
+                <register caption="Reference Voltage Calibration Register" name="BGCR" offset="0x67" size="1">
+                    <bitfield caption="Fine Calibration Bits" mask="0x78" name="BGCAL_FINE" values="BGCAL_FINE_BITF"/>
+                    <bitfield caption="Coarse Calibration Bits" mask="0x07" name="BGCAL" values="BGCAL_BITF"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="NEMCR_ADDRESS_BITF">
+                <value caption="Factory Row" name="VAL_0" value="0"/>
+                <value caption="User Row 1" name="VAL_1" value="1"/>
+                <value caption="User Row 2" name="VAL_2" value="2"/>
+                <value caption="User Row 3" name="VAL_3" value="3"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_FINE_BITF">
+                <value caption="Center value" name="VAL_0" value="0"/>
+                <value caption="Voltage step up" name="VAL_1" value="1"/>
+                <value caption="Voltage step down" name="VAL_8" value="8"/>
+                <value caption="Setting for highest voltage" name="VAL_7" value="7"/>
+                <value caption="Setting for lowest voltage" name="VAL_15" value="15"/>
+            </value-group>
+            <value-group caption="" name="BGCAL_BITF">
+                <value caption="Center value" name="VAL_4" value="4"/>
+                <value caption="Voltage step up" name="VAL_3" value="3"/>
+                <value caption="Voltage step down" name="VAL_5" value="5"/>
+                <value caption="Setting for highest voltage" name="VAL_0" value="0"/>
+                <value caption="Setting for lowest voltage" name="VAL_7" value="7"/>
+            </value-group>
+        </module>
+        <module caption="Power Controller" name="PWRCTRL">
+            <register-group caption="Power Controller" name="PWRCTRL">
+                <register caption="Transceiver Pin Register" name="TRXPR" offset="0x139" size="1">
+                    <bitfield caption="Multi-purpose Transceiver Control Bit" mask="0x02" name="SLPTR"/>
+                    <bitfield caption="Force Transceiver Reset" mask="0x01" name="TRXRST"/>
+                </register>
+                <register caption="Data Retention Configuration Register #0" name="DRTRAM0" offset="0x135" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #1" name="DRTRAM1" offset="0x134" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #2" name="DRTRAM2" offset="0x133" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Data Retention Configuration Register #3" name="DRTRAM3" offset="0x132" size="1">
+                    <bitfield caption="DRT Switch OK" mask="0x20" name="DRTSWOK"/>
+                    <bitfield caption="Enable SRAM Data Retention" mask="0x10" name="ENDRT"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (Low-Byte)" name="LLDRL" offset="0x130"
+                          size="1">
+                    <bitfield caption="Low-Byte Data Register Bits" mask="0x0F" name="LLDRL" values="LLDRL_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Data Register (High-Byte)" name="LLDRH" offset="0x131"
+                          size="1">
+                    <bitfield caption="High-Byte Data Register Bits" mask="0x1F" name="LLDRH"
+                              values="LLDRH_VALUE_BITF"/>
+                </register>
+                <register caption="Low Leakage Voltage Regulator Control Register" name="LLCR" offset="0x12F" size="1">
+                    <bitfield caption="Calibration Done" mask="0x20" name="LLDONE"/>
+                    <bitfield caption="Comparator Output" mask="0x10" name="LLCOMP"/>
+                    <bitfield caption="Calibration Active" mask="0x08" name="LLCAL"/>
+                    <bitfield caption="Temperature Coefficient of Current Source" mask="0x04" name="LLTCO"/>
+                    <bitfield caption="Short Lower Calibration Circuit" mask="0x02" name="LLSHORT"/>
+                    <bitfield caption="Enable Automatic Calibration" mask="0x01" name="LLENCAL"/>
+                </register>
+                <register caption="Port Driver Strength Register 0" name="DPDS0" offset="0x136" size="1">
+                    <bitfield caption="Driver Strength Port F" mask="0xC0" name="PFDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port E" mask="0x30" name="PEDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port D" mask="0x0C" name="PDDRV" values="PAD_IO_bitf"/>
+                    <bitfield caption="Driver Strength Port B" mask="0x03" name="PBDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="Port Driver Strength Register 1" name="DPDS1" offset="0x137" size="1">
+                    <bitfield caption="Driver Strength Port G" mask="0x03" name="PGDRV" values="PAD_IO_bitf"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="LLDRL_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x08"
+                       value="0x08"/>
+            </value-group>
+            <value-group caption="" name="LLDRH_VALUE_BITF">
+                <value caption="Calibration limit for fast process corner/high output voltage" name="VAL_0x00"
+                       value="0x00"/>
+                <value caption="Calibration limit for slow process corner/low output voltage" name="VAL_0x10"
+                       value="0x10"/>
+            </value-group>
+            <value-group caption="" name="PAD_IO_bitf">
+                <value caption="2 mA" name="PAD_IO_2MA" value="0"/>
+                <value caption="4 mA" name="PAD_IO_4MA" value="1"/>
+                <value caption="6 mA" name="PAD_IO_6MA" value="2"/>
+                <value caption="8 mA" name="PAD_IO_8MA" value="3"/>
+            </value-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8.xml
new file mode 100644
index 00000000..3cbfb123
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8.xml
@@ -0,0 +1,1074 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega8L-8AU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega8L-8PU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="PDIP28" package="PDIP28"
+                 vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega8L-8MU" tempmin="-40" tempmax="85" speedmax="8000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega8-16AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega8-16PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega8-16MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="4.5" vccmax="5.5"/>
+
+        <variant ordercode="ATmega8L-8AN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega8L-8PN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega8L-8MN" tempmin="-40" tempmax="105" speedmax="8000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATmega8-16AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega8-16PN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="4.5" vccmax="5.5"/>
+        <variant ordercode="ATmega8-16MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="4.5" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega8" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0460">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="SS" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="T" function="default" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="4" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="9" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="10" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="11" name="USART_RXC" caption="USART, Rx Complete"/>
+                <interrupt index="12" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="13" name="USART_TXC" caption="USART, Tx Complete"/>
+                <interrupt index="14" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="15" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="16" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="17" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="18" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x07"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="10"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="10"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="10"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="10"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="10"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="10"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x40" name="WDTON"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
+                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1">
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer Counter 0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Enable" mask="0x80" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x70" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Store Program Memory Control Register" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x10" name="ADHSM"/>
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+                <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Free Running Select" mask="0x20" name="ADFR"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA808.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
new file mode 100644
index 00000000..a5feb8a6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA808.xml
@@ -0,0 +1,2532 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega808-AFR" package="TQFP32" pinout="QFP32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega808-MFR" package="VQFN32" pinout="QFN32" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega808-XFR" package="SSOP28" pinout="SSOP28" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega808">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x2000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2113" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2118" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                    <property name="INTERRUPT_VECTOR_SIZE" value="4"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x26"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2113" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2118" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD as Voltage reference" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="QFP32">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PC0" position="6"/>
+            <pin pad="PC1" position="7"/>
+            <pin pad="PC2" position="8"/>
+            <pin pad="PC3" position="9"/>
+            <pin pad="PD0" position="10"/>
+            <pin pad="PD1" position="11"/>
+            <pin pad="PD2" position="12"/>
+            <pin pad="PD3" position="13"/>
+            <pin pad="PD4" position="14"/>
+            <pin pad="PD5" position="15"/>
+            <pin pad="PD6" position="16"/>
+            <pin pad="PD7" position="17"/>
+            <pin pad="AVDD" position="18"/>
+            <pin pad="GND0" position="19"/>
+            <pin pad="PF0" position="20"/>
+            <pin pad="PF1" position="21"/>
+            <pin pad="PF2" position="22"/>
+            <pin pad="PF3" position="23"/>
+            <pin pad="PF4" position="24"/>
+            <pin pad="PF5" position="25"/>
+            <pin pad="PF6" position="26"/>
+            <pin pad="UPDI" position="27"/>
+            <pin pad="VDD0" position="28"/>
+            <pin pad="GND1" position="29"/>
+            <pin pad="PA0" position="30"/>
+            <pin pad="PA1" position="31"/>
+            <pin pad="PA2" position="32"/>
+        </pinout>
+        <pinout name="SSOP28">
+            <pin pad="PA7" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="PC2" position="4"/>
+            <pin pad="PC3" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="AVDD" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PF0" position="16"/>
+            <pin pad="PF1" position="17"/>
+            <pin pad="PF6" position="18"/>
+            <pin pad="UPDI" position="19"/>
+            <pin pad="VDD0" position="20"/>
+            <pin pad="GND1" position="21"/>
+            <pin pad="PA0" position="22"/>
+            <pin pad="PA1" position="23"/>
+            <pin pad="PA2" position="24"/>
+            <pin pad="PA3" position="25"/>
+            <pin pad="PA4" position="26"/>
+            <pin pad="PA5" position="27"/>
+            <pin pad="PA6" position="28"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA809.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA809.xml
new file mode 100644
index 00000000..7a98f90f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA809.xml
@@ -0,0 +1,2624 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega809-AFR" package="TQFP48" pinout="QFP48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+        <variant ordercode="ATmega809-MFR" package="UQFN48" pinout="QFN48" speedmax="20000000" tempmax="105"
+                 tempmin="-40" vccmax="5.0" vccmin="1.8"/>
+    </variants>
+    <devices>
+        <device architecture="AVR8X" family="AVR MEGA" name="ATmega809">
+            <address-spaces>
+                <address-space endianness="little" id="data" name="data" size="0x2000" start="0x0000">
+                    <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400"
+                                    type="eeprom"/>
+                    <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280"
+                                    type="fuses"/>
+                    <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
+                    <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+                    <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A"
+                                    type="lockbits"/>
+                    <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000"
+                                    start="0x00004000" type="other"/>
+                    <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D"
+                                    start="0x00001103" type="signatures"/>
+                    <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100"
+                                    type="signatures"/>
+                    <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20"
+                                    start="0x00001300" type="user_signatures"/>
+                </address-space>
+                <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+                    <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000"
+                                    type="flash"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module id="I2106" name="AC">
+                    <instance name="AC0">
+                        <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+                        <signals>
+                            <signal function="AC0" group="N" index="0" pad="PD3"/>
+                            <signal function="AC0" group="N" index="1" pad="PD5"/>
+                            <signal function="AC0" group="N" index="2" pad="PD7"/>
+                            <signal function="AC0" group="OUT" index="0" pad="PA7"/>
+                            <signal function="AC0" group="P" index="0" pad="PD2"/>
+                            <signal function="AC0" group="P" index="1" pad="PD4"/>
+                            <signal function="AC0" group="P" index="2" pad="PD6"/>
+                            <signal function="AC0" group="P" index="3" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2132" name="ADC">
+                    <instance name="ADC0">
+                        <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+                        <signals>
+                            <signal function="AIN0" group="AIN" index="0" pad="PD0"/>
+                            <signal function="AIN0" group="AIN" index="1" pad="PD1"/>
+                            <signal function="AIN0" group="AIN" index="2" pad="PD2"/>
+                            <signal function="AIN0" group="AIN" index="3" pad="PD3"/>
+                            <signal function="AIN0" group="AIN" index="4" pad="PD4"/>
+                            <signal function="AIN0" group="AIN" index="5" pad="PD5"/>
+                            <signal function="AIN0" group="AIN" index="6" pad="PD6"/>
+                            <signal function="AIN0" group="AIN" index="7" pad="PD7"/>
+                            <signal function="AIN0" group="AIN" index="8" pad="PE0"/>
+                            <signal function="AIN0" group="AIN" index="9" pad="PE1"/>
+                            <signal function="AIN0" group="AIN" index="10" pad="PE2"/>
+                            <signal function="AIN0" group="AIN" index="11" pad="PE3"/>
+                            <signal function="AIN0" group="AIN" index="12" pad="PF2"/>
+                            <signal function="AIN0" group="AIN" index="13" pad="PF3"/>
+                            <signal function="AIN0" group="AIN" index="14" pad="PF4"/>
+                            <signal function="AIN0" group="AIN" index="15" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2114" name="BOD">
+                    <instance name="BOD">
+                        <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+                    </instance>
+                </module>
+                <module id="I2128" name="CCL">
+                    <instance name="CCL">
+                        <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+                        <signals>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0"
+                                    pad="PA6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_IN" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0"
+                                    pad="PC6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PC3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_IN" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PD3"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="1"
+                                    pad="PD6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_IN" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="1"
+                                    pad="PF6"/>
+                            <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="1" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2113" name="CLKCTRL">
+                    <instance name="CLKCTRL">
+                        <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+                        <signals>
+                            <signal function="CLKCTRL" group="CLKI" pad="PA0"/>
+                            <signal function="CLKCTRL" group="CLKO" pad="PA7"/>
+                            <signal function="CLKCTRL" group="TOSC1" pad="PF0"/>
+                            <signal function="CLKCTRL" group="TOSC2" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2100" name="CPU">
+                    <instance name="CPU">
+                        <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V4"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module id="I2104" name="CPUINT">
+                    <instance name="CPUINT">
+                        <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+                    </instance>
+                </module>
+                <module id="I2122" name="CRCSCAN">
+                    <instance name="CRCSCAN">
+                        <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+                    </instance>
+                </module>
+                <module id="I2118" name="EVSYS">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+                        <signals>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS_ALT" group="EVOUT" index="0"
+                                    pad="PA7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT0" function="EVSYS" group="EVOUT" index="0"
+                                    pad="PA2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT1" function="EVSYS" group="EVOUT" index="1"
+                                    pad="PB2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS_ALT" group="EVOUT" index="2"
+                                    pad="PC7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT2" function="EVSYS" group="EVOUT" index="2"
+                                    pad="PC2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS_ALT" group="EVOUT" index="3"
+                                    pad="PD7"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT3" function="EVSYS" group="EVOUT" index="3"
+                                    pad="PD2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT4" function="EVSYS" group="EVOUT" index="4"
+                                    pad="PE2"/>
+                            <signal field="PORTMUX.EVSYSROUTEA.EVOUT5" function="EVSYS" group="EVOUT" index="5"
+                                    pad="PF2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="FUSE">
+                    <instance name="FUSE">
+                        <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="GPIO">
+                    <instance name="GPIO">
+                        <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="LOCKBIT">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+                    </instance>
+                </module>
+                <module id="I2109" name="NVMCTRL">
+                    <instance name="NVMCTRL">
+                        <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="PORT">
+                    <instance name="PORTA">
+                        <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PC6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" name="PORTD" name-in-module="PORT" offset="0x0460"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PD0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PD1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PD2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PD3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PD4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PD5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PD6"/>
+                            <signal function="IOPORT" group="PIN" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" name="PORTE" name-in-module="PORT" offset="0x0480"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PE0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PE1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PE2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" name="PORTF" name-in-module="PORT" offset="0x04A0"/>
+                        <signals>
+                            <signal function="IOPORT" group="PIN" index="0" pad="PF0"/>
+                            <signal function="IOPORT" group="PIN" index="1" pad="PF1"/>
+                            <signal function="IOPORT" group="PIN" index="2" pad="PF2"/>
+                            <signal function="IOPORT" group="PIN" index="3" pad="PF3"/>
+                            <signal function="IOPORT" group="PIN" index="4" pad="PF4"/>
+                            <signal function="IOPORT" group="PIN" index="5" pad="PF5"/>
+                            <signal function="IOPORT" group="PIN" index="6" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="PORTMUX">
+                    <instance name="PORTMUX">
+                        <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+                    </instance>
+                </module>
+                <module id="I2111" name="RSTCTRL">
+                    <instance name="RSTCTRL">
+                        <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+                        <signals>
+                            <signal function="OTHER" group="RESET" pad="PF6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2116" name="RTC">
+                    <instance name="RTC">
+                        <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="SIGROW">
+                    <instance name="SIGROW">
+                        <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+                    </instance>
+                </module>
+                <module id="I2112" name="SLPCTRL">
+                    <instance name="SLPCTRL">
+                        <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+                    </instance>
+                </module>
+                <module id="I2107" name="SPI">
+                    <instance name="SPI0">
+                        <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MISO" pad="PE1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA5"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="MOSI" pad="PE0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC0"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA4"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SCK" pad="PE2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA6"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT2" group="SS" pad="PE3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.SPI0" function="SPI" group="SS" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2600" name="SYSCFG">
+                    <instance name="SYSCFG">
+                        <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+                    </instance>
+                </module>
+                <module id="I2117" name="TCA">
+                    <instance name="TCA0">
+                        <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+                        <signals>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="0" pad="PF0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="0" pad="PE0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="0" pad="PD0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="0" pad="PC0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PA0"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="1" pad="PF1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="1" pad="PE1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="1" pad="PD1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="1" pad="PC1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="1" pad="PB1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PA1"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="2" pad="PF2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="2" pad="PE2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="2" pad="PD2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="2" pad="PC2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="2" pad="PB2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PA2"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="3" pad="PF3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT4" group="WO" index="3" pad="PE3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="3" pad="PD3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="3" pad="PC3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="3" pad="PB3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="4" pad="PF4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="4" pad="PD4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="4" pad="PC4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="4" pad="PB4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT5" group="WO" index="5" pad="PF5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT3" group="WO" index="5" pad="PD5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT2" group="WO" index="5" pad="PC5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="5" pad="PB5"/>
+                            <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2119" name="TCB">
+                    <instance name="TCB0">
+                        <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PF4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA2"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB1">
+                        <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PF5"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB2">
+                        <register-group address-space="data" name="TCB2" name-in-module="TCB" offset="0x0AA0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2_ALT" group="WO" index="0" pad="PB4"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB2" function="TCB2" group="WO" index="0" pad="PC0"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCB3">
+                        <register-group address-space="data" name="TCB3" name-in-module="TCB" offset="0x0AB0"/>
+                        <signals>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3_ALT" group="WO" index="0" pad="PC1"/>
+                            <signal field="PORTMUX.TCBROUTEA.TCB3" function="TCB3" group="WO" index="0" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2110" name="TWI">
+                    <instance name="TWI0">
+                        <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+                        <signals>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SCL" pad="PF3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SCL" pad="PC3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SCL" pad="PA3"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT2" group="SDA" pad="PF2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C_ALT" group="SDA" pad="PC2"/>
+                            <signal field="PORTMUX.TWISPIROUTEA.TWI0" function="I2C" group="SDA" pad="PA2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2108" name="USART">
+                    <instance name="USART0">
+                        <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PA1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PA0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PA2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PA3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART1">
+                        <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="RXD" pad="PC5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PC1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="TXD" pad="PC4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PC0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XCK" pad="PC6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PC2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XDIR" pad="PC7"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART2">
+                        <register-group address-space="data" name="USART2" name-in-module="USART" offset="0x0840"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="RXD" pad="PF5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="RXD" pad="PF1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="TXD" pad="PF4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="TXD" pad="PF0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2_ALT" group="XCK" pad="PF6"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XCK" pad="PF2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART2" function="USART2" group="XDIR" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USART3">
+                        <register-group address-space="data" name="USART3" name-in-module="USART" offset="0x0860"/>
+                        <signals>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="RXD" pad="PB5"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="RXD" pad="PB1"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3_ALT" group="TXD" pad="PB4"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="TXD" pad="PB0"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XCK" pad="PB2"/>
+                            <signal field="PORTMUX.USARTROUTEA.USART3" function="USART3" group="XDIR" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module id="I2603" name="USERROW">
+                    <instance name="USERROW">
+                        <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+                    </instance>
+                </module>
+                <module id="I2103" name="VPORT">
+                    <instance name="VPORTA">
+                        <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+                    </instance>
+                    <instance name="VPORTB">
+                        <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+                    </instance>
+                    <instance name="VPORTC">
+                        <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+                    </instance>
+                    <instance name="VPORTD">
+                        <register-group address-space="data" name="VPORTD" name-in-module="VPORT" offset="0x000C"/>
+                    </instance>
+                    <instance name="VPORTE">
+                        <register-group address-space="data" name="VPORTE" name-in-module="VPORT" offset="0x0010"/>
+                    </instance>
+                    <instance name="VPORTF">
+                        <register-group address-space="data" name="VPORTF" name-in-module="VPORT" offset="0x0014"/>
+                    </instance>
+                </module>
+                <module id="I2600" name="VREF">
+                    <instance name="VREF">
+                        <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+                    </instance>
+                </module>
+                <module id="I2127" name="WDT">
+                    <instance name="WDT">
+                        <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+                <interrupt index="2" module-instance="BOD" name="VLM"/>
+                <interrupt index="3" module-instance="RTC" name="CNT"/>
+                <interrupt index="4" module-instance="RTC" name="PIT"/>
+                <interrupt index="5" module-instance="CCL" name="CCL"/>
+                <interrupt index="6" module-instance="PORTA" name="PORT"/>
+                <interrupt index="7" module-instance="TCA0" name="LUNF"/>
+                <interrupt index="7" module-instance="TCA0" name="OVF"/>
+                <interrupt index="8" module-instance="TCA0" name="HUNF"/>
+                <interrupt index="9" module-instance="TCA0" name="CMP0"/>
+                <interrupt index="9" module-instance="TCA0" name="LCMP0"/>
+                <interrupt index="10" module-instance="TCA0" name="CMP1"/>
+                <interrupt index="10" module-instance="TCA0" name="LCMP1"/>
+                <interrupt index="11" module-instance="TCA0" name="CMP2"/>
+                <interrupt index="11" module-instance="TCA0" name="LCMP2"/>
+                <interrupt index="12" module-instance="TCB0" name="INT"/>
+                <interrupt index="13" module-instance="TCB1" name="INT"/>
+                <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+                <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+                <interrupt index="16" module-instance="SPI0" name="INT"/>
+                <interrupt index="17" module-instance="USART0" name="RXC"/>
+                <interrupt index="18" module-instance="USART0" name="DRE"/>
+                <interrupt index="19" module-instance="USART0" name="TXC"/>
+                <interrupt index="20" module-instance="PORTD" name="PORT"/>
+                <interrupt index="21" module-instance="AC0" name="AC"/>
+                <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+                <interrupt index="23" module-instance="ADC0" name="WCOMP"/>
+                <interrupt index="24" module-instance="PORTC" name="PORT"/>
+                <interrupt index="25" module-instance="TCB2" name="INT"/>
+                <interrupt index="26" module-instance="USART1" name="RXC"/>
+                <interrupt index="27" module-instance="USART1" name="DRE"/>
+                <interrupt index="28" module-instance="USART1" name="TXC"/>
+                <interrupt index="29" module-instance="PORTF" name="PORT"/>
+                <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+                <interrupt index="31" module-instance="USART2" name="RXC"/>
+                <interrupt index="32" module-instance="USART2" name="DRE"/>
+                <interrupt index="33" module-instance="USART2" name="TXC"/>
+                <interrupt index="34" module-instance="PORTB" name="PORT"/>
+                <interrupt index="35" module-instance="PORTE" name="PORT"/>
+                <interrupt index="36" module-instance="TCB3" name="INT"/>
+                <interrupt index="37" module-instance="USART3" name="RXC"/>
+                <interrupt index="38" module-instance="USART3" name="DRE"/>
+                <interrupt index="39" module-instance="USART3" name="TXC"/>
+            </interrupts>
+            <interfaces>
+                <interface name="UPDI" type="updi"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="OCD_FEATURES">
+                    <property name="BREAK_PIN" value="PF6"/>
+                    <property name="BREAK_PIN_ALT" value="PF2"/>
+                </property-group>
+                <property-group name="PROGRAMMING_INFO">
+                    <property name="FUSE_ENABLED_VALUE" value="1"/>
+                    <property name="INTERRUPT_VECTOR_SIZE" value="4"/>
+                </property-group>
+                <property-group name="UPDI_INTERFACE">
+                    <property name="PROGMEM_OFFSET" value="0x00004000"/>
+                </property-group>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x2A"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Analog Comparator" id="I2106" name="AC">
+            <register-group caption="Analog Comparator" name="AC" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+                    <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+                    <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+                    <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                    <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+                </register>
+                <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+                    <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW"
+                              values="AC_MUXNEG"/>
+                    <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW"
+                              values="AC_MUXPOS"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+                    <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="OFF" value="0x00"/>
+                <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+                <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+                <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+                <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+                <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+                <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Power Mode select" name="AC_LPMODE">
+                <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+                <value caption="Low power mode enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+                <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+                <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+                <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+            <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+                <register caption="Calibration" initval="0x01" name="CALIB" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+                </register>
+                <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+                </register>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+                    <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+                    <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+                    <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW"
+                              values="ADC_ASDV"/>
+                    <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW"
+                              values="ADC_INITDLY"/>
+                    <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+                </register>
+                <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+                    <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+                </register>
+                <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW"
+                              values="ADC_MUXPOS"/>
+                </register>
+                <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+                <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+                </register>
+                <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+                </register>
+                <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+                <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+            </register-group>
+            <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+                <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+                <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+            </value-group>
+            <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+                <value caption="10-bit mode" name="10BIT" value="0x0"/>
+                <value caption="8-bit mode" name="8BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+                <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+                <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+                <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+                <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+                <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+                <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+                <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+                <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+                <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+                <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+                <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+                <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+                <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+                <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+                <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+            </value-group>
+            <value-group caption="Reference Selection select" name="ADC_REFSEL">
+                <value caption="Internal reference" name="INTREF" value="0x00"/>
+                <value caption="VDD" name="VDDREF" value="0x01"/>
+                <value caption="External reference" name="VREFA" value="0x02"/>
+            </value-group>
+            <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+                <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+                <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+            </value-group>
+            <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+                <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+                <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+                <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+                <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+                <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+                <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+            </value-group>
+            <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+                <value caption="No Window Comparison" name="NONE" value="0x00"/>
+                <value caption="Below Window" name="BELOW" value="0x01"/>
+                <value caption="Above Window" name="ABOVE" value="0x02"/>
+                <value caption="Inside Window" name="INSIDE" value="0x03"/>
+                <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+            </value-group>
+            <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+                <value caption="ADC input pin 0" name="AIN0" value="0x0"/>
+                <value caption="ADC input pin 1" name="AIN1" value="0x1"/>
+                <value caption="ADC input pin 2" name="AIN2" value="0x2"/>
+                <value caption="ADC input pin 3" name="AIN3" value="0x3"/>
+                <value caption="ADC input pin 4" name="AIN4" value="0x4"/>
+                <value caption="ADC input pin 5" name="AIN5" value="0x5"/>
+                <value caption="ADC input pin 6" name="AIN6" value="0x6"/>
+                <value caption="ADC input pin 7" name="AIN7" value="0x7"/>
+                <value caption="ADC input pin 8" name="AIN8" value="0x8"/>
+                <value caption="ADC input pin 9" name="AIN9" value="0x9"/>
+                <value caption="ADC input pin 10" name="AIN10" value="0xA"/>
+                <value caption="ADC input pin 11" name="AIN11" value="0xB"/>
+                <value caption="ADC input pin 12" name="AIN12" value="0xC"/>
+                <value caption="ADC input pin 13" name="AIN13" value="0xD"/>
+                <value caption="ADC input pin 14" name="AIN14" value="0xE"/>
+                <value caption="ADC input pin 15" name="AIN15" value="0xF"/>
+                <value caption="AC DAC Reference" name="DACREF" value="0x1C"/>
+                <value caption="Temperature sensor" name="TEMPSENSE" value="0x1E"/>
+                <value caption="0V (GND)" name="GND" value="0x1F"/>
+            </value-group>
+        </module>
+        <module caption="Bod interface" id="I2114" name="BOD">
+            <register-group caption="Bod interface" name="BOD" size="0x10">
+                <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+                    <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+                    <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9"
+                          rw="RW" size="1">
+                    <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+                    <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA"
+                          rw="RW" size="1">
+                    <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+                </register>
+                <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW"
+                          size="1">
+                    <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+                </register>
+                <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW"
+                          size="1">
+                    <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW"
+                              values="BOD_VLMLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Bod level select" name="BOD_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="Configuration select" name="BOD_VLMCFG">
+                <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+                <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+                <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+            </value-group>
+            <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+                <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+                <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+                <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+            <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+                <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW"
+                              values="CCL_INTMODE0"/>
+                    <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW"
+                              values="CCL_INTMODE1"/>
+                    <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW"
+                              values="CCL_INTMODE2"/>
+                    <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW"
+                              values="CCL_INTMODE3"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Interrupt Flags" mask="0xf" name="INT" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+                    <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+                    <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+                    <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+                </register>
+                <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW"
+                              values="CCL_INSEL0"/>
+                    <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW"
+                              values="CCL_INSEL1"/>
+                </register>
+                <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW"
+                              values="CCL_INSEL2"/>
+                </register>
+                <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+                </register>
+                <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+                </register>
+                <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+                <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+                <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+                <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+                <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense rising edge" name="RISING" value="0x1"/>
+                <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+                <value caption="Sense both edges" name="BOTH" value="0x3"/>
+            </value-group>
+            <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+                <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+                <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+                <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+                <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+                <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+            </value-group>
+            <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+                <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+                <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+            </value-group>
+            <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+                <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+                <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+                <value caption="Filter enabled" name="FILTER" value="0x2"/>
+            </value-group>
+            <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+                <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+            </value-group>
+            <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+                <value caption="Masked input" name="MASK" value="0x00"/>
+                <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+                <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+                <value caption="Event input source A" name="EVENTA" value="0x03"/>
+                <value caption="Event input source B" name="EVENTB" value="0x04"/>
+                <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+                <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+                <value caption="USART2 TXD input source" name="USART2" value="0x08"/>
+                <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+                <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+                <value caption="TCB2 WO input source" name="TCB2" value="0x0C"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+            <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+                <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+                <value caption="D FlipFlop" name="DFF" value="0x01"/>
+                <value caption="JK FlipFlop" name="JK" value="0x02"/>
+                <value caption="D Latch" name="LATCH" value="0x03"/>
+                <value caption="RS Latch" name="RS" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Clock controller" id="I2113" name="CLKCTRL">
+            <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+                <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+                    <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+                </register>
+                <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+                    <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+                </register>
+                <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+                    <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+                    <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+                    <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+                    <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+                    <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+                </register>
+                <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW"
+                          size="1">
+                    <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+                </register>
+                <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+                    <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+                <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+                <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+                <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+                <value caption="External clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+                <value caption="2X" name="2X" value="0x00"/>
+                <value caption="4X" name="4X" value="0x01"/>
+                <value caption="8X" name="8X" value="0x02"/>
+                <value caption="16X" name="16X" value="0x03"/>
+                <value caption="32X" name="32X" value="0x04"/>
+                <value caption="64X" name="64X" value="0x05"/>
+                <value caption="6X" name="6X" value="0x08"/>
+                <value caption="10X" name="10X" value="0x09"/>
+                <value caption="12X" name="12X" value="0x0A"/>
+                <value caption="24X" name="24X" value="0x0B"/>
+                <value caption="48X" name="48X" value="0x0C"/>
+            </value-group>
+            <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+                <value caption="1k cycles" name="1K" value="0x00"/>
+                <value caption="16k cycles" name="16K" value="0x01"/>
+                <value caption="32k cycles" name="32K" value="0x02"/>
+                <value caption="64k cycles" name="64K" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="CPU" id="I2100" name="CPU">
+            <register-group caption="CPU" name="CPU" size="0x10">
+                <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW"
+                          size="1">
+                    <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+                </register>
+                <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+                <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+                    <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+                    <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+                    <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signature select" name="CPU_CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+        </module>
+        <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+            <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+                    <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+                </register>
+                <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+                    <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+                    <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+            <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+                    <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+                </register>
+                <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+                    <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+                <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+                <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+                <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+            </value-group>
+        </module>
+        <module caption="Event System" id="I2118" name="EVSYS">
+            <register-group caption="Event System" name="EVSYS" size="0x40">
+                <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 6" initval="0x00" name="CHANNEL6" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Multiplexer Channel 7" initval="0x00" name="CHANNEL7" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Generator selector" mask="0xff" name="GENERATOR" rw="RW"
+                              values="EVSYS_GENERATOR"/>
+                </register>
+                <register caption="Channel Strobe" initval="0x00" name="STROBE" offset="0x00" rw="W" size="1">
+                    <bitfield caption="Software event on channels" mask="0xff" name="STROBE0" rw="W"
+                              values="EVSYS_STROBE0"/>
+                </register>
+                <register caption="User ADC0" initval="0x00" name="USERADC0" offset="0x28" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW"
+                          size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port A" initval="0x00" name="USEREVOUTA" offset="0x29" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port B" initval="0x00" name="USEREVOUTB" offset="0x2A" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port C" initval="0x00" name="USEREVOUTC" offset="0x2B" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port D" initval="0x00" name="USEREVOUTD" offset="0x2C" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port E" initval="0x00" name="USEREVOUTE" offset="0x2D" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User EVOUT Port F" initval="0x00" name="USEREVOUTF" offset="0x2E" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCA0" initval="0x00" name="USERTCA0" offset="0x33" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB0" initval="0x00" name="USERTCB0" offset="0x34" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB1" initval="0x00" name="USERTCB1" offset="0x35" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB2" initval="0x00" name="USERTCB2" offset="0x36" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User TCB3" initval="0x00" name="USERTCB3" offset="0x37" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART0" initval="0x00" name="USERUSART0" offset="0x2F" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART1" initval="0x00" name="USERUSART1" offset="0x30" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART2" initval="0x00" name="USERUSART2" offset="0x31" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+                <register caption="User USART3" initval="0x00" name="USERUSART3" offset="0x32" rw="RW" size="1">
+                    <bitfield caption="Channel selector" mask="0xff" name="CHANNEL" rw="RW" values="EVSYS_CHANNEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Generator selector select" name="EVSYS_GENERATOR">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+                <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+                <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+                <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT0" value="0x8"/>
+                <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT1" value="0x9"/>
+                <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT2" value="0xA"/>
+                <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT3" value="0xB"/>
+                <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+                <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+                <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+                <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+                <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+                <value caption="ADC 0 Result Ready Event" name="ADC0_RESRDY" value="0x24"/>
+                <value caption="Port 0 Pin 0" name="PORT0_PIN0" value="0x40"/>
+                <value caption="Port 0 Pin 1" name="PORT0_PIN1" value="0x41"/>
+                <value caption="Port 0 Pin 2" name="PORT0_PIN2" value="0x42"/>
+                <value caption="Port 0 Pin 3" name="PORT0_PIN3" value="0x43"/>
+                <value caption="Port 0 Pin 4" name="PORT0_PIN4" value="0x44"/>
+                <value caption="Port 0 Pin 5" name="PORT0_PIN5" value="0x45"/>
+                <value caption="Port 0 Pin 6" name="PORT0_PIN6" value="0x46"/>
+                <value caption="Port 0 Pin 7" name="PORT0_PIN7" value="0x47"/>
+                <value caption="Port 1 Pin 0" name="PORT1_PIN0" value="0x48"/>
+                <value caption="Port 1 Pin 1" name="PORT1_PIN1" value="0x49"/>
+                <value caption="Port 1 Pin 2" name="PORT1_PIN2" value="0x4A"/>
+                <value caption="Port 1 Pin 3" name="PORT1_PIN3" value="0x4B"/>
+                <value caption="Port 1 Pin 4" name="PORT1_PIN4" value="0x4C"/>
+                <value caption="Port 1 Pin 5" name="PORT1_PIN5" value="0x4D"/>
+                <value caption="Port 1 Pin 6" name="PORT1_PIN6" value="0x4E"/>
+                <value caption="Port 1 Pin 7" name="PORT1_PIN7" value="0x4F"/>
+                <value caption="USART 0 Xclock" name="USART0_XCK" value="0x60"/>
+                <value caption="USART 1 Xclock" name="USART1_XCK" value="0x61"/>
+                <value caption="USART 2 Xclock" name="USART2_XCK" value="0x62"/>
+                <value caption="USART 3 Xclock" name="USART3_XCK" value="0x63"/>
+                <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+                <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+                <value caption="Timer/Counter A0 high byte underflow (split mode)" name="TCA0_HUNF" value="0x81"/>
+                <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x84"/>
+                <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x85"/>
+                <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x86"/>
+                <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+                <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+                <value caption="Timer/Counter B2 capture" name="TCB2_CAPT" value="0xA4"/>
+                <value caption="Timer/Counter B3 capture" name="TCB3_CAPT" value="0xA6"/>
+            </value-group>
+            <value-group caption="Software event on channels select" name="EVSYS_STROBE0">
+                <value caption="" name="EV_STROBE_CH0" value="0x01"/>
+                <value caption="" name="EV_STROBE_CH1" value="0x02"/>
+                <value caption="" name="EV_STROBE_CH2" value="0x04"/>
+                <value caption="" name="EV_STROBE_CH3" value="0x08"/>
+                <value caption="" name="EV_STROBE_CH4" value="0x10"/>
+                <value caption="" name="EV_STROBE_CH5" value="0x20"/>
+                <value caption="" name="EV_STROBE_CH6" value="0x40"/>
+                <value caption="" name="EV_STROBE_CH7" value="0x80"/>
+            </value-group>
+            <value-group caption="Channel selector select" name="EVSYS_CHANNEL">
+                <value caption="Off" name="OFF" value="0x0"/>
+                <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+                <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+                <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+                <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+                <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+                <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+                <value caption="Connect user to event channel 6" name="CHANNEL6" value="0x7"/>
+                <value caption="Connect user to event channel 7" name="CHANNEL7" value="0x8"/>
+            </value-group>
+        </module>
+        <module caption="Fuses" id="I2600" name="FUSE">
+            <register-group caption="Fuses" name="FUSE" size="0x09">
+                <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW"
+                          size="1"/>
+                <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW"
+                              values="FUSE_ACTIVE"/>
+                    <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+                    <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW"
+                              values="FUSE_SAMPFREQ"/>
+                    <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW"
+                              values="FUSE_SLEEP"/>
+                </register>
+                <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+                <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+                    <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+                </register>
+                <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+                    <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+                    <bitfield caption="Reset Pin Configuration" mask="0x8" name="RSTPINCFG" rw="RW"
+                              values="FUSE_RSTPINCFG"/>
+                </register>
+                <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+                </register>
+                <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW"
+                              values="FUSE_WINDOW"/>
+                </register>
+            </register-group>
+            <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+                <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD Level select" name="FUSE_LVL">
+                <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+                <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+                <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+            </value-group>
+            <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+                <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+                <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+            </value-group>
+            <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+                <value caption="Disabled" name="DIS" value="0x00"/>
+                <value caption="Enabled" name="ENABLED" value="0x01"/>
+                <value caption="Sampled" name="SAMPLED" value="0x02"/>
+            </value-group>
+            <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+                <value caption="16 MHz" name="16MHZ" value="0x1"/>
+                <value caption="20 MHz" name="20MHZ" value="0x2"/>
+            </value-group>
+            <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+                <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)."
+                       name="FLASH" value="0x0"/>
+                <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+                <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP"
+                       value="0x2"/>
+                <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+            </value-group>
+            <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+                <value caption="GPIO mode" name="GPIO" value="0x0"/>
+                <value caption="Reset mode" name="RST" value="0x1"/>
+            </value-group>
+            <value-group caption="Startup Time select" name="FUSE_SUT">
+                <value caption="0 ms" name="0MS" value="0x00"/>
+                <value caption="1 ms" name="1MS" value="0x01"/>
+                <value caption="2 ms" name="2MS" value="0x02"/>
+                <value caption="4 ms" name="4MS" value="0x03"/>
+                <value caption="8 ms" name="8MS" value="0x04"/>
+                <value caption="16 ms" name="16MS" value="0x05"/>
+                <value caption="32 ms" name="32MS" value="0x06"/>
+                <value caption="64 ms" name="64MS" value="0x07"/>
+            </value-group>
+            <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+        <module caption="General Purpose IO" id="I2600" name="GPIO">
+            <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Lockbit" id="I2600" name="LOCKBIT">
+            <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+                <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+                <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+                <value caption="No locks" name="NOLOCK" value="0xC5"/>
+            </value-group>
+        </module>
+        <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+            <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+                <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+                    <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+                    <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+                    <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+                    <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Command select" name="NVMCTRL_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+                <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+                <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+                <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+                <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+                <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+                <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Ports" id="I2103" name="PORT">
+            <register-group caption="I/O Ports" name="PORT" size="0x20">
+                <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+                <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+                <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+                <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+                <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+                <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+                <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+                <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+                    <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+                </register>
+                <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+                <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+                <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+                <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+            </value-group>
+        </module>
+        <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+            <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+                <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW"/>
+                    <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW"/>
+                    <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW"/>
+                    <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW"/>
+                </register>
+                <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW"
+                          size="1">
+                    <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+                    <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+                    <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+                    <bitfield caption="Event Output D" mask="0x8" name="EVOUTD" rw="RW" values="PORTMUX_EVOUTD"/>
+                    <bitfield caption="Event Output E" mask="0x10" name="EVOUTE" rw="RW" values="PORTMUX_EVOUTE"/>
+                    <bitfield caption="Event Output F" mask="0x20" name="EVOUTF" rw="RW" values="PORTMUX_EVOUTF"/>
+                </register>
+                <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCA0" mask="0x7" name="TCA0" rw="RW" values="PORTMUX_TCA0"/>
+                </register>
+                <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+                    <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+                    <bitfield caption="Port Multiplexer TCB2" mask="0x4" name="TCB2" rw="RW" values="PORTMUX_TCB2"/>
+                    <bitfield caption="Port Multiplexer TCB3" mask="0x8" name="TCB3" rw="RW" values="PORTMUX_TCB3"/>
+                </register>
+                <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="TWISPIROUTEA" offset="0x3" rw="RW"
+                          size="1">
+                    <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+                    <bitfield caption="Port Multiplexer TWI0" mask="0x30" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+                </register>
+                <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2"
+                          rw="RW" size="1">
+                    <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW"
+                              values="PORTMUX_USART0"/>
+                    <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW"
+                              values="PORTMUX_USART1"/>
+                    <bitfield caption="Port Multiplexer USART2" mask="0x30" name="USART2" rw="RW"
+                              values="PORTMUX_USART2"/>
+                    <bitfield caption="Port Multiplexer USART3" mask="0xc0" name="USART3" rw="RW"
+                              values="PORTMUX_USART3"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+                <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+                <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+                <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PC7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output D select" name="PORTMUX_EVOUTD">
+                <value caption="EVOUT on PD2" name="DEFAULT" value="0x0"/>
+                <value caption="EVOUT on PD7" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Output E select" name="PORTMUX_EVOUTE">
+                <value caption="EVOUT on PE2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Event Output F select" name="PORTMUX_EVOUTF">
+                <value caption="EVOUT on PF2" name="DEFAULT" value="0x0"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCA0 select" name="PORTMUX_TCA0">
+                <value caption="TCA0 pins on PA[5:0]" name="PORTA" value="0x0"/>
+                <value caption="TCA0 pins on PB[5:0]" name="PORTB" value="0x1"/>
+                <value caption="TCA0 pins on PC[5:0]" name="PORTC" value="0x2"/>
+                <value caption="TCA0 pins on PD[5:0]" name="PORTD" value="0x3"/>
+                <value caption="TCA0 pins on PE[5:0]" name="PORTE" value="0x4"/>
+                <value caption="TCA0 pins on PF[5:0]" name="PORTF" value="0x5"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+                <value caption="WO on PA2" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+                <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PF5" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB2 select" name="PORTMUX_TCB2">
+                <value caption="WO on PC0" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PB4" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TCB3 select" name="PORTMUX_TCB3">
+                <value caption="WO on PB5" name="DEFAULT" value="0x0"/>
+                <value caption="WO on PC1" name="ALT1" value="0x1"/>
+            </value-group>
+            <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+                <value caption="SPI0 on PA[7:4]" name="DEFAULT" value="0x0"/>
+                <value caption="SPI0 on PC[3:0]" name="ALT1" value="0x1"/>
+                <value caption="SPI0 on PE[3:0]" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PC[3:2] in dual TWI mode" name="DEFAULT" value="0x0"/>
+                <value caption="SCL/SDA on PA[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT1" value="0x1"/>
+                <value caption="SCL/SDA on PC[3:2], Slave mode on PF[3:2] in dual TWI mode" name="ALT2" value="0x2"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+                <value caption="USART0 on PA[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART0 on PA[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+                <value caption="USART1 on PC[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART1 on PC[7:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART2 select" name="PORTMUX_USART2">
+                <value caption="USART2 on PF[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART2 on PF[6:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+            <value-group caption="Port Multiplexer USART3 select" name="PORTMUX_USART3">
+                <value caption="USART3 on PB[3:0]" name="DEFAULT" value="0x0"/>
+                <value caption="USART3 on PB[5:4]" name="ALT1" value="0x1"/>
+                <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="Reset controller" id="I2111" name="RSTCTRL">
+            <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+                <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+                    <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+                    <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+                    <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+                    <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+                    <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+                </register>
+                <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Real-Time Counter" id="I2116" name="RTC">
+            <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+                <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+                    <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+                </register>
+                <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+                </register>
+                <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+                <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+                    <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+                    <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+                    <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+                </register>
+                <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+                <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+                    <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+                </register>
+                <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+                    <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW"
+                          size="1">
+                    <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+                </register>
+                <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+                    <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+                    <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+                    <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+                    <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+                </register>
+                <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="RTC_CLKSEL">
+                <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+                <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+                <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+                <value caption="External Clock" name="EXTCLK" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+                <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+                <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+                <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+                <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+                <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+                <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+                <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+                <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+            </value-group>
+            <value-group caption="Period select" name="RTC_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+                <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+                <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+                <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+                <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+                <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+                <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+                <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+                <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+                <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+                <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+                <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+                <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+                <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+            </value-group>
+        </module>
+        <module caption="Signature row" id="I2600" name="SIGROW">
+            <register-group caption="Signature row" name="SIGROW" size="0x40">
+                <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+                <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+                <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+                <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R"
+                          size="1"/>
+                <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R"
+                          size="1"/>
+                <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+                <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+                <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+                <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+                <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+                <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+                <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+                <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+                <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+                <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+                <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+                <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+                <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+                <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R"
+                          size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R"
+                          size="1"/>
+            </register-group>
+        </module>
+        <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+            <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+                <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+                    <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Standby Mode" name="STDBY" value="0x01"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+                    <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+                    <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+                    <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+                    <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+                    <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+                </register>
+                <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+                    <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <mode name="BUFFERED">
+                        <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+                        <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+                        <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+                        <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+                        <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    </mode>
+                    <mode name="DEFAULT">
+                        <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+                        <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+                    </mode>
+                </register>
+            </register-group>
+            <value-group caption="Prescaler select" name="SPI_PRESC">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="SPI Mode select" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+            <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+                <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+                </register>
+                <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+                <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+                    <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+                </register>
+                <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+            <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+                <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+                <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+                <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+                <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+                <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+                <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+                <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+                    <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+                    <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+                    <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+                    <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW"
+                              values="TCA_SINGLE_WGMODE"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+                    <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+                    <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+                    <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+                    <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+                </register>
+                <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+                    <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+                    <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+                    <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+                    <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+                    <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+                    <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+                    <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+                </register>
+                <register caption="Period" initval="0xFFFF" name="PER" offset="0x26" rw="RW" size="2"/>
+                <register caption="Period Buffer" initval="0xFFFF" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+                <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+                    <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+                    <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+                    <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+                    <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+                    <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+                    <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+                    <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+                    <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+                </register>
+                <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+                    <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+                </register>
+                <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+                <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+                <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+                <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+                    <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+                    <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+                    <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+                    <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+                    <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+                </register>
+                <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+                <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+                <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+                <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40"
+                            union-tag="TCA.SINGLE.CTRLD.SPLITM">
+                <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+                <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+            </register-group>
+            <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SINGLE_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+                <value caption="Count up" name="UP" value="0x0"/>
+                <value caption="Count down" name="DOWN" value="0x1"/>
+            </value-group>
+            <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+                <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+                <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+                <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+                <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1."
+                       name="UPDOWN" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+                <value caption="System Clock" name="DIV1" value="0x00"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Command select" name="TCA_SPLIT_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+            <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+                <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+                <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+                    <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+                    <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+                </register>
+                <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+                    <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+                    <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+                    <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+                    <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+                    <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+                </register>
+                <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+                    <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+                </register>
+                <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+            </register-group>
+            <value-group caption="Clock Select select" name="TCB_CLKSEL">
+                <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+                <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+                <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+            </value-group>
+            <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+                <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+                <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+                <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+                <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+                <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+                <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+                <value caption="Single Shot" name="SINGLE" value="0x06"/>
+                <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Two-Wire Interface" id="I2110" name="TWI">
+            <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                        <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW"
+                                  values="TWI_DEFAULT_SDASETUP"/>
+                    </mode>
+                </register>
+                <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                    </mode>
+                </register>
+                <register caption="Dual Control" initval="0x00" name="DUALCTRL" offset="0x1" rw="RW" size="1">
+                    <mode name="DEFAULT">
+                        <bitfield caption="Dual Control Enable" mask="0x1" name="ENABLE" rw="RW"/>
+                        <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+                        <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW"
+                                  values="TWI_DEFAULT_SDAHOLD"/>
+                    </mode>
+                </register>
+                <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+                <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+                <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                    <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+                </register>
+                <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+                    <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+                </register>
+                <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+                <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+                </register>
+                <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+                <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+                    <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+                    <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+                </register>
+                <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+                </register>
+                <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+                    <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+                </register>
+                <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+                <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+                    <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+                    <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+                    <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+                <value caption="SDA hold time off" name="OFF" value="0x00"/>
+                <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+                <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+                <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+                <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+                <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+            </value-group>
+            <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+                <value caption="Send ACK" name="ACK" value="0x0"/>
+                <value caption="Send NACK" name="NACK" value="0x1"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_MCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Bus State select" name="TWI_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Command select" name="TWI_SCMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Address or Stop select" name="TWI_AP">
+                <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+                <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+            </value-group>
+        </module>
+        <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+            <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART"
+                            size="0x10">
+                <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+                    <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+                    <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+                    <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW"
+                              values="USART_RS485"/>
+                    <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+                    <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+                    <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+                    <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+                    <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+                    <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+                </register>
+                <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+                    <mode name="MSPI">
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_MSPI_CMODE"/>
+                        <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+                        <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+                    </mode>
+                    <mode name="NORMAL">
+                        <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW"
+                                  values="USART_NORMAL_CHSIZE"/>
+                        <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW"
+                                  values="USART_NORMAL_CMODE"/>
+                        <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+                        <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW"
+                                  values="USART_NORMAL_SBMODE"/>
+                    </mode>
+                </register>
+                <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+                    <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+                </register>
+                <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+                    <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+                    <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+                </register>
+                <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+                    <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+                </register>
+                <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+                    <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+                    <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+                    <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+                    <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                </register>
+                <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+                    <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+                </register>
+                <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE"
+                          rw="RW" size="1">
+                    <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+                    <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+                    <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+                    <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+                    <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+                    <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+                </register>
+                <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+                </register>
+                <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+                    <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+                </register>
+                <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD"
+                          rw="RW" size="1">
+                    <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+                <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+                <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+                <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+            </value-group>
+            <value-group caption="Receiver Mode select" name="USART_RXMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x0"/>
+                <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+                <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+                <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+                <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+                <value caption="1 stop bit" name="1BIT" value="0x0"/>
+                <value caption="2 stop bits" name="2BIT" value="0x1"/>
+            </value-group>
+            <value-group caption="Auto Baud Window select" name="USART_ABW">
+                <value caption="18% tolerance" name="WDW0" value="0x0"/>
+                <value caption="15% tolerance" name="WDW1" value="0x1"/>
+                <value caption="21% tolerance" name="WDW2" value="0x2"/>
+                <value caption="25% tolerance" name="WDW3" value="0x3"/>
+            </value-group>
+        </module>
+        <module caption="User Row" id="I2603" name="USERROW">
+            <register-group caption="User Row" name="USERROW" size="0x20">
+                <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+                <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+                <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+                <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+                <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+                <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+                <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+                <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+                <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+                <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+                <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+                <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+                <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+                <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+                <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+                <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+                <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+                <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+                <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+                <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+                <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+                <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+                <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+                <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+                <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+                <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+                <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+                <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+                <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+                <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+                <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+                <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+                <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+                <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+                <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+                <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+                <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+                <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+                <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+                <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+                <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+                <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+                <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+                <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+                <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+                <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+                <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+                <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+                <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+                <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+                <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+                <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+                <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+                <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+                <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+                <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+                <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+                <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+                <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+                <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+                <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+                <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+                <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+                <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Virtual Ports" id="I2103" name="VPORT">
+            <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+                <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+                <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+                <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+                    <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+                </register>
+                <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+            </register-group>
+        </module>
+        <module caption="Voltage reference" id="I2600" name="VREF">
+            <register-group caption="Voltage reference" name="VREF" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW"
+                              values="VREF_AC0REFSEL"/>
+                    <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW"
+                              values="VREF_ADC0REFSEL"/>
+                </register>
+                <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+                    <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+                </register>
+            </register-group>
+            <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+                <value caption="AVDD as Voltage reference" name="AVDD" value="0x07"/>
+            </value-group>
+            <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+                <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+                <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+                <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+                <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+                <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+            </value-group>
+        </module>
+        <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+                <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+                    <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+                    <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+                </register>
+                <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+                    <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+                    <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+                </register>
+            </register-group>
+            <value-group caption="Period select" name="WDT_PERIOD">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="Window select" name="WDT_WINDOW">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+                <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+                <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+                <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+                <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+                <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+                <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+                <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+                <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+                <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+                <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+        <pinout name="QFP48">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="PB4" position="8"/>
+            <pin pad="PB5" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="VDD0" position="14"/>
+            <pin pad="GND0" position="15"/>
+            <pin pad="PC4" position="16"/>
+            <pin pad="PC5" position="17"/>
+            <pin pad="PC6" position="18"/>
+            <pin pad="PC7" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="AVDD" position="28"/>
+            <pin pad="AGND" position="29"/>
+            <pin pad="PE0" position="30"/>
+            <pin pad="PE1" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PF0" position="34"/>
+            <pin pad="PF1" position="35"/>
+            <pin pad="PF2" position="36"/>
+            <pin pad="PF3" position="37"/>
+            <pin pad="PF4" position="38"/>
+            <pin pad="PF5" position="39"/>
+            <pin pad="PF6" position="40"/>
+            <pin pad="UPDI" position="41"/>
+            <pin pad="VDD1" position="42"/>
+            <pin pad="GND1" position="43"/>
+            <pin pad="PA0" position="44"/>
+            <pin pad="PA1" position="45"/>
+            <pin pad="PA2" position="46"/>
+            <pin pad="PA3" position="47"/>
+            <pin pad="PA4" position="48"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8515.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8515.xml
new file mode 100644
index 00000000..88a19192
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8515.xml
@@ -0,0 +1,820 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega8515" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+                    <memory-segment name="XRAM" start="0x0260" size="0xfda0" type="ram" external="true"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="4" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="5" name="TIMER1_COMPB" caption="Timer/Counter1 Compare MatchB"/>
+                <interrupt index="6" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="7" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="8" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="9" name="USART_RX" caption="USART, Rx Complete"/>
+                <interrupt index="10" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="11" name="USART_TX" caption="USART, Tx Complete"/>
+                <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="13" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="14" name="TIMER0_COMP" caption="Timer 0 Compare Match"/>
+                <interrupt index="15" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="16" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x06"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="AT90S4414/8515 compatibility mode" mask="0x80" name="S8515C"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x40" name="WDTON"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)]" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS"
+                       value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flashsize=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF"/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size Bit 2" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0x40" size="1">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Baud Rate Register bit 11" mask="0x0C" name="UBRR1"/>
+                    <bitfield caption="USART Baud Rate Register bits" mask="0x03" name="UBRR" lsb="8"/>
+                </register>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="Extended MCU Control Register" name="EMCUCR" offset="0x56" size="1">
+                    <bitfield caption="Sleep Mode Select Bit 0" mask="0x80" name="SM0"/>
+                    <bitfield caption="Wait State Selector Limit bits" mask="0x70" name="SRL"
+                              values="CPU_SECTOR_LIMITS"/>
+                    <bitfield caption="Wait State Select Bits for Lower Sector, bits" mask="0x0C" name="SRW0"
+                              values="CPU_WAIT_STATES"/>
+                    <bitfield caption="Wait State Select Bits for Upper Sector, bit 1" mask="0x02" name="SRW11"/>
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x01" name="ISC2"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="External SRAM/XMEM Enable" mask="0x80" name="SRE"/>
+                    <bitfield caption="Wait State Select Bits for Upper Sector, bit 0" mask="0x40" name="SRW10"/>
+                    <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+                    <bitfield caption="Sleep Mode Select Bit 1" mask="0x10" name="SM1"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Sleep Mode Select Bit 2" mask="0x20" name="SM2"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x24" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Store Program Memory Control Register" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="External Memory Bus Keeper Enable" mask="0x40" name="XMBK"/>
+                    <bitfield caption="External Memory High Mask Bits" mask="0x38" name="XMM"/>
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer / Counter 1 and Timer / Counter 0" mask="0x01"
+                              name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SECTOR_LIMITS">
+                <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
+                <value caption="LS = 0x1100 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
+                <value caption="LS = 0x1100 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
+                <value caption="LS = 0x1100 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
+                <value caption="LS = 0x1100 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
+                <value caption="LS = 0x1100 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
+                <value caption="LS = 0x1100 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
+                <value caption="LS = 0x1100 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="CPU_WAIT_STATES">
+                <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
+                <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
+                <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
+                <value caption="Wait two cycles during read/write and wait one cycle before driving out new address"
+                       name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1 Mhz" name="1_Mhz"/>
+                <value value="0x01" caption="2 Mhz" name="2_Mhz"/>
+                <value value="0x02" caption="4 Mhz" name="4_Mhz"/>
+                <value value="0x03" caption="8 Mhz" name="8_Mhz"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter 0 Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 0 Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter 0 Output Compare Register" name="OCR0" offset="0x51" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x01"
+                              name="OCIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+                    <bitfield caption="Output Compare Flag 0" mask="0x01" name="OCF0"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="TICIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x80" name="TOV1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+                    <bitfield caption="Input Capture Flag 1" mask="0x08" name="ICF1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare for Channel A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare for Channel B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Pulse Width Modulator Select Bits" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x27" size="1" mask="0x07"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x26" size="1" mask="0x07"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x25" size="1" mask="0x07" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8535.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8535.xml
new file mode 100644
index 00000000..128c479b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8535.xml
@@ -0,0 +1,935 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega8535" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt 1"/>
+                <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="4" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="9" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="10" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="11" name="USART_RX" caption="USART, RX Complete"/>
+                <interrupt index="12" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="13" name="USART_TX" caption="USART, TX Complete"/>
+                <interrupt index="14" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="15" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="16" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="17" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="18" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="19" name="TIMER0_COMP" caption="TimerCounter0 Compare Match"/>
+                <interrupt index="20" name="SPM_RDY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x08"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="6"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="0"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="0"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="AT90S4434/8535 compatibility mode" mask="0x80" name="S8535C"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x40" name="WDTON"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
+                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC Auto Trigger" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC Auto Trigger Sources" mask="0xE0" name="ADTS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF"/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size Bit 2" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0x40" size="1">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Baud Rate Register bit 11" mask="0x0C" name="UBRR1"/>
+                    <bitfield caption="USART Baud Rate Register bits" mask="0x03" name="UBRR" lsb="8"/>
+                </register>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0xFF"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0xFF"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC0"/>
+                    <bitfield caption="Waveform Generation Mode 0" mask="0x40" name="WGM00" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Match Output Modes" mask="0x30" name="COM0"/>
+                    <bitfield caption="Waveform Generation Mode 1" mask="0x08" name="WGM01"/>
+                    <bitfield caption="Clock Selects" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter Register" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register" name="OCR0" offset="0x5C" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match Interrupt register" mask="0x02"
+                              name="OCIE0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 0" mask="0x02" name="OCF0"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x80" name="INT1"/>
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x20" name="INT2"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                    <bitfield caption="External Interrupt Flag 2" mask="0x20" name="INTF2"/>
+                </register>
+                <register caption="General Interrupt Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Interrupt Sense Control 2" mask="0x40" name="ISC2"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Mode Select" mask="0xB0" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x40" name="SE"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Anlog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                </register>
+                <register caption="" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1 Mhz" name="1_Mhz"/>
+                <value value="0x01" caption="2 Mhz" name="2_Mhz"/>
+                <value value="0x02" caption="4 Mhz" name="4_Mhz"/>
+                <value value="0x03" caption="8 Mhz" name="8_Mhz"/>
+            </value-group>
+            <value-group name="CPU_SLEEP_MODE_3BITS" caption="">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x08"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x09"/>
+                <value caption="Standby" name="STDBY" value="0x0A"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x0B"/>
+            </value-group>
+
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88.xml
new file mode 100644
index 00000000..8571d904
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88.xml
@@ -0,0 +1,1284 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega88V-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88V-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88V-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega88" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x930A"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x1000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)]" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX"
+                              values="ADC_MUX_SINGLE_NO_TEMP"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE_NO_TEMP">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
new file mode 100644
index 00000000..fb7affa6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
@@ -0,0 +1,1346 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega88A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
+                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88A-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega88A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x930F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x0a"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)]" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="UFBGA32" caption="UFBGA32">
+            <pin position="B1" pad="PD3"/>
+            <pin position="B2" pad="PD4"/>
+            <pin position="C1" pad="GND"/>
+            <pin position="D1" pad="VDD"/>
+            <pin position="D2" pad="VDD"/>
+            <pin position="E1" pad="PB6"/>
+            <pin position="F1" pad="PB7"/>
+            <pin position="F2" pad="PD5"/>
+            <pin position="E2" pad="PD6"/>
+            <pin position="F3" pad="PD7"/>
+            <pin position="E3" pad="PB0"/>
+            <pin position="F4" pad="PB1"/>
+            <pin position="E4" pad="PB2"/>
+            <pin position="F5" pad="PB3"/>
+            <pin position="F6" pad="PB4"/>
+            <pin position="E6" pad="PB5"/>
+            <pin position="E5" pad="AVCC"/>
+            <pin position="D6" pad="ADC6"/>
+            <pin position="D5" pad="AREF"/>
+            <pin position="C6" pad="GND"/>
+            <pin position="C5" pad="ADC7"/>
+            <pin position="B6" pad="PC0"/>
+            <pin position="A6" pad="PC1"/>
+            <pin position="A5" pad="PC2"/>
+            <pin position="B5" pad="PC3"/>
+            <pin position="A4" pad="PC4"/>
+            <pin position="B4" pad="PC5"/>
+            <pin position="A3" pad="PC6"/>
+            <pin position="B3" pad="PD0"/>
+            <pin position="A2" pad="PD1"/>
+            <pin position="A1" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml
new file mode 100644
index 00000000..b863e967
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88P.xml
@@ -0,0 +1,1316 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega88PV-10AU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PV-10MU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PV-10PU" tempmin="-40" tempmax="85" speedmax="10000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88P-20AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88P-20MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATmega88P-20PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega88P" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x930F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x0f"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)]" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
new file mode 100644
index 00000000..928d65e6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
@@ -0,0 +1,1356 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega88PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
+                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
+                 vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-PU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MMN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN28"
+                 package="QFN28" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="QFN32"
+                 package="QFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PA-PN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega88PA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x930F"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x0f"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)]" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_258CK_14CK_4MS1" value="0x06"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_258CK_14CK_65MS" value="0x16"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTFSXTAL_1KCK_14CK_0MS" value="0x26"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTFSXTAL_1KCK_14CK_4MS1" value="0x36"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTFSXTAL_1KCK_14CK_65MS" value="0x07"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTFSXTAL_16KCK_14CK_0MS" value="0x17"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTFSXTAL_16KCK_14CK_4MS1" value="0x27"/>
+                <value caption="Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTFSXTAL_16KCK_14CK_65MS" value="0x37"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN32" caption="QFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="QFN28" caption="QFN28">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="VCC"/>
+            <pin position="4" pad="GND"/>
+            <pin position="5" pad="PB6"/>
+            <pin position="6" pad="PB7"/>
+            <pin position="7" pad="PD5"/>
+            <pin position="8" pad="PD6"/>
+            <pin position="9" pad="PD7"/>
+            <pin position="10" pad="PB0"/>
+            <pin position="11" pad="PB1"/>
+            <pin position="12" pad="PB2"/>
+            <pin position="13" pad="PB3"/>
+            <pin position="14" pad="PB4"/>
+            <pin position="15" pad="PB5"/>
+            <pin position="16" pad="AVCC"/>
+            <pin position="17" pad="AREF"/>
+            <pin position="18" pad="GND"/>
+            <pin position="19" pad="PC0"/>
+            <pin position="20" pad="PC1"/>
+            <pin position="21" pad="PC2"/>
+            <pin position="22" pad="PC3"/>
+            <pin position="23" pad="PC4"/>
+            <pin position="24" pad="PC5"/>
+            <pin position="25" pad="PC6"/>
+            <pin position="26" pad="PD0"/>
+            <pin position="27" pad="PD1"/>
+            <pin position="28" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+        <pinout name="UFBGA32" caption="UFBGA32">
+            <pin position="B1" pad="PD3"/>
+            <pin position="B2" pad="PD4"/>
+            <pin position="C1" pad="GND"/>
+            <pin position="D1" pad="VDD"/>
+            <pin position="D2" pad="VDD"/>
+            <pin position="E1" pad="PB6"/>
+            <pin position="F1" pad="PB7"/>
+            <pin position="F2" pad="PD5"/>
+            <pin position="E2" pad="PD6"/>
+            <pin position="F3" pad="PD7"/>
+            <pin position="E3" pad="PB0"/>
+            <pin position="F4" pad="PB1"/>
+            <pin position="E4" pad="PB2"/>
+            <pin position="F5" pad="PB3"/>
+            <pin position="F6" pad="PB4"/>
+            <pin position="E6" pad="PB5"/>
+            <pin position="E5" pad="AVCC"/>
+            <pin position="D6" pad="ADC6"/>
+            <pin position="D5" pad="AREF"/>
+            <pin position="C6" pad="GND"/>
+            <pin position="C5" pad="ADC7"/>
+            <pin position="B6" pad="PC0"/>
+            <pin position="A6" pad="PC1"/>
+            <pin position="A5" pad="PC2"/>
+            <pin position="B5" pad="PC3"/>
+            <pin position="A4" pad="PC4"/>
+            <pin position="B4" pad="PC5"/>
+            <pin position="A3" pad="PC6"/>
+            <pin position="B3" pad="PD0"/>
+            <pin position="A2" pad="PD1"/>
+            <pin position="A1" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml
new file mode 100644
index 00000000..5422e895
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA88PB.xml
@@ -0,0 +1,1283 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega88PB-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-AN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="TQFP32"
+                 package="TQFP32" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATmega88PB-MN" tempmin="-40" tempmax="105" speedmax="20000000" pinout="VQFN32"
+                 package="VQFN32" vccmin="1.8" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega88PB" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="USART">
+                    <instance name="USART0" caption="USART">
+                        <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB3"/>
+                            <signal group="OCB" function="default" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                            <signal group="ADC" index="6" function="default" pad="PE2"/>
+                            <signal group="ADC" index="7" function="default" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AC" function="default" pad="PE0"/>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE" caption="I/O Port">
+                        <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PE0" index="0"/>
+                            <signal group="P" function="default" pad="PE1" index="1"/>
+                            <signal group="P" function="default" pad="PE2" index="2"/>
+                            <signal group="P" function="default" pad="PE3" index="3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                            <signal group="OCB" function="default" pad="PD5"/>
+                            <signal group="OCA" function="default" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="19" function="default" pad="PD3"/>
+                            <signal group="PCINT" index="20" function="default" pad="PD4"/>
+                            <signal group="PCINT" index="6" function="default" pad="PB6"/>
+                            <signal group="PCINT" index="7" function="default" pad="PB7"/>
+                            <signal group="PCINT" index="21" function="default" pad="PD5"/>
+                            <signal group="PCINT" index="22" function="default" pad="PD6"/>
+                            <signal group="PCINT" index="23" function="default" pad="PD7"/>
+                            <signal group="PCINT" index="0" function="default" pad="PB0"/>
+                            <signal group="PCINT" index="1" function="default" pad="PB1"/>
+                            <signal group="PCINT" index="2" function="default" pad="PB2"/>
+                            <signal group="PCINT" index="3" function="default" pad="PB3"/>
+                            <signal group="PCINT" index="4" function="default" pad="PB4"/>
+                            <signal group="PCINT" index="5" function="default" pad="PB5"/>
+                            <signal group="PCINT" index="8" function="default" pad="PC0"/>
+                            <signal group="PCINT" index="9" function="default" pad="PC1"/>
+                            <signal group="PCINT" index="10" function="default" pad="PC2"/>
+                            <signal group="PCINT" index="11" function="default" pad="PC3"/>
+                            <signal group="PCINT" index="12" function="default" pad="PC4"/>
+                            <signal group="PCINT" index="13" function="default" pad="PC5"/>
+                            <signal group="PCINT" index="14" function="default" pad="PC6"/>
+                            <signal group="PCINT" index="16" function="default" pad="PD0"/>
+                            <signal group="PCINT" index="17" function="default" pad="PD1"/>
+                            <signal group="PCINT" index="18" function="default" pad="PD2"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="SS" function="default" pad="PB2"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <signals>
+                            <signal group="CLK" index="0" function="default" pad="PB0"/>
+                        </signals>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="DEVICEID">
+                    <instance name="DEVICEID" caption="Device ID">
+                        <register-group name="DEVICEID" name-in-module="DEVICEID" offset="0x0" address-space="data"
+                                        caption="Device ID"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="7" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="8" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match A"/>
+                <interrupt index="9" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="10" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="11" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="12" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="13" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="14" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+                <interrupt index="15" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+                <interrupt index="16" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+                <interrupt index="17" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="18" name="USART_RX" caption="USART Rx Complete"/>
+                <interrupt index="19" name="USART_UDRE" caption="USART, Data Register Empty"/>
+                <interrupt index="20" name="USART_TX" caption="USART Tx Complete"/>
+                <interrupt index="21" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="22" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="23" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="24" name="TWI" caption="Two-wire Serial Interface"/>
+                <interrupt index="25" name="SPM_Ready" caption="Store Program Memory Read"/>
+                <interrupt index="26" name="USART_START" caption="USART Start Edge Interrupt"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9316"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x16"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="45"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="5"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_AVRDRAGON">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF9">
+                    <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS"
+                       value="0x00"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1"
+                       value="0x10"/>
+                <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS"
+                       value="0x20"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x13"/>
+                <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"
+                       name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x23"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_4MS1" value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_1KCK_14CK_65MS" value="0x24"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_0MS" value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_4MS1" value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"
+                       name="EXTLOFXTAL_32KCK_14CK_65MS" value="0x25"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+                <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Device ID" name="DEVICEID">
+            <register-group caption="Device ID" name="DEVICEID">
+                <register caption="" name="DEVID0" offset="0xF0" size="1"/>
+                <register caption="" name="DEVID1" offset="0xF1" size="1"/>
+                <register caption="" name="DEVID2" offset="0xF2" size="1"/>
+                <register caption="" name="DEVID3" offset="0xF3" size="1"/>
+                <register caption="" name="DEVID4" offset="0xF4" size="1"/>
+                <register caption="" name="DEVID5" offset="0xF5" size="1"/>
+                <register caption="" name="DEVID6" offset="0xF6" size="1"/>
+                <register caption="" name="DEVID7" offset="0xF7" size="1"/>
+                <register caption="" name="DEVID8" offset="0xF8" size="1"/>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART0">
+                <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+                    <bitfield caption="Character Size - together with UCSZ0 in UCSR0C" mask="0x04" name="UCSZ02"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size - together with UCSZ2 in UCSR0B" mask="0x06" name="UCSZ0"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR0D" offset="0xC3" size="1">
+                    <bitfield caption="RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="RX Start" mask="0x40" name="RXS"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE_2BIT">
+                <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+                <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+                    <bitfield caption="" mask="0xFE" name="TWAM"/>
+                </register>
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+                    <bitfield caption="" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="" mask="0x40" name="FOC1B"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE2B"/>
+                    <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
+                    <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
+                    <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+                    <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+                    <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
+                    <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
+                    <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
+                </register>
+                <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF3"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX_SINGLE"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+                <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+                    <bitfield caption="" mask="0x40" name="ACME"/>
+                    <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS"
+                              values="ANALOG_ADC_AUTO_TRIGGER"/>
+                </register>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield caption="" mask="0x20" name="ADC5D"/>
+                    <bitfield caption="" mask="0x10" name="ADC4D"/>
+                    <bitfield caption="" mask="0x08" name="ADC3D"/>
+                    <bitfield caption="" mask="0x04" name="ADC2D"/>
+                    <bitfield caption="" mask="0x02" name="ADC1D"/>
+                    <bitfield caption="" mask="0x01" name="ADC0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF3">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ADC_MUX_SINGLE">
+                <value caption="ADC Single Ended Input pin 0" name="ADC0" value="0x00"/>
+                <value caption="ADC Single Ended Input pin 1" name="ADC1" value="0x01"/>
+                <value caption="ADC Single Ended Input pin 2" name="ADC2" value="0x02"/>
+                <value caption="ADC Single Ended Input pin 3" name="ADC3" value="0x03"/>
+                <value caption="ADC Single Ended Input pin 4" name="ADC4" value="0x04"/>
+                <value caption="ADC Single Ended Input pin 5" name="ADC5" value="0x05"/>
+                <value caption="ADC Single Ended Input pin 6" name="ADC6" value="0x06"/>
+                <value caption="ADC Single Ended Input pin 7" name="ADC7" value="0x07"/>
+                <value caption="Temperature sensor" name="TEMPSENS" value="0x08"/>
+                <value caption="Internal Reference (VBG)" name="ADC_VBG" value="0x0E"/>
+                <value caption="0V (GND)" name="ADC_GND" value="0x0F"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+                <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+                <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+                <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+                <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+                <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+                <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+                <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+                <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+                <register caption="Analog Comparator Status Register B" name="ACSRB" offset="0x4F" size="1">
+                    <bitfield caption="Analog Comparator Output Enable" mask="0x01" name="ACOE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTE">
+                <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x0F"/>
+                <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x0F"/>
+                <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
+                </register>
+                <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0x7F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+                    <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+                    <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                    <bitfield caption="Power Reduction USART" mask="0x02" name="PRUSART0"/>
+                    <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS"
+                              values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+                </register>
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+                    <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+                    <bitfield caption="" mask="0x10" name="PUD"/>
+                    <bitfield caption="" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+                <value caption="256" name="VAL_0x08" value="0x08"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP32" caption="TQFP32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="VQFN32" caption="VQFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="PE0"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="PE1"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="PE2"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="PE3"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8A.xml
new file mode 100644
index 00000000..11fb93e3
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8A.xml
@@ -0,0 +1,1064 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATMEGA8A-AU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATMEGA8A-PU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="PDIP28" package="PDIP28"
+                 vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATMEGA8A-MU" tempmin="-40" tempmax="85" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+
+        <variant ordercode="ATMEGA8A-AN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN32"
+                 package="TQFP32" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATMEGA8A-MN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="PDIP28"
+                 package="PDIP28" vccmin="2.7" vccmax="5.5"/>
+        <variant ordercode="ATMEGA8A-PN" tempmin="-40" tempmax="105" speedmax="16000000" pinout="TQFPQFN32"
+                 package="QFN32" vccmin="2.7" vccmax="5.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega8A" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x40"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x40"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+                    <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0460">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0060" size="0x0400" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+                    <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" function="default" pad="PD6"/>
+                            <signal group="AIN" index="1" function="default" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" function="default" pad="PB4"/>
+                            <signal group="MOSI" function="default" pad="PB3"/>
+                            <signal group="SCK" function="default" pad="PB5"/>
+                            <signal group="SS" function="default" pad="PB2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="1" function="default" pad="PD3"/>
+                            <signal group="INT" index="0" function="default" pad="PD2"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="T" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="OCA" function="default" pad="PB1"/>
+                            <signal group="OCB" function="default" pad="PB2"/>
+                            <signal group="T" function="default" pad="PD5"/>
+                            <signal group="ICP" function="default" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC8_ASYNC">
+                    <instance name="TC2" caption="Timer/Counter, 8-bit Async">
+                        <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit Async"/>
+                        <signals>
+                            <signal group="OC" function="default" pad="PB3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART" caption="USART">
+                        <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" function="default" pad="PD0"/>
+                            <signal group="TXD" function="default" pad="PD1"/>
+                            <signal group="XCK" function="default" pad="PD4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI">
+                    <instance name="TWI" caption="Two Wire Serial Interface">
+                        <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data"
+                                        caption="Two Wire Serial Interface"/>
+                        <signals>
+                            <signal group="SDA" function="default" pad="PC4"/>
+                            <signal group="SCL" function="default" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                        <signals>
+                            <signal group="ADC" index="0" function="default" pad="PC0"/>
+                            <signal group="ADC" index="1" function="default" pad="PC1"/>
+                            <signal group="ADC" index="2" function="default" pad="PC2"/>
+                            <signal group="ADC" index="3" function="default" pad="PC3"/>
+                            <signal group="ADC" index="4" function="default" pad="PC4"/>
+                            <signal group="ADC" index="5" function="default" pad="PC5"/>
+                            <signal group="ADC" index="6" function="default"
+                                    pad="ADC6"/>  <!--Is this the correct pad?-->
+                            <signal group="ADC" index="7" function="default"
+                                    pad="ADC7"/>  <!--Is this the correct pad?-->
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="TIMER2_COMP" caption="Timer/Counter2 Compare Match"/>
+                <interrupt index="4" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+                <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+                <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+                <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+                <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="9" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="10" name="SPI_STC" caption="Serial Transfer Complete"/>
+                <interrupt index="11" name="USART_RXC" caption="USART, Rx Complete"/>
+                <interrupt index="12" name="USART_UDRE" caption="USART Data Register Empty"/>
+                <interrupt index="13" name="USART_TXC" caption="USART, Tx Complete"/>
+                <interrupt index="14" name="ADC" caption="ADC Conversion Complete"/>
+                <interrupt index="15" name="EE_RDY" caption="EEPROM Ready"/>
+                <interrupt index="16" name="ANA_COMP" caption="Analog Comparator"/>
+                <interrupt index="17" name="TWI" caption="2-wire Serial Interface"/>
+                <interrupt index="18" name="SPM_RDY" caption="Store Program Memory Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x07"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="10"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="10"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="10"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="10"/>
+                    <property name="IspChipErase_pollMethod" value="0"/>
+                    <property name="IspProgramFlash_mode" value="0x21"/>
+                    <property name="IspProgramFlash_blockSize" value="64"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x20"/>
+                    <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x04"/>
+                    <property name="IspProgramEeprom_blockSize" value="128"/>
+                    <property name="IspProgramEeprom_delay" value="10"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+                    <property name="IspProgramEeprom_cmd2" value="0x00"/>
+                    <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="20"/>
+                    <property name="PpProgramFlash_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_mode" value="0x0D"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="10"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="10"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="10"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+                    <bitfield caption="Watch-dog Timer always on" mask="0x40" name="WDTON"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                    <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x10" name="CKOPT"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+                    <bitfield caption="Brownout detector trigger level" mask="0x80" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+                <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0x20"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS"
+                       value="0x01"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS"
+                       value="0x11"/>
+                <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms; default value"
+                       name="INTRCOSC_1MHZ_6CK_64MS_DEFAULT" value="0x21"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS"
+                       value="0x02"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS"
+                       value="0x12"/>
+                <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS"
+                       value="0x22"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS"
+                       value="0x03"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS"
+                       value="0x13"/>
+                <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS"
+                       value="0x23"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS"
+                       value="0x04"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS"
+                       value="0x14"/>
+                <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS"
+                       value="0x24"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x05"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x15"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0x25"/>
+                <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0x35"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x06"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x16"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0x26"/>
+                <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0x36"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x07"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x17"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0x27"/>
+                <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0x37"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x08"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x18"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0x28"/>
+                <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms"
+                       name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0x38"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS"
+                       value="0x09"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS"
+                       value="0x19"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS"
+                       value="0x29"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTLOFXTALRES_258CK_4MS" value="0x0A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTLOFXTALRES_258CK_64MS" value="0x1A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTLOFXTALRES_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTLOFXTALRES_1KCK_4MS" value="0x3A"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTLOFXTALRES_1KCK_64MS" value="0x0B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTLOFXTALRES_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTLOFXTALRES_16KCK_4MS" value="0x2B"/>
+                <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTLOFXTALRES_16KCK_64MS" value="0x3B"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTMEDFXTALRES_258CK_4MS" value="0x0C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTMEDFXTALRES_258CK_64MS" value="0x1C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTMEDFXTALRES_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTMEDFXTALRES_1KCK_4MS" value="0x3C"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTMEDFXTALRES_1KCK_64MS" value="0x0D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTMEDFXTALRES_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTMEDFXTALRES_16KCK_4MS" value="0x2D"/>
+                <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTMEDFXTALRES_16KCK_64MS" value="0x3D"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms"
+                       name="EXTHIFXTALRES_258CK_4MS" value="0x0E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms"
+                       name="EXTHIFXTALRES_258CK_64MS" value="0x1E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms"
+                       name="EXTHIFXTALRES_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms"
+                       name="EXTHIFXTALRES_1KCK_4MS" value="0x3E"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms"
+                       name="EXTHIFXTALRES_1KCK_64MS" value="0x0F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms"
+                       name="EXTHIFXTALRES_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms"
+                       name="EXTHIFXTALRES_16KCK_4MS" value="0x2F"/>
+                <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms"
+                       name="EXTHIFXTALRES_16KCK_64MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+                <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+                <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+                <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x08" name="ACME"/>
+                </register>
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Data Register" name="SPDR" offset="0x2F" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="SPI Status Register" name="SPSR" offset="0x2E" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Control Register" name="SPCR" offset="0x2D" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="General Interrupt Control Register" name="GICR" offset="0x5B" size="1">
+                    <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1">
+                    <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+                </register>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1">
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register" name="TCCR0" offset="0x53" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer Counter 0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="TICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x10"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x08"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x08" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Force Output Compare 1A" mask="0x08" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x04" name="FOC1B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x46" size="2"
+                          mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+            <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
+                <register caption="Timer/Counter Interrupt Mask register" name="TIMSK" offset="0x59" size="1">
+                    <bitfield caption="Timer/Counter2 Output Compare Match Interrupt Enable" mask="0x80" name="OCIE2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x40" name="TOIE2"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+                    <bitfield caption="Output Compare Flag 2" mask="0x80" name="OCF2"/>
+                    <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x40" name="TOV2"/>
+                </register>
+                <register caption="Timer/Counter2 Control Register" name="TCCR2" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare" mask="0x80" name="FOC2"/>
+                    <bitfield caption="Waveform Genration Mode" mask="0x40" name="WGM20" values="WAVEFORM_GEN_MODE"/>
+                    <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM21"/>
+                    <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
+                </register>
+                <register caption="Timer/Counter2" name="TCNT2" offset="0x44" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter2 Output Compare Register" name="OCR2" offset="0x43" size="1"
+                          mask="0xFF"/>
+                <register caption="Asynchronous Status Register" name="ASSR" offset="0x42" size="1">
+                    <bitfield caption="Asynchronous Timer/counter2" mask="0x08" name="AS2"/>
+                    <bitfield caption="Timer/Counter2 Update Busy" mask="0x04" name="TCN2UB"/>
+                    <bitfield caption="Output Compare Register2 Update Busy" mask="0x02" name="OCR2UB"/>
+                    <bitfield caption="Timer/counter Control Register2 Update Busy" mask="0x01" name="TCR2UB"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSR2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WAVEFORM_GEN_MODE">
+                <value caption="Normal" name="VAL_0x00" value="0x00"/>
+                <value caption="PWM, Phase Correct" name="VAL_0x02" value="0x02"/>
+                <value caption="CTC" name="VAL_0x01" value="0x01"/>
+                <value caption="Fast PWM" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="CLK_SEL_3BIT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART">
+                <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+                <register caption="USART Control and Status Register A" name="UCSRA" offset="0x2B" size="1" ocd-rw="R">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSRB" offset="0x2A" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSRC" offset="0x40" size="1" ocd-rw="">
+                    <bitfield caption="Register Select" mask="0x80" name="URSEL"/>
+                    <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+                </register>
+                <register caption="USART Baud Rate Register Hight Byte" name="UBRRH" offset="0x40" size="1"
+                          mask="0x0F"/>
+                <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+            </register-group>
+            <value-group caption="" name="COMM_USART_MODE">
+                <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="COMM_UPM_PARITY_MODE">
+                <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+                <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="COMM_STOP_BIT_SEL">
+                <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+                <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+            </value-group>
+        </module>
+        <module caption="Two Wire Serial Interface" name="TWI">
+            <register-group caption="Two Wire Serial Interface" name="TWI">
+                <register caption="TWI Bit Rate register" name="TWBR" offset="0x20" size="1" mask="0xFF"/>
+                <register caption="TWI Control Register" name="TWCR" offset="0x56" size="1" ocd-rw="R">
+                    <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+                    <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+                    <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+                    <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+                    <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+                    <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+                    <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+                </register>
+                <register caption="TWI Status Register" name="TWSR" offset="0x21" size="1">
+                    <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+                    <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+                </register>
+                <register caption="TWI Data register" name="TWDR" offset="0x23" size="1" mask="0xFF"/>
+                <register caption="TWI (Slave) Address register" name="TWAR" offset="0x22" size="1">
+                    <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+                    <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="COMM_TWI_PRESACLE">
+                <value caption="1" name="VAL_0x00" value="0x00"/>
+                <value caption="4" name="VAL_0x01" value="0x01"/>
+                <value caption="16" name="VAL_0x02" value="0x02"/>
+                <value caption="64" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                    <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_3BITS"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+                <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x35" size="1" mask="0x7F"/>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x34" size="1" mask="0x7F"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x33" size="1" mask="0x7F" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x32" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x31" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Sleep Enable" mask="0x80" name="SE"/>
+                    <bitfield caption="Sleep Mode Select" mask="0x70" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+                    <bitfield caption="Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                    <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL2"/>
+                </register>
+                <register caption="MCU Control And Status Register" name="MCUCSR" offset="0x54" size="1">
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="Store Program Memory Control Register" name="SPMCR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Read-While-Write Section Read Enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+                <register caption="Special Function IO Register" name="SFIOR" offset="0x50" size="1">
+                    <bitfield caption="ADC High Speed Mode" mask="0x10" name="ADHSM"/>
+                    <bitfield caption="Pull-up Disable" mask="0x04" name="PUD"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+            <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+                <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+                <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+                <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+                    <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
+                    <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+                </register>
+                <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1">
+                    <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+                    <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+                    <bitfield caption="ADC  Free Running Select" mask="0x20" name="ADFR"/>
+                    <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+                    <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+                    <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"
+                              values="ANALOG_ADC_PRESCALER"/>
+                </register>
+                <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+            </register-group>
+            <value-group caption="" name="ANALOG_ADC_V_REF2">
+                <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
+                <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_ADC_PRESCALER">
+                <value caption="2" name="VAL_0x00" value="0x00"/>
+                <value caption="2" name="VAL_0x01" value="0x01"/>
+                <value caption="4" name="VAL_0x02" value="0x02"/>
+                <value caption="8" name="VAL_0x03" value="0x03"/>
+                <value caption="16" name="VAL_0x04" value="0x04"/>
+                <value caption="32" name="VAL_0x05" value="0x05"/>
+                <value caption="64" name="VAL_0x06" value="0x06"/>
+                <value caption="128" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFPQFN32" caption="TQFPQFN32">
+            <pin position="1" pad="PD3"/>
+            <pin position="2" pad="PD4"/>
+            <pin position="3" pad="GND"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="VCC"/>
+            <pin position="7" pad="PB6"/>
+            <pin position="8" pad="PB7"/>
+            <pin position="9" pad="PD5"/>
+            <pin position="10" pad="PD6"/>
+            <pin position="11" pad="PD7"/>
+            <pin position="12" pad="PB0"/>
+            <pin position="13" pad="PB1"/>
+            <pin position="14" pad="PB2"/>
+            <pin position="15" pad="PB3"/>
+            <pin position="16" pad="PB4"/>
+            <pin position="17" pad="PB5"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="ADC6"/>
+            <pin position="20" pad="AREF"/>
+            <pin position="21" pad="GND"/>
+            <pin position="22" pad="ADC7"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+            <pin position="29" pad="PC6"/>
+            <pin position="30" pad="PD0"/>
+            <pin position="31" pad="PD1"/>
+            <pin position="32" pad="PD2"/>
+        </pinout>
+        <pinout name="PDIP28" caption="PDIP28">
+            <pin position="1" pad="PC6"/>
+            <pin position="2" pad="PD0"/>
+            <pin position="3" pad="PD1"/>
+            <pin position="4" pad="PD2"/>
+            <pin position="5" pad="PD3"/>
+            <pin position="6" pad="PD4"/>
+            <pin position="7" pad="VCC"/>
+            <pin position="8" pad="GND"/>
+            <pin position="9" pad="PB6"/>
+            <pin position="10" pad="PB7"/>
+            <pin position="11" pad="PD5"/>
+            <pin position="12" pad="PD6"/>
+            <pin position="13" pad="PD7"/>
+            <pin position="14" pad="PB0"/>
+            <pin position="15" pad="PB1"/>
+            <pin position="16" pad="PB2"/>
+            <pin position="17" pad="PB3"/>
+            <pin position="18" pad="PB4"/>
+            <pin position="19" pad="PB5"/>
+            <pin position="20" pad="AVCC"/>
+            <pin position="21" pad="AREF"/>
+            <pin position="22" pad="GND"/>
+            <pin position="23" pad="PC0"/>
+            <pin position="24" pad="PC1"/>
+            <pin position="25" pad="PC2"/>
+            <pin position="26" pad="PC3"/>
+            <pin position="27" pad="PC4"/>
+            <pin position="28" pad="PC5"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8HVA.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8HVA.xml
new file mode 100644
index 00000000..6607261c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8HVA.xml
@@ -0,0 +1,683 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="4.5"/>
+    </variants>
+    <devices>
+        <device name="ATmega8HVA" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+            </address-spaces>
+            <peripherals>
+                <module name="ADC">
+                    <instance name="ADC" caption="Analog-to-Digital Converter">
+                        <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data"
+                                        caption="Analog-to-Digital Converter"/>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="BANDGAP">
+                    <instance name="BANDGAP" caption="Bandgap">
+                        <register-group name="BANDGAP" name-in-module="BANDGAP" offset="0x00" address-space="data"
+                                        caption="Bandgap"/>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                    </instance>
+                </module>
+                <module name="PORT">
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTA" caption="I/O Port">
+                        <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                    </instance>
+                </module>
+                <module name="FET">
+                    <instance name="FET" caption="FET Control">
+                        <register-group name="FET" name-in-module="FET" offset="0x00" address-space="data"
+                                        caption="FET Control"/>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V2E"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="BATTERY_PROTECTION">
+                    <instance name="BATTERY_PROTECTION" caption="Battery Protection">
+                        <register-group name="BATTERY_PROTECTION" name-in-module="BATTERY_PROTECTION" offset="0x00"
+                                        address-space="data" caption="Battery Protection"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                    <instance name="TC0" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                    </instance>
+                </module>
+                <module name="COULOMB_COUNTER">
+                    <instance name="COULOMB_COUNTER" caption="Coulomb Counter">
+                        <register-group name="COULOMB_COUNTER" name-in-module="COULOMB_COUNTER" offset="0x00"
+                                        address-space="data" caption="Coulomb Counter"/>
+                    </instance>
+                </module>
+                <module name="VOLTAGE_REGULATOR">
+                    <instance name="VOLTAGE_REGULATOR" caption="Voltage Regulator">
+                        <register-group name="VOLTAGE_REGULATOR" name-in-module="VOLTAGE_REGULATOR" offset="0x00"
+                                        address-space="data" caption="Voltage Regulator"/>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+                <interrupt index="1" name="BPINT" caption="Battery Protection Interrupt"/>
+                <interrupt index="2" name="VREGMON" caption="Voltage regulator monitor interrupt"/>
+                <interrupt index="3" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="4" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="5" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="6" name="WDT" caption="Watchdog Timeout Interrupt"/>
+                <interrupt index="7" name="TIMER1_IC" caption="Timer 1 Input capture"/>
+                <interrupt index="8" name="TIMER1_COMPA" caption="Timer 1 Compare Match A"/>
+                <interrupt index="9" name="TIMER1_COMPB" caption="Timer 1 Compare Match B"/>
+                <interrupt index="10" name="TIMER1_OVF" caption="Timer 1 overflow"/>
+                <interrupt index="11" name="TIMER0_IC" caption="Timer 0 Input Capture"/>
+                <interrupt index="12" name="TIMER0_COMPA" caption="Timer 0 Comapre Match A"/>
+                <interrupt index="13" name="TIMER0_COMPB" caption="Timer 0 Compare Match B"/>
+                <interrupt index="14" name="TIMER0_OVF" caption="Timer 0 Overflow"/>
+                <interrupt index="15" name="SPI_STC" caption="SPI Serial transfer complete"/>
+                <interrupt index="16" name="VADC" caption="Voltage ADC Conversion Complete"/>
+                <interrupt index="17" name="CCADC_CONV" caption="Coulomb Counter ADC Conversion Complete"/>
+                <interrupt index="18" name="CCADC_REG_CUR" caption="Coloumb Counter ADC Regular Current"/>
+                <interrupt index="19" name="CCADC_ACC" caption="Coloumb Counter ADC Accumulator"/>
+                <interrupt index="20" name="EE_READY" caption="EEPROM Ready"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVSP" type="hvsp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9310"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x10"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="20"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="10"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="HVSP_INTERFACE">
+                    <property name="HvspControlStack"
+                              value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+                    <property name="HvspEnterProgMode_stabDelay" value="100"/>
+                    <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+                    <property name="HvspEnterProgMode_synchCycles" value="6"/>
+                    <property name="HvspEnterProgMode_latchCycles" value="1"/>
+                    <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+                    <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+                    <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+                    <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+                    <property name="HvspLeaveProgMode_stabDelay" value="101"/>
+                    <property name="HvspLeaveProgMode_resetDelay" value="26"/>
+                    <property name="HvspChipErase_pollTimeout" value="40"/>
+                    <property name="HvspChipErase_eraseTime" value="1"/>
+                    <property name="HvspProgramFlash_mode" value="0x0D"/>
+                    <property name="HvspProgramFlash_blockSize" value="256"/>
+                    <property name="HvspProgramFlash_pollTimeout" value="6"/>
+                    <property name="HvspReadFlash_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_mode" value="0x05"/>
+                    <property name="HvspProgramEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+                    <property name="HvspReadEeprom_blockSize" value="256"/>
+                    <property name="HvspProgramFuse_pollTimeout" value="25"/>
+                    <property name="HvspProgramLock_pollTimeout" value="25"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0xDF">
+                    <bitfield caption="Watch-dog Timer always on" mask="0x80" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Debug Wire enable" mask="0x10" name="DWEN"/>
+                    <bitfield caption="Self Programming enable" mask="0x08" name="SELFPRGEN"/>
+                    <bitfield caption="Select start-up time" mask="0x07" name="SUT" values="ENUM_SUT"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT">
+                <value caption="Start-up time 6 CK/14 CK + 4 ms" name="6CK_14CK_4MS" value="0x00"/>
+                <value caption="Start-up time 6 CK/14 CK + 8 ms" name="6CK_14CK_8MS" value="0x01"/>
+                <value caption="Start-up time 6 CK/14 CK + 16 ms" name="6CK_14CK_16MS" value="0x02"/>
+                <value caption="Start-up time 6 CK/14 CK + 32 ms" name="6CK_14CK_32MS" value="0x03"/>
+                <value caption="Start-up time 6 CK/14 CK + 64 ms" name="6CK_14CK_64MS" value="0x04"/>
+                <value caption="Start-up time 6 CK/14 CK + 128 ms" name="6CK_14CK_128MS" value="0x05"/>
+                <value caption="Start-up time 6 CK/14 CK + 256 ms" name="6CK_14CK_256MS" value="0x06"/>
+                <value caption="Start-up time 6 CK/14 CK + 512 ms" name="6CK_14CK_512MS" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="Analog-to-Digital Converter" name="ADC">
+            <register-group caption="Analog-to-Digital Converter" name="ADC">
+                <register caption="The VADC multiplexer Selection Register" name="VADMUX" offset="0x7C" size="1">
+                    <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="VADMUX"/>
+                </register>
+                <register caption="VADC Data Register  Bytes" name="VADC" offset="0x78" size="2" mask="0x0FFF"/>
+                <register caption="The VADC Control and Status register" name="VADCSR" offset="0x7A" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="VADC Enable" mask="0x08" name="VADEN"/>
+                    <bitfield caption="VADC Satrt Conversion" mask="0x04" name="VADSC"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Flag" mask="0x02" name="VADCCIF"/>
+                    <bitfield caption="VADC Conversion Complete Interrupt Enable" mask="0x01" name="VADCCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"
+                              values="WDOG_TIMER_PRESCALE_4BITS"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+                <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+                <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+                <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+                <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+                <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+                <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+                <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+                <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+                <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+                <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+            </value-group>
+        </module>
+        <module caption="Bandgap" name="BANDGAP">
+            <register-group caption="Bandgap" name="BANDGAP">
+                <register caption="Bandgap Calibration of Resistor Ladder" name="BGCRR" offset="0xD1" size="1"
+                          mask="0xFF">
+                    <bitfield caption="Bandgap calibration bits" mask="0xFF" name="BGCR"/>
+                </register>
+                <register caption="Bandgap Calibration Register" name="BGCCR" offset="0xD0" size="1">
+                    <bitfield
+                            caption="Setting the BGD bit to one will disable the bandgap voltage reference. This bit must be cleared before enabling CC-ADC or V-ADC, and must remain unset while either ADC is enabled."
+                            mask="0x80" name="BGD"/>
+                    <bitfield caption="BG Calibration of PTAT Current Bits" mask="0x3F" name="BGCC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control 2 Bits" mask="0x30" name="ISC2"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                    <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0"
+                              values="INTERRUPT_SENSE_CONTROL"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+                <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+                <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+                <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+                <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0x01"/>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0x01" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTA">
+                <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0x03"/>
+                <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0x03"/>
+                <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0x03" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Data Register, Port B" name="PORTB" offset="0x25" size="1" mask="0x0F"/>
+                <register caption="Data Direction Register, Port B" name="DDRB" offset="0x24" size="1" mask="0x0F"/>
+                <register caption="Input Pins, Port B" name="PINB" offset="0x23" size="1" mask="0x0F" ocd-rw="R"/>
+            </register-group>
+        </module>
+        <module caption="FET Control" name="FET">
+            <register-group caption="FET Control" name="FET">
+                <register caption="FET Control and Status Register" name="FCSR" offset="0xF0" size="1">
+                    <bitfield caption="Deep Under-Voltage Recovery Disable" mask="0x08" name="DUVRD"/>
+                    <bitfield caption="Current Protection Status" mask="0x04" name="CPS"/>
+                    <bitfield caption="Discharge FET Enable" mask="0x02" name="DFE"/>
+                    <bitfield caption="Charge FET Enable" mask="0x01" name="CFE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4c" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4d" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4e" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57"
+                          size="1">
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+                    <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Clock Output Enable" mask="0x20" name="CKOE"/>
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+                    <bitfield caption="OCD Reset Flag" mask="0x10" name="OCDRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BODRF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Fast Oscillator Calibration Value" name="FOSCCAL" offset="0x66" size="1"
+                          mask="0xFF"/>
+                <register caption="Oscillator Sampling Interface Control and Status Register" name="OSICSR"
+                          offset="0x37" size="1" ocd-rw="R">
+                    <bitfield caption="Oscillator Sampling Interface Select 0" mask="0x10" name="OSISEL0"/>
+                    <bitfield caption="Oscillator Sampling Interface Status" mask="0x02" name="OSIST"/>
+                    <bitfield caption="Oscillator Sampling Interface Enable" mask="0x01" name="OSIEN"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+                <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x02" name="PA1DID"/>
+                    <bitfield
+                            caption="When this bit is written logic one, the digital input buffer of the corresponding V_ADC pin is disabled."
+                            mask="0x01" name="PA0DID"/>
+                </register>
+                <register caption="Power Reduction Register 0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Voltage Regulator Monitor" mask="0x20" name="PRVRM"/>
+                    <bitfield caption="Power reduction SPI" mask="0x08" name="PRSPI"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction V-ADC" mask="0x01" name="PRVADC"/>
+                </register>
+                <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="Clock Prescaler Select Bits" mask="0x03" name="CLKPS"/>
+                </register>
+            </register-group>
+            <value-group name="CPU_SLEEP_MODE_3BITS" caption="">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+                <value caption="Reserved" name="VAL_0x02" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Power Off" name="POFF" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+                <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="Battery Protection" name="BATTERY_PROTECTION">
+            <register-group caption="Battery Protection" name="BATTERY_PROTECTION">
+                <register caption="Battery Protection Parameter Lock Register" name="BPPLR" offset="0xFE" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Battery Protection Parameter Lock Enable" mask="0x02" name="BPPLE"/>
+                    <bitfield caption="Battery Protection Parameter Lock" mask="0x01" name="BPPL"/>
+                </register>
+                <register caption="Battery Protection Control Register" name="BPCR" offset="0xFD" size="1">
+                    <bitfield caption="Short Circuit Protection Disabled" mask="0x10" name="SCD"/>
+                    <bitfield caption="Discharge Over-current Protection Disabled" mask="0x08" name="DOCD"/>
+                    <bitfield caption="Charge Over-current Protection Disabled" mask="0x04" name="COCD"/>
+                    <bitfield caption="Discharge High-current Protection Disable" mask="0x02" name="DHCD"/>
+                    <bitfield caption="Charge High-current Protection Disable" mask="0x01" name="CHCD"/>
+                </register>
+                <register caption="Battery Protection Short-current Timing Register" name="BPHCTR" offset="0xFC"
+                          size="1" mask="0x3F"/>
+                <register caption="Battery Protection Over-current Timing Register" name="BPOCTR" offset="0xFB" size="1"
+                          mask="0x3F"/>
+                <register caption="Battery Protection Short-current Timing Register" name="BPSCTR" offset="0xFA"
+                          size="1" mask="0x7F"/>
+                <register caption="Battery Protection Charge-High-current Detection Level Register" name="BPCHCD"
+                          offset="0xF9" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-High-current Detection Level Register" name="BPDHCD"
+                          offset="0xF8" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Charge-Over-current Detection Level Register" name="BPCOCD"
+                          offset="0xF7" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Discharge-Over-current Detection Level Register" name="BPDOCD"
+                          offset="0xF6" size="1" mask="0xFF"/>
+                <register caption="Battery Protection Short-Circuit Detection Level Register" name="BPSCD" offset="0xF5"
+                          size="1" mask="0xFF"/>
+                <register caption="Battery Protection Interrupt Flag Register" name="BPIFR" offset="0xF3" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Flag" mask="0x10" name="SCIF"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Flag" mask="0x08"
+                              name="DOCIF"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Flag" mask="0x04"
+                              name="COCIF"/>
+                    <bitfield caption="Disharge High-current Protection Activated Interrupt" mask="0x02" name="DHCIF"/>
+                    <bitfield caption="Charge High-current Protection Activated Interrupt" mask="0x01" name="CHCIF"/>
+                </register>
+                <register caption="Battery Protection Interrupt Mask Register" name="BPIMSK" offset="0xF2" size="1">
+                    <bitfield caption="Short-circuit Protection Activated Interrupt Enable" mask="0x10" name="SCIE"/>
+                    <bitfield caption="Discharge Over-current Protection Activated Interrupt Enable" mask="0x08"
+                              name="DOCIE"/>
+                    <bitfield caption="Charge Over-current Protection Activated Interrupt Enable" mask="0x04"
+                              name="COCIE"/>
+                    <bitfield caption="Discharger High-current Protection Activated Interrupt" mask="0x02"
+                              name="DHCIE"/>
+                    <bitfield caption="Charger High-current Protection Activated Interrupt" mask="0x01" name="CHCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="1" mask="0xFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Clock Select1 bis" mask="0x07" name="CS" lsb="10"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW1"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM10"/>
+                </register>
+                <register caption="Timer Counter 1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Output Compare Register 1A" name="OCR1A" offset="0x88" size="1" mask="0xFF"/>
+                <register caption="Output Compare Register B" name="OCR1B" offset="0x89" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter 1 Input Capture Flag" mask="0x08" name="ICF1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <register-group caption="Timer/Counter, 16-bit" name="TC0">
+                <register caption="Timer/Counter0 Control Register" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Timer/Counter Width" mask="0x80" name="TCW0"/>
+                    <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+                    <bitfield caption="Input Capture Noise Canceler" mask="0x20" name="ICNC0"/>
+                    <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+                    <bitfield caption="Input Capture Select" mask="0x08" name="ICS0"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="WGM00"/>
+                </register>
+                <register caption="Timer/Counter0 Control Register" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02"/>
+                    <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+                    <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
+                </register>
+                <register caption="Timer Counter 0  Bytes" name="TCNT0" offset="0x46" size="2" mask="0xFFFF"/>
+                <register caption="Output compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+                <register caption="Output compare Register B" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter n Input Capture Interrupt Enable" mask="0x08" name="ICIE0"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x04" name="OCIE0B"/>
+                    <bitfield caption="Output Compare Interrupt Enable" mask="0x02" name="OCIE0A"/>
+                    <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter Interrupt Flag Register" mask="0x08" name="ICF0"/>
+                    <bitfield caption="Output Compare Flag" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Output Compare Flag" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Coulomb Counter" name="COULOMB_COUNTER">
+            <register-group caption="Coulomb Counter" name="COULOMB_COUNTER">
+                <register caption="CC-ADC Control and Status Register A" name="CADCSRA" offset="0xE4" size="1">
+                    <bitfield
+                            caption="When the CADEN bit is cleared (zero), the CC-ADC is disabled. When the CADEN bit is set (one), the CC-ADC will continuously measure the voltage drop over the external sense resistor RSENSE. In Power-down, only the Regular Current detection is active. In Power-off, the CC-ADC is always disabled."
+                            mask="0x80" name="CADEN"/>
+                    <bitfield caption="" mask="0x40" name="CADPOL"/>
+                    <bitfield caption="CC_ADC Update Busy" mask="0x20" name="CADUB"/>
+                    <bitfield caption="CC_ADC Accumulate Current Select Bits" mask="0x18" name="CADAS"/>
+                    <bitfield
+                            caption="The CADSI bits determine the current sampling interval for the Regular Current detection in Power-down mode. The actual settings remain to be determined."
+                            mask="0x06" name="CADSI"/>
+                    <bitfield
+                            caption="When the CADSE bit is written to one, the ongoing CC-ADC conversion is aborted, and the CC-ADC enters Regular Current detection mode."
+                            mask="0x01" name="CADSE"/>
+                </register>
+                <register caption="CC-ADC Control and Status Register B" name="CADCSRB" offset="0xE5" size="1">
+                    <bitfield caption="" mask="0x40" name="CADACIE"/>
+                    <bitfield caption="Regular Current Interrupt Enable" mask="0x20" name="CADRCIE"/>
+                    <bitfield caption="CAD Instantenous Current Interrupt Enable" mask="0x10" name="CADICIE"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x04" name="CADACIF"/>
+                    <bitfield caption="CC-ADC Accumulate Current Interrupt Flag" mask="0x02" name="CADRCIF"/>
+                    <bitfield caption="CC-ADC Instantaneous Current Interrupt Flag" mask="0x01" name="CADICIF"/>
+                </register>
+                <register caption="CC-ADC Instantaneous Current" name="CADIC" offset="0xE8" size="2" mask="0xFFFF"/>
+                <register caption="ADC Accumulate Current" name="CADAC3" offset="0xE3" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC2" offset="0xE2" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC1" offset="0xE1" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="ADC Accumulate Current" name="CADAC0" offset="0xE0" size="1" mask="0xFF" ocd-rw="R"/>
+                <register caption="CC-ADC Regular Current" name="CADRC" offset="0xE6" size="1" mask="0xFF"/>
+            </register-group>
+        </module>
+        <module caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+            <register-group caption="Voltage Regulator" name="VOLTAGE_REGULATOR">
+                <register caption="Regulator Operating Condition Register" name="ROCR" offset="0xC8" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="ROC Status" mask="0x80" name="ROCS"/>
+                    <bitfield caption="ROC Warning Interrupt Flag" mask="0x02" name="ROCWIF"/>
+                    <bitfield caption="ROC Warning Interrupt Enable" mask="0x01" name="ROCWIE"/>
+                </register>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
new file mode 100644
index 00000000..52ce2a2f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
@@ -0,0 +1,1158 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATmega8U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="TQFP32" pinout="QUAD"/>
+        <variant ordercode="ATmega8U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
+                 package="QFN32" pinout="QUAD"/>
+    </variants>
+    <devices>
+        <device name="ATmega8U2" architecture="AVR8" family="megaAVR">
+            <address-spaces>
+                <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+                    <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3"
+                                    pagesize="0x80"/>
+                    <memory-segment start="0x1000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4"
+                                    pagesize="0x80"/>
+                </address-space>
+                <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+                    <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+                    <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+                    <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+                    <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+                    <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+                    <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+                </address-space>
+                <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="0x04"/>
+                </address-space>
+                <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+                <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+                    <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="PORT">
+                    <instance name="PORTB" caption="I/O Port">
+                        <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PB0" index="0"/>
+                            <signal group="P" function="default" pad="PB1" index="1"/>
+                            <signal group="P" function="default" pad="PB2" index="2"/>
+                            <signal group="P" function="default" pad="PB3" index="3"/>
+                            <signal group="P" function="default" pad="PB4" index="4"/>
+                            <signal group="P" function="default" pad="PB5" index="5"/>
+                            <signal group="P" function="default" pad="PB6" index="6"/>
+                            <signal group="P" function="default" pad="PB7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD" caption="I/O Port">
+                        <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PD0" index="0"/>
+                            <signal group="P" function="default" pad="PD1" index="1"/>
+                            <signal group="P" function="default" pad="PD2" index="2"/>
+                            <signal group="P" function="default" pad="PD3" index="3"/>
+                            <signal group="P" function="default" pad="PD4" index="4"/>
+                            <signal group="P" function="default" pad="PD5" index="5"/>
+                            <signal group="P" function="default" pad="PD6" index="6"/>
+                            <signal group="P" function="default" pad="PD7" index="7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC" caption="I/O Port">
+                        <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
+                                        caption="I/O Port"/>
+                        <signals>
+                            <signal group="P" function="default" pad="PC0" index="0"/>
+                            <signal group="P" function="default" pad="PC1" index="1"/>
+                            <signal group="P" function="default" pad="PC2" index="2"/>
+                            <signal group="P" function="default" pad="PC3" index="3"/>
+                            <signal group="P" function="default" pad="PC4" index="4"/>
+                            <signal group="P" function="default" pad="PC5" index="5"/>
+                            <signal group="P" function="default" pad="PC6" index="6"/>
+                            <signal group="P" function="default" pad="PC7" index="7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI">
+                    <instance name="SPI" caption="Serial Peripheral Interface">
+                        <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data"
+                                        caption="Serial Peripheral Interface"/>
+                        <signals>
+                            <signal group="MISO" pad="PB3" function="default"/>
+                            <signal group="MOSI" pad="PB2" function="default"/>
+                            <signal group="SCLK" pad="PB1" function="default"/>
+                            <signal group="SS" pad="PB0" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="BOOT_LOAD">
+                    <instance name="BOOT_LOAD" caption="Bootloader">
+                        <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data"
+                                        caption="Bootloader"/>
+                    </instance>
+                </module>
+                <module name="EEPROM">
+                    <instance name="EEPROM" caption="EEPROM">
+                        <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data"
+                                        caption="EEPROM"/>
+                    </instance>
+                </module>
+                <module name="TC8">
+                    <instance name="TC0" caption="Timer/Counter, 8-bit">
+                        <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 8-bit"/>
+                        <signals>
+                            <signal group="OCA" pad="PB7" function="default"/>
+                            <signal group="OCB" pad="PD0" function="default"/>
+                            <signal group="T" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC16">
+                    <instance name="TC1" caption="Timer/Counter, 16-bit">
+                        <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data"
+                                        caption="Timer/Counter, 16-bit"/>
+                        <signals>
+                            <signal group="ICP" pad="PC7" function="default"/>
+                            <signal group="OCA" pad="PC6" function="default"/>
+                            <signal group="OCB" pad="PC5" function="default"/>
+                            <signal group="OCC" pad="PB7" function="default"/>
+                            <signal group="T" pad="PB4" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PLL">
+                    <instance name="PLL" caption="Phase Locked Loop">
+                        <register-group name="PLL" name-in-module="PLL" offset="0x00" address-space="data"
+                                        caption="Phase Locked Loop"/>
+                    </instance>
+                </module>
+                <module name="USB_DEVICE">
+                    <instance name="USB_DEVICE" caption="USB Device Registers">
+                        <register-group name="USB_DEVICE" name-in-module="USB_DEVICE" offset="0x00" address-space="data"
+                                        caption="USB Device Registers"/>
+                    </instance>
+                </module>
+                <module name="CPU">
+                    <instance name="CPU" caption="CPU Registers">
+                        <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data"
+                                        caption="CPU Registers"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="EXINT">
+                    <instance name="EXINT" caption="External Interrupts">
+                        <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data"
+                                        caption="External Interrupts"/>
+                        <signals>
+                            <signal group="INT" index="0" pad="PD0" function="default"/>
+                            <signal group="INT" index="1" pad="PD1" function="default"/>
+                            <signal group="INT" index="2" pad="PD2" function="default"/>
+                            <signal group="INT" index="3" pad="PD3" function="default"/>
+                            <signal group="INT" index="4" pad="PC7" function="default"/>
+                            <signal group="INT" index="5" pad="PD4" function="default"/>
+                            <signal group="INT" index="6" pad="PD6" function="default"/>
+                            <signal group="INT" index="7" pad="PD7" function="default"/>
+                            <signal group="PCINT" index="0" pad="PB0" function="default"/>
+                            <signal group="PCINT" index="1" pad="PB1" function="default"/>
+                            <signal group="PCINT" index="2" pad="PB2" function="default"/>
+                            <signal group="PCINT" index="3" pad="PB3" function="default"/>
+                            <signal group="PCINT" index="4" pad="PB4" function="default"/>
+                            <signal group="PCINT" index="5" pad="PB5" function="default"/>
+                            <signal group="PCINT" index="6" pad="PB6" function="default"/>
+                            <signal group="PCINT" index="7" pad="PB7" function="default"/>
+                            <signal group="PCINT" index="8" pad="PC6" function="default"/>
+                            <signal group="PCINT" index="9" pad="PC5" function="default"/>
+                            <signal group="PCINT" index="10" pad="PC4" function="default"/>
+                            <signal group="PCINT" index="11" pad="PC2" function="default"/>
+                            <signal group="PCINT" index="12" pad="PD5" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART">
+                    <instance name="USART1" caption="USART">
+                        <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data"
+                                        caption="USART"/>
+                        <signals>
+                            <signal group="RXD" pad="PD2" function="default"/>
+                            <signal group="TXD" pad="PD3" function="default"/>
+                            <signal group="XCK" pad="PD5" function="default"/>
+                            <signal group="RTS" pad="PD6" function="default"/>
+                            <signal group="CTS" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="WDT">
+                    <instance name="WDT" caption="Watchdog Timer">
+                        <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data"
+                                        caption="Watchdog Timer"/>
+                    </instance>
+                </module>
+                <module name="AC">
+                    <instance name="AC" caption="Analog Comparator">
+                        <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data"
+                                        caption="Analog Comparator"/>
+                        <signals>
+                            <signal group="AIN" index="0" pad="PD1" function="default"/>
+                            <signal group="AIN" index="1" pad="PD2" function="default"/>
+                            <signal group="AIN" index="2" pad="PC2" function="default"/>
+                            <signal group="AIN" index="3" pad="PD4" function="default"/>
+                            <signal group="AIN" index="4" pad="PD5" function="default"/>
+                            <signal group="AIN" index="5" pad="PD6" function="default"/>
+                            <signal group="AIN" index="6" pad="PD7" function="default"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE">
+                    <instance name="FUSE" caption="Fuses">
+                        <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses"
+                                        caption="Fuses"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT">
+                    <instance name="LOCKBIT" caption="Lockbits">
+                        <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits"
+                                        caption="Lockbits"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt index="0" name="RESET"
+                           caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
+                <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+                <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+                <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
+                <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
+                <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
+                <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
+                <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
+                <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
+                <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+                <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+                <interrupt index="11" name="USB_GEN" caption="USB General Interrupt Request"/>
+                <interrupt index="12" name="USB_COM" caption="USB Endpoint/Pipe Interrupt Communication Request"/>
+                <interrupt index="13" name="WDT" caption="Watchdog Time-out Interrupt"/>
+                <interrupt index="14" name="TIMER1_CAPT" caption="Timer/Counter2 Capture Event"/>
+                <interrupt index="15" name="TIMER1_COMPA" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="16" name="TIMER1_COMPB" caption="Timer/Counter2 Compare Match B"/>
+                <interrupt index="17" name="TIMER1_COMPC" caption="Timer/Counter2 Compare Match C"/>
+                <interrupt index="18" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+                <interrupt index="19" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+                <interrupt index="20" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+                <interrupt index="21" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+                <interrupt index="22" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+                <interrupt index="23" name="USART1_RX" caption="USART1, Rx Complete"/>
+                <interrupt index="24" name="USART1_UDRE" caption="USART1 Data register Empty"/>
+                <interrupt index="25" name="USART1_TX" caption="USART1, Tx Complete"/>
+                <interrupt index="26" name="ANALOG_COMP" caption="Analog Comparator"/>
+                <interrupt index="27" name="EE_READY" caption="EEPROM Ready"/>
+                <interrupt index="28" name="SPM_READY" caption="Store Program Memory Read"/>
+            </interrupts>
+            <interfaces>
+                <interface name="ISP" type="isp"/>
+                <interface name="HVPP" type="hvpp"/>
+                <interface name="debugWIRE" type="dw"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x9389"/>
+                    <property name="SIGNATURE0" value="0x1e"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x89"/>
+                </property-group>
+                <property-group name="OCD">
+                    <property name="OCD_REVISION" value="1"/>
+                    <property name="OCD_DATAREG" value="0x31"/>
+                    <property name="PROGBASE" value="0x0000"/>
+                </property-group>
+                <property-group name="JTAG_INTERFACE">
+                    <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+                <property-group name="ISP_INTERFACE_STK600">
+                    <property name="IspEnterProgMode_timeout" value="200"/>
+                    <property name="IspEnterProgMode_stabDelay" value="100"/>
+                    <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+                    <property name="IspEnterProgMode_synchLoops" value="32"/>
+                    <property name="IspEnterProgMode_byteDelay" value="0"/>
+                    <property name="IspEnterProgMode_pollIndex" value="3"/>
+                    <property name="IspEnterProgMode_pollValue" value="0x53"/>
+                    <property name="IspLeaveProgMode_preDelay" value="1"/>
+                    <property name="IspLeaveProgMode_postDelay" value="1"/>
+                    <property name="IspChipErase_eraseDelay" value="55"/>
+                    <property name="IspChipErase_pollMethod" value="1"/>
+                    <property name="IspProgramFlash_mode" value="0x41"/>
+                    <property name="IspProgramFlash_blockSize" value="128"/>
+                    <property name="IspProgramFlash_delay" value="6"/>
+                    <property name="IspProgramFlash_cmd1" value="0x40"/>
+                    <property name="IspProgramFlash_cmd2" value="0x4C"/>
+                    <property name="IspProgramFlash_cmd3" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal1" value="0x00"/>
+                    <property name="IspProgramFlash_pollVal2" value="0x00"/>
+                    <property name="IspProgramEeprom_mode" value="0x41"/>
+                    <property name="IspProgramEeprom_blockSize" value="4"/>
+                    <property name="IspProgramEeprom_delay" value="20"/>
+                    <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+                    <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+                    <property name="IspProgramEeprom_cmd3" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+                    <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+                    <property name="IspReadFlash_blockSize" value="256"/>
+                    <property name="IspReadEeprom_blockSize" value="256"/>
+                    <property name="IspReadFuse_pollIndex" value="4"/>
+                    <property name="IspReadLock_pollIndex" value="4"/>
+                    <property name="IspReadSign_pollIndex" value="4"/>
+                    <property name="IspReadOsccal_pollIndex" value="4"/>
+                </property-group>
+                <property-group name="PP_INTERFACE_STK600">
+                    <property name="PpControlStack"
+                              value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+                    <property name="PpEnterProgMode_stabDelay" value="100"/>
+                    <property name="PpEnterProgMode_progModeDelay" value="0"/>
+                    <property name="PpEnterProgMode_latchCycles" value="5"/>
+                    <property name="PpEnterProgMode_toggleVtg" value="1"/>
+                    <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+                    <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+                    <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+                    <property name="PpLeaveProgMode_stabDelay" value="15"/>
+                    <property name="PpLeaveProgMode_resetDelay" value="15"/>
+                    <property name="PpChipErase_pulseWidth" value="0"/>
+                    <property name="PpChipErase_pollTimeout" value="10"/>
+                    <property name="PpProgramFlash_pollTimeout" value="5"/>
+                    <property name="PpProgramFlash_mode" value="0x0F"/>
+                    <property name="PpProgramFlash_blockSize" value="256"/>
+                    <property name="PpReadFlash_blockSize" value="256"/>
+                    <property name="PpProgramEeprom_pollTimeout" value="5"/>
+                    <property name="PpProgramEeprom_mode" value="0x05"/>
+                    <property name="PpProgramEeprom_blockSize" value="256"/>
+                    <property name="PpReadEeprom_blockSize" value="256"/>
+                    <property name="PpProgramFuse_pulseWidth" value="0"/>
+                    <property name="PpProgramFuse_pollTimeout" value="5"/>
+                    <property name="PpProgramLock_pulseWidth" value="0"/>
+                    <property name="PpProgramLock_pollTimeout" value="5"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module caption="Fuses" name="FUSE">
+            <register-group caption="Fuses" name="FUSE">
+                <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xF4">
+                    <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL"
+                              values="ENUM_BODLEVEL"/>
+                    <bitfield caption="Hardware Boot Enable" mask="0x08" name="HWBE"/>
+                </register>
+                <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
+                    <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+                    <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x40" name="RSTDISBL"/>
+                    <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+                    <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
+                    <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+                    <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+                </register>
+                <register caption="" name="LOW" offset="0x00" size="1" initval="0x5E">
+                    <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+                    <bitfield caption="Clock output on PORTC7" mask="0x40" name="CKOUT"/>
+                    <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_SUT_CKSEL">
+                <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
+                <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
+                <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_0MS_INTCAP" value="0x07"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_4MS1_INTCAP" value="0x17"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_32KCK_65MS_INTCAP" value="0x27"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_0MS_INTCAP" value="0x06"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_4MS1_INTCAP" value="0x16"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms; Int. Cap."
+                       name="EXTLOFXTAL_1KCK_65MS_INTCAP" value="0x26"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS"
+                       value="0x05"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1"
+                       value="0x15"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS"
+                       value="0x25"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS"
+                       value="0x04"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1"
+                       value="0x14"/>
+                <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS"
+                       value="0x24"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
+                <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
+                <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
+                <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
+                <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms"
+                       name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BOOTSZ">
+                <value caption="Boot Flash size=256 words start address=$F00" name="256W_F00" value="0x03"/>
+                <value caption="Boot Flash size=512 words start address=$E00" name="512W_E00" value="0x02"/>
+                <value caption="Boot Flash size=1024 words start address=$C00" name="1024W_C00" value="0x01"/>
+                <value caption="Boot Flash size=2048 words start address=$800" name="2048W_800" value="0x00"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BODLEVEL">
+                <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+                <value caption="Brown-out detection level at VCC=2.7 V" name="2V7" value="0x06"/>
+                <value caption="Brown-out detection level at VCC=2.9 V" name="2V9" value="0x05"/>
+                <value caption="Brown-out detection level at VCC=3.0 V" name="3V0" value="0x04"/>
+                <value caption="Brown-out detection level at VCC=3.5 V" name="3V5" value="0x03"/>
+                <value caption="Brown-out detection level at VCC=3.6 V" name="3V6" value="0x02"/>
+                <value caption="Brown-out detection level at VCC=4.0 V" name="4V0" value="0x01"/>
+                <value caption="Brown-out detection level at VCC=4.3 V" name="4V3" value="0x00"/>
+            </value-group>
+        </module>
+        <module caption="Lockbits" name="LOCKBIT">
+            <register-group caption="Lockbits" name="LOCKBIT">
+                <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+                    <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ENUM_LB">
+                <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+                <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+                <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB">
+                <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ENUM_BLB2">
+                <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+                <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+                <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+                <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module caption="I/O Port" name="PORT">
+            <register-group caption="I/O Port" name="PORTB">
+                <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+                <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+                <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTD">
+                <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+                <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+                <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+            </register-group>
+            <register-group caption="I/O Port" name="PORTC">
+                <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1">
+                    <bitfield caption="Port C Data Register bits" mask="0xF0" name="PORTC" lsb="4"/>
+                    <bitfield caption="Port C Data Register bits" mask="0x07" name="PORTC"/>
+                </register>
+                <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1">
+                    <bitfield caption="Port C Data Direction Register bits" mask="0xF0" name="DDC" lsb="4"/>
+                    <bitfield caption="Port C Data Direction Register bits" mask="0x07" name="DDC"/>
+                </register>
+                <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" ocd-rw="R">
+                    <bitfield caption="Port C Input Pins bits" mask="0xF0" name="PINC" lsb="4"/>
+                    <bitfield caption="Port C Input Pins bits" mask="0x07" name="PINC"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Serial Peripheral Interface" name="SPI">
+            <register-group caption="Serial Peripheral Interface" name="SPI">
+                <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+                    <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+                    <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+                    <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+                    <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+                    <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+                    <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+                </register>
+                <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+                    <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+                    <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+                    <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+                </register>
+                <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+            </register-group>
+            <value-group caption="" name="COMM_SCK_RATE_3BIT">
+                <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+                <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+                <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+                <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+                <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+                <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+                <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+                <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Bootloader" name="BOOT_LOAD">
+            <register-group caption="Bootloader" name="BOOT_LOAD">
+                <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+                    <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+                    <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+                    <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+                    <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
+                    <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
+                    <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+                    <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+                    <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="EEPROM" name="EEPROM">
+            <register-group caption="EEPROM" name="EEPROM">
+                <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
+                <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+                <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+                    <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+                    <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+                    <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+                    <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+                    <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="EEP_MODE">
+                <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+                <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+                <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 8-bit" name="TC8">
+            <register-group caption="Timer/Counter, 8-bit" name="TC0">
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1"
+                          mask="0xFF"/>
+                <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+                <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+                    <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+                    <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+                    <bitfield caption="" mask="0x08" name="WGM02"/>
+                    <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+                    <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+                    <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+                    <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04"
+                              name="OCIE0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02"
+                              name="OCIE0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+                </register>
+                <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+                    <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+                    <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+                </register>
+                <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+                    <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+                    <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Timer/Counter, 16-bit" name="TC16">
+            <register-group caption="Timer/Counter, 16-bit" name="TC1">
+                <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+                    <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+                    <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+                    <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+                </register>
+                <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+                    <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+                    <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+                    <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1"
+                              values="CLK_SEL_3BIT_EXT"/>
+                </register>
+                <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+                    <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
+                    <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
+                    <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
+                </register>
+                <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2"
+                          mask="0xFFFF"/>
+                <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+                    <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+                    <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08"
+                              name="OCIE1C"/>
+                    <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04"
+                              name="OCIE1B"/>
+                    <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02"
+                              name="OCIE1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+                </register>
+                <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+                    <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
+                    <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+                    <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+                    <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="CLK_SEL_3BIT_EXT">
+                <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+                <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+                <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+                <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+                <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+                <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+                <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+                <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+            </value-group>
+        </module>
+        <module caption="Phase Locked Loop" name="PLL">
+            <register-group caption="Phase Locked Loop" name="PLL">
+                <register caption="PLL Status and Control register" name="PLLCSR" offset="0x49" size="1">
+                    <bitfield caption="PLL prescaler Bits" mask="0x1C" name="PLLP" values="PLL_INPUT_PRESCALER"/>
+                    <bitfield caption="PLL Enable Bit" mask="0x02" name="PLLE"/>
+                    <bitfield caption="PLL Lock Status Bit" mask="0x01" name="PLOCK"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="PLL_INPUT_PRESCALER">
+                <value caption="Clock/4" name="VAL_0x03" value="0x03"/>
+                <value caption="Clock/8" name="VAL_0x05" value="0x05"/>
+            </value-group>
+        </module>
+        <module caption="USB Device Registers" name="USB_DEVICE">
+            <register-group caption="USB Device Registers" name="USB_DEVICE">
+                <register caption="USB Software Output Enable register" name="UPOE" offset="0xFB" size="1">
+                    <bitfield caption="USB Buffers Direct Drive enable configuration" mask="0xC0" name="UPWE"/>
+                    <bitfield caption="USB direct drive values" mask="0x30" name="UPDRV"/>
+                    <bitfield caption="D+ Input value" mask="0x02" name="DPI"/>
+                    <bitfield caption="D- Input value" mask="0x01" name="DMI"/>
+                </register>
+                <register caption="USB Endpoint Number Interrupt Register" name="UEINT" offset="0xF4" size="1"
+                          mask="0x1F">
+                    <bitfield caption="Byte Count bits" mask="0x1F" name="EPINT"/>
+                </register>
+                <register caption="USB Endpoint Byte Count Register" name="UEBCLX" offset="0xF2" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Byte Count bits" mask="0xFF" name="BYCT"/>
+                </register>
+                <register caption="USB Data Endpoint" name="UEDATX" offset="0xF1" size="1" mask="0xFF" ocd-rw="">
+                    <bitfield caption="Data bits" mask="0xFF" name="DAT"/>
+                </register>
+                <register caption="USB Endpoint Interrupt Enable Register" name="UEIENX" offset="0xF0" size="1">
+                    <bitfield caption="Flow Error Interrupt Enable Flag" mask="0x80" name="FLERRE"/>
+                    <bitfield caption="NAK IN Interrupt Enable Bit" mask="0x40" name="NAKINE"/>
+                    <bitfield caption="NAK OUT Interrupt Enable Bit" mask="0x10" name="NAKOUTE"/>
+                    <bitfield caption="Received SETUP Interrupt Enable Flag" mask="0x08" name="RXSTPE"/>
+                    <bitfield caption="Received OUT Data Interrupt Enable Flag" mask="0x04" name="RXOUTE"/>
+                    <bitfield caption="Stalled Interrupt Enable Flag" mask="0x02" name="STALLEDE"/>
+                    <bitfield caption="Transmitter Ready Interrupt Enable Flag" mask="0x01" name="TXINE"/>
+                </register>
+                <register caption="USB Endpoint Status 1 Register" name="UESTA1X" offset="0xEF" size="1" ocd-rw="R">
+                    <bitfield caption="Control Direction" mask="0x04" name="CTRLDIR"/>
+                    <bitfield caption="Current Bank" mask="0x03" name="CURRBK"/>
+                </register>
+                <register caption="USB Endpoint Status 0 Register" name="UESTA0X" offset="0xEE" size="1">
+                    <bitfield caption="Configuration Status Flag" mask="0x80" name="CFGOK"/>
+                    <bitfield caption="Overflow Error Interrupt Flag" mask="0x40" name="OVERFI"/>
+                    <bitfield caption="Underflow Error Interrupt Flag" mask="0x20" name="UNDERFI"/>
+                    <bitfield caption="Data Toggle Sequencing Flag" mask="0x0C" name="DTSEQ"/>
+                    <bitfield caption="Busy Bank Flag" mask="0x03" name="NBUSYBK"/>
+                </register>
+                <register caption="USB Endpoint Configuration 1 Register" name="UECFG1X" offset="0xED" size="1">
+                    <bitfield caption="Endpoint Size Bits" mask="0x70" name="EPSIZE"/>
+                    <bitfield caption="Endpoint Bank Bits" mask="0x0C" name="EPBK"/>
+                    <bitfield caption="Endpoint Allocation Bit" mask="0x02" name="ALLOC"/>
+                </register>
+                <register caption="USB Endpoint Configuration 0 Register" name="UECFG0X" offset="0xEC" size="1">
+                    <bitfield caption="Endpoint Type Bits" mask="0xC0" name="EPTYPE"/>
+                    <bitfield caption="Endpoint Direction Bit" mask="0x01" name="EPDIR"/>
+                </register>
+                <register caption="USB Endpoint Control Register" name="UECONX" offset="0xEB" size="1">
+                    <bitfield caption="STALL Request Handshake Bit" mask="0x20" name="STALLRQ"/>
+                    <bitfield caption="STALL Request Clear Handshake Bit" mask="0x10" name="STALLRQC"/>
+                    <bitfield caption="Reset Data Toggle Bit" mask="0x08" name="RSTDT"/>
+                    <bitfield caption="Endpoint Enable Bit" mask="0x01" name="EPEN"/>
+                </register>
+                <register caption="USB Endpoint Reset Register" name="UERST" offset="0xEA" size="1">
+                    <bitfield caption="Endpoint FIFO Reset Bits" mask="0x1F" name="EPRST"/>
+                </register>
+                <register caption="USB Endpoint Number" name="UENUM" offset="0xE9" size="1" mask="0x07">
+                    <bitfield caption="Endpoint Number bits" mask="0x07" name="EPNUM"/>
+                </register>
+                <register caption="USB Endpoint Interrupt Register" name="UEINTX" offset="0xE8" size="1">
+                    <bitfield caption="FIFO Control Bit" mask="0x80" name="FIFOCON"/>
+                    <bitfield caption="NAK IN Received Interrupt Flag" mask="0x40" name="NAKINI"/>
+                    <bitfield caption="Read/Write Allowed Flag" mask="0x20" name="RWAL"/>
+                    <bitfield caption="NAK OUT Received Interrupt Flag" mask="0x10" name="NAKOUTI"/>
+                    <bitfield caption="Received SETUP Interrupt Flag" mask="0x08" name="RXSTPI"/>
+                    <bitfield caption="Received OUT Data Interrupt Flag" mask="0x04" name="RXOUTI"/>
+                    <bitfield caption="STALLEDI Interrupt Flag" mask="0x02" name="STALLEDI"/>
+                    <bitfield caption="Transmitter Ready Interrupt Flag" mask="0x01" name="TXINI"/>
+                </register>
+                <register caption="USB Device Micro Frame Number" name="UDMFN" offset="0xE6" size="1" ocd-rw="R">
+                    <bitfield caption="Frame Number CRC Error Flag" mask="0x10" name="FNCERR"/>
+                </register>
+                <register caption="USB Device Frame Number High Register" name="UDFNUM" offset="0xE4" size="2"
+                          mask="0x07FF">
+                    <bitfield caption="Frame Number Upper Flag" mask="0x07FF" name="FNUM"/>
+                </register>
+                <register caption="USB Device Address Register" name="UDADDR" offset="0xE3" size="1">
+                    <bitfield caption="Address Enable Bit" mask="0x80" name="ADDEN"/>
+                    <bitfield caption="USB Address Bits" mask="0x7F" name="UADD"/>
+                </register>
+                <register caption="USB Device Interrupt Enable Register" name="UDIEN" offset="0xE2" size="1">
+                    <bitfield caption="Upstream Resume Interrupt Enable Bit" mask="0x40" name="UPRSME"/>
+                    <bitfield caption="End Of Resume Interrupt Enable Bit" mask="0x20" name="EORSME"/>
+                    <bitfield caption="Wake-up CPU Interrupt Enable Bit" mask="0x10" name="WAKEUPE"/>
+                    <bitfield caption="End Of Reset Interrupt Enable Bit" mask="0x08" name="EORSTE"/>
+                    <bitfield caption="Start Of Frame Interrupt Enable Bit" mask="0x04" name="SOFE"/>
+                    <bitfield caption="Suspend Interrupt Enable Bit" mask="0x01" name="SUSPE"/>
+                </register>
+                <register caption="USB Device Interrupt Register" name="UDINT" offset="0xE1" size="1">
+                    <bitfield caption="Upstream Resume Interrupt Flag" mask="0x40" name="UPRSMI"/>
+                    <bitfield caption="End Of Resume Interrupt Flag" mask="0x20" name="EORSMI"/>
+                    <bitfield caption="Wake-up CPU Interrupt Flag" mask="0x10" name="WAKEUPI"/>
+                    <bitfield caption="End Of Reset Interrupt Flag" mask="0x08" name="EORSTI"/>
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x04" name="SOFI"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x01" name="SUSPI"/>
+                </register>
+                <register caption="USB Device Control Registers" name="UDCON" offset="0xE0" size="1">
+                    <bitfield caption="USB Reset CPU Bit" mask="0x04" name="RSTCPU"/>
+                    <bitfield caption="Remote Wake-up Bit" mask="0x02" name="RMWKUP"/>
+                    <bitfield caption="Detach Bit" mask="0x01" name="DETACH"/>
+                </register>
+                <register caption="USB General Control Register" name="USBCON" offset="0xD8" size="1">
+                    <bitfield caption="USB macro Enable Bit" mask="0x80" name="USBE"/>
+                    <bitfield caption="Freeze USB Clock Bit" mask="0x20" name="FRZCLK"/>
+                </register>
+                <register caption="Regulator Control Register" name="REGCR" offset="0x63" size="1" ocd-rw="R">
+                    <bitfield caption="Regulator Disable" mask="0x01" name="REGDIS"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="CPU Registers" name="CPU">
+            <register-group caption="CPU Registers" name="CPU">
+                <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+                    <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+                    <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+                <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+                <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+                    <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
+                    <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+                    <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
+                </register>
+                <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+                    <bitfield caption="USB reset flag" mask="0x20" name="USBRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF"
+                          ocd-rw="R">
+                    <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+                </register>
+                <register caption="" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x80" name="CLKPCE"/>
+                    <bitfield caption="" mask="0x0F" name="CLKPS"/>
+                </register>
+                <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+                    <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+                </register>
+                <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
+                    <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
+                </register>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
+                    <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
+                </register>
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
+                    <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
+                    <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
+                </register>
+                <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
+                    <bitfield caption="Power Reduction USB" mask="0x80" name="PRUSB"/>
+                    <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
+                </register>
+                <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
+                    <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+                    <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+                    <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+                </register>
+                <register caption="" name="CLKSTA" offset="0xD2" size="1" ocd-rw="R">
+                    <bitfield caption="" mask="0x02" name="RCON"/>
+                    <bitfield caption="" mask="0x01" name="EXTON"/>
+                </register>
+                <register caption="" name="CLKSEL1" offset="0xD1" size="1">
+                    <bitfield caption="" mask="0xF0" name="RCCKSEL"/>
+                    <bitfield caption="" mask="0x0F" name="EXCKSEL"/>
+                </register>
+                <register caption="" name="CLKSEL0" offset="0xD0" size="1">
+                    <bitfield caption="" mask="0xC0" name="RCSUT"/>
+                    <bitfield caption="" mask="0x30" name="EXSUT"/>
+                    <bitfield caption="" mask="0x08" name="RCE"/>
+                    <bitfield caption="" mask="0x04" name="EXTE"/>
+                    <bitfield caption="" mask="0x01" name="CLKS"/>
+                </register>
+                <register caption="debugWire communication register" name="DWDR" offset="0x51" size="1" mask="0xFF"
+                          ocd-rw=""/>
+            </register-group>
+            <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+                <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+            </value-group>
+            <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
+                <value caption="Idle" name="IDLE" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Power Down" name="PDOWN" value="0x02"/>
+                <value caption="Power Save" name="PSAVE" value="0x03"/>
+                <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+                <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+                <value caption="Standby" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
+            </value-group>
+
+        </module>
+        <module caption="External Interrupts" name="EXINT">
+            <register-group caption="External Interrupts" name="EXINT">
+                <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1"/>
+                    <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0"/>
+                </register>
+                <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5"/>
+                    <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4"/>
+                </register>
+                <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+                    <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
+                </register>
+                <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+                    <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
+                </register>
+                <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+                    <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+                </register>
+                <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+                    <bitfield caption="" mask="0x1F" name="PCINT" lsb="8"/>
+                </register>
+                <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+                    <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+                </register>
+                <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+                    <bitfield caption="Pin Change Interrupt Enables" mask="0x03" name="PCIE"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="USART" name="USART">
+            <register-group caption="USART" name="USART1">
+                <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw="W"/>
+                <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1">
+                    <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+                    <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+                    <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+                    <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+                    <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+                    <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+                </register>
+                <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
+                    <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+                    <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+                    <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+                    <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+                    <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+                    <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+                </register>
+                <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
+                    <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1"/>
+                    <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1"/>
+                    <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1"/>
+                    <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+                    <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+                </register>
+                <register caption="USART Control and Status Register D" name="UCSR1D" offset="0xCB" size="1">
+                    <bitfield caption="CTS Enable" mask="0x02" name="CTSEN"/>
+                    <bitfield caption="RTS Enable" mask="0x01" name="RTSEN"/>
+                </register>
+                <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
+            </register-group>
+        </module>
+        <module caption="Watchdog Timer" name="WDT">
+            <register-group caption="Watchdog Timer" name="WDT">
+                <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+                    <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+                    <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+                    <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP"/>
+                    <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+                    <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+                </register>
+                <register caption="Watchdog Timer Clock Divider" name="WDTCKD" offset="0x62" size="1">
+                    <bitfield caption="Watchdog Early Warning Interrupt Flag" mask="0x08" name="WDEWIF"/>
+                    <bitfield caption="Watchdog Early Warning Interrupt Enable" mask="0x04" name="WDEWIE"/>
+                    <bitfield caption="Watchdog Timer Clock Dividers" mask="0x03" name="WCLKD"/>
+                </register>
+            </register-group>
+        </module>
+        <module caption="Analog Comparator" name="AC">
+            <register-group caption="Analog Comparator" name="AC">
+                <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1"
+                          ocd-rw="R">
+                    <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+                    <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+                    <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+                    <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+                    <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+                    <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+                    <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS"
+                              values="ANALOG_COMP_INTERRUPT"/>
+                </register>
+                <register caption="Analog Comparator Input Multiplexer" name="ACMUX" offset="0x7D" size="1">
+                    <bitfield caption="Analog Comparator Selection Bits" mask="0x07" name="CMUX"
+                              values="ANALOG_COMP_SELECTION_BITS"/>
+                </register>
+                <register caption="" name="DIDR1" offset="0x7F" size="1" ocd-rw="W">
+                    <bitfield caption="AIN7 Digital Input Disable" mask="0x80" name="AIN7D"/>
+                    <bitfield caption="AIN6 Digital Input Disable" mask="0x40" name="AIN6D"/>
+                    <bitfield caption="AIN5 Digital Input Disable" mask="0x20" name="AIN5D"/>
+                    <bitfield caption="AIN4 Digital Input Disable" mask="0x10" name="AIN4D"/>
+                    <bitfield caption="AIN3 Digital Input Disable" mask="0x08" name="AIN3D"/>
+                    <bitfield caption="AIN2 Digital Input Disable" mask="0x04" name="AIN2D"/>
+                    <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+                    <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+                </register>
+            </register-group>
+            <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+                <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+                <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+                <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+                <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="ANALOG_COMP_SELECTION_BITS">
+                <value caption="AIN1" name="AIN1" value="0x00"/>
+                <value caption="AIN2" name="AIN2" value="0x01"/>
+                <value caption="AIN3" name="AIN3" value="0x02"/>
+                <value caption="AIN4" name="AIN4" value="0x03"/>
+                <value caption="AIN5" name="AIN5" value="0x04"/>
+                <value caption="AIN6" name="AIN6" value="0x05"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QUAD">
+            <pin pad="XTAL1" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="VCC" position="4"/>
+            <pin pad="PC2" position="5"/>
+            <pin pad="PD0" position="6"/>
+            <pin pad="PD1" position="7"/>
+            <pin pad="PD2" position="8"/>
+            <pin pad="PD3" position="9"/>
+            <pin pad="PD4" position="10"/>
+            <pin pad="PD5" position="11"/>
+            <pin pad="PD6" position="12"/>
+            <pin pad="PD7" position="13"/>
+            <pin pad="PB0" position="14"/>
+            <pin pad="PB1" position="15"/>
+            <pin pad="PB2" position="16"/>
+            <pin pad="PB3" position="17"/>
+            <pin pad="PB4" position="18"/>
+            <pin pad="PB5" position="19"/>
+            <pin pad="PB6" position="20"/>
+            <pin pad="PB7" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="PC6" position="23"/>
+            <pin pad="PC1" position="24"/>
+            <pin pad="PC5" position="25"/>
+            <pin pad="PC4" position="26"/>
+            <pin pad="UCAP" position="27"/>
+            <pin pad="UGND" position="28"/>
+            <pin pad="D+" position="29"/>
+            <pin pad="D-" position="30"/>
+            <pin pad="UVCC" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY10.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY10.xml
new file mode 100644
index 00000000..d44cca8a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY10.xml
@@ -0,0 +1,417 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny10-TSHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+    <variant ordercode="ATtiny10-MAHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UDFN8" pinout="UDFN8"/>
+    <variant ordercode="ATtiny10-TS8R" speedmax="10000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+  </variants>
+  <devices>
+    <device name="ATtiny10" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4400" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x20" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="flash" start="0x4000" name="MAPPED_FLASH" size="0x0400"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" pad="PB0" function="default"/>
+              <signal group="ADC" index="1" pad="PB1" function="default"/>
+              <signal group="ADC" index="2" pad="PB2" function="default"/>
+              <signal group="ADC" index="3" pad="PB3" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PB0" function="default"/>
+              <signal group="AIN" index="1" pad="PB1" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PB0" function="default"/>
+              <signal group="PCINT" index="1" pad="PB1" function="default"/>
+              <signal group="PCINT" index="2" pad="PB2" function="default"/>
+              <signal group="PCINT" index="3" pad="PB3" function="default"/>
+              <signal group="INT" index="0" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC0" caption="Timer/Counter, 16-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="OCA" pad="PB0" function="default"/>
+              <signal group="OCB" pad="PB1" function="default"/>
+              <signal group="T" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="TIM0_CAPT" caption="Timer/Counter0 Input Capture"/>
+        <interrupt index="4" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="5" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="6" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="8" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="9" name="VLM" caption="Vcc Voltage Level Monitor"/>
+        <interrupt index="10" name="ADC" caption="ADC Conversion Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x03"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x1B" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x03" name="MUX"/>
+        </register>
+        <register caption="ADC Data Register" name="ADCL" offset="0x19" size="1" mask="0xFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x1D" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x1C" size="1">
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T10"/>
+        </register>
+        <register caption="Digital Input Disable Register" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="" mask="0x08" name="ADC3D"/>
+          <bitfield caption="" mask="0x04" name="ADC2D"/>
+          <bitfield caption="" mask="0x02" name="ADC1D"/>
+          <bitfield caption="" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T10">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter0 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Pin Change Interrupt 0 Request" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter0 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x1F" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture  Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x3A" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction ADC" mask="0x02" name="PRADC"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+        </register>
+        <register caption="Vcc Level Monitoring Control and Status Register" name="VLMCSR" offset="0x34" size="1">
+          <bitfield caption="VLM Flag" mask="0x80" name="VLMF"/>
+          <bitfield caption="VLM Interrupt Enable" mask="0x40" name="VLMIE"/>
+          <bitfield caption="Trigger Level of Voltage Level Monitor bits" mask="0x07" name="VLM"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE_3BITS">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x0C" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x03" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x01" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x00" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x02" size="1" mask="0x0F"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x15" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"/>
+        </register>
+        <register caption="External Interrupt Mask register" name="EIMSK" offset="0x13" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+        <register caption="External Interrupt Flag register" name="EIFR" offset="0x14" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x12" size="1">
+          <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x11" size="1">
+          <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+        </register>
+        <register caption="Pin Change Mask Register" name="PCMSK" offset="0x10" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x2E" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x2D" size="1">
+          <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM0" lsb="2"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register C" name="TCCR0C" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC0B"/>
+        </register>
+        <register caption="Timer/Counter0 " name="TCNT0" offset="0x28" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 0 Output Compare Register A " name="OCR0A" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B " name="OCR0B" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR0" offset="0x22" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register 0" name="TIMSK0" offset="0x2B" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x20" name="ICIE0"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR0" offset="0x2A" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x20" name="ICF0"/>
+          <bitfield caption="Timer Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x2F" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOT23_6">
+      <pin pad="PB0" position="1"/>
+      <pin pad="GND" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB2" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="PB3" position="6"/>
+    </pinout>
+    <pinout name="UDFN8">
+      <pin pad="PB1" position="1"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="VCC" position="7"/>
+      <pin pad="PB2" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY102.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY102.xml
new file mode 100644
index 00000000..ab356580
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY102.xml
@@ -0,0 +1,560 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file schema-version="4.1">
+  <variants>
+    <variant ordercode="ATtiny102-M7R " package="UDFN8" pinout="SOIC_8" speedmax="12000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102F-M7R" package="UDFN8" pinout="SOIC_8" speedmax="12000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102-SSNR " package="SOIC8" pinout="SOIC_8" speedmax="12000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102F-SSNR" package="SOIC8" pinout="SOIC_8" speedmax="12000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102-M8R " package="UDFN8" pinout="SOIC_8" speedmax="12000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102F-M8R" package="UDFN8" pinout="SOIC_8" speedmax="12000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102-SSFR " package="SOIC8" pinout="SOIC_8" speedmax="12000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny102F-SSFR" package="SOIC8" pinout="SOIC_8" speedmax="12000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device name="ATtiny102" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4400" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x20" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="other" start="0x4000" name="MAPPED_FLASH" size="0x0400"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="5" pad="PB1"/>
+              <signal function="ADC" group="ADC" index="6" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="7" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA0"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA1"/>
+              <signal function="ACOUT" group="ACO" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC0" caption="Timer/Counter, 16-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="DEF" group="ICP0" pad="PB2"/>
+              <signal function="DEF" group="OC0A" pad="PB1"/>
+              <signal function="DEF" group="OC0B" pad="PA1"/>
+              <signal function="DEF" group="T0" pad="PA0"/>              
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART" caption="USART">
+            <register-group name="USART" name-in-module="USART" offset="0" address-space="data" caption="USART"/>
+            <signals>
+              <signal function="USART" group="XCK" pad="PB1"/>
+              <signal function="USART" group="TXD" pad="PB2"/>
+              <signal function="USART" group="RXD" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="TIM0_CAPT" caption="Timer/Counter0 Input Capture"/>
+        <interrupt index="5" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="6" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="7" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="8" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="9" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="10" name="VLM" caption="Vcc Voltage Level Monitor"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion complete"/>
+        <interrupt index="12" name="USART_RXS" caption="USART RX Start"/>
+        <interrupt index="13" name="USART_RXC" caption="USART RX Complete"/>
+        <interrupt index="14" name="USART_DRE" caption="USART Data register empty"/>
+        <interrupt index="15" name="USART_TXC" caption="USART Tx Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x0c"/>
+        </property-group>
+        <!-- Experimental: Expose CCP signature values -->
+        <property-group name="CCP_SIGNATURES">      
+          <property name="CCP_IOREG_gc" value="0xD8" caption="IOREG signature for Change Protect"/>
+          <property name="CCP_SPM_gc" value="0xE7" caption="SPM signature for Change Protect"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Self programming enable" mask="0x08" name="SELFPROGEN"/>
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x1B" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x07" name="MUX" values="ADC_MUX_TINY10X"/>
+          <bitfield caption="Analog Reference voltage Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF_TINY10X"/>
+        </register>
+        <register caption="ADC Data Register Low" name="ADCL" offset="0x19" size="1" mask="0xFF"/>
+        <register caption="ADC Data Register High" name="ADCH" offset="0x1A" size="1" mask="0xFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x1D" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x1C" size="1">
+          <bitfield caption="Left Adjustment for ADC Result Readout" mask="0x80" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T10"/>
+        </register>
+        <register caption="Digital Input Disable Register" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="ADC7 Digital Input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC6 Digital Input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital Input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital Input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital Input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital Input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital Input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF_TINY10X">
+        <value caption="Vcc" name="VAL_0x00" value="0x00"/>
+        <value caption="Internal 1.1V Referemce" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal 2.2V Referemce" name="VAL_0x02" value="0x02"/>
+        <value caption="Internal 4.3V Referemce" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ADC_MUX_TINY10X">
+        <value caption="ADC0" name="ADC0" value="0x00"/>
+        <value caption="ADC1" name="ADC1" value="0x01"/>
+        <value caption="ADC2" name="ADC2" value="0x02"/>
+        <value caption="ADC3" name="ADC3" value="0x03"/>
+        <value caption="ADC4" name="ADC4" value="0x04"/>
+        <value caption="ADC5" name="ADC5" value="0x05"/>
+        <value caption="ADC6" name="ADC6" value="0x06"/>
+        <value caption="ADC7" name="ADC7" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T10">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter0 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Pin Change Interrupt 0 Request" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter0 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x1F" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap enable" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture  Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x1E" size="1">
+          <bitfield caption="Analog Comparator Output Enable" mask="02" name="ACOE"/>
+          <bitfield caption="Analog Comparator positive input selection bit" mask="01" name="ACPMUX"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+	      <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+	      </register>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x3A" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction USART" mask="0x04" name="PRUSART"/>
+          <bitfield caption="Power Reduction ADC" mask="0x02" name="PRADC"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+        </register>
+        <register caption="Vcc Level Monitoring Control and Status Register" name="VLMCSR" offset="0x34" size="1">
+          <bitfield caption="VLM Flag" mask="0x80" name="VLMF"/>
+          <bitfield caption="VLM Interrupt Enable" mask="0x40" name="VLMIE"/>
+          <bitfield caption="Trigger Level of Voltage Level Monitor bits" mask="0x07" name="VLM"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0xE7"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE_3BITS">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x16" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable for PORTB" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register for PORTB" name="PUEB" offset="0x07" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x05" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x04" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PORTB" offset="0x06" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x16" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable for PORTA" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register for PORTA" name="PUEA" offset="0x03" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x01" size="1" mask="0xFF"/>
+        <register caption="Input Pins, Port A" name="PINA" offset="0x00" size="1" mask="0xFF"/>
+        <register caption="Port A Data register" name="PORTA" offset="0x02" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x15" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"/>
+        </register>
+        <register caption="External Interrupt Mask register" name="EIMSK" offset="0x13" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+        <register caption="External Interrupt Flag register" name="EIFR" offset="0x14" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x12" size="1">
+          <bitfield caption="Pin Change Interrupt Enable 1" mask="0x02" name="PCIE1"/>
+          <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x11" size="1">
+          <bitfield caption="Pin Change Interrupt Flag 1" mask="0x02" name="PCIF1"/>
+          <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x10" size="1" mask="0x0F">
+          <bitfield caption="Pin Change Enable Mask 1 Bit 3" mask="0x08" name="PCINT11"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 2" mask="0x04" name="PCINT10"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 1" mask="0x02" name="PCINT9"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 0" mask="0x01" name="PCINT8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x0F" size="1" mask="0xFF">
+          <bitfield caption="Pin Change Enable Mask 0 Bit 7" mask="0x80" name="PCINT7"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 6" mask="0x40" name="PCINT6"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 5" mask="0x20" name="PCINT5"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 4" mask="0x10" name="PCINT4"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 3" mask="0x08" name="PCINT3"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 2" mask="0x04" name="PCINT2"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 1" mask="0x02" name="PCINT1"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 0" mask="0x01" name="PCINT0"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x2E" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x2D" size="1">
+          <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM0" lsb="2"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register C" name="TCCR0C" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC0B"/>
+        </register>
+        <register caption="Timer/Counter0 " name="TCNT0" offset="0x28" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 0 Output Compare Register A " name="OCR0A" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B " name="OCR0B" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR0" offset="0x22" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register 0" name="TIMSK0" offset="0x2B" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x20" name="ICIE0"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR0" offset="0x2A" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x20" name="ICF0"/>
+          <bitfield caption="Timer Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x2F" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Remap Bit for 14 pin part only" mask="0x02" name="REMAP"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART">
+        <register caption="USART I/O Data Register" name="UDR" offset="0x08" bit-addressable="false" size="1" mask="0xFF"/>
+        <register caption="USART Control and Status Register A" name="UCSRA" offset="0x0E" bit-addressable="false" size="1">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSRB" offset="0x0D" bit-addressable="false" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSRC" offset="0x0C" bit-addressable="false" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSRD" offset="0x0B" bit-addressable="false" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS"/>
+          <bitfield caption="Start frame detection enable" mask="0x20" name="SFDE"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR" offset="0x09" bit-addressable="false" size="2" mask="0x0FFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE">
+        <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_8">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PA0" position="2"/>
+      <pin pad="PA1" position="3"/>
+      <pin pad="PA2" position="4"/>
+      <pin pad="PB1" position="5"/>
+      <pin pad="PB2" position="6"/>
+      <pin pad="PB3" position="7"/>
+      <pin pad="GND" position="8"/>
+    </pinout>
+    
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY104.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY104.xml
new file mode 100644
index 00000000..4dddfa4a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY104.xml
@@ -0,0 +1,580 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file schema-version="4.1">
+  <variants>
+      <variant ordercode="ATtiny104-SSNR" package="SOIC14" pinout="SOIC_14" speedmax="12000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny104F-SSNR" package="SOIC14" pinout="SOIC_14" speedmax="12000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny104-SSFR" package="SOIC14" pinout="SOIC_14" speedmax="12000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny104F-SSFR" package="SOIC14" pinout="SOIC_14" speedmax="12000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device name="ATtiny104" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4400" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x20" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="other" start="0x4000" name="MAPPED_FLASH" size="0x0400"/>
+        </address-space>
+      </address-spaces>
+     <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="4" pad="PB0"/>
+              <signal function="ADC" group="ADC" index="5" pad="PB1"/>
+              <signal function="ADC" group="ADC" index="6" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="7" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA0"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA1"/>
+              <signal function="ACOUT" group="ACO" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC0" caption="Timer/Counter, 16-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal field="REMAP" function="DEF" group="ICP0" pad="PB2"/>
+              <signal field="REMAP" function="DEF" group="OC0A" pad="PB1"/>
+              <signal field="REMAP" function="DEF" group="OC0B" pad="PA1"/>
+              <signal field="REMAP" function="DEF" group="T0" pad="PA0"/>
+              <signal field="REMAP" function="ALT" group="ICP0" pad="PA4"/>
+              <signal field="REMAP" function="ALT" group="OC0A" pad="PA3"/>
+              <signal field="REMAP" function="ALT" group="OC0B" pad="PA5"/>
+              <signal field="REMAP" function="ALT" group="T0" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART" caption="USART">
+            <register-group name="USART" name-in-module="USART" offset="0" address-space="data" caption="USART"/>
+            <signals>
+              <signal function="USART" group="XCK" pad="PB1"/>
+              <signal function="USART" group="TXD" pad="PB2"/>
+              <signal function="USART" group="RXD" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="TIM0_CAPT" caption="Timer/Counter0 Input Capture"/>
+        <interrupt index="5" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="6" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="7" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="8" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="9" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="10" name="VLM" caption="Vcc Voltage Level Monitor"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion complete"/>
+        <interrupt index="12" name="USART_RXS" caption="USART RX Start"/>
+        <interrupt index="13" name="USART_RXC" caption="USART RX Complete"/>
+        <interrupt index="14" name="USART_DRE" caption="USART Data register empty"/>
+        <interrupt index="15" name="USART_TXC" caption="USART Tx Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x0b"/>
+        </property-group>
+        <!-- Experimental: Expose CCP signature values -->
+        <property-group name="CCP_SIGNATURES">      
+          <property name="CCP_IOREG_gc" value="0xD8" caption="IOREG signature for Change Protect"/>
+          <property name="CCP_SPM_gc" value="0xE7" caption="SPM signature for Change Protect"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Self programming enable" mask="0x08" name="SELFPROGEN"/>
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x1B" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x07" name="MUX" values="ADC_MUX_TINY10X"/>
+          <bitfield caption="Analog Reference voltage Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF_TINY10X"/>
+        </register>
+        <register caption="ADC Data Register Low" name="ADCL" offset="0x19" size="1" mask="0xFF"/>
+        <register caption="ADC Data Register High" name="ADCH" offset="0x1A" size="1" mask="0xFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x1D" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x1C" size="1">
+          <bitfield caption="Left Adjustment for ADC Result Readout" mask="0x80" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T10"/>
+        </register>
+        <register caption="Digital Input Disable Register" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="ADC7 Digital Input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC6 Digital Input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital Input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital Input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital Input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital Input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital Input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF_TINY10X">
+        <value caption="Vcc" name="VAL_0x00" value="0x00"/>
+        <value caption="Internal 1.1V Referemce" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal 2.2V Referemce" name="VAL_0x02" value="0x02"/>
+        <value caption="Internal 4.3V Referemce" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ADC_MUX_TINY10X">
+        <value caption="ADC0" name="ADC0" value="0x00"/>
+        <value caption="ADC1" name="ADC1" value="0x01"/>
+        <value caption="ADC2" name="ADC2" value="0x02"/>
+        <value caption="ADC3" name="ADC3" value="0x03"/>
+        <value caption="ADC4" name="ADC4" value="0x04"/>
+        <value caption="ADC5" name="ADC5" value="0x05"/>
+        <value caption="ADC6" name="ADC6" value="0x06"/>
+        <value caption="ADC7" name="ADC7" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T10">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter0 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Pin Change Interrupt 0 Request" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter0 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x1F" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap enable" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture  Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x1E" size="1">
+          <bitfield caption="Analog Comparator Output Enable" mask="02" name="ACOE"/>
+          <bitfield caption="Analog Comparator positive input selection bit" mask="01" name="ACPMUX"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+	      <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+	      </register>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x3A" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction USART" mask="0x04" name="PRUSART"/>
+          <bitfield caption="Power Reduction ADC" mask="0x02" name="PRADC"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+        </register>
+        <register caption="Vcc Level Monitoring Control and Status Register" name="VLMCSR" offset="0x34" size="1">
+          <bitfield caption="VLM Flag" mask="0x80" name="VLMF"/>
+          <bitfield caption="VLM Interrupt Enable" mask="0x40" name="VLMIE"/>
+          <bitfield caption="Trigger Level of Voltage Level Monitor bits" mask="0x07" name="VLM"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0xE7"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE_3BITS">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x16" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable for PORTB" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register for PORTB" name="PUEB" offset="0x07" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x05" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x04" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PORTB" offset="0x06" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x16" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable for PORTA" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register for PORTA" name="PUEA" offset="0x03" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x01" size="1" mask="0xFF"/>
+        <register caption="Input Pins, Port A" name="PINA" offset="0x00" size="1" mask="0xFF"/>
+        <register caption="Port A Data register" name="PORTA" offset="0x02" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x15" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"/>
+        </register>
+        <register caption="External Interrupt Mask register" name="EIMSK" offset="0x13" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+        <register caption="External Interrupt Flag register" name="EIFR" offset="0x14" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x12" size="1">
+          <bitfield caption="Pin Change Interrupt Enable 1" mask="0x02" name="PCIE1"/>
+          <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x11" size="1">
+          <bitfield caption="Pin Change Interrupt Flag 1" mask="0x02" name="PCIF1"/>
+          <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x10" size="1" mask="0x0F">
+          <bitfield caption="Pin Change Enable Mask 1 Bit 3" mask="0x08" name="PCINT11"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 2" mask="0x04" name="PCINT10"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 1" mask="0x02" name="PCINT9"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 0" mask="0x01" name="PCINT8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x0F" size="1" mask="0xFF">
+          <bitfield caption="Pin Change Enable Mask 0 Bit 7" mask="0x80" name="PCINT7"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 6" mask="0x40" name="PCINT6"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 5" mask="0x20" name="PCINT5"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 4" mask="0x10" name="PCINT4"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 3" mask="0x08" name="PCINT3"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 2" mask="0x04" name="PCINT2"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 1" mask="0x02" name="PCINT1"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 0" mask="0x01" name="PCINT0"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x2E" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x2D" size="1">
+          <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM0" lsb="2"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register C" name="TCCR0C" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC0B"/>
+        </register>
+        <register caption="Timer/Counter0 " name="TCNT0" offset="0x28" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 0 Output Compare Register A " name="OCR0A" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B " name="OCR0B" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR0" offset="0x22" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register 0" name="TIMSK0" offset="0x2B" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x20" name="ICIE0"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR0" offset="0x2A" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x20" name="ICF0"/>
+          <bitfield caption="Timer Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x2F" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Remap Bit for 14 pin part only" mask="0x02" name="REMAP"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART">
+        <register caption="USART I/O Data Register" name="UDR" offset="0x08" bit-addressable="false" size="1" mask="0xFF"/>
+        <register caption="USART Control and Status Register A" name="UCSRA" offset="0x0E" bit-addressable="false" size="1">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSRB" offset="0x0D" bit-addressable="false" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSRC" offset="0x0C" bit-addressable="false" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSRD" offset="0x0B" bit-addressable="false" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS"/>
+          <bitfield caption="Start frame detection enable" mask="0x20" name="SFDE"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR" offset="0x09" bit-addressable="false" size="2" mask="0x0FFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE">
+        <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_14">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PA0" position="2"/>
+      <pin pad="PA1" position="3"/>
+      <pin pad="PA2" position="4"/>
+      <pin pad="PA3" position="5"/>
+      <pin pad="PA4" position="6"/>
+      <pin pad="PA5" position="7"/>
+      <pin pad="PA6" position="8"/>
+      <pin pad="PA7" position="9"/>
+      <pin pad="PB0" position="10"/>
+      <pin pad="PB1" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY11.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY11.xml
new file mode 100644
index 00000000..be92e05f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY11.xml
@@ -0,0 +1,287 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny11" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0060">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+      </address-spaces>
+      <peripherals>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V0E"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="IO_PINS" caption="External Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="4" name="ANA_COMP" caption="Analog Comparator"/>
+      </interrupts>
+      <interfaces>
+        <interface name="HVSP" type="hvsp"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x04"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x00 0x68 0x78 0x68 0x68 0x00 0x00 0x68 0x78 0x78 0x00 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="3"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x00 0x68 0x78 0x68 0x68 0x00 0x00 0x68 0x78 0x78 0x00 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="50"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0"/>
+          <property name="HvspProgramFlash_blockSize" value="32"/>
+          <property name="HvspProgramFlash_pollTimeout" value="3"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0xF4">
+          <bitfield caption="Short start-up time selected" mask="0x10" name="FSTRT"/>
+          <bitfield caption="External reset function of PB5 disabled" mask="0x08" name="RSTDISBL"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x07"/>
+        <value caption="External Low-frequency Crystal" name="EXTLOFXTAL" value="0x06"/>
+        <value caption="External RC Oscillator" name="EXTRCOSC" value="0x05"/>
+        <value caption="Internal RC Oscillator" name="INTRCOSC" value="0x04"/>
+        <value caption="External Clock" name="EXTCLK" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x06" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x01"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x08" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x3B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x3A" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x18" size="1" mask="0x1F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x17" size="1" mask="0x1F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x16" size="1" mask="0x3F"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x39" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x38" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register" name="TCCR0" offset="0x33" size="1">
+          <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02" values="CLK_SEL_3BIT_EXT"/>
+          <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+          <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
+        </register>
+        <register caption="Timer Counter 0" name="TCNT0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x21" size="1">
+          <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+          <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+        <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x34" size="1">
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x35" size="1">
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode" mask="0x10" name="SM" values="CPU_SLEEP_MODE_1BIT"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE_1BIT">
+        <value caption="Idle" name="IDLE" value="0x0"/>
+        <value caption="Power Down" name="PDOWN" value="0x1"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY12.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY12.xml
new file mode 100644
index 00000000..69d9172e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY12.xml
@@ -0,0 +1,407 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny12" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0060">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x02"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V0E"/>
+      </parameters></instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="IO_PINS" caption="External Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="4" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="5" name="ANA_COMP" caption="Analog Comparator"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x05"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="100"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x04"/>
+          <property name="IspProgramFlash_blockSize" value="128"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x00"/>
+          <property name="IspProgramFlash_cmd3" value="0x20"/>
+          <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x04"/>
+          <property name="IspProgramEeprom_blockSize" value="64"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+          <property name="IspProgramEeprom_cmd2" value="0x00"/>
+          <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+          <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+          <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x00 0x68 0x78 0x68 0x68 0x00 0x00 0x68 0x78 0x78 0x00 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="3"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="100"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x02"/>
+          <property name="IspProgramFlash_blockSize" value="128"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x00"/>
+          <property name="IspProgramFlash_cmd3" value="0x20"/>
+          <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x02"/>
+          <property name="IspProgramEeprom_blockSize" value="64"/>
+          <property name="IspProgramEeprom_delay" value="8"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+          <property name="IspProgramEeprom_cmd2" value="0x00"/>
+          <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+          <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+          <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x00 0x68 0x78 0x68 0x68 0x00 0x00 0x68 0x78 0x78 0x00 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="50"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0"/>
+          <property name="HvspProgramFlash_blockSize" value="16"/>
+          <property name="HvspProgramFlash_pollTimeout" value="3"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0"/>
+          <property name="HvspProgramEeprom_blockSize" value="4"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x52">
+          <bitfield caption="Brown-out Detection Level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="External reset function of PB5 disabled" mask="0x10" name="RSTDISBL"/>
+          <bitfield caption="Clock Select" mask="0x0F" name="CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x00"/>
+      </value-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x0F"/>
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x0E"/>
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x0D"/>
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x0C"/>
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x0B"/>
+        <value caption="External Crystal / Ceramic Resonator" name="EXTXTALCRES" value="0x0A"/>
+        <value caption="External Low-Frequency Crystal" name="EXTLOFXTAL" value="0x09"/>
+        <value caption="External Low-Frequency Crystal" name="EXTLOFXTAL" value="0x08"/>
+        <value caption="External RC Ocsillator" name="EXTRCOSC" value="0x07"/>
+        <value caption="External RC Ocsillator" name="EXTRCOSC" value="0x06"/>
+        <value caption="External RC Ocsillator" name="EXTRCOSC" value="0x05"/>
+        <value caption="Internal RC Ocsillator" name="INTRCOSC" value="0x04"/>
+        <value caption="Internal RC Ocsillator" name="INTRCOSC" value="0x03"/>
+        <value caption="Internal RC Ocsillator" name="INTRCOSC" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x01"/>
+        <value caption="External Clock" name="EXTCLK" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x06" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x01"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x08" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="AINBG"/>
+          <bitfield caption="Analog Comparator Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x35" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode" mask="0x10" name="SM" values="CPU_SLEEP_MODE_1BIT"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x34" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Status Register" name="OSCCAL" offset="0x31" size="1" mask="0xFF">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="1.2 MHz" name="1_2_MHz"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE_1BIT">
+        <value caption="Idle" name="IDLE" value="0x0"/>
+        <value caption="Power Down" name="PDOWN" value="0x1"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x3B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x3A" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x1E" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x1D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x1C" size="1">
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x18" size="1" mask="0x1F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x17" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x16" size="1" mask="0x3F"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x39" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x38" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register" name="TCCR0" offset="0x33" size="1">
+          <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02" values="CLK_SEL_3BIT_EXT"/>
+          <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+          <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
+        </register>
+        <register caption="Timer Counter 0" name="TCNT0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x21" size="1">
+          <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+          <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+        <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY13.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY13.xml
new file mode 100644
index 00000000..f0296333
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY13.xml
@@ -0,0 +1,623 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny13V-10PU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13V-10SU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13V-10SSU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13V-10MU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
+    <variant ordercode="ATtiny13V-10MMU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
+    <variant ordercode="ATtiny13-20PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13-20SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13-20SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13-20MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
+    <variant ordercode="ATtiny13-20MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
+  </variants>
+  <devices>
+    <device name="ATtiny13" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+          <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00a0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0040" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" function="default" pad="PA0"/>
+              <signal group="ADC" index="1" function="default" pad="PA1"/>
+              <signal group="ADC" index="2" function="default" pad="PA2"/>
+              <signal group="ADC" index="3" function="default" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+                <signal group="AIN" index="1" pad="PB1" function="default"/>
+                <signal group="AIN" index="0" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+              <signal group="P" function="default" pad="PB4" index="4"/>
+              <signal group="P" function="default" pad="PB5" index="5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT5" pad="PB5" function="default"/>
+              <signal group="PCINT4" pad="PB4" function="default"/>
+              <signal group="PCINT3" pad="PB3" function="default"/>
+              <signal group="PCINT2" pad="PB2" function="default"/>
+              <signal group="PCINT1" pad="PB1" function="default"/>
+              <signal group="INT" pad="PB1" function="default"/>
+              <signal group="PCINT0" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal group="T" pad="PB2" function="default"/>
+              <signal group="OCB" pad="PB1" function="default"/>
+              <signal group="OCA" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT0" caption="External Interrupt Request 0"/>
+        <interrupt index="3" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="4" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="5" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="6" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="7" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="8" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="9" name="ADC" caption="ADC Conversion Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9007"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x07"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="0"/>
+          <property name="OCD_DATAREG" value="0x2e"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x10" name="SELFPRGEN"/>
+          <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+          <bitfield caption="Enable BOD and select level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Reset Disabled (Enable PB5 as i/o pin)" mask="0x01" name="RSTDISBL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x6A">
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x80" name="SPIEN"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x20" name="WDTON"/>
+          <bitfield caption="Divide clock by 8 internally" mask="0x10" name="CKDIV8"/>
+          <bitfield caption="Select Clock Source" mask="0x0F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time: 14 CK + 0 ms" name="EXTCLK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 4 ms" name="EXTCLK_14CK_4MS" value="0x04"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 64 ms" name="EXTCLK_14CK_64MS" value="0x08"/>
+        <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS" value="0x01"/>
+        <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS" value="0x05"/>
+        <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS" value="0x09"/>
+        <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS" value="0x06"/>
+        <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS" value="0x0A"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x03"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x07"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x0B"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bit 0" mask="0x40" name="REFS0"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x03" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x10" name="ADC2D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC1D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Debug Wire Data Register" name="DWDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="9.6 MHz" name="9_6_MHz"/>
+        <value value="0x01" caption="4.8 MHz" name="4_8_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x3F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask" name="PCMSK" offset="0x35" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x04" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x4F" size="1">
+          <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+        <register caption="General Timer Conuter Register" name="GTCCR" offset="0x48" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDTIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDTIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="PDIP8_SOIC8">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB1" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="VCC" position="8"/>
+    </pinout>
+    <pinout name="MLF20">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="5"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="VCC" position="15"/>
+      <pin pad="GND" position="21"/>
+    </pinout>
+    <pinout name="MLF10">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PB0" position="6"/>
+      <pin pad="PB1" position="7"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="VCC" position="10"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY13A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY13A.xml
new file mode 100644
index 00000000..54d8e7b1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY13A.xml
@@ -0,0 +1,632 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny13A-PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-SH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-SSH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
+    <variant ordercode="ATtiny13A-MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="MLF20" pinout="MLF20"/>
+    <variant ordercode="ATtiny13A-SN" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-SS7" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-SF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOIC8" pinout="PDIP8_SOIC8"/>
+    <variant ordercode="ATtiny13A-MMF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="MLF10" pinout="MLF10"/>
+  </variants>
+  <devices>
+    <device name="ATtiny13A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+          <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00a0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0040" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" function="default" pad="PA0"/>
+              <signal group="ADC" index="1" function="default" pad="PA1"/>
+              <signal group="ADC" index="2" function="default" pad="PA2"/>
+              <signal group="ADC" index="3" function="default" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+                <signal group="AIN" index="1" pad="PB1" function="default"/>
+                <signal group="AIN" index="0" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+              <signal group="P" function="default" pad="PB4" index="4"/>
+              <signal group="P" function="default" pad="PB5" index="5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT5" pad="PB5" function="default"/>
+              <signal group="PCINT4" pad="PB4" function="default"/>
+              <signal group="PCINT3" pad="PB3" function="default"/>
+              <signal group="PCINT2" pad="PB2" function="default"/>
+              <signal group="PCINT1" pad="PB1" function="default"/>
+              <signal group="INT" pad="PB1" function="default"/>
+              <signal group="PCINT0" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal group="T" pad="PB2" function="default"/>
+              <signal group="OCB" pad="PB1" function="default"/>
+              <signal group="OCA" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT0" caption="External Interrupt Request 0"/>
+        <interrupt index="3" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="4" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="5" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="6" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="7" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="8" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="9" name="ADC" caption="ADC Conversion Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9007"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x07"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="0"/>
+          <property name="OCD_DATAREG" value="0x2e"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x10" name="SELFPRGEN"/>
+          <bitfield caption="Debug Wire enable" mask="0x08" name="DWEN"/>
+          <bitfield caption="Enable BOD and select level" mask="0x06" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Reset Disabled (Enable PB5 as i/o pin)" mask="0x01" name="RSTDISBL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x6A">
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x80" name="SPIEN"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x20" name="WDTON"/>
+          <bitfield caption="Divide clock by 8 internally" mask="0x10" name="CKDIV8"/>
+          <bitfield caption="Select Clock Source" mask="0x0F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time: 14 CK + 0 ms" name="EXTCLK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 4 ms" name="EXTCLK_14CK_4MS" value="0x04"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 64 ms" name="EXTCLK_14CK_64MS" value="0x08"/>
+        <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_4MHZ8_14CK_0MS" value="0x01"/>
+        <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_4MHZ8_14CK_4MS" value="0x05"/>
+        <value caption="Int. RC Osc. 4.8 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_4MHZ8_14CK_64MS" value="0x09"/>
+        <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_9MHZ6_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_9MHZ6_14CK_4MS" value="0x06"/>
+        <value caption="Int. RC Osc. 9.6 MHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_9MHZ6_14CK_64MS" value="0x0A"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x03"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x07"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x0B"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x00"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x02"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bit 0" mask="0x40" name="REFS0"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x03" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x10" name="ADC2D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC1D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x3F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask" name="PCMSK" offset="0x35" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x04" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x04" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x4F" size="1">
+          <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x49" size="1" mask="0xFF"/>
+        <register caption="General Timer Conuter Register" name="GTCCR" offset="0x48" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDTIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDTIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Debug Wire Data Register" name="DWDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x45" size="1" ocd-rw="R">
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="BOD Control Register" name="BODCR" offset="0x50" size="1" ocd-rw="R">
+          <bitfield caption="BOD Power-Down in Power-Down Sleep" mask="0x02" name="BODS"/>
+          <bitfield caption="BOD Power-Down Sleep Enable" mask="0x01" name="BODSE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="9.6 MHz" name="9_6_MHz"/>
+        <value value="0x01" caption="4.8 MHz" name="4_8_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="PDIP8_SOIC8">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB1" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="VCC" position="8"/>
+    </pinout>
+    <pinout name="MLF20">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="5"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="VCC" position="15"/>
+      <pin pad="GND" position="21"/>
+    </pinout>
+    <pinout name="MLF10">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PB0" position="6"/>
+      <pin pad="PB1" position="7"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="VCC" position="10"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY15.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY15.xml
new file mode 100644
index 00000000..bc781320
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY15.xml
@@ -0,0 +1,490 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny15" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0060">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x02"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V0E"/>
+      </parameters></instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="IO_PINS" caption="External Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER1_COMP" caption="Timer/Counter1 Compare Match"/>
+        <interrupt index="4" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="5" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="6" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="8" name="ADC" caption="ADC Conversion Ready"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x06"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="100"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x04"/>
+          <property name="IspProgramFlash_blockSize" value="128"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x00"/>
+          <property name="IspProgramFlash_cmd3" value="0x20"/>
+          <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x04"/>
+          <property name="IspProgramEeprom_blockSize" value="64"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+          <property name="IspProgramEeprom_cmd2" value="0x00"/>
+          <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+          <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+          <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x00 0x68 0x78 0x68 0x68 0x00 0x00 0x68 0x78 0x78 0x00 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="5"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="16"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="100"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x04"/>
+          <property name="IspProgramFlash_blockSize" value="128"/>
+          <property name="IspProgramFlash_delay" value="5"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x00"/>
+          <property name="IspProgramFlash_cmd3" value="0x20"/>
+          <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x04"/>
+          <property name="IspProgramEeprom_blockSize" value="64"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+          <property name="IspProgramEeprom_cmd2" value="0x00"/>
+          <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+          <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+          <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x00 0x68 0x78 0x68 0x68 0x00 0x00 0x68 0x78 0x78 0x00 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="5"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="16"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="50"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0"/>
+          <property name="HvspProgramFlash_blockSize" value="64"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x5C">
+          <bitfield caption="Brown-out Detection Level" mask="0x80" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Brown-out detection enabled" mask="0x40" name="BODEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="External reset function of PB5 disabled" mask="0x10" name="RSTDISBL"/>
+          <bitfield caption="Clock Select" mask="0x03" name="CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+        <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+      </value-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Very quickly rising power" name="VQUICKPWR" value="0x03"/>
+        <value caption="Quickly rising power" name="QUICKPWR" value="0x02"/>
+        <value caption="Slowly rising power" name="SLOWPWR" value="0x01"/>
+        <value caption="Slowly rising power" name="SLOWPWR" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x06" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x01"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x07" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x07" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSR" offset="0x06" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Free Running Select" mask="0x20" name="ADFR"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x04" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="AVCC" name="VAL_0x00" value="0x00"/>
+        <value caption="AREF" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal Voltage Referance" name="VAL_0x02" value="0x02"/>
+        <value caption="Internal Voltage Reference With External Capacitor at AREF Pin." name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x08" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x1E" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x1D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x1C" size="1">
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x18" size="1" mask="0x1F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x17" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x16" size="1" mask="0x3F"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x39" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x38" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register" name="TCCR0" offset="0x33" size="1">
+          <bitfield caption="Clock Select0 bit 2" mask="0x04" name="CS02" values="CLK_SEL_3BIT_EXT"/>
+          <bitfield caption="Clock Select0 bit 1" mask="0x02" name="CS01"/>
+          <bitfield caption="Clock Select0 bit 0" mask="0x01" name="CS00"/>
+        </register>
+        <register caption="Timer Counter 0" name="TCNT0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x30" size="1">
+          <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT_FAST"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x2E" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x2D" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x39" size="1">
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x38" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Special Function IO Register" name="SFIOR" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare 1A" mask="0x04" name="FOC1A"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1" mask="0x02" name="PSR1"/>
+          <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x01" name="PSR0"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="CLK_COMP_MATCH_OUT_MODE">
+        <value caption="Disconnected from OCn/PWMn" name="VAL_0x00" value="0x00"/>
+        <value caption="Toggle OCn/PWMn output line" name="VAL_0x01" value="0x01"/>
+        <value caption="Clear OCn/PWMn output line" name="VAL_0x02" value="0x02"/>
+        <value caption="set OCn/PWMn output line" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT_FAST">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, CLK*16" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK*8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK*4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK*2" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, No Prescaling" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/2" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/4" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/8" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/16" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/32" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/64" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/128" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/256" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/512" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x21" size="1">
+          <bitfield caption="RW" mask="0x10" name="WDTOE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+          <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+        <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x35" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x34" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Status Register" name="OSCCAL" offset="0x31" size="1" mask="0xFF">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="1.6 MHz" name="1_6_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x3B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x3A" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+      </register-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1604.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1604.xml
new file mode 100644
index 00000000..c6341914
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1604.xml
@@ -0,0 +1,2088 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny1604-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1604-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny1604">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1606.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1606.xml
new file mode 100644
index 00000000..72de694a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1606.xml
@@ -0,0 +1,2155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny1606-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1606-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1606-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1606-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny1606">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x24"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1607.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1607.xml
new file mode 100644
index 00000000..c73ae443
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1607.xml
@@ -0,0 +1,2152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny1607-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1607-MRF" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny1607">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0400" start="0x3c00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal function="CCL" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal function="CCL" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK_ALT" group="BREAK" pad="PC4"/>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x23"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1614.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1614.xml
new file mode 100644
index 00000000..5dc6131c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1614.xml
@@ -0,0 +1,2548 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny1614-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1614-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny1614">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+            </signals>
+          </instance>
+          <instance name="AC1">
+            <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
+            <signals>
+              <signal function="AC1" group="N" index="0" pad="PA5"/>
+              <signal function="AC1" group="OUT" index="0" pad="PB3"/>
+              <signal function="AC1" group="P" index="0" pad="PA7"/>
+              <signal function="AC1" group="P" index="1" pad="PA6"/>
+              <signal function="AC1" group="P" index="2" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="AC2">
+            <register-group address-space="data" name="AC2" name-in-module="AC" offset="0x0690"/>
+            <signals>
+              <signal function="AC2" group="N" index="0" pad="PA7"/>
+              <signal function="AC2" group="OUT" index="0" pad="PB2"/>
+              <signal function="AC2" group="P" index="0" pad="PA6"/>
+              <signal function="AC2" group="P" index="1" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="ADC1">
+            <register-group address-space="data" name="ADC1" name-in-module="ADC" offset="0x0640"/>
+            <signals>
+              <signal function="AIN1" group="AIN" index="0" pad="PA4"/>
+              <signal function="AIN1" group="AIN" index="1" pad="PA5"/>
+              <signal function="AIN1" group="AIN" index="2" pad="PA6"/>
+              <signal function="AIN1" group="AIN" index="3" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="DAC1">
+            <register-group address-space="data" name="DAC1" name-in-module="DAC" offset="0x06A8"/>
+          </instance>
+          <instance name="DAC2">
+            <register-group address-space="data" name="DAC2" name-in-module="DAC" offset="0x06B0"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A50"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCB1" name="INT"/>
+        <interrupt index="15" module-instance="TCD0" name="OVF"/>
+        <interrupt index="16" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="18" module-instance="AC1" name="AC"/>
+        <interrupt index="19" module-instance="AC2" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="22" module-instance="ADC1" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC1" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x22"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="PTC/DAC2" name="PTC" value="0x1B"/>
+        <value caption="DAC0/DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x10"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x10"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="ADC1 reference enable" mask="0x10" name="ADC1REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+          <bitfield caption="DAC1/AC1 reference enable" mask="0x8" name="DAC1REFEN" rw="RW"/>
+          <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+          <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="ADC1 reference select select" name="VREF_ADC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC1/AC1 reference select select" name="VREF_DAC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC2/AC2 reference select select" name="VREF_DAC2REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1616.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1616.xml
new file mode 100644
index 00000000..5c003275
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1616.xml
@@ -0,0 +1,2640 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny1616-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1616-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1616-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1616-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny1616">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+            </signals>
+          </instance>
+          <instance name="AC1">
+            <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
+            <signals>
+              <signal function="AC1" group="N" index="0" pad="PA5"/>
+              <signal function="AC1" group="OUT" index="0" pad="PB3"/>
+              <signal function="AC1" group="P" index="0" pad="PA7"/>
+              <signal function="AC1" group="P" index="1" pad="PA6"/>
+              <signal function="AC1" group="P" index="2" pad="PB0"/>
+              <signal function="AC1" group="P" index="3" pad="PB4"/>
+            </signals>
+          </instance>
+          <instance name="AC2">
+            <register-group address-space="data" name="AC2" name-in-module="AC" offset="0x0690"/>
+            <signals>
+              <signal function="AC2" group="N" index="0" pad="PA7"/>
+              <signal function="AC2" group="OUT" index="0" pad="PB2"/>
+              <signal function="AC2" group="P" index="0" pad="PA6"/>
+              <signal function="AC2" group="P" index="1" pad="PB0"/>
+              <signal function="AC2" group="P" index="2" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="ADC1">
+            <register-group address-space="data" name="ADC1" name-in-module="ADC" offset="0x0640"/>
+            <signals>
+              <signal function="AIN1" group="AIN" index="0" pad="PA4"/>
+              <signal function="AIN1" group="AIN" index="1" pad="PA5"/>
+              <signal function="AIN1" group="AIN" index="2" pad="PA6"/>
+              <signal function="AIN1" group="AIN" index="3" pad="PA7"/>
+              <signal function="AIN1" group="AIN" index="6" pad="PC0"/>
+              <signal function="AIN1" group="AIN" index="7" pad="PC1"/>
+              <signal function="AIN1" group="AIN" index="8" pad="PC2"/>
+              <signal function="AIN1" group="AIN" index="9" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="DAC1">
+            <register-group address-space="data" name="DAC1" name-in-module="DAC" offset="0x06A8"/>
+          </instance>
+          <instance name="DAC2">
+            <register-group address-space="data" name="DAC2" name-in-module="DAC" offset="0x06B0"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_X" group="X" index="6" pad="PC0"/>
+              <signal function="PTC_X" group="X" index="7" pad="PC1"/>
+              <signal function="PTC_X" group="X" index="8" pad="PC2"/>
+              <signal function="PTC_X" group="X" index="9" pad="PC3"/>
+              <signal function="PTC_X" group="X" index="12" pad="PB5"/>
+              <signal function="PTC_X" group="X" index="13" pad="PB4"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="6" pad="PC0"/>
+              <signal function="PTC_Y" group="Y" index="7" pad="PC1"/>
+              <signal function="PTC_Y" group="Y" index="8" pad="PC2"/>
+              <signal function="PTC_Y" group="Y" index="9" pad="PC3"/>
+              <signal function="PTC_Y" group="Y" index="12" pad="PB5"/>
+              <signal function="PTC_Y" group="Y" index="13" pad="PB4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A50"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCB1" name="INT"/>
+        <interrupt index="15" module-instance="TCD0" name="OVF"/>
+        <interrupt index="16" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="18" module-instance="AC1" name="AC"/>
+        <interrupt index="19" module-instance="AC2" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="22" module-instance="ADC1" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC1" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x21"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="PTC/DAC2" name="PTC" value="0x1B"/>
+        <value caption="DAC0/DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x10"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x10"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="ADC1 reference enable" mask="0x10" name="ADC1REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+          <bitfield caption="DAC1/AC1 reference enable" mask="0x8" name="DAC1REFEN" rw="RW"/>
+          <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+          <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="ADC1 reference select select" name="VREF_ADC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC1/AC1 reference select select" name="VREF_DAC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC2/AC2 reference select select" name="VREF_DAC2REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1617.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1617.xml
new file mode 100644
index 00000000..e69a293c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1617.xml
@@ -0,0 +1,2650 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny1617-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1617-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny1617">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xC000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+              <signal function="AC0" group="P" index="3" pad="PB6"/>
+            </signals>
+          </instance>
+          <instance name="AC1">
+            <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
+            <signals>
+              <signal function="AC1" group="N" index="0" pad="PA5"/>
+              <signal function="AC1" group="N" index="1" pad="PB7"/>
+              <signal function="AC1" group="OUT" index="0" pad="PB3"/>
+              <signal function="AC1" group="P" index="0" pad="PA7"/>
+              <signal function="AC1" group="P" index="1" pad="PA6"/>
+              <signal function="AC1" group="P" index="2" pad="PB0"/>
+              <signal function="AC1" group="P" index="3" pad="PB4"/>
+            </signals>
+          </instance>
+          <instance name="AC2">
+            <register-group address-space="data" name="AC2" name-in-module="AC" offset="0x0690"/>
+            <signals>
+              <signal function="AC2" group="N" index="0" pad="PA7"/>
+              <signal function="AC2" group="N" index="1" pad="PB6"/>
+              <signal function="AC2" group="OUT" index="0" pad="PB2"/>
+              <signal function="AC2" group="P" index="0" pad="PA6"/>
+              <signal function="AC2" group="P" index="1" pad="PB0"/>
+              <signal function="AC2" group="P" index="2" pad="PB5"/>
+              <signal function="AC2" group="P" index="3" pad="PB7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="ADC1">
+            <register-group address-space="data" name="ADC1" name-in-module="ADC" offset="0x0640"/>
+            <signals>
+              <signal function="AIN1" group="AIN" index="0" pad="PA4"/>
+              <signal function="AIN1" group="AIN" index="1" pad="PA5"/>
+              <signal function="AIN1" group="AIN" index="2" pad="PA6"/>
+              <signal function="AIN1" group="AIN" index="3" pad="PA7"/>
+              <signal function="AIN1" group="AIN" index="4" pad="PB7"/>
+              <signal function="AIN1" group="AIN" index="5" pad="PB6"/>
+              <signal function="AIN1" group="AIN" index="6" pad="PC0"/>
+              <signal function="AIN1" group="AIN" index="7" pad="PC1"/>
+              <signal function="AIN1" group="AIN" index="8" pad="PC2"/>
+              <signal function="AIN1" group="AIN" index="9" pad="PC3"/>
+              <signal function="AIN1" group="AIN" index="10" pad="PC4"/>
+              <signal function="AIN1" group="AIN" index="11" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal function="CCL" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal function="CCL" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK_ALT" group="BREAK" pad="PC4"/>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="DAC1">
+            <register-group address-space="data" name="DAC1" name-in-module="DAC" offset="0x06A8"/>
+          </instance>
+          <instance name="DAC2">
+            <register-group address-space="data" name="DAC2" name-in-module="DAC" offset="0x06B0"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_X" group="X" index="6" pad="PC0"/>
+              <signal function="PTC_X" group="X" index="7" pad="PC1"/>
+              <signal function="PTC_X" group="X" index="8" pad="PC2"/>
+              <signal function="PTC_X" group="X" index="9" pad="PC3"/>
+              <signal function="PTC_X" group="X" index="10" pad="PC4"/>
+              <signal function="PTC_X" group="X" index="11" pad="PC5"/>
+              <signal function="PTC_X" group="X" index="12" pad="PB5"/>
+              <signal function="PTC_X" group="X" index="13" pad="PB4"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="6" pad="PC0"/>
+              <signal function="PTC_Y" group="Y" index="7" pad="PC1"/>
+              <signal function="PTC_Y" group="Y" index="8" pad="PC2"/>
+              <signal function="PTC_Y" group="Y" index="9" pad="PC3"/>
+              <signal function="PTC_Y" group="Y" index="10" pad="PC4"/>
+              <signal function="PTC_Y" group="Y" index="11" pad="PC5"/>
+              <signal function="PTC_Y" group="Y" index="12" pad="PB5"/>
+              <signal function="PTC_Y" group="Y" index="13" pad="PB4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A50"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PC4"/>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCB1" name="INT"/>
+        <interrupt index="15" module-instance="TCD0" name="OVF"/>
+        <interrupt index="16" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="18" module-instance="AC1" name="AC"/>
+        <interrupt index="19" module-instance="AC2" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="22" module-instance="ADC1" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC1" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x20"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="PTC/DAC2" name="PTC" value="0x1B"/>
+        <value caption="DAC0/DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x10"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x10"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="ADC1 reference enable" mask="0x10" name="ADC1REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+          <bitfield caption="DAC1/AC1 reference enable" mask="0x8" name="DAC1REFEN" rw="RW"/>
+          <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+          <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="ADC1 reference select select" name="VREF_ADC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC1/AC1 reference select select" name="VREF_DAC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC2/AC2 reference select select" name="VREF_DAC2REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1624.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1624.xml
new file mode 100644
index 00000000..1025da00
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1624.xml
@@ -0,0 +1,2509 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file schema-version="4.4">
+  <variants>
+    <variant ordercode="ATtiny1624-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1624-SSUR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="tinyAVR 2" name="ATtiny1624">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="cmp_control_avr_v3" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="2" pad="PB0"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="adc_12b_diff_ctrl_v2" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="bor_lvd_ctrl_avr_v1" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="cla_ccl_v1" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="cpu_avr_v2" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="int_8bit_v3" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="math_pdi_crc_avr_v1" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="ev_ctrl_v1" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="chip" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="chip" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="nvm_ctrl_avr_v2" name="NVMBIST">
+          <instance name="NVMBIST">
+            <register-group address-space="data" name="NVMBIST" name-in-module="NVMBIST" offset="0x0C0"/>
+          </instance>
+        </module>
+        <module id="nvm_ctrl_avr_v2" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="gpio_ports_avr_v1" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+          </instance>
+        </module>
+        <module id="chip" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+          </instance>
+        </module>
+        <module id="rst_integration_avr_v1" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_rtc_v1" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="chip" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="spi_8bit_v2" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+            <signals>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="PDI" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_pwm_v1" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_capture_v1" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+            <signals>
+              <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+            <signals>
+              <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="i2c_8bit_avr_v1" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+            <signals>
+              <signal function="I2C" group="SCL" pad="PB0"/>
+              <signal function="I2C" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="uart_autobd_v4" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="USART1">
+            <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="gpio_ports_avr_v1" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="chip" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="wdt_windowed_avr_v1" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="RTC" name="CNT"/>
+        <interrupt index="4" module-instance="RTC" name="PIT"/>
+        <interrupt index="5" module-instance="CCL" name="CCL"/>
+        <interrupt index="6" module-instance="PORTA" name="PORT"/>
+        <interrupt index="7" module-instance="PORTB" name="PORT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="16" module-instance="SPI0" name="INT"/>
+        <interrupt index="17" module-instance="USART0" name="RXC"/>
+        <interrupt index="18" module-instance="USART0" name="DRE"/>
+        <interrupt index="19" module-instance="USART0" name="TXC"/>
+        <interrupt index="20" module-instance="AC0" name="AC"/>
+        <interrupt index="21" module-instance="ADC0" name="ERROR"/>
+        <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC0" name="SAMPRDY"/>
+        <interrupt index="24" module-instance="PORTC" name="PORT"/>
+        <interrupt index="25" module-instance="TCB1" name="INT"/>
+        <interrupt index="26" module-instance="USART1" name="RXC"/>
+        <interrupt index="27" module-instance="USART1" name="DRE"/>
+        <interrupt index="28" module-instance="USART1" name="TXC"/>
+        <interrupt index="29" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x2A"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="cmp_control_avr_v3" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+          <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Both Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+        <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v2" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x40">
+        <register caption="Command register" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Differential mode" mask="0x80" name="DIFF" rw="RW"/>
+          <bitfield caption="Mode" mask="0x70" name="MODE" rw="RW" values="ADC_MODE"/>
+          <bitfield caption="Start command" mask="0x7" name="START" rw="RW" values="ADC_START"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Low latency mode" mask="0x20" name="LOWLAT" rw="RW"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler Value" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Reference select" mask="0x7" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Reference Selection" mask="0xf8" name="TIMEBASE" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+          <bitfield caption="Window Mode Source" mask="0x8" name="WINSRC" rw="RW" values="ADC_WINSRC"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Sampling time" mask="0xff" name="SAMPDUR" rw="RW"/>
+        </register>
+        <register caption="Control F" initval="0x00" name="CTRLF" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Free running mode" mask="0x20" name="FREERUN" rw="RW"/>
+          <bitfield caption="Left adjust" mask="0x10" name="LEFTADJ" rw="RW"/>
+          <bitfield caption="Sample numbers" mask="0xf" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Result Overwritten Interrupt Enable" mask="0x8" name="RESOVR" rw="RW"/>
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Sample Overwritten Interrupt Enable" mask="0x10" name="SAMPOVR" rw="RW"/>
+          <bitfield caption="Sample Ready Interrupt Enable" mask="0x2" name="SAMPRDY" rw="RW"/>
+          <bitfield caption="Trigger Overrun Interrupt Enable" mask="0x20" name="TRIGOVR" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x4" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Result Overwritten Interrupt Flag" mask="0x8" name="RESOVR" rw="RW"/>
+          <bitfield caption="Result Ready Interrupt Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Sample Overwritten Interrupt Flag" mask="0x10" name="SAMPOVR" rw="RW"/>
+          <bitfield caption="Sample Ready Interrupt Flag" mask="0x2" name="SAMPRDY" rw="RW"/>
+          <bitfield caption="Trigger Overrun Interrupt Flag" mask="0x20" name="TRIGOVR" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Flag" mask="0x4" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
+          <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+          <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
+        </register>
+        <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW" values="ADC_ADCPGASAMPDUR"/>
+          <bitfield caption="Gain" mask="0xe0" name="GAIN" rw="RW" values="ADC_GAIN"/>
+          <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
+          <bitfield caption="PGA Enable" mask="0x1" name="PGAEN" rw="RW"/>
+        </register>
+        <register caption="Result" name="RESULT" offset="0x10" rw="R" size="4"/>
+        <register caption="Sample" name="SAMPLE" offset="0x14" rw="R" size="2"/>
+        <register caption="Status register" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
+          <bitfield caption="ADC Busy" mask="0x1" name="ADCBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary Data 0" initval="0x00" name="TEMP0" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Temporary Data 1" initval="0x00" name="TEMP1" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Temporary Data 2" name="TEMP2" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window High Threshold" name="WINHT" offset="0x1E" rw="RW" size="2"/>
+        <register caption="Window Low Threshold" name="WINLT" offset="0x1C" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Mode select" name="ADC_MODE">
+        <value caption="Single Conversion 8-bit" name="SINGLE_8BIT" value="0x00"/>
+        <value caption="Single Conversion 12-bit" name="SINGLE_12BIT" value="0x01"/>
+        <value caption="Series Accumulation" name="SERIES" value="0x02"/>
+        <value caption="Series Accumulation with Scaling" name="SERIES_SCALING" value="0x03"/>
+        <value caption="Burst Accumulation" name="BURST" value="0x04"/>
+        <value caption="Burst Accumulation with Scaling" name="BURST_SCALING" value="0x05"/>
+      </value-group>
+      <value-group caption="Start command select" name="ADC_START">
+        <value caption="Stop an ongoing conversion" name="STOP" value="0x00"/>
+        <value caption="Start immediately" name="IMMEDIATE" value="0x01"/>
+        <value caption="Start on MUXPOS write" name="MUXPOS_WRITE" value="0x02"/>
+        <value caption="Start on MUXNEG write" name="MUXNEG_WRITE" value="0x03"/>
+        <value caption="Start on event" name="EVENT_TRIGGER" value="0x04"/>
+      </value-group>
+      <value-group caption="Prescaler Value select" name="ADC_PRESC">
+        <value caption="System clock divided by 2" name="DIV2" value="0x00"/>
+        <value caption="System clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="System clock divided by 6" name="DIV6" value="0x02"/>
+        <value caption="System clock divided by 8" name="DIV8" value="0x03"/>
+        <value caption="System clock divided by 10" name="DIV10" value="0x04"/>
+        <value caption="System clock divided by 12" name="DIV12" value="0x05"/>
+        <value caption="System clock divided by 14" name="DIV14" value="0x06"/>
+        <value caption="System clock divided by 16" name="DIV16" value="0x07"/>
+        <value caption="System clock divided by 20" name="DIV20" value="0x08"/>
+        <value caption="System clock divided by 24" name="DIV24" value="0x09"/>
+        <value caption="System clock divided by 28" name="DIV28" value="0x0A"/>
+        <value caption="System clock divided by 32" name="DIV32" value="0x0B"/>
+        <value caption="System clock divided by 40" name="DIV40" value="0x0C"/>
+        <value caption="System clock divided by 48" name="DIV48" value="0x0D"/>
+        <value caption="System clock divided by 56" name="DIV56" value="0x0E"/>
+        <value caption="System clock divided by 64" name="DIV64" value="0x0F"/>
+      </value-group>
+      <value-group caption="Reference select select" name="ADC_REFSEL">
+        <value caption="VDD" name="VDD" value="0x00"/>
+        <value caption="External Reference" name="VREFA" value="0x02"/>
+        <value caption="Internal 1.024V Reference" name="1024MV" value="0x04"/>
+        <value caption="Internal 2.048V Reference" name="2048MV" value="0x05"/>
+        <value caption="Internal 2.5V Reference" name="2500MV" value="0x06"/>
+        <value caption="Internal 4.096V Reference" name="4096MV" value="0x07"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Window Mode Source select" name="ADC_WINSRC">
+        <value caption="Result register" name="RESULT" value="0x00"/>
+        <value caption="Sample register" name="SAMPLE" value="0x01"/>
+      </value-group>
+      <value-group caption="Sample numbers select" name="ADC_SAMPNUM">
+        <value caption="No accumulation" name="NONE" value="0x0"/>
+        <value caption="2 samples accumulation" name="ACC2" value="0x1"/>
+        <value caption="4 samples accumulation" name="ACC4" value="0x2"/>
+        <value caption="8 samples accumulation" name="ACC8" value="0x3"/>
+        <value caption="16 samples accumulation" name="ACC16" value="0x4"/>
+        <value caption="32 samples accumulation" name="ACC32" value="0x5"/>
+        <value caption="64 samples accumulation" name="ACC64" value="0x6"/>
+        <value caption="128 samples accumulation" name="ACC128" value="0x7"/>
+        <value caption="256 samples accumulation" name="ACC256" value="0x8"/>
+        <value caption="512 samples accumulation" name="ACC512" value="0x9"/>
+        <value caption="1024 samples accumulation" name="ACC1024" value="0xA"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXNEG">
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="Ground" name="GND" value="0x30"/>
+        <value caption="VDD/10" name="VDDDIV10" value="0x31"/>
+        <value caption="DACREF from AC0" name="DACREF0" value="0x33"/>
+      </value-group>
+      <value-group caption="VIA select" name="ADC_VIA">
+        <value caption="Via ADC" name="ADC" value="0x00"/>
+        <value caption="Via PGA" name="PGA" value="0x01"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Ground" name="GND" value="0x30"/>
+        <value caption="VDD/10" name="VDDDIV10" value="0x31"/>
+        <value caption="Temperature sensor" name="TEMPSENSE" value="0x32"/>
+        <value caption="DACREF from AC0" name="DACREF0" value="0x33"/>
+      </value-group>
+      <value-group caption="ADC PGA Sample Duration select" name="ADC_ADCPGASAMPDUR">
+        <value caption="6 ADC cycles" name="6CLK" value="0x0"/>
+        <value caption="15 ADC cycles" name="15CLK" value="0x1"/>
+        <value caption="20 ADC cycles" name="20CLK" value="0x2"/>
+        <value caption="32 ADC cycles" name="32CLK" value="0x3"/>
+      </value-group>
+      <value-group caption="Gain select" name="ADC_GAIN">
+        <value caption="1X Gain" name="1X" value="0x0"/>
+        <value caption="2X Gain" name="2X" value="0x1"/>
+        <value caption="4X Gain" name="4X" value="0x2"/>
+        <value caption="8X Gain" name="8X" value="0x3"/>
+        <value caption="16X Gain" name="16X" value="0x4"/>
+      </value-group>
+      <value-group caption="PGA BIAS Select select" name="ADC_PGABIASSEL">
+        <value caption="1x BIAS curren" name="1X" value="0x0"/>
+        <value caption="3/4x BIAS current" name="3_4X" value="0x1"/>
+        <value caption="1/2x BIAS current" name="1_2X" value="0x2"/>
+        <value caption="1/4x BIAS current" name="1_4X" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="bor_lvd_ctrl_avr_v1" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+          <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+          <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+          <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Interrupt Flag 0" mask="0x1" name="INT0" rw="RW"/>
+          <bitfield caption="Interrupt Flag 1" mask="0x2" name="INT1" rw="RW"/>
+          <bitfield caption="Interrupt Flag 2" mask="0x4" name="INT2" rw="RW"/>
+          <bitfield caption="Interrupt Flag 3" mask="0x8" name="INT3" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+        </register>
+        <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+        </register>
+        <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+        <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+        <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+        <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+        <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+        <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+        <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+        <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+        <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+      </value-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+        <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="chip" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1k cycles" name="1K" value="0x00"/>
+        <value caption="16k cycles" name="16K" value="0x01"/>
+        <value caption="32k cycles" name="32K" value="0x02"/>
+        <value caption="64k cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="cpu_avr_v2" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="math_pdi_crc_avr_v1" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="ev_ctrl_v1" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
+        </register>
+        <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
+        </register>
+        <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
+        </register>
+        <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
+        </register>
+        <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
+        </register>
+        <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
+        </register>
+        <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
+        </register>
+        <register caption="User ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2C" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2D" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+      </register-group>
+      <value-group caption="Channel 0 generator select select" name="EVSYS_CHANNEL0">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x40"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x41"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x42"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x43"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x44"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x45"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x46"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x47"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x49"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x4A"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x4B"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+      </value-group>
+      <value-group caption="Channel 1 generator select select" name="EVSYS_CHANNEL1">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x40"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x41"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x42"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x43"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x44"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x45"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x46"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x47"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x49"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x4A"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x4B"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+      </value-group>
+      <value-group caption="Channel 2 generator select select" name="EVSYS_CHANNEL2">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x48"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x49"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x4A"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x4B"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x4C"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x4D"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x4E"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x4F"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+      </value-group>
+      <value-group caption="Channel 3 generator select select" name="EVSYS_CHANNEL3">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x48"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x49"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x4A"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x4B"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x4C"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x4D"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x4E"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x4F"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+      </value-group>
+      <value-group caption="Channel 4 generator select select" name="EVSYS_CHANNEL4">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x40"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x41"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x42"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x43"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+      </value-group>
+      <value-group caption="Channel 5 generator select select" name="EVSYS_CHANNEL5">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x40"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x41"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x42"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x43"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+      </value-group>
+      <value-group caption="Software event on channel select" name="EVSYS_SWEVENTA">
+        <value caption="Software event on channel 0" name="CH0" value="0x01"/>
+        <value caption="Software event on channel 1" name="CH1" value="0x02"/>
+        <value caption="Software event on channel 2" name="CH2" value="0x04"/>
+        <value caption="Software event on channel 3" name="CH3" value="0x08"/>
+        <value caption="Software event on channel 4" name="CH4" value="0x10"/>
+        <value caption="Software event on channel 5" name="CH5" value="0x20"/>
+      </value-group>
+      <value-group caption="Channel selector select" name="EVSYS_USER">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+        <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+        <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+        <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+        <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+        <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="chip" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+        <value caption="PDI on PDI pad, reset on alternative reset pad" name="PDIRST" value="0x3"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose I/O Register" id="chip" name="GPIO">
+      <register-group caption="General Purpose I/O Register" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="chip" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+        <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="BIST in the NVMCTRL module" id="nvm_ctrl_avr_v2" name="NVMBIST">
+      <register-group caption="BIST in the NVMCTRL module" name="NVMBIST" size="0x10">
+        <register caption="Address pattern" initval="0x00" name="ADDRPAT" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Address mode" mask="0x70" name="AMODE" rw="RW" values="NVMBIST_AMODE"/>
+          <bitfield caption="X address mode" mask="0x3" name="XMODE" rw="RW" values="NVMBIST_XMODE"/>
+          <bitfield caption="Y address mode" mask="0xc" name="YMODE" rw="RW" values="NVMBIST_YMODE"/>
+        </register>
+        <register caption="" initval="0x0000" name="CNT" offset="0x4" rw="RW" size="2">
+          <bitfield caption="Faults counter" mask="0x7ff" name="CNT" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="W" values="NVMBIST_CMD"/>
+          <bitfield caption="Stop at fault" mask="0x8" name="SAF" rw="RW"/>
+        </register>
+        <register caption="Data pattern" initval="0x00" name="DATAPAT" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data check pattern" mask="0x3" name="PATTERN" rw="RW" values="NVMBIST_PATTERN"/>
+        </register>
+        <register caption="" initval="0x00000000" name="END" offset="0x6" rw="RW" size="4">
+          <bitfield caption="" mask="0xffffff" name="END" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="R" size="1">
+          <bitfield caption="FSM State" mask="0xf" name="STATE" rw="R" values="NVMBIST_STATE"/>
+        </register>
+      </register-group>
+      <value-group caption="Address mode select" name="NVMBIST_AMODE">
+        <value caption="No special address pattern" name="NORMAL" value="0x0"/>
+        <value caption="Post complement address" name="COMPLEMENT" value="0x4"/>
+      </value-group>
+      <value-group caption="X address mode select" name="NVMBIST_XMODE">
+        <value caption="X static" name="STATIC" value="0x0"/>
+        <value caption="Carry/borrow from Y" name="CARRY" value="0x1"/>
+        <value caption="X increment each cycle" name="INC" value="0x2"/>
+        <value caption="X decrement each cycle" name="DEC" value="0x3"/>
+      </value-group>
+      <value-group caption="Y address mode select" name="NVMBIST_YMODE">
+        <value caption="Y static" name="STATIC" value="0x0"/>
+        <value caption="Carry/borrow from X" name="CARRY" value="0x1"/>
+        <value caption="Y increment each cycle" name="INC" value="0x2"/>
+        <value caption="Y decrement each cycle" name="DEC" value="0x3"/>
+      </value-group>
+      <value-group caption="Command select" name="NVMBIST_CMD">
+        <value caption="No effect" name="NOCMD" value="0x0"/>
+        <value caption="Start BIST testing" name="START" value="0x1"/>
+        <value caption="Re-start BIST testing" name="RESTART" value="0x2"/>
+        <value caption="Stop BIST and go to BREAK state" name="BREAK" value="0x3"/>
+      </value-group>
+      <value-group caption="Data check pattern select" name="NVMBIST_PATTERN">
+        <value caption="All flash programmed" name="ZEROES" value="0x0"/>
+        <value caption="Physical checkerboard in flash" name="CHECK" value="0x1"/>
+        <value caption="Inverse physical checkerboard in flash" name="INVCHECK" value="0x2"/>
+        <value caption="All flash unprogrammed" name="ONES" value="0x3"/>
+      </value-group>
+      <value-group caption="FSM State select" name="NVMBIST_STATE">
+        <value caption="Reset state" name="IDLE" value="0x0"/>
+        <value caption="Break command used" name="BREAK" value="0x1"/>
+        <value caption="Test failed, data from last address" name="FAILED0" value="0x4"/>
+        <value caption="Test failed, data from address-1" name="FAILED1" value="0x5"/>
+        <value caption="Test failed, data from address-2" name="FAILED2" value="0x6"/>
+        <value caption="Test success" name="SUCCESS" value="0x7"/>
+        <value caption="Startup, fetching first data" name="START0" value="0x8"/>
+        <value caption="Startup, fetching second data" name="START1" value="0x9"/>
+        <value caption="Re-start from BREAK or FAILED2" name="RESTART0" value="0xA"/>
+        <value caption="Re-start from FAILED1" name="RESTART1" value="0xB"/>
+        <value caption="Test running" name="RUNNING" value="0xC"/>
+        <value caption="Check last word" name="FINISH0" value="0xE"/>
+        <value caption="Count faults in last word" name="FINISH1" value="0xF"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v2" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="gpio_ports_avr_v1" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="chip" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+          <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+          <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+        </register>
+        <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+          <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+          <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+        </register>
+        <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+        </register>
+        <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+        <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+          <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+        </register>
+      </register-group>
+      <value-group caption="CCL LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Out: PA4 In: PA0, PA1, PA2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="CCL LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Out: PA7 In: PC3, PC4, PC5" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="CCL LUT2 select" name="PORTMUX_LUT2">
+        <value caption="Out: PB3 In: PB0, PB1, PB2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="CCL LUT3 select" name="PORTMUX_LUT3">
+        <value caption="Out: PA5 In: PC0, PC1, PC2" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+        <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+        <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+        <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+        <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="PA0, PA1, PA2, PA3" name="DEFAULT" value="0x0"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="WO0 on PB0" name="DEFAULT" value="0x0"/>
+        <value caption="WO0 on PB3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="WO1 on PB1" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="WO2 on PB2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="WO3 on PA3" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="WO4 on PA4" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="WO5 on PA5" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="WO on PA5" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="USART0 on PB[3:0]" name="DEFAULT" value="0x0"/>
+        <value caption="USART0 on PA[4:1]" name="ALT1" value="0x1"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+        <value caption="USART1 on PA[4:1]" name="DEFAULT" value="0x0"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="rst_integration_avr_v1" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+          <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+        </register>
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x0"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x1"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x2"/>
+        <value caption="External Clock" name="EXTCLK" value="0x3"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="chip" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+        <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="chip" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+        <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+          <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input A" mask="0x1" name="CNTAEI" rw="RW"/>
+          <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+          <bitfield caption="Event Action A" mask="0xe" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+          <bitfield caption="Event Action B" mask="0xe0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+          <bitfield caption="Command Enable" mask="0x3" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+          <bitfield caption="Command Enable" mask="0x3" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
+        <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+        <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+        <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+        <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
+        <value caption="None" name="NONE" value="0x0"/>
+        <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
+          <bitfield caption="Clock Select" mask="0xe" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+          <bitfield caption="Overflow" mask="0x2" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+          <bitfield caption="Overflow" mask="0x2" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER" name="DIV1" value="0x00"/>
+        <value caption="CLK_PER/2" name="DIV2" value="0x01"/>
+        <value caption="Use CLK_TCA from TCA0" name="TCA0" value="0x02"/>
+        <value caption="Count on event edge" name="EVENT" value="0x07"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="i2c_8bit_avr_v1" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baud Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Permissive Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="DISABLE" value="0x0"/>
+        <value caption="RS485 Mode enabled" name="ENABLE" value="0x1"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Auto Baud Window select" name="USART_ABW">
+        <value caption="18% tolerance" name="WDW0" value="0x0"/>
+        <value caption="15% tolerance" name="WDW1" value="0x1"/>
+        <value caption="21% tolerance" name="WDW2" value="0x2"/>
+        <value caption="25% tolerance" name="WDW3" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="chip" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="gpio_ports_avr_v1" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="chip" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="NVM reference enable" mask="0x4" name="NVMREFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+        <value caption="Voltage reference at 1.024V" name="1V024" value="0x00"/>
+        <value caption="Voltage reference at 2.048V" name="2V048" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.096V" name="4V096" value="0x03"/>
+        <value caption="voltage reference at supply" name="AVDD" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="wdt_windowed_avr_v1" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1626.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1626.xml
new file mode 100644
index 00000000..97da49a1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1626.xml
@@ -0,0 +1,2619 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file schema-version="4.4">
+  <variants>
+    <variant ordercode="ATtiny1626-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1626-MUR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1626-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1626-SUR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="tinyAVR 2" name="ATtiny1626">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="cmp_control_avr_v3" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="N" index="2" pad="PB0"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="adc_12b_diff_ctrl_v2" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+              <signal function="AIN0" group="AIN" index="12" pad="PC0"/>
+              <signal function="AIN0" group="AIN" index="13" pad="PC1"/>
+              <signal function="AIN0" group="AIN" index="14" pad="PC2"/>
+              <signal function="AIN0" group="AIN" index="15" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="bor_lvd_ctrl_avr_v1" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="cla_ccl_v1" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_IN" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_IN" group="LUT3_IN" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_IN" group="LUT3_IN" index="1" pad="PC1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_IN" group="LUT3_IN" index="2" pad="PC2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="cpu_avr_v2" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="int_8bit_v3" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="math_pdi_crc_avr_v1" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="ev_ctrl_v1" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="chip" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="chip" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="nvm_ctrl_avr_v2" name="NVMBIST">
+          <instance name="NVMBIST">
+            <register-group address-space="data" name="NVMBIST" name-in-module="NVMBIST" offset="0x0C0"/>
+          </instance>
+        </module>
+        <module id="nvm_ctrl_avr_v2" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="gpio_ports_avr_v1" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+          </instance>
+        </module>
+        <module id="rst_integration_avr_v1" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+              <signal function="OTHER" group="RESET_ALT" pad="PB4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_rtc_v1" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="chip" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="spi_8bit_v2" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+            <signals>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="PDI" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_pwm_v1" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_capture_v1" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+            <signals>
+              <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+            <signals>
+              <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="i2c_8bit_avr_v1" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+            <signals>
+              <signal function="I2C" group="SCL" pad="PB0"/>
+              <signal function="I2C" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="uart_autobd_v4" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="USART1">
+            <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="RXD" pad="PC1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="TXD" pad="PC2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XCK" pad="PC0"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XDIR" pad="PC3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="gpio_ports_avr_v1" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="chip" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="wdt_windowed_avr_v1" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="RTC" name="CNT"/>
+        <interrupt index="4" module-instance="RTC" name="PIT"/>
+        <interrupt index="5" module-instance="CCL" name="CCL"/>
+        <interrupt index="6" module-instance="PORTA" name="PORT"/>
+        <interrupt index="7" module-instance="PORTB" name="PORT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="16" module-instance="SPI0" name="INT"/>
+        <interrupt index="17" module-instance="USART0" name="RXC"/>
+        <interrupt index="18" module-instance="USART0" name="DRE"/>
+        <interrupt index="19" module-instance="USART0" name="TXC"/>
+        <interrupt index="20" module-instance="AC0" name="AC"/>
+        <interrupt index="21" module-instance="ADC0" name="ERROR"/>
+        <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC0" name="SAMPRDY"/>
+        <interrupt index="24" module-instance="PORTC" name="PORT"/>
+        <interrupt index="25" module-instance="TCB1" name="INT"/>
+        <interrupt index="26" module-instance="USART1" name="RXC"/>
+        <interrupt index="27" module-instance="USART1" name="DRE"/>
+        <interrupt index="28" module-instance="USART1" name="TXC"/>
+        <interrupt index="29" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x29"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="cmp_control_avr_v3" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+          <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Both Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+        <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v2" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x40">
+        <register caption="Command register" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Differential mode" mask="0x80" name="DIFF" rw="RW"/>
+          <bitfield caption="Mode" mask="0x70" name="MODE" rw="RW" values="ADC_MODE"/>
+          <bitfield caption="Start command" mask="0x7" name="START" rw="RW" values="ADC_START"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Low latency mode" mask="0x20" name="LOWLAT" rw="RW"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler Value" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Reference select" mask="0x7" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Reference Selection" mask="0xf8" name="TIMEBASE" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+          <bitfield caption="Window Mode Source" mask="0x8" name="WINSRC" rw="RW" values="ADC_WINSRC"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Sampling time" mask="0xff" name="SAMPDUR" rw="RW"/>
+        </register>
+        <register caption="Control F" initval="0x00" name="CTRLF" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Free running mode" mask="0x20" name="FREERUN" rw="RW"/>
+          <bitfield caption="Left adjust" mask="0x10" name="LEFTADJ" rw="RW"/>
+          <bitfield caption="Sample numbers" mask="0xf" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Result Overwritten Interrupt Enable" mask="0x8" name="RESOVR" rw="RW"/>
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Sample Overwritten Interrupt Enable" mask="0x10" name="SAMPOVR" rw="RW"/>
+          <bitfield caption="Sample Ready Interrupt Enable" mask="0x2" name="SAMPRDY" rw="RW"/>
+          <bitfield caption="Trigger Overrun Interrupt Enable" mask="0x20" name="TRIGOVR" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x4" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Result Overwritten Interrupt Flag" mask="0x8" name="RESOVR" rw="RW"/>
+          <bitfield caption="Result Ready Interrupt Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Sample Overwritten Interrupt Flag" mask="0x10" name="SAMPOVR" rw="RW"/>
+          <bitfield caption="Sample Ready Interrupt Flag" mask="0x2" name="SAMPRDY" rw="RW"/>
+          <bitfield caption="Trigger Overrun Interrupt Flag" mask="0x20" name="TRIGOVR" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Flag" mask="0x4" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
+          <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+          <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
+        </register>
+        <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW" values="ADC_ADCPGASAMPDUR"/>
+          <bitfield caption="Gain" mask="0xe0" name="GAIN" rw="RW" values="ADC_GAIN"/>
+          <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
+          <bitfield caption="PGA Enable" mask="0x1" name="PGAEN" rw="RW"/>
+        </register>
+        <register caption="Result" name="RESULT" offset="0x10" rw="R" size="4"/>
+        <register caption="Sample" name="SAMPLE" offset="0x14" rw="R" size="2"/>
+        <register caption="Status register" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
+          <bitfield caption="ADC Busy" mask="0x1" name="ADCBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary Data 0" initval="0x00" name="TEMP0" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Temporary Data 1" initval="0x00" name="TEMP1" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Temporary Data 2" name="TEMP2" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window High Threshold" name="WINHT" offset="0x1E" rw="RW" size="2"/>
+        <register caption="Window Low Threshold" name="WINLT" offset="0x1C" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Mode select" name="ADC_MODE">
+        <value caption="Single Conversion 8-bit" name="SINGLE_8BIT" value="0x00"/>
+        <value caption="Single Conversion 12-bit" name="SINGLE_12BIT" value="0x01"/>
+        <value caption="Series Accumulation" name="SERIES" value="0x02"/>
+        <value caption="Series Accumulation with Scaling" name="SERIES_SCALING" value="0x03"/>
+        <value caption="Burst Accumulation" name="BURST" value="0x04"/>
+        <value caption="Burst Accumulation with Scaling" name="BURST_SCALING" value="0x05"/>
+      </value-group>
+      <value-group caption="Start command select" name="ADC_START">
+        <value caption="Stop an ongoing conversion" name="STOP" value="0x00"/>
+        <value caption="Start immediately" name="IMMEDIATE" value="0x01"/>
+        <value caption="Start on MUXPOS write" name="MUXPOS_WRITE" value="0x02"/>
+        <value caption="Start on MUXNEG write" name="MUXNEG_WRITE" value="0x03"/>
+        <value caption="Start on event" name="EVENT_TRIGGER" value="0x04"/>
+      </value-group>
+      <value-group caption="Prescaler Value select" name="ADC_PRESC">
+        <value caption="System clock divided by 2" name="DIV2" value="0x00"/>
+        <value caption="System clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="System clock divided by 6" name="DIV6" value="0x02"/>
+        <value caption="System clock divided by 8" name="DIV8" value="0x03"/>
+        <value caption="System clock divided by 10" name="DIV10" value="0x04"/>
+        <value caption="System clock divided by 12" name="DIV12" value="0x05"/>
+        <value caption="System clock divided by 14" name="DIV14" value="0x06"/>
+        <value caption="System clock divided by 16" name="DIV16" value="0x07"/>
+        <value caption="System clock divided by 20" name="DIV20" value="0x08"/>
+        <value caption="System clock divided by 24" name="DIV24" value="0x09"/>
+        <value caption="System clock divided by 28" name="DIV28" value="0x0A"/>
+        <value caption="System clock divided by 32" name="DIV32" value="0x0B"/>
+        <value caption="System clock divided by 40" name="DIV40" value="0x0C"/>
+        <value caption="System clock divided by 48" name="DIV48" value="0x0D"/>
+        <value caption="System clock divided by 56" name="DIV56" value="0x0E"/>
+        <value caption="System clock divided by 64" name="DIV64" value="0x0F"/>
+      </value-group>
+      <value-group caption="Reference select select" name="ADC_REFSEL">
+        <value caption="VDD" name="VDD" value="0x00"/>
+        <value caption="External Reference" name="VREFA" value="0x02"/>
+        <value caption="Internal 1.024V Reference" name="1024MV" value="0x04"/>
+        <value caption="Internal 2.048V Reference" name="2048MV" value="0x05"/>
+        <value caption="Internal 2.5V Reference" name="2500MV" value="0x06"/>
+        <value caption="Internal 4.096V Reference" name="4096MV" value="0x07"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Window Mode Source select" name="ADC_WINSRC">
+        <value caption="Result register" name="RESULT" value="0x00"/>
+        <value caption="Sample register" name="SAMPLE" value="0x01"/>
+      </value-group>
+      <value-group caption="Sample numbers select" name="ADC_SAMPNUM">
+        <value caption="No accumulation" name="NONE" value="0x0"/>
+        <value caption="2 samples accumulation" name="ACC2" value="0x1"/>
+        <value caption="4 samples accumulation" name="ACC4" value="0x2"/>
+        <value caption="8 samples accumulation" name="ACC8" value="0x3"/>
+        <value caption="16 samples accumulation" name="ACC16" value="0x4"/>
+        <value caption="32 samples accumulation" name="ACC32" value="0x5"/>
+        <value caption="64 samples accumulation" name="ACC64" value="0x6"/>
+        <value caption="128 samples accumulation" name="ACC128" value="0x7"/>
+        <value caption="256 samples accumulation" name="ACC256" value="0x8"/>
+        <value caption="512 samples accumulation" name="ACC512" value="0x9"/>
+        <value caption="1024 samples accumulation" name="ACC1024" value="0xA"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXNEG">
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="Ground" name="GND" value="0x30"/>
+        <value caption="VDD/10" name="VDDDIV10" value="0x31"/>
+        <value caption="DACREF from AC0" name="DACREF0" value="0x33"/>
+      </value-group>
+      <value-group caption="VIA select" name="ADC_VIA">
+        <value caption="Via ADC" name="ADC" value="0x00"/>
+        <value caption="Via PGA" name="PGA" value="0x01"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Ground" name="GND" value="0x30"/>
+        <value caption="VDD/10" name="VDDDIV10" value="0x31"/>
+        <value caption="Temperature sensor" name="TEMPSENSE" value="0x32"/>
+        <value caption="DACREF from AC0" name="DACREF0" value="0x33"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 12" name="AIN12" value="0x0C"/>
+        <value caption="ADC input pin 13" name="AIN13" value="0x0D"/>
+        <value caption="ADC input pin 14" name="AIN14" value="0x0E"/>
+        <value caption="ADC input pin 15" name="AIN15" value="0x0F"/>
+      </value-group>
+      <value-group caption="ADC PGA Sample Duration select" name="ADC_ADCPGASAMPDUR">
+        <value caption="6 ADC cycles" name="6CLK" value="0x0"/>
+        <value caption="15 ADC cycles" name="15CLK" value="0x1"/>
+        <value caption="20 ADC cycles" name="20CLK" value="0x2"/>
+        <value caption="32 ADC cycles" name="32CLK" value="0x3"/>
+      </value-group>
+      <value-group caption="Gain select" name="ADC_GAIN">
+        <value caption="1X Gain" name="1X" value="0x0"/>
+        <value caption="2X Gain" name="2X" value="0x1"/>
+        <value caption="4X Gain" name="4X" value="0x2"/>
+        <value caption="8X Gain" name="8X" value="0x3"/>
+        <value caption="16X Gain" name="16X" value="0x4"/>
+      </value-group>
+      <value-group caption="PGA BIAS Select select" name="ADC_PGABIASSEL">
+        <value caption="1x BIAS curren" name="1X" value="0x0"/>
+        <value caption="3/4x BIAS current" name="3_4X" value="0x1"/>
+        <value caption="1/2x BIAS current" name="1_2X" value="0x2"/>
+        <value caption="1/4x BIAS current" name="1_4X" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="bor_lvd_ctrl_avr_v1" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+          <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+          <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+          <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Interrupt Flag 0" mask="0x1" name="INT0" rw="RW"/>
+          <bitfield caption="Interrupt Flag 1" mask="0x2" name="INT1" rw="RW"/>
+          <bitfield caption="Interrupt Flag 2" mask="0x4" name="INT2" rw="RW"/>
+          <bitfield caption="Interrupt Flag 3" mask="0x8" name="INT3" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+        </register>
+        <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+        </register>
+        <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+        <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+        <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+        <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+        <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+        <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+        <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+        <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+        <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+      </value-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+        <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="chip" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1k cycles" name="1K" value="0x00"/>
+        <value caption="16k cycles" name="16K" value="0x01"/>
+        <value caption="32k cycles" name="32K" value="0x02"/>
+        <value caption="64k cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="cpu_avr_v2" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="math_pdi_crc_avr_v1" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="ev_ctrl_v1" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
+        </register>
+        <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
+        </register>
+        <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
+        </register>
+        <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
+        </register>
+        <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
+        </register>
+        <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
+        </register>
+        <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
+        </register>
+        <register caption="User ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port C" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2C" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2D" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+      </register-group>
+      <value-group caption="Channel 0 generator select select" name="EVSYS_CHANNEL0">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x40"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x41"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x42"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x43"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x44"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x45"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x46"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x47"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x49"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x4A"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x4B"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x4C"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x4D"/>
+      </value-group>
+      <value-group caption="Channel 1 generator select select" name="EVSYS_CHANNEL1">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x40"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x41"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x42"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x43"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x44"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x45"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x46"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x47"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x49"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x4A"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x4B"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x4C"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x4D"/>
+      </value-group>
+      <value-group caption="Channel 2 generator select select" name="EVSYS_CHANNEL2">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x48"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x49"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x4A"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x4B"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x4C"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x4D"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x4E"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x4F"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x40"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x41"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x42"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x43"/>
+      </value-group>
+      <value-group caption="Channel 3 generator select select" name="EVSYS_CHANNEL3">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x48"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x49"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x4A"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x4B"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x4C"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x4D"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x4E"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x4F"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x40"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x41"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x42"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x43"/>
+      </value-group>
+      <value-group caption="Channel 4 generator select select" name="EVSYS_CHANNEL4">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x40"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x41"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x42"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x43"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x44"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x45"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x48"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x49"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x4A"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x4B"/>
+      </value-group>
+      <value-group caption="Channel 5 generator select select" name="EVSYS_CHANNEL5">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x40"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x41"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x42"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x43"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x44"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x45"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x48"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x49"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x4A"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x4B"/>
+      </value-group>
+      <value-group caption="Software event on channel select" name="EVSYS_SWEVENTA">
+        <value caption="Software event on channel 0" name="CH0" value="0x01"/>
+        <value caption="Software event on channel 1" name="CH1" value="0x02"/>
+        <value caption="Software event on channel 2" name="CH2" value="0x04"/>
+        <value caption="Software event on channel 3" name="CH3" value="0x08"/>
+        <value caption="Software event on channel 4" name="CH4" value="0x10"/>
+        <value caption="Software event on channel 5" name="CH5" value="0x20"/>
+      </value-group>
+      <value-group caption="Channel selector select" name="EVSYS_USER">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+        <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+        <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+        <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+        <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+        <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="chip" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+        <value caption="PDI on PDI pad, reset on alternative reset pad" name="PDIRST" value="0x3"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose I/O Register" id="chip" name="GPIO">
+      <register-group caption="General Purpose I/O Register" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="chip" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+        <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="BIST in the NVMCTRL module" id="nvm_ctrl_avr_v2" name="NVMBIST">
+      <register-group caption="BIST in the NVMCTRL module" name="NVMBIST" size="0x10">
+        <register caption="Address pattern" initval="0x00" name="ADDRPAT" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Address mode" mask="0x70" name="AMODE" rw="RW" values="NVMBIST_AMODE"/>
+          <bitfield caption="X address mode" mask="0x3" name="XMODE" rw="RW" values="NVMBIST_XMODE"/>
+          <bitfield caption="Y address mode" mask="0xc" name="YMODE" rw="RW" values="NVMBIST_YMODE"/>
+        </register>
+        <register caption="" initval="0x0000" name="CNT" offset="0x4" rw="RW" size="2">
+          <bitfield caption="Faults counter" mask="0x7ff" name="CNT" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="W" values="NVMBIST_CMD"/>
+          <bitfield caption="Stop at fault" mask="0x8" name="SAF" rw="RW"/>
+        </register>
+        <register caption="Data pattern" initval="0x00" name="DATAPAT" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data check pattern" mask="0x3" name="PATTERN" rw="RW" values="NVMBIST_PATTERN"/>
+        </register>
+        <register caption="" initval="0x00000000" name="END" offset="0x6" rw="RW" size="4">
+          <bitfield caption="" mask="0xffffff" name="END" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="R" size="1">
+          <bitfield caption="FSM State" mask="0xf" name="STATE" rw="R" values="NVMBIST_STATE"/>
+        </register>
+      </register-group>
+      <value-group caption="Address mode select" name="NVMBIST_AMODE">
+        <value caption="No special address pattern" name="NORMAL" value="0x0"/>
+        <value caption="Post complement address" name="COMPLEMENT" value="0x4"/>
+      </value-group>
+      <value-group caption="X address mode select" name="NVMBIST_XMODE">
+        <value caption="X static" name="STATIC" value="0x0"/>
+        <value caption="Carry/borrow from Y" name="CARRY" value="0x1"/>
+        <value caption="X increment each cycle" name="INC" value="0x2"/>
+        <value caption="X decrement each cycle" name="DEC" value="0x3"/>
+      </value-group>
+      <value-group caption="Y address mode select" name="NVMBIST_YMODE">
+        <value caption="Y static" name="STATIC" value="0x0"/>
+        <value caption="Carry/borrow from X" name="CARRY" value="0x1"/>
+        <value caption="Y increment each cycle" name="INC" value="0x2"/>
+        <value caption="Y decrement each cycle" name="DEC" value="0x3"/>
+      </value-group>
+      <value-group caption="Command select" name="NVMBIST_CMD">
+        <value caption="No effect" name="NOCMD" value="0x0"/>
+        <value caption="Start BIST testing" name="START" value="0x1"/>
+        <value caption="Re-start BIST testing" name="RESTART" value="0x2"/>
+        <value caption="Stop BIST and go to BREAK state" name="BREAK" value="0x3"/>
+      </value-group>
+      <value-group caption="Data check pattern select" name="NVMBIST_PATTERN">
+        <value caption="All flash programmed" name="ZEROES" value="0x0"/>
+        <value caption="Physical checkerboard in flash" name="CHECK" value="0x1"/>
+        <value caption="Inverse physical checkerboard in flash" name="INVCHECK" value="0x2"/>
+        <value caption="All flash unprogrammed" name="ONES" value="0x3"/>
+      </value-group>
+      <value-group caption="FSM State select" name="NVMBIST_STATE">
+        <value caption="Reset state" name="IDLE" value="0x0"/>
+        <value caption="Break command used" name="BREAK" value="0x1"/>
+        <value caption="Test failed, data from last address" name="FAILED0" value="0x4"/>
+        <value caption="Test failed, data from address-1" name="FAILED1" value="0x5"/>
+        <value caption="Test failed, data from address-2" name="FAILED2" value="0x6"/>
+        <value caption="Test success" name="SUCCESS" value="0x7"/>
+        <value caption="Startup, fetching first data" name="START0" value="0x8"/>
+        <value caption="Startup, fetching second data" name="START1" value="0x9"/>
+        <value caption="Re-start from BREAK or FAILED2" name="RESTART0" value="0xA"/>
+        <value caption="Re-start from FAILED1" name="RESTART1" value="0xB"/>
+        <value caption="Test running" name="RUNNING" value="0xC"/>
+        <value caption="Check last word" name="FINISH0" value="0xE"/>
+        <value caption="Count faults in last word" name="FINISH1" value="0xF"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v2" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="gpio_ports_avr_v1" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="chip" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+          <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+          <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+        </register>
+        <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+          <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+          <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+        </register>
+        <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+        </register>
+        <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+        <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+          <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+        </register>
+      </register-group>
+      <value-group caption="CCL LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Out: PA4 In: PA0, PA1, PA2" name="DEFAULT" value="0x0"/>
+        <value caption="Out: PB4 In: PA0, PA1, PA2" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="CCL LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Out: PA7 In: PC3, PC4, PC5" name="DEFAULT" value="0x0"/>
+        <value caption="Out: PC1 In: PC3, PC4, PC5" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="CCL LUT2 select" name="PORTMUX_LUT2">
+        <value caption="Out: PB3 In: PB0, PB1, PB2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="CCL LUT3 select" name="PORTMUX_LUT3">
+        <value caption="Out: PA5 In: PC0, PC1, PC2" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+        <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+        <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+        <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+        <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="PA0, PA1, PA2, PA3" name="DEFAULT" value="0x0"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+        <value caption="PC2, PC1, PC0, PC3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="WO0 on PB0" name="DEFAULT" value="0x0"/>
+        <value caption="WO0 on PB3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="WO1 on PB1" name="DEFAULT" value="0x0"/>
+        <value caption="WO1 on PB4" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="WO2 on PB2" name="DEFAULT" value="0x0"/>
+        <value caption="WO2 on PB5" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="WO3 on PA3" name="DEFAULT" value="0x0"/>
+        <value caption="WO3 on PC3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="WO4 on PA4" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="WO5 on PA5" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="WO on PA5" name="DEFAULT" value="0x0"/>
+        <value caption="WO on PC0" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="USART0 on PB[3:0]" name="DEFAULT" value="0x0"/>
+        <value caption="USART0 on PA[4:1]" name="ALT1" value="0x1"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+        <value caption="USART1 on PA[4:1]" name="DEFAULT" value="0x0"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+        <value caption="USART1 on PC[3:0]" name="ALT1" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="rst_integration_avr_v1" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+          <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+        </register>
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x0"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x1"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x2"/>
+        <value caption="External Clock" name="EXTCLK" value="0x3"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="chip" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+        <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="chip" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+        <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+          <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input A" mask="0x1" name="CNTAEI" rw="RW"/>
+          <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+          <bitfield caption="Event Action A" mask="0xe" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+          <bitfield caption="Event Action B" mask="0xe0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+          <bitfield caption="Command Enable" mask="0x3" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+          <bitfield caption="Command Enable" mask="0x3" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
+        <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+        <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+        <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+        <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
+        <value caption="None" name="NONE" value="0x0"/>
+        <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
+          <bitfield caption="Clock Select" mask="0xe" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+          <bitfield caption="Overflow" mask="0x2" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+          <bitfield caption="Overflow" mask="0x2" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER" name="DIV1" value="0x00"/>
+        <value caption="CLK_PER/2" name="DIV2" value="0x01"/>
+        <value caption="Use CLK_TCA from TCA0" name="TCA0" value="0x02"/>
+        <value caption="Count on event edge" name="EVENT" value="0x07"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="i2c_8bit_avr_v1" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baud Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Permissive Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="DISABLE" value="0x0"/>
+        <value caption="RS485 Mode enabled" name="ENABLE" value="0x1"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Auto Baud Window select" name="USART_ABW">
+        <value caption="18% tolerance" name="WDW0" value="0x0"/>
+        <value caption="15% tolerance" name="WDW1" value="0x1"/>
+        <value caption="21% tolerance" name="WDW2" value="0x2"/>
+        <value caption="25% tolerance" name="WDW3" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="chip" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="gpio_ports_avr_v1" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="chip" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="NVM reference enable" mask="0x4" name="NVMREFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+        <value caption="Voltage reference at 1.024V" name="1V024" value="0x00"/>
+        <value caption="Voltage reference at 2.048V" name="2V048" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.096V" name="4V096" value="0x03"/>
+        <value caption="voltage reference at supply" name="AVDD" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="wdt_windowed_avr_v1" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND1" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1627.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1627.xml
new file mode 100644
index 00000000..1415f58e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1627.xml
@@ -0,0 +1,2636 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file schema-version="4.4">
+  <variants>
+    <variant ordercode="ATtiny1627-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny1627-MUR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="tinyAVR 2" name="ATtiny1627">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x4000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x4000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="cmp_control_avr_v3" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="N" index="2" pad="PB0"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+              <signal function="AC0" group="P" index="3" pad="PB6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="adc_12b_diff_ctrl_v2" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+              <signal function="AIN0" group="AIN" index="12" pad="PC0"/>
+              <signal function="AIN0" group="AIN" index="13" pad="PC1"/>
+              <signal function="AIN0" group="AIN" index="14" pad="PC2"/>
+              <signal function="AIN0" group="AIN" index="15" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="bor_lvd_ctrl_avr_v1" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="cla_ccl_v1" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_IN" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_IN" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_IN" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_IN" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_IN" group="LUT2_IN" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL_ALT" group="LUT2_OUT" index="0" pad="PB6"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT2" function="CCL" group="LUT2_OUT" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_IN" group="LUT3_IN" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_IN" group="LUT3_IN" index="1" pad="PC1"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_IN" group="LUT3_IN" index="2" pad="PC2"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL_ALT" group="LUT3_OUT" index="0" pad="PA5"/>
+              <signal field="PORTMUX.CCLROUTEA.LUT3" function="CCL" group="LUT3_OUT" index="0" pad="PC4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="cpu_avr_v2" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+              <signal function="OTHER" group="BREAK_ALT" pad="PC4"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="int_8bit_v3" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="math_pdi_crc_avr_v1" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="ev_ctrl_v1" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS_ALT" group="EVOUT" index="0" pad="PA7"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTA" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS_ALT" group="EVOUT" index="1" pad="PB7"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTB" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.EVSYSROUTEA.EVOUTC" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="chip" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="chip" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="nvm_ctrl_avr_v2" name="NVMBIST">
+          <instance name="NVMBIST">
+            <register-group address-space="data" name="NVMBIST" name-in-module="NVMBIST" offset="0x0C0"/>
+          </instance>
+        </module>
+        <module id="nvm_ctrl_avr_v2" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="gpio_ports_avr_v1" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x05E0"/>
+          </instance>
+        </module>
+        <module id="rst_integration_avr_v1" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+              <signal function="OTHER" group="RESET_ALT" pad="PB4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_rtc_v1" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="chip" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="spi_8bit_v2" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x08C0"/>
+            <signals>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.SPIROUTEA.SPI0" function="SPI" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="PDI" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_pwm_v1" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.TCAROUTEA.TCA0" function="TCA" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="tmr_16b_capture_v1" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A80"/>
+            <signals>
+              <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.TCBROUTEA.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A90"/>
+            <signals>
+              <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PC4"/>
+              <signal field="PORTMUX.TCBROUTEA.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="i2c_8bit_avr_v1" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x08A0"/>
+            <signals>
+              <signal function="I2C" group="SCL" pad="PB0"/>
+              <signal function="I2C" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="uart_autobd_v4" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0_ALT" group="XDIR" pad="PA7"/>
+              <signal field="PORTMUX.USARTROUTEA.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="USART1">
+            <register-group address-space="data" name="USART1" name-in-module="USART" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="RXD" pad="PC1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="TXD" pad="PC2"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XCK" pad="PC0"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1_ALT" group="XDIR" pad="PC3"/>
+              <signal field="PORTMUX.USARTROUTEA.USART1" function="USART1" group="XDIR" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="chip" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="gpio_ports_avr_v1" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="chip" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="wdt_windowed_avr_v1" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="RTC" name="CNT"/>
+        <interrupt index="4" module-instance="RTC" name="PIT"/>
+        <interrupt index="5" module-instance="CCL" name="CCL"/>
+        <interrupt index="6" module-instance="PORTA" name="PORT"/>
+        <interrupt index="7" module-instance="PORTB" name="PORT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="15" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="16" module-instance="SPI0" name="INT"/>
+        <interrupt index="17" module-instance="USART0" name="RXC"/>
+        <interrupt index="18" module-instance="USART0" name="DRE"/>
+        <interrupt index="19" module-instance="USART0" name="TXC"/>
+        <interrupt index="20" module-instance="AC0" name="AC"/>
+        <interrupt index="21" module-instance="ADC0" name="ERROR"/>
+        <interrupt index="22" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC0" name="SAMPRDY"/>
+        <interrupt index="24" module-instance="PORTC" name="PORT"/>
+        <interrupt index="25" module-instance="TCB1" name="INT"/>
+        <interrupt index="26" module-instance="USART1" name="RXC"/>
+        <interrupt index="27" module-instance="USART1" name="DRE"/>
+        <interrupt index="28" module-instance="USART1" name="TXC"/>
+        <interrupt index="29" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x28"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="cmp_control_avr_v3" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Referance scale control" initval="0xFF" name="DACREF" offset="0x4" rw="RW" size="1">
+          <bitfield caption="DAC voltage reference" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Both Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 2" name="PIN2" value="0x02"/>
+        <value caption="DAC Voltage Reference" name="DACREF" value="0x03"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="adc_12b_diff_ctrl_v2" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x40">
+        <register caption="Command register" initval="0x00" name="COMMAND" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Differential mode" mask="0x80" name="DIFF" rw="RW"/>
+          <bitfield caption="Mode" mask="0x70" name="MODE" rw="RW" values="ADC_MODE"/>
+          <bitfield caption="Start command" mask="0x7" name="START" rw="RW" values="ADC_START"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Low latency mode" mask="0x20" name="LOWLAT" rw="RW"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler Value" mask="0xf" name="PRESC" rw="RW" values="ADC_PRESC"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Reference select" mask="0x7" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Reference Selection" mask="0xf8" name="TIMEBASE" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+          <bitfield caption="Window Mode Source" mask="0x8" name="WINSRC" rw="RW" values="ADC_WINSRC"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Sampling time" mask="0xff" name="SAMPDUR" rw="RW"/>
+        </register>
+        <register caption="Control F" initval="0x00" name="CTRLF" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Free running mode" mask="0x20" name="FREERUN" rw="RW"/>
+          <bitfield caption="Left adjust" mask="0x10" name="LEFTADJ" rw="RW"/>
+          <bitfield caption="Sample numbers" mask="0xf" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Result Overwritten Interrupt Enable" mask="0x8" name="RESOVR" rw="RW"/>
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Sample Overwritten Interrupt Enable" mask="0x10" name="SAMPOVR" rw="RW"/>
+          <bitfield caption="Sample Ready Interrupt Enable" mask="0x2" name="SAMPRDY" rw="RW"/>
+          <bitfield caption="Trigger Overrun Interrupt Enable" mask="0x20" name="TRIGOVR" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x4" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Result Overwritten Interrupt Flag" mask="0x8" name="RESOVR" rw="RW"/>
+          <bitfield caption="Result Ready Interrupt Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Sample Overwritten Interrupt Flag" mask="0x10" name="SAMPOVR" rw="RW"/>
+          <bitfield caption="Sample Ready Interrupt Flag" mask="0x2" name="SAMPRDY" rw="RW"/>
+          <bitfield caption="Trigger Overrun Interrupt Flag" mask="0x20" name="TRIGOVR" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Flag" mask="0x4" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Negative mux input" initval="0x00" name="MUXNEG" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXNEG" rw="RW" values="ADC_MUXNEG"/>
+          <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x3f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+          <bitfield caption="VIA" mask="0xc0" name="VIA" rw="RW" values="ADC_VIA"/>
+        </register>
+        <register caption="PGA Control" initval="0x00" name="PGACTRL" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="ADC PGA Sample Duration" mask="0x6" name="ADCPGASAMPDUR" rw="RW" values="ADC_ADCPGASAMPDUR"/>
+          <bitfield caption="Gain" mask="0xe0" name="GAIN" rw="RW" values="ADC_GAIN"/>
+          <bitfield caption="PGA BIAS Select" mask="0x18" name="PGABIASSEL" rw="RW" values="ADC_PGABIASSEL"/>
+          <bitfield caption="PGA Enable" mask="0x1" name="PGAEN" rw="RW"/>
+        </register>
+        <register caption="Result" name="RESULT" offset="0x10" rw="R" size="4"/>
+        <register caption="Sample" name="SAMPLE" offset="0x14" rw="R" size="2"/>
+        <register caption="Status register" initval="0x00" name="STATUS" offset="0x06" rw="R" size="1">
+          <bitfield caption="ADC Busy" mask="0x1" name="ADCBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary Data 0" initval="0x00" name="TEMP0" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Temporary Data 1" initval="0x00" name="TEMP1" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Temporary Data 2" name="TEMP2" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window High Threshold" name="WINHT" offset="0x1E" rw="RW" size="2"/>
+        <register caption="Window Low Threshold" name="WINLT" offset="0x1C" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Mode select" name="ADC_MODE">
+        <value caption="Single Conversion 8-bit" name="SINGLE_8BIT" value="0x00"/>
+        <value caption="Single Conversion 12-bit" name="SINGLE_12BIT" value="0x01"/>
+        <value caption="Series Accumulation" name="SERIES" value="0x02"/>
+        <value caption="Series Accumulation with Scaling" name="SERIES_SCALING" value="0x03"/>
+        <value caption="Burst Accumulation" name="BURST" value="0x04"/>
+        <value caption="Burst Accumulation with Scaling" name="BURST_SCALING" value="0x05"/>
+      </value-group>
+      <value-group caption="Start command select" name="ADC_START">
+        <value caption="Stop an ongoing conversion" name="STOP" value="0x00"/>
+        <value caption="Start immediately" name="IMMEDIATE" value="0x01"/>
+        <value caption="Start on MUXPOS write" name="MUXPOS_WRITE" value="0x02"/>
+        <value caption="Start on MUXNEG write" name="MUXNEG_WRITE" value="0x03"/>
+        <value caption="Start on event" name="EVENT_TRIGGER" value="0x04"/>
+      </value-group>
+      <value-group caption="Prescaler Value select" name="ADC_PRESC">
+        <value caption="System clock divided by 2" name="DIV2" value="0x00"/>
+        <value caption="System clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="System clock divided by 6" name="DIV6" value="0x02"/>
+        <value caption="System clock divided by 8" name="DIV8" value="0x03"/>
+        <value caption="System clock divided by 10" name="DIV10" value="0x04"/>
+        <value caption="System clock divided by 12" name="DIV12" value="0x05"/>
+        <value caption="System clock divided by 14" name="DIV14" value="0x06"/>
+        <value caption="System clock divided by 16" name="DIV16" value="0x07"/>
+        <value caption="System clock divided by 20" name="DIV20" value="0x08"/>
+        <value caption="System clock divided by 24" name="DIV24" value="0x09"/>
+        <value caption="System clock divided by 28" name="DIV28" value="0x0A"/>
+        <value caption="System clock divided by 32" name="DIV32" value="0x0B"/>
+        <value caption="System clock divided by 40" name="DIV40" value="0x0C"/>
+        <value caption="System clock divided by 48" name="DIV48" value="0x0D"/>
+        <value caption="System clock divided by 56" name="DIV56" value="0x0E"/>
+        <value caption="System clock divided by 64" name="DIV64" value="0x0F"/>
+      </value-group>
+      <value-group caption="Reference select select" name="ADC_REFSEL">
+        <value caption="VDD" name="VDD" value="0x00"/>
+        <value caption="External Reference" name="VREFA" value="0x02"/>
+        <value caption="Internal 1.024V Reference" name="1024MV" value="0x04"/>
+        <value caption="Internal 2.048V Reference" name="2048MV" value="0x05"/>
+        <value caption="Internal 2.5V Reference" name="2500MV" value="0x06"/>
+        <value caption="Internal 4.096V Reference" name="4096MV" value="0x07"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Window Mode Source select" name="ADC_WINSRC">
+        <value caption="Result register" name="RESULT" value="0x00"/>
+        <value caption="Sample register" name="SAMPLE" value="0x01"/>
+      </value-group>
+      <value-group caption="Sample numbers select" name="ADC_SAMPNUM">
+        <value caption="No accumulation" name="NONE" value="0x0"/>
+        <value caption="2 samples accumulation" name="ACC2" value="0x1"/>
+        <value caption="4 samples accumulation" name="ACC4" value="0x2"/>
+        <value caption="8 samples accumulation" name="ACC8" value="0x3"/>
+        <value caption="16 samples accumulation" name="ACC16" value="0x4"/>
+        <value caption="32 samples accumulation" name="ACC32" value="0x5"/>
+        <value caption="64 samples accumulation" name="ACC64" value="0x6"/>
+        <value caption="128 samples accumulation" name="ACC128" value="0x7"/>
+        <value caption="256 samples accumulation" name="ACC256" value="0x8"/>
+        <value caption="512 samples accumulation" name="ACC512" value="0x9"/>
+        <value caption="1024 samples accumulation" name="ACC1024" value="0xA"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXNEG">
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="Ground" name="GND" value="0x30"/>
+        <value caption="VDD/10" name="VDDDIV10" value="0x31"/>
+        <value caption="DACREF from AC0" name="DACREF0" value="0x33"/>
+      </value-group>
+      <value-group caption="VIA select" name="ADC_VIA">
+        <value caption="Via ADC" name="ADC" value="0x00"/>
+        <value caption="Via PGA" name="PGA" value="0x01"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Ground" name="GND" value="0x30"/>
+        <value caption="VDD/10" name="VDDDIV10" value="0x31"/>
+        <value caption="Temperature sensor" name="TEMPSENSE" value="0x32"/>
+        <value caption="DACREF from AC0" name="DACREF0" value="0x33"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 12" name="AIN12" value="0x0C"/>
+        <value caption="ADC input pin 13" name="AIN13" value="0x0D"/>
+        <value caption="ADC input pin 14" name="AIN14" value="0x0E"/>
+        <value caption="ADC input pin 15" name="AIN15" value="0x0F"/>
+      </value-group>
+      <value-group caption="ADC PGA Sample Duration select" name="ADC_ADCPGASAMPDUR">
+        <value caption="6 ADC cycles" name="6CLK" value="0x0"/>
+        <value caption="15 ADC cycles" name="15CLK" value="0x1"/>
+        <value caption="20 ADC cycles" name="20CLK" value="0x2"/>
+        <value caption="32 ADC cycles" name="32CLK" value="0x3"/>
+      </value-group>
+      <value-group caption="Gain select" name="ADC_GAIN">
+        <value caption="1X Gain" name="1X" value="0x0"/>
+        <value caption="2X Gain" name="2X" value="0x1"/>
+        <value caption="4X Gain" name="4X" value="0x2"/>
+        <value caption="8X Gain" name="8X" value="0x3"/>
+        <value caption="16X Gain" name="16X" value="0x4"/>
+      </value-group>
+      <value-group caption="PGA BIAS Select select" name="ADC_PGABIASSEL">
+        <value caption="1x BIAS curren" name="1X" value="0x0"/>
+        <value caption="3/4x BIAS current" name="3_4X" value="0x1"/>
+        <value caption="1/2x BIAS current" name="1_2X" value="0x2"/>
+        <value caption="1/4x BIAS current" name="1_4X" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="bor_lvd_ctrl_avr_v1" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="cla_ccl_v1" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control 0" initval="0x00" name="INTCTRL0" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Interrupt Mode for LUT0" mask="0x3" name="INTMODE0" rw="RW" values="CCL_INTMODE0"/>
+          <bitfield caption="Interrupt Mode for LUT1" mask="0xc" name="INTMODE1" rw="RW" values="CCL_INTMODE1"/>
+          <bitfield caption="Interrupt Mode for LUT2" mask="0x30" name="INTMODE2" rw="RW" values="CCL_INTMODE2"/>
+          <bitfield caption="Interrupt Mode for LUT3" mask="0xc0" name="INTMODE3" rw="RW" values="CCL_INTMODE3"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Interrupt Flag 0" mask="0x1" name="INT0" rw="RW"/>
+          <bitfield caption="Interrupt Flag 1" mask="0x2" name="INT1" rw="RW"/>
+          <bitfield caption="Interrupt Flag 2" mask="0x4" name="INT2" rw="RW"/>
+          <bitfield caption="Interrupt Flag 3" mask="0x8" name="INT3" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 2 A" initval="0x00" name="LUT2CTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 2 B" initval="0x00" name="LUT2CTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 2 C" initval="0x00" name="LUT2CTRLC" offset="0x12" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 3 A" initval="0x00" name="LUT3CTRLA" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0xe" name="CLKSRC" rw="RW" values="CCL_CLKSRC"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x40" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 3 B" initval="0x00" name="LUT3CTRLB" offset="0x15" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 3 C" initval="0x00" name="LUT3CTRLC" offset="0x16" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL0" rw="RW" values="CCL_SEQSEL0"/>
+        </register>
+        <register caption="Sequential Control 1" initval="0x00" name="SEQCTRL1" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL1" rw="RW" values="CCL_SEQSEL1"/>
+        </register>
+        <register caption="Truth 0" initval="0x00" name="TRUTH0" offset="0x0B" rw="RW" size="1"/>
+        <register caption="Truth 1" initval="0x00" name="TRUTH1" offset="0x0F" rw="RW" size="1"/>
+        <register caption="Truth 2" initval="0x00" name="TRUTH2" offset="0x13" rw="RW" size="1"/>
+        <register caption="Truth 3" initval="0x00" name="TRUTH3" offset="0x17" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Interrupt Mode for LUT0 select" name="CCL_INTMODE0">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT1 select" name="CCL_INTMODE1">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT2 select" name="CCL_INTMODE2">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Interrupt Mode for LUT3 select" name="CCL_INTMODE3">
+        <value caption="Interrupt disabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense rising edge" name="RISING" value="0x1"/>
+        <value caption="Sense falling edge" name="FALLING" value="0x2"/>
+        <value caption="Sense both edges" name="BOTH" value="0x3"/>
+      </value-group>
+      <value-group caption="Clock Source Selection select" name="CCL_CLKSRC">
+        <value caption="CLK_PER is clocking the LUT" name="CLKPER" value="0x0"/>
+        <value caption="IN[2] is clocking the LUT" name="IN2" value="0x1"/>
+        <value caption="20MHz oscillator before prescaler is clocking the LUT" name="OSC20M" value="0x4"/>
+        <value caption="32kHz oscillator is clocking the LUT" name="OSCULP32K" value="0x5"/>
+        <value caption="32kHz oscillator after DIV32 is clocking the LUT" name="OSCULP1K" value="0x6"/>
+      </value-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x08"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x0A"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x0C"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="USART1 TXD input source" name="USART1" value="0x08"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x0A"/>
+        <value caption="TCB1 WO input source" name="TCB1" value="0x0C"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source A" name="EVENTA" value="0x03"/>
+        <value caption="Event input source B" name="EVENTB" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="SPI0 SCK input source" name="SPI0" value="0x09"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x0A"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL0">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL1">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="chip" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x11" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x7f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1k cycles" name="1K" value="0x00"/>
+        <value caption="16k cycles" name="16K" value="0x01"/>
+        <value caption="32k cycles" name="32K" value="0x02"/>
+        <value caption="64k cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="cpu_avr_v2" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="int_8bit_v3" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="math_pdi_crc_avr_v1" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="ev_ctrl_v1" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Multiplexer Channel 0" initval="0x00" name="CHANNEL0" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Channel 0 generator select" mask="0xff" name="CHANNEL0" rw="RW" values="EVSYS_CHANNEL0"/>
+        </register>
+        <register caption="Multiplexer Channel 1" initval="0x00" name="CHANNEL1" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Channel 1 generator select" mask="0xff" name="CHANNEL1" rw="RW" values="EVSYS_CHANNEL1"/>
+        </register>
+        <register caption="Multiplexer Channel 2" initval="0x00" name="CHANNEL2" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Channel 2 generator select" mask="0xff" name="CHANNEL2" rw="RW" values="EVSYS_CHANNEL2"/>
+        </register>
+        <register caption="Multiplexer Channel 3" initval="0x00" name="CHANNEL3" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Channel 3 generator select" mask="0xff" name="CHANNEL3" rw="RW" values="EVSYS_CHANNEL3"/>
+        </register>
+        <register caption="Multiplexer Channel 4" initval="0x00" name="CHANNEL4" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Channel 4 generator select" mask="0xff" name="CHANNEL4" rw="RW" values="EVSYS_CHANNEL4"/>
+        </register>
+        <register caption="Multiplexer Channel 5" initval="0x00" name="CHANNEL5" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Channel 5 generator select" mask="0xff" name="CHANNEL5" rw="RW" values="EVSYS_CHANNEL5"/>
+        </register>
+        <register caption="Software Event A" initval="0x00" name="SWEVENTA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Software event on channel" mask="0xff" name="SWEVENTA" rw="W" values="EVSYS_SWEVENTA"/>
+        </register>
+        <register caption="User ADC0" initval="0x00" name="USERADC0START" offset="0x28" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT0 Event A" initval="0x00" name="USERCCLLUT0A" offset="0x20" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT0 Event B" initval="0x00" name="USERCCLLUT0B" offset="0x21" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT1 Event A" initval="0x00" name="USERCCLLUT1A" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT1 Event B" initval="0x00" name="USERCCLLUT1B" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT2 Event A" initval="0x00" name="USERCCLLUT2A" offset="0x24" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT2 Event B" initval="0x00" name="USERCCLLUT2B" offset="0x25" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT3 Event A" initval="0x00" name="USERCCLLUT3A" offset="0x26" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User CCL LUT3 Event B" initval="0x00" name="USERCCLLUT3B" offset="0x27" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port A" initval="0x00" name="USEREVSYSEVOUTA" offset="0x29" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port B" initval="0x00" name="USEREVSYSEVOUTB" offset="0x2A" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User EVOUT Port C" initval="0x00" name="USEREVSYSEVOUTC" offset="0x2B" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCA0 count event" initval="0x00" name="USERTCA0CNTA" offset="0x2E" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCA0 Restart event" initval="0x00" name="USERTCA0CNTB" offset="0x2F" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB0 Event in A" initval="0x00" name="USERTCB0CAPT" offset="0x30" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB0 Event in B" initval="0x00" name="USERTCB0COUNT" offset="0x31" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB1 Event in A" initval="0x00" name="USERTCB1CAPT" offset="0x32" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User TCB1 Event in B" initval="0x00" name="USERTCB1COUNT" offset="0x33" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User USART0" initval="0x00" name="USERUSART0IRDA" offset="0x2C" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+        <register caption="User USART1" initval="0x00" name="USERUSART1IRDA" offset="0x2D" rw="RW" size="1">
+          <bitfield caption="Channel selector" mask="0xff" name="USER" rw="RW" values="EVSYS_USER"/>
+        </register>
+      </register-group>
+      <value-group caption="Channel 0 generator select select" name="EVSYS_CHANNEL0">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x40"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x41"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x42"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x43"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x44"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x45"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x46"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x47"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x49"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x4A"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x4B"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x4C"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x4D"/>
+        <value caption="Port B Pin 6" name="PORTB_PIN6" value="0x4E"/>
+        <value caption="Port B Pin 7" name="PORTB_PIN7" value="0x4F"/>
+      </value-group>
+      <value-group caption="Channel 1 generator select select" name="EVSYS_CHANNEL1">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x40"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x41"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x42"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x43"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x44"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x45"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x46"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x47"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x48"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x49"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x4A"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x4B"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x4C"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x4D"/>
+        <value caption="Port B Pin 6" name="PORTB_PIN6" value="0x4E"/>
+        <value caption="Port B Pin 7" name="PORTB_PIN7" value="0x4F"/>
+      </value-group>
+      <value-group caption="Channel 2 generator select select" name="EVSYS_CHANNEL2">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x48"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x49"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x4A"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x4B"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x4C"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x4D"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x4E"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x4F"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x40"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x41"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x42"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x43"/>
+        <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
+        <value caption="Port C Pin 5" name="PORTC_PIN5" value="0x45"/>
+      </value-group>
+      <value-group caption="Channel 3 generator select select" name="EVSYS_CHANNEL3">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port A Pin 0" name="PORTA_PIN0" value="0x48"/>
+        <value caption="Port A Pin 1" name="PORTA_PIN1" value="0x49"/>
+        <value caption="Port A Pin 2" name="PORTA_PIN2" value="0x4A"/>
+        <value caption="Port A Pin 3" name="PORTA_PIN3" value="0x4B"/>
+        <value caption="Port A Pin 4" name="PORTA_PIN4" value="0x4C"/>
+        <value caption="Port A Pin 5" name="PORTA_PIN5" value="0x4D"/>
+        <value caption="Port A Pin 6" name="PORTA_PIN6" value="0x4E"/>
+        <value caption="Port A Pin 7" name="PORTA_PIN7" value="0x4F"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x40"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x41"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x42"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x43"/>
+        <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x44"/>
+        <value caption="Port C Pin 5" name="PORTC_PIN5" value="0x45"/>
+      </value-group>
+      <value-group caption="Channel 4 generator select select" name="EVSYS_CHANNEL4">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV8192" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV4096" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV2048" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV1024" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x40"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x41"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x42"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x43"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x44"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x45"/>
+        <value caption="Port B Pin 6" name="PORTB_PIN6" value="0x46"/>
+        <value caption="Port B Pin 7" name="PORTB_PIN7" value="0x47"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x48"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x49"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x4A"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x4B"/>
+        <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x4C"/>
+        <value caption="Port C Pin 5" name="PORTC_PIN5" value="0x4D"/>
+      </value-group>
+      <value-group caption="Channel 5 generator select select" name="EVSYS_CHANNEL5">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Unified Program and Debug Interface" name="UPDI" value="0x1"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x6"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x7"/>
+        <value caption="Periodic Interrupt Timer output 0" name="RTC_PIT_DIV512" value="0x8"/>
+        <value caption="Periodic Interrupt Timer output 1" name="RTC_PIT_DIV256" value="0x9"/>
+        <value caption="Periodic Interrupt Timer output 2" name="RTC_PIT_DIV128" value="0xA"/>
+        <value caption="Periodic Interrupt Timer output 3" name="RTC_PIT_DIV64" value="0xB"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x10"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x11"/>
+        <value caption="Configurable Custom Logic LUT2" name="CCL_LUT2" value="0x12"/>
+        <value caption="Configurable Custom Logic LUT3" name="CCL_LUT3" value="0x13"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x20"/>
+        <value caption="ADC 0 Result ready event" name="ADC0_RES" value="0x24"/>
+        <value caption="ADC 0 Sample ready event" name="ADC0_SAMP" value="0x25"/>
+        <value caption="ADC 0 Window compare match event" name="ADC0_WCMP" value="0x26"/>
+        <value caption="Port B Pin 0" name="PORTB_PIN0" value="0x40"/>
+        <value caption="Port B Pin 1" name="PORTB_PIN1" value="0x41"/>
+        <value caption="Port B Pin 2" name="PORTB_PIN2" value="0x42"/>
+        <value caption="Port B Pin 3" name="PORTB_PIN3" value="0x43"/>
+        <value caption="USART 0 XCK" name="USART0_XCK" value="0x60"/>
+        <value caption="USART 1 XCK" name="USART1_XCK" value="0x61"/>
+        <value caption="SPI 0 Sclock" name="SPI0_SCK" value="0x68"/>
+        <value caption="Timer/Counter A0 overflow / low byte underflow" name="TCA0_OVF_LUNF" value="0x80"/>
+        <value caption="Timer/Counter A0 high byte underflow" name="TCA0_HUNF" value="0x81"/>
+        <value caption="Timer/Counter A0 compare 0 / low byte timer compare 0" name="TCA0_CMP0_LCMP0" value="0x84"/>
+        <value caption="Timer/Counter A0 compare 1 / low byte timer compare 1" name="TCA0_CMP1_LCMP1" value="0x85"/>
+        <value caption="Timer/Counter A0 compare 2 / low byte timer compare 2" name="TCA0_CMP2_LCMP2" value="0x86"/>
+        <value caption="Timer/Counter B0 capture" name="TCB0_CAPT" value="0xA0"/>
+        <value caption="Timer/Counter B0 overflow" name="TCB0_OVF" value="0xA1"/>
+        <value caption="Timer/Counter B1 capture" name="TCB1_CAPT" value="0xA2"/>
+        <value caption="Timer/Counter B1 overflow" name="TCB1_OVF" value="0xA3"/>
+        <value caption="Port B Pin 4" name="PORTB_PIN4" value="0x44"/>
+        <value caption="Port B Pin 5" name="PORTB_PIN5" value="0x45"/>
+        <value caption="Port B Pin 6" name="PORTB_PIN6" value="0x46"/>
+        <value caption="Port B Pin 7" name="PORTB_PIN7" value="0x47"/>
+        <value caption="Port C Pin 0" name="PORTC_PIN0" value="0x48"/>
+        <value caption="Port C Pin 1" name="PORTC_PIN1" value="0x49"/>
+        <value caption="Port C Pin 2" name="PORTC_PIN2" value="0x4A"/>
+        <value caption="Port C Pin 3" name="PORTC_PIN3" value="0x4B"/>
+        <value caption="Port C Pin 4" name="PORTC_PIN4" value="0x4C"/>
+        <value caption="Port C Pin 5" name="PORTC_PIN5" value="0x4D"/>
+      </value-group>
+      <value-group caption="Software event on channel select" name="EVSYS_SWEVENTA">
+        <value caption="Software event on channel 0" name="CH0" value="0x01"/>
+        <value caption="Software event on channel 1" name="CH1" value="0x02"/>
+        <value caption="Software event on channel 2" name="CH2" value="0x04"/>
+        <value caption="Software event on channel 3" name="CH3" value="0x08"/>
+        <value caption="Software event on channel 4" name="CH4" value="0x10"/>
+        <value caption="Software event on channel 5" name="CH5" value="0x20"/>
+      </value-group>
+      <value-group caption="Channel selector select" name="EVSYS_USER">
+        <value caption="Off" name="OFF" value="0x0"/>
+        <value caption="Connect user to event channel 0" name="CHANNEL0" value="0x1"/>
+        <value caption="Connect user to event channel 1" name="CHANNEL1" value="0x2"/>
+        <value caption="Connect user to event channel 2" name="CHANNEL2" value="0x3"/>
+        <value caption="Connect user to event channel 3" name="CHANNEL3" value="0x4"/>
+        <value caption="Connect user to event channel 4" name="CHANNEL4" value="0x5"/>
+        <value caption="Connect user to event channel 5" name="CHANNEL5" value="0x6"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="chip" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+        <value caption="PDI on PDI pad, reset on alternative reset pad" name="PDIRST" value="0x3"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose I/O Register" id="chip" name="GPIO">
+      <register-group caption="General Purpose I/O Register" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="chip" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x2">
+        <register caption="Lock Bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="BIST in the NVMCTRL module" id="nvm_ctrl_avr_v2" name="NVMBIST">
+      <register-group caption="BIST in the NVMCTRL module" name="NVMBIST" size="0x10">
+        <register caption="Address pattern" initval="0x00" name="ADDRPAT" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Address mode" mask="0x70" name="AMODE" rw="RW" values="NVMBIST_AMODE"/>
+          <bitfield caption="X address mode" mask="0x3" name="XMODE" rw="RW" values="NVMBIST_XMODE"/>
+          <bitfield caption="Y address mode" mask="0xc" name="YMODE" rw="RW" values="NVMBIST_YMODE"/>
+        </register>
+        <register caption="" initval="0x0000" name="CNT" offset="0x4" rw="RW" size="2">
+          <bitfield caption="Faults counter" mask="0x7ff" name="CNT" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="W" values="NVMBIST_CMD"/>
+          <bitfield caption="Stop at fault" mask="0x8" name="SAF" rw="RW"/>
+        </register>
+        <register caption="Data pattern" initval="0x00" name="DATAPAT" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data check pattern" mask="0x3" name="PATTERN" rw="RW" values="NVMBIST_PATTERN"/>
+        </register>
+        <register caption="" initval="0x00000000" name="END" offset="0x6" rw="RW" size="4">
+          <bitfield caption="" mask="0xffffff" name="END" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x3" rw="R" size="1">
+          <bitfield caption="FSM State" mask="0xf" name="STATE" rw="R" values="NVMBIST_STATE"/>
+        </register>
+      </register-group>
+      <value-group caption="Address mode select" name="NVMBIST_AMODE">
+        <value caption="No special address pattern" name="NORMAL" value="0x0"/>
+        <value caption="Post complement address" name="COMPLEMENT" value="0x4"/>
+      </value-group>
+      <value-group caption="X address mode select" name="NVMBIST_XMODE">
+        <value caption="X static" name="STATIC" value="0x0"/>
+        <value caption="Carry/borrow from Y" name="CARRY" value="0x1"/>
+        <value caption="X increment each cycle" name="INC" value="0x2"/>
+        <value caption="X decrement each cycle" name="DEC" value="0x3"/>
+      </value-group>
+      <value-group caption="Y address mode select" name="NVMBIST_YMODE">
+        <value caption="Y static" name="STATIC" value="0x0"/>
+        <value caption="Carry/borrow from X" name="CARRY" value="0x1"/>
+        <value caption="Y increment each cycle" name="INC" value="0x2"/>
+        <value caption="Y decrement each cycle" name="DEC" value="0x3"/>
+      </value-group>
+      <value-group caption="Command select" name="NVMBIST_CMD">
+        <value caption="No effect" name="NOCMD" value="0x0"/>
+        <value caption="Start BIST testing" name="START" value="0x1"/>
+        <value caption="Re-start BIST testing" name="RESTART" value="0x2"/>
+        <value caption="Stop BIST and go to BREAK state" name="BREAK" value="0x3"/>
+      </value-group>
+      <value-group caption="Data check pattern select" name="NVMBIST_PATTERN">
+        <value caption="All flash programmed" name="ZEROES" value="0x0"/>
+        <value caption="Physical checkerboard in flash" name="CHECK" value="0x1"/>
+        <value caption="Inverse physical checkerboard in flash" name="INVCHECK" value="0x2"/>
+        <value caption="All flash unprogrammed" name="ONES" value="0x3"/>
+      </value-group>
+      <value-group caption="FSM State select" name="NVMBIST_STATE">
+        <value caption="Reset state" name="IDLE" value="0x0"/>
+        <value caption="Break command used" name="BREAK" value="0x1"/>
+        <value caption="Test failed, data from last address" name="FAILED0" value="0x4"/>
+        <value caption="Test failed, data from address-1" name="FAILED1" value="0x5"/>
+        <value caption="Test failed, data from address-2" name="FAILED2" value="0x6"/>
+        <value caption="Test success" name="SUCCESS" value="0x7"/>
+        <value caption="Startup, fetching first data" name="START0" value="0x8"/>
+        <value caption="Startup, fetching second data" name="START1" value="0x9"/>
+        <value caption="Re-start from BREAK or FAILED2" name="RESTART0" value="0xA"/>
+        <value caption="Re-start from FAILED1" name="RESTART1" value="0xB"/>
+        <value caption="Test running" name="RUNNING" value="0xC"/>
+        <value caption="Check last word" name="FINISH0" value="0xE"/>
+        <value caption="Count faults in last word" name="FINISH1" value="0xF"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="nvm_ctrl_avr_v2" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="gpio_ports_avr_v1" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Port Control" initval="0x00" name="PORTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Slew Rate Limit Enable" mask="0x1" name="SRL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="chip" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer CCL" initval="0x00" name="CCLROUTEA" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CCL LUT0" mask="0x1" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="CCL LUT1" mask="0x2" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+          <bitfield caption="CCL LUT2" mask="0x4" name="LUT2" rw="RW" values="PORTMUX_LUT2"/>
+          <bitfield caption="CCL LUT3" mask="0x8" name="LUT3" rw="RW" values="PORTMUX_LUT3"/>
+        </register>
+        <register caption="Port Multiplexer EVSYS" initval="0x00" name="EVSYSROUTEA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output A" mask="0x1" name="EVOUTA" rw="RW" values="PORTMUX_EVOUTA"/>
+          <bitfield caption="Event Output B" mask="0x2" name="EVOUTB" rw="RW" values="PORTMUX_EVOUTB"/>
+          <bitfield caption="Event Output C" mask="0x4" name="EVOUTC" rw="RW" values="PORTMUX_EVOUTC"/>
+        </register>
+        <register caption="Port Multiplexer TWI and SPI" initval="0x00" name="SPIROUTEA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x3" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+        </register>
+        <register caption="Port Multiplexer TCA" initval="0x00" name="TCAROUTEA" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer TCB" initval="0x00" name="TCBROUTEA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+        <register caption="Port Multiplexer USART register A" initval="0x00" name="USARTROUTEA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer USART0" mask="0x3" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+          <bitfield caption="Port Multiplexer USART1" mask="0xc" name="USART1" rw="RW" values="PORTMUX_USART1"/>
+        </register>
+      </register-group>
+      <value-group caption="CCL LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Out: PA4 In: PA0, PA1, PA2" name="DEFAULT" value="0x0"/>
+        <value caption="Out: PB4 In: PA0, PA1, PA2" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="CCL LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Out: PA7 In: PC3, PC4, PC5" name="DEFAULT" value="0x0"/>
+        <value caption="Out: PC1 In: PC3, PC4, PC5" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="CCL LUT2 select" name="PORTMUX_LUT2">
+        <value caption="Out: PB3 In: PB0, PB1, PB2" name="DEFAULT" value="0x0"/>
+        <value caption="Out: PB6 In: PB0, PB1, PB2" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="CCL LUT3 select" name="PORTMUX_LUT3">
+        <value caption="Out: PC4 In: PC0, PC1, PC2" name="DEFAULT" value="0x0"/>
+        <value caption="Out: PA5 In: PC0, PC1, PC2" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output A select" name="PORTMUX_EVOUTA">
+        <value caption="EVOUT on PA2" name="DEFAULT" value="0x0"/>
+        <value caption="EVOUT on PA7" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output B select" name="PORTMUX_EVOUTB">
+        <value caption="EVOUT on PB2" name="DEFAULT" value="0x0"/>
+        <value caption="EVOUT on PB7" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Output C select" name="PORTMUX_EVOUTC">
+        <value caption="EVOUT on PC2" name="DEFAULT" value="0x0"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="PA0, PA1, PA2, PA3" name="DEFAULT" value="0x0"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+        <value caption="PC2, PC1, PC0, PC3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="WO0 on PB0" name="DEFAULT" value="0x0"/>
+        <value caption="WO0 on PB3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="WO1 on PB1" name="DEFAULT" value="0x0"/>
+        <value caption="WO1 on PB4" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="WO2 on PB2" name="DEFAULT" value="0x0"/>
+        <value caption="WO2 on PB5" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="WO3 on PA3" name="DEFAULT" value="0x0"/>
+        <value caption="WO3 on PC3" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="WO4 on PA4" name="DEFAULT" value="0x0"/>
+        <value caption="WO4 on PC4" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="WO5 on PA5" name="DEFAULT" value="0x0"/>
+        <value caption="WO5 on PC5" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="WO on PA5" name="DEFAULT" value="0x0"/>
+        <value caption="WO on PC0" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="WO on PA3" name="DEFAULT" value="0x0"/>
+        <value caption="WO on PC4" name="ALT1" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="USART0 on PB[3:0]" name="DEFAULT" value="0x0"/>
+        <value caption="USART0 on PA[4:1]" name="ALT1" value="0x1"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART1 select" name="PORTMUX_USART1">
+        <value caption="USART1 on PA[4:1]" name="DEFAULT" value="0x0"/>
+        <value caption="Not connected to any pins" name="NONE" value="0x3"/>
+        <value caption="USART1 on PC[3:0]" name="ALT1" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="rst_integration_avr_v1" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="tmr_16b_rtc_v1" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Error Correction Value" mask="0x7f" name="ERROR" rw="RW"/>
+          <bitfield caption="Error Correction Sign Bit" mask="0x80" name="SIGN" rw="RW"/>
+        </register>
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Correction enable" mask="0x4" name="CORREN" rw="RW"/>
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" initval="0xFFFF" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x0"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x1"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x2"/>
+        <value caption="External Clock" name="EXTCLK" value="0x3"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="chip" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="CRC Checksum Byte 1" name="CHECKSUM1" offset="0x2F" rw="R" size="1"/>
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 16 MHz Byte 0" name="OSCCAL16M0" offset="0x18" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 16 MHz Byte 1" name="OSCCAL16M1" offset="0x19" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 20 MHz Byte 0" name="OSCCAL20M0" offset="0x1A" rw="R" size="1"/>
+        <register caption="Oscillator Calibration 20 MHz Byte 1" name="OSCCAL20M1" offset="0x1B" rw="R" size="1"/>
+        <register caption="Oscillator Calibration for 32kHz ULP" name="OSCCAL32K" offset="0x14" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="clk_sleep_ctrl_avr_v1" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="spi_8bit_v2" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Mode Wait for Receive" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="chip" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="OCD Message Register" name="OCDM" offset="0x18" rw="RW" size="1"/>
+        <register caption="OCD Message Status" initval="0x00" name="OCDMS" offset="0x19" rw="RW" size="1">
+          <bitfield caption="OCD Message Read" mask="0x1" name="OCDMR" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="tmr_16b_pwm_v1" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input A" mask="0x1" name="CNTAEI" rw="RW"/>
+          <bitfield caption="Count on Event Input B" mask="0x10" name="CNTBEI" rw="RW"/>
+          <bitfield caption="Event Action A" mask="0xe" name="EVACTA" rw="RW" values="TCA_SINGLE_EVACTA"/>
+          <bitfield caption="Event Action B" mask="0xe0" name="EVACTB" rw="RW" values="TCA_SINGLE_EVACTB"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+          <bitfield caption="Command Enable" mask="0x3" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+          <bitfield caption="Command Enable" mask="0x3" name="CMDEN" rw="RW" values="TCA_SPLIT_CMDEN"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action A select" name="TCA_SINGLE_EVACTA">
+        <value caption="Count on positive edge event" name="CNT_POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="CNT_ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="CNT_HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Event Action B select" name="TCA_SINGLE_EVACTB">
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+        <value caption="Restart counter at positive edge event" name="RESTART_POSEDGE" value="0x04"/>
+        <value caption="Restart counter on any edge event" name="RESTART_ANYEDGE" value="0x05"/>
+        <value caption="Restart counter while event line is 1." name="RESTART_HIGHLVL" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Command Enable select" name="TCA_SPLIT_CMDEN">
+        <value caption="None" name="NONE" value="0x0"/>
+        <value caption="Both low byte and high byte counter" name="BOTH" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="tmr_16b_capture_v1" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Cascade two timers" mask="0x20" name="CASCADE" rw="RW"/>
+          <bitfield caption="Clock Select" mask="0xe" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+          <bitfield caption="Overflow" mask="0x2" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+          <bitfield caption="Overflow" mask="0x2" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER" name="DIV1" value="0x00"/>
+        <value caption="CLK_PER/2" name="DIV2" value="0x01"/>
+        <value caption="Use CLK_TCA from TCA0" name="TCA0" value="0x02"/>
+        <value caption="Count on event edge" name="EVENT" value="0x07"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="i2c_8bit_avr_v1" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Fast-mode Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baud Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Permissive Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="uart_autobd_v4" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x1" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Auto Baud Window" mask="0xc0" name="ABW" rw="RW" values="USART_ABW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="RW"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="DISABLE" value="0x0"/>
+        <value caption="RS485 Mode enabled" name="ENABLE" value="0x1"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Auto Baud Window select" name="USART_ABW">
+        <value caption="18% tolerance" name="WDW0" value="0x0"/>
+        <value caption="15% tolerance" name="WDW1" value="0x1"/>
+        <value caption="21% tolerance" name="WDW2" value="0x2"/>
+        <value caption="25% tolerance" name="WDW3" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="chip" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="gpio_ports_avr_v1" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="chip" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="AC0 reference select" mask="0x7" name="AC0REFSEL" rw="RW" values="VREF_AC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="AC0 DACREF reference enable" mask="0x1" name="AC0REFEN" rw="RW"/>
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="NVM reference enable" mask="0x4" name="NVMREFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="AC0 reference select select" name="VREF_AC0REFSEL">
+        <value caption="Voltage reference at 1.024V" name="1V024" value="0x00"/>
+        <value caption="Voltage reference at 2.048V" name="2V048" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.096V" name="4V096" value="0x03"/>
+        <value caption="voltage reference at supply" name="AVDD" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="wdt_windowed_avr_v1" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND1" position="3"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1634.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1634.xml
new file mode 100644
index 00000000..2dec501f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY1634.xml
@@ -0,0 +1,884 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny1634" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+          <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+      </address-spaces>
+      <peripherals>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTC" caption="I/O Port">
+            <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART0" caption="USART">
+            <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
+          </instance>
+          <instance name="USART1" caption="USART">
+            <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+        <interrupt index="5" name="WDT" caption="Watchdog Time-out Interrupt"/>
+        <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="10" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPA" caption="TimerCounter0 Compare Match A"/>
+        <interrupt index="11" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_COMPB" caption="TimerCounter0 Compare Match B"/>
+        <interrupt index="12" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+        <interrupt index="12" name="TIM0_OVF" caption="Timer/Couner0 Overflow"/>
+        <interrupt index="13" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="14" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="ADC_READY" caption="ADC Conversion Complete"/>
+        <interrupt index="15" name="USART0_START" caption="USART0, Start"/>
+        <interrupt index="15" name="USART0_RXS" caption="USART0, Start"/>
+        <interrupt index="16" name="USART0_RX" caption="USART0, Rx Complete"/>
+        <interrupt index="16" name="USART0_RXC" caption="USART0, Rx Complete"/>
+        <interrupt index="17" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+        <interrupt index="17" name="USART0_DRE" caption="USART0 Data Register Empty"/>
+        <interrupt index="18" name="USART0_TX" caption="USART0, Tx Complete"/>
+        <interrupt index="18" name="USART0_TXC" caption="USART0, Tx Complete"/>
+        <interrupt index="19" name="USART1_START" caption="USART1, Start"/>
+        <interrupt index="19" name="USART1_RXS" caption="USART1, Start"/>
+        <interrupt index="20" name="USART1_RX" caption="USART1, Rx Complete"/>
+        <interrupt index="20" name="USART1_RXC" caption="USART1, Rx Complete"/>
+        <interrupt index="21" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+        <interrupt index="21" name="USART1_DRE" caption="USART1 Data Register Empty"/>
+        <interrupt index="22" name="USART1_TX" caption="USART1, Tx Complete"/>
+        <interrupt index="22" name="USART1_TXC" caption="USART1, Tx Complete"/>
+        <interrupt index="23" name="USI_START" caption="USI Start Condition"/>
+        <interrupt index="23" name="USI_STR" caption="USI Start Condition"/>
+        <interrupt index="24" name="USI_OVERFLOW" caption="USI Overflow"/>
+        <interrupt index="24" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="25" name="TWI_SLAVE" caption="Two-wire Serial Interface"/>
+        <interrupt index="25" name="TWI" caption="Two-wire Serial Interface"/>
+        <interrupt index="26" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="27" name="QTRIP" caption="Touch Sensing"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x12"/>
+          <property name="JTAGID" value="0x9412"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x2e"/>
+          <property name="PROGBASE" value="0x0000"/>
+          <property name="BUFFERS_PER_FLASH_PAGE" value="4"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x09"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x09"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+          <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PC2 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTC2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x1F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+        <value caption="Int. ULP Osc. 32 kHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+        <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+        <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+        <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODMODE">
+        <value caption="Sampled" name="BOD_SAMPLED" value="0x01"/>
+        <value caption="Enabled" name="BOD_ENABLED" value="0x02"/>
+        <value caption="Disabled" name="BOD_DISABLED" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0x7F" size="1">
+          <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+          <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+          <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+          <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+          <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+          <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+          <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+        </register>
+        <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0x7E" size="1">
+          <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+          <bitfield caption="" mask="0x03" name="TWCMD"/>
+        </register>
+        <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0x7D" size="1">
+          <bitfield caption="TWI Data Interrupt Flag" mask="0x80" name="TWDIF"/>
+          <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+          <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+          <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+          <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+          <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+          <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+          <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+        </register>
+        <register caption="TWI Slave Address Register" name="TWSA" offset="0x7C" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave address bit" mask="0xFF" name="TWSA"/>
+        </register>
+        <register caption="TWI Slave Data Register" name="TWSD" offset="0x7A" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+        </register>
+        <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0x7B" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x33" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x2E" size="1">
+          <bitfield caption="Pull-up Enable Control bit" name="PUEB" mask="0x0F"/>
+        </register>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x2C" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x2B" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x2D" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTC">
+        <register caption="Port Control Register" name="PORTCR" offset="0x33" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x04" name="BBMC"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEC" offset="0x2A" size="1">
+          <bitfield caption="Pull-up Enable Control bit" name="PUEC" mask="0x3F"/>
+        </register>
+        <register caption="Port C Data Register" name="PORTC" offset="0x29" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port C" name="DDRC" offset="0x28" size="1" mask="0x3F"/>
+        <register caption="Port C Input Pins" name="PINC" offset="0x27" size="1" mask="0x3F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x33" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x32" size="1">
+          <bitfield caption="Pull-up Enable Control bit" name="PUEA" mask="0xFF"/>
+        </register>
+        <register caption="Port A Data Register" name="PORTA" offset="0x31" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x30" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x2F" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x24" size="1">
+          <bitfield caption="Reference Selection Bit" mask="0xC0" name="REFS"/>
+          <bitfield caption="" mask="0x20" name="REFEN"/>
+          <bitfield caption="" mask="0x10" name="ADC0EN"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x23" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x20" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x22" size="1">
+          <bitfield caption="" mask="0x80" name="VDEN"/>
+          <bitfield caption="" mask="0x40" name="VDPD"/>
+          <bitfield caption="" mask="0x08" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0x62" size="1">
+          <bitfield caption="ADC11 Digital input Disable" mask="0x04" name="ADC11D"/>
+          <bitfield caption="ADC10 Digital input Disable" mask="0x02" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x01" name="ADC9D"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x61" size="1">
+          <bitfield caption="ADC8 Digital Input Disable" mask="0x08" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x04" name="ADC7D"/>
+          <bitfield caption="ADC6 Digital input Disable" mask="0x02" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x01" name="ADC5D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x60" size="1">
+          <bitfield caption="ADC4 Digital input Disable" mask="0x80" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x40" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x20" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x10" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital Input Disable" mask="0x08" name="ADC0D"/>
+          <bitfield caption="AIN1 Digital input Disable" mask="0x04" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital input Disable" mask="0x02" name="AIN0D"/>
+          <bitfield caption="AREF Digital input Disable" mask="0x01" name="AREFD"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x25" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="" mask="0x20" name="ACLP"/>
+          <bitfield caption="" mask="0x08" name="ACCE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="" mask="0x03" name="ACIRS"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x26" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x5A" size="1">
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x59" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x80" name="TOV1"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Input Capture Flag 1" mask="0x08" name="ICF1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x72" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x71" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x70" size="1" ocd-rw="R">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x6E" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x6C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x6A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x68" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x67" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x5A" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x59" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x3B" size="1">
+          <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x3A" size="1">
+          <bitfield caption="Force Output Compare B" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x67" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x49" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x3F" name="PCINT" lsb="12"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x48" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x47" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+        <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x38" name="PCIF"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5C" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x38" name="PCIE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x54" size="1">
+          <bitfield caption="Power Reduction TWI" mask="0x40" name="PRTWI"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x20" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x10" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x08" name="PRUSI"/>
+          <bitfield caption="Power Reduction USART1" mask="0x04" name="PRUSART1"/>
+          <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Configuration Change Protection" name="CCP" offset="0x4F" size="1" mask="0xFF"/>
+        <register caption="Oscillator Calibration Value" name="OSCCAL0" offset="0x63" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="" name="OSCCAL1" offset="0x66" size="1" mask="0x03" ocd-rw="R"/>
+        <register caption="" name="OSCTCAL0A" offset="0x64" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="" name="OSCTCAL0B" offset="0x65" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x53" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Clock Setting Register" name="CLKSR" offset="0x52" size="1">
+          <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
+          <bitfield caption="Clock Switch Trigger" mask="0x40" name="CSTR"/>
+          <bitfield caption="Clock Output (active low)" mask="0x20" name="CKOUT_IO"/>
+          <bitfield caption="Start-up Time" mask="0x10" name="SUT"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CKSEL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x56" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x60" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Sleep Enable" mask="0x10" name="SE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x55" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x36" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x4D" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x4B" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x4A" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART0">
+        <register caption="USART I/O Data Register" name="UDR0" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x45" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x44" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSR0D" offset="0x43" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE0"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS0"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE0"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0x41" size="2" mask="0x0FFF"/>
+      </register-group>
+      <register-group caption="USART" name="USART1">
+        <register caption="USART I/O Data Register" name="UDR1" offset="0x73" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x79" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x78" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x77" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSR1D" offset="0x76" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE1"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS1"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE1"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0x74" size="2" mask="0x0FFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="COMM_USART_MODE_2BIT">
+        <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+        <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x50" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS_32KHZ">
+        <value caption="Oscillator Cycles 512 (16 ms)" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 1K (32 ms)" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 2K (64 ms)" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 4K (0.125 s)" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 8K (0.25 s)" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 16K (0.5 s)" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 32K (1.0 s)" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 64K (2.0 s)" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 128K (4.0 s)" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 256K (8.0 s)" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY167.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY167.xml
new file mode 100644
index 00000000..2daac60e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY167.xml
@@ -0,0 +1,888 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny167" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
+          <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="LINUART">
+          <instance name="LINUART" caption="Local Interconnect Network">
+            <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="TC8_ASYNC">
+          <instance name="TC0" caption="Timer/Counter, 8-bit Async">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="CURRENT_SOURCE">
+          <instance name="CURRENT_SOURCE" caption="Current Source">
+            <register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00" address-space="data" caption="Current Source"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="5" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+        <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="10" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match 0A"/>
+        <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="LIN_TC" caption="LIN Transfer Complete"/>
+        <interrupt index="13" name="LIN_ERR" caption="LIN Error"/>
+        <interrupt index="14" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+        <interrupt index="15" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="16" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="17" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="18" name="USI_START" caption="USI Start Condition Detection"/>
+        <interrupt index="19" name="USI_OVF" caption="USI Counter Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9487"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x94"/>
+          <property name="SIGNATURE2" value="0x87"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x31"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always ON" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Local Interconnect Network" name="LINUART">
+      <register-group caption="Local Interconnect Network" name="LINUART">
+        <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+          <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+          <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+          <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+          <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+          <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+        </register>
+        <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+          <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+          <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+          <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+          <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+          <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+          <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+        </register>
+        <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+          <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+          <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+          <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+          <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+        </register>
+        <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+          <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+          <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+          <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+          <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+          <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+          <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+          <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+          <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+        </register>
+        <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+          <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+          <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+        </register>
+        <register caption="LIN Baud Rate Low Register" name="LINBRRL" offset="0xCD" size="1">
+          <bitfield caption="" mask="0xFF" name="LDIV"/>
+        </register>
+        <register caption="LIN Baud Rate High Register" name="LINBRRH" offset="0xCE" size="1">
+          <bitfield caption="" mask="0x0F" name="LDIV" lsb="8"/>
+        </register>
+        <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+          <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+          <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+        </register>
+        <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+          <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+          <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+        </register>
+        <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+          <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+          <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+        </register>
+        <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1" ocd-rw="">
+          <bitfield caption="" mask="0xFF" name="LDATA"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0xBC" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0xBB" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+      <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
+        <register caption="Timer/Counter0 Interrupt Mask register" name="TIMSK0" offset="0x6E" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
+          <bitfield caption="Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x45" size="1">
+          <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Waveform Genration Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x46" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x47" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+          <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+          <bitfield caption="Asynchronous Timer/Counter0" mask="0x20" name="AS0"/>
+          <bitfield caption="Timer/Counter0 Update Busy" mask="0x10" name="TCN0UB"/>
+          <bitfield caption="Output Compare Register 0A  Update Busy" mask="0x08" name="OCR0AUB"/>
+          <bitfield caption="Timer/Counter0 Control Register A Update Busy" mask="0x02" name="TCR0AUB"/>
+          <bitfield caption="Timer/Counter0 Control Register B Update Busy" mask="0x01" name="TCR0BUB"/>
+        </register>
+        <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Asynchronous 8-bit Timer/Counter0" mask="0x02" name="PSR0"/>
+          <bitfield caption="Prescaler Reset Synchronous 16-bit Timer/Counter1" mask="0x01" name="PSR1"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+          <bitfield caption="Timer/Counter1 Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Timer/Counter1 Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register D" name="TCCR1D" offset="0x83" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80" name="OC1BX"/>
+          <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40" name="OC1BW"/>
+          <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20" name="OC1BV"/>
+          <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10" name="OC1BU"/>
+          <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08" name="OC1AX"/>
+          <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04" name="OC1AW"/>
+          <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02" name="OC1AV"/>
+          <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01" name="OC1AU"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE_3BIT">
+        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF8"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER4"/>
+        </register>
+        <register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)" name="AMISCR" offset="0x77" size="1">
+          <bitfield caption="External Voltage Reference Input Enable" mask="0x04" name="AREFEN"/>
+          <bitfield caption="Internal Voltage Reference Output Enable" mask="0x02" name="XREFEN"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="" mask="0x40" name="ADC10D"/>
+          <bitfield caption="" mask="0x20" name="ADC9D"/>
+          <bitfield caption="" mask="0x10" name="ADC8D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+          <bitfield caption="" mask="0x80" name="ADC7D"/>
+          <bitfield caption="" mask="0x40" name="ADC6D"/>
+          <bitfield caption="" mask="0x20" name="ADC5D"/>
+          <bitfield caption="" mask="0x10" name="ADC4D"/>
+          <bitfield caption="" mask="0x08" name="ADC3D"/>
+          <bitfield caption="" mask="0x04" name="ADC2D"/>
+          <bitfield caption="" mask="0x02" name="ADC1D"/>
+          <bitfield caption="" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF8">
+        <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x00" value="0x00"/>
+        <value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x01" value="0x01"/>
+        <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x02" value="0x02"/>
+        <value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER4">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter1 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Current Source" name="CURRENT_SOURCE">
+      <register-group caption="Current Source" name="CURRENT_SOURCE">
+        <register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)" name="AMISCR" offset="0x77" size="1">
+          <bitfield caption="Current Source Enable" mask="0x01" name="ISRCEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator &amp; ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+          <bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30" name="ACIR"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Internal Reference Select" mask="0x40" name="ACIRS"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+          <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+        </register>
+        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+          <bitfield caption="Pin Change Interrupt Enable  on any PCINT14..8 pin" mask="0x03" name="PCIE"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+          <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+          <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+          <bitfield caption="Power Reduction LINUART" mask="0x20" name="PRLIN"/>
+          <bitfield caption="Power Reduction SPI" mask="0x10" name="PRSPI"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+          <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Clock Selection Register" name="CLKSELR" offset="0x63" size="1">
+          <bitfield caption="Clock Out - CKOUT fuse substitution" mask="0x40" name="COUT"/>
+          <bitfield caption="Clock Start-up Time bit 1 - SUT1 fuse substitution" mask="0x30" name="CSUT"/>
+          <bitfield caption="Clock Source Select bit 3 - CKSEL3 fuse substitution" mask="0x0F" name="CSEL"/>
+        </register>
+        <register caption="Clock Control &amp; Status Register" name="CLKCSR" offset="0x62" size="1">
+          <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
+          <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
+          <bitfield caption="Clock Control bits" mask="0x0F" name="CLKC" values="CPU_CLK_COMMAND_LIST_4_BITS"/>
+        </register>
+        <register caption="DebugWire data register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+        <register caption="Port Control Register" name="PORTCR" offset="0x32" size="1">
+          <bitfield caption="" mask="0x20" name="BBMB"/>
+          <bitfield caption="" mask="0x10" name="BBMA"/>
+          <bitfield caption="" mask="0x02" name="PUDB"/>
+          <bitfield caption="" mask="0x01" name="PUDA"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power-down" name="PDOWN" value="0x02"/>
+        <value caption="Power-save" name="PSAVE" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_COMMAND_LIST_4_BITS">
+        <value caption="No Command" name="VAL_0x00" value="0x00"/>
+        <value caption="Disable Clock Source" name="VAL_0x01" value="0x01"/>
+        <value caption="Enable Clock Source" name="VAL_0x02" value="0x02"/>
+        <value caption="Request for Clock Availability" name="VAL_0x03" value="0x03"/>
+        <value caption="Clock Source Switch" name="VAL_0x04" value="0x04"/>
+        <value caption="Recovery System Clock Source Code" name="VAL_0x05" value="0x05"/>
+        <value caption="Enable Watchdog in Automatic Reload Mode" name="VAL_0x06" value="0x06"/>
+        <value caption="CKOUT Command" name="VAL_0x07" value="0x07"/>
+        <value caption="From 0x08 up to 0x0F: No command" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY20.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY20.xml
new file mode 100644
index 00000000..2a66b1e6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY20.xml
@@ -0,0 +1,686 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny20-UUR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="WLCSP12" pinout="WLCSP"/>
+    <variant ordercode="ATtiny20-SSU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC14" pinout="DIP"/>
+    <variant ordercode="ATtiny20-XU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TSSOP14" pinout="DIP"/>
+    <variant ordercode="ATtiny20-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UFBGA15" pinout="UFBGA"/>
+    <variant ordercode="ATtiny20-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="VQFN20" pinout="VQFN"/>
+  </variants>
+  <devices>
+    <device name="ATtiny20" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4800" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x80" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="flash" start="0x4000" name="MAPPED_FLASH" size="0x0800"/>
+        </address-space>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" index="0" pad="PB0" function="default"/>
+              <signal group="P" index="1" pad="PB1" function="default"/>
+              <signal group="P" index="2" pad="PB2" function="default"/>
+              <signal group="P" index="3" pad="PB3" function="default"/>
+            </signals>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" index="0" pad="PA0" function="default"/>
+              <signal group="P" index="1" pad="PA1" function="default"/>
+              <signal group="P" index="2" pad="PA2" function="default"/>
+              <signal group="P" index="3" pad="PA3" function="default"/>
+              <signal group="P" index="4" pad="PA4" function="default"/>
+              <signal group="P" index="5" pad="PA5" function="default"/>
+              <signal group="P" index="6" pad="PA6" function="default"/>
+              <signal group="P" index="7" pad="PA7" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" pad="PA0" function="default"/>
+              <signal group="ADC" index="1" pad="PA1" function="default"/>
+              <signal group="ADC" index="2" pad="PA2" function="default"/>
+              <signal group="ADC" index="3" pad="PA3" function="default"/>
+              <signal group="ADC" index="4" pad="PA4" function="default"/>
+              <signal group="ADC" index="5" pad="PA5" function="default"/>
+              <signal group="ADC" index="6" pad="PA6" function="default"/>
+              <signal group="ADC" index="7" pad="PA7" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PA1" function="default"/>
+              <signal group="AIN" index="1" pad="PA2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PA0" function="default"/>
+              <signal group="PCINT" index="1" pad="PA1" function="default"/>
+              <signal group="PCINT" index="2" pad="PA2" function="default"/>
+              <signal group="PCINT" index="3" pad="PA3" function="default"/>
+              <signal group="PCINT" index="4" pad="PA4" function="default"/>
+              <signal group="PCINT" index="5" pad="PA5" function="default"/>
+              <signal group="PCINT" index="6" pad="PA6" function="default"/>
+              <signal group="PCINT" index="7" pad="PA7" function="default"/>
+              <signal group="PCINT" index="8" pad="PB0" function="default"/>
+              <signal group="PCINT" index="9" pad="PB1" function="default"/>
+              <signal group="PCINT" index="10" pad="PB2" function="default"/>
+              <signal group="PCINT" index="11" pad="PB3" function="default"/>
+              <signal group="INT" index="0" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal group="OCB" pad="PA7" function="default"/>
+              <signal group="OCA" pad="PB2" function="default"/>
+              <signal group="T" pad="PB0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+            <signals>
+              <signal group="SCL" pad="PA7" function="default"/>
+              <signal group="SDA" pad="PB1" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="OCA" pad="PB1" function="default"/>
+              <signal group="OCB" pad="PB2" function="default"/>
+              <signal group="ICP" pad="PA7" function="default"/>
+              <signal group="T" pad="PA7" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+            <signals>
+              <signal group="SS" pad="PA6" function="default"/>
+              <signal group="MOSI" pad="PB1" function="default"/>
+              <signal group="MISO" pad="PB2" function="default"/>
+              <signal group="SCK" pad="PA7" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Input Capture"/>
+        <interrupt index="6" name="TIM1_COMPA" caption=" Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption=" Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC_ADC" caption="Conversion Complete"/>
+        <interrupt index="14" name="TWI_SLAVE" caption="Two-Wire Interface"/>
+        <interrupt index="15" name="SPI" caption="Serial Peripheral Interface"/>
+        <interrupt index="16" name="QTRIP" caption="Touch Sensing"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0f"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Brown-out Detector trigger level" mask="0x70" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x08" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x07" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x05" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x04" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x06" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x08" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x03" size="1" mask="0xFF"/>
+        <register caption="Port A Data Register" name="PORTA" offset="0x02" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x01" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x00" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x10" size="1">
+          <bitfield caption="Reference Selection Bit" mask="0x40" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x12" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x0E" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x11" size="1">
+          <bitfield caption="" mask="0x08" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x0D" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="Vcc used as internal reference" name="VAL_0x00" value="0x00"/>
+        <value caption="Internal 1.1V Referemce" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="ADC_MUX">
+        <value caption="ADC0" name="ADC0" value="0x00"/>
+        <value caption="ADC1" name="ADC1" value="0x01"/>
+        <value caption="ADC2" name="ADC2" value="0x02"/>
+        <value caption="ADC3" name="ADC3" value="0x03"/>
+        <value caption="ADC4" name="ADC4" value="0x04"/>
+        <value caption="ADC5" name="ADC5" value="0x05"/>
+        <value caption="ADC6" name="ADC6" value="0x06"/>
+        <value caption="ADC7" name="ADC7" value="0x07"/>
+        <value caption="0V (AGND)" name="ADC_GND" value="0x08"/>
+        <value caption="1.1V Internal Reference" name="ADC_VBG" value="0x09"/>
+        <value caption="Temperature sensor" name="TEMPSENS" value="0x0A"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x13" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x14" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction TWI" mask="0x10" name="PRTWI"/>
+          <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x08" name="PRSPI"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x3A" size="1" mask="0xDF">
+          <bitfield caption="BOD Sleep" mask="0x10" name="BODS"/>
+          <bitfield caption="Sleep Mode" mask="0x0E" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC noise reduction" name="ADC" value="0x01"/>
+        <value caption="Power-down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+	      <register caption="MCU Control Register" name="MCUCR" offset="0x3A" size="1">
+		      <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x80" name="ISC01"/>
+		      <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x40" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+	      </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x0A" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x09" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+        <register caption="General Interrupt Flag Register" name="GIFR" offset="0x0B" size="1">
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x0C" size="1">
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any logical change on INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x19" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x18" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer Interrupt Mask Register" name="TIMSK" offset="0x26" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x80" name="ICIE1"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x09" name="TOIE"/>
+          <bitfield caption="Timer/Counter Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR" offset="0x25" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x80" name="ICF1"/>
+          <bitfield caption="Timer Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x09" name="TOV"/>
+          <bitfield caption="Output Compare Flag 0 B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Output Compare Flag 0 A" mask="0x02" name="OCF0A"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x27" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x17" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x16" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x15" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0x2D" size="1">
+          <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+          <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+          <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+          <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+          <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+          <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+          <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+        </register>
+        <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0x2C" size="1">
+          <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+          <bitfield caption="" mask="0x03" name="TWCMD"/>
+        </register>
+        <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0x2B" size="1" mask="0xFF">
+          <bitfield caption="TWI Data Interrupt Flag" mask="0x80" name="TWDIF"/>
+          <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+          <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+          <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+          <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+          <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+          <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+          <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+        </register>
+        <register caption="TWI Slave Address Register" name="TWSA" offset="0x2A" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave address bit" mask="0xFF" name="TWSA"/>
+        </register>
+        <register caption="TWI Slave Data Register" name="TWSD" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+        </register>
+        <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0x29" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x24" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x23" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x22" size="1">
+          <bitfield caption="Force Output Compare for channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1 " name="TCNT1" offset="0x20" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 1 Output Compare Register A " name="OCR1A" offset="0x1E" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B " name="OCR1B" offset="0x1C" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR1" offset="0x1A" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register" name="TIMSK" offset="0x26" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x80" name="ICIE1"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x09" name="TOIE"/>
+          <bitfield caption="Timer/Counter Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR" offset="0x25" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x80" name="ICF1"/>
+          <bitfield caption="Timer Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x09" name="TOV"/>
+          <bitfield caption="Output Compare Flag 0 B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Output Compare Flag 0 A" mask="0x02" name="OCF0A"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x27" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Control Register" name="SPCR" offset="0x30" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE"/>
+        </register>
+        <register caption="SPI Status Register" name="SPSR" offset="0x2F" size="1">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Data Register" name="SPDR" offset="0x2E" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE">
+        <value caption="fcl/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fcl/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fcl/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fcl/128" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="DIP">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PB0" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="PB2" position="5"/>
+      <pin pad="PA7" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA5" position="8"/>
+      <pin pad="PA4" position="9"/>
+      <pin pad="PA3" position="10"/>
+      <pin pad="PA2" position="11"/>
+      <pin pad="PA1" position="12"/>
+      <pin pad="PA0" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+    <pinout name="VQFN">
+      <pin pad="PA4" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA0" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PA7" position="15"/>
+      <pin pad="PA6" position="16"/>
+      <pin pad="PA5" position="17"/>
+    </pinout>
+    <pinout name="UFBGA">
+      <pin pad="PA4" position="B1"/>
+      <pin pad="PA3" position="C1"/>
+      <pin pad="PA0" position="D1"/>
+      <pin pad="PA5" position="A2"/>
+      <pin pad="PA7" position="B2"/>
+      <pin pad="PA2" position="C2"/>
+      <pin pad="GND" position="D2"/>
+      <pin pad="PA6" position="A3"/>
+      <pin pad="PB1" position="B3"/>
+      <pin pad="PA1" position="C3"/>
+      <pin pad="GND" position="D3"/>
+      <pin pad="PB2" position="A4"/>
+      <pin pad="PB3" position="B4"/>
+      <pin pad="PB0" position="C4"/>
+      <pin pad="VCC" position="D4"/>
+    </pinout>
+    <pinout name="WLCSP">
+      <pin pad="PA4" position="A1"/>
+      <pin pad="PA1" position="A3"/>
+      <pin pad="PA2" position="A5"/>
+      <pin pad="PA6" position="B2"/>
+      <pin pad="GND" position="B4"/>
+      <pin pad="VDD" position="B6"/>
+      <pin pad="PA5" position="C1"/>
+      <pin pad="PA7" position="C3"/>
+      <pin pad="PB1" position="C5"/>
+      <pin pad="PB2" position="D2"/>
+      <pin pad="PB3" position="D4"/>
+      <pin pad="PB0" position="D6"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY202.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY202.xml
new file mode 100644
index 00000000..049782b1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY202.xml
@@ -0,0 +1,2032 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny202-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny202-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny202">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" pad="PA3"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal function="CCL" group="LUT1_OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal function="SPI0" group="SCK" pad="PA3"/>
+              <signal function="SPI0" group="SS" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PA3"/>
+              <signal function="TCA0" group="WO" index="1" pad="PA1"/>
+              <signal function="TCA0" group="WO" index="2" pad="PA2"/>
+              <signal function="TCA0" group="WO" index="3" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal function="TCB0" group="WO" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal function="TWI0" group="SCL" pad="PA2"/>
+              <signal function="TWI0" group="SDA" pad="PA1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PA6"/>
+              <signal function="USART0" group="XCK" pad="PA3"/>
+              <signal function="USART0" group="XDIR" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x23"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC8">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA6" position="2"/>
+      <pin pad="PA7" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA2" position="5"/>
+      <pin pad="PA0" position="6"/>
+      <pin pad="PA3" position="7"/>
+      <pin pad="GND" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY204.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY204.xml
new file mode 100644
index 00000000..236d9dd8
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY204.xml
@@ -0,0 +1,2111 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny204-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny204-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny204">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x22"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY212.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY212.xml
new file mode 100644
index 00000000..cd2dd328
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY212.xml
@@ -0,0 +1,2344 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny212-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny212-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny212">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" pad="PA3"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal function="CCL" group="LUT1_OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal function="SPI0" group="SCK" pad="PA3"/>
+              <signal function="SPI0" group="SS" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PA3"/>
+              <signal function="TCA0" group="WO" index="1" pad="PA1"/>
+              <signal function="TCA0" group="WO" index="2" pad="PA2"/>
+              <signal function="TCA0" group="WO" index="3" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal function="TCB0" group="WO" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA6"/>
+              <signal function="TCD0" group="WOB" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal function="TWI0" group="SCL" pad="PA2"/>
+              <signal function="TWI0" group="SDA" pad="PA1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PA6"/>
+              <signal function="USART0" group="XCK" pad="PA3"/>
+              <signal function="USART0" group="XDIR" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x21"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC8">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA6" position="2"/>
+      <pin pad="PA7" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA2" position="5"/>
+      <pin pad="PA0" position="6"/>
+      <pin pad="PA3" position="7"/>
+      <pin pad="GND" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY214.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY214.xml
new file mode 100644
index 00000000..56667125
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY214.xml
@@ -0,0 +1,2403 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny214-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny214-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny214">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x8800" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0040" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0080" start="0x3f80" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x0800" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x0800" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x20"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64k cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY2313.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY2313.xml
new file mode 100644
index 00000000..22830731
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY2313.xml
@@ -0,0 +1,707 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny2313" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTD" caption="I/O Port">
+            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART" caption="USART">
+            <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="4" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USART_RX" caption="USART, Rx Complete"/>
+        <interrupt index="8" name="USART_UDRE" caption="USART Data Register Empty"/>
+        <interrupt index="9" name="USART_TX" caption="USART, Tx Complete"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="PCINT" caption=""/>
+        <interrupt index="12" name="TIMER1_COMPB" caption=""/>
+        <interrupt index="13" name="TIMER0_COMPA" caption=""/>
+        <interrupt index="14" name="TIMER0_COMPB" caption=""/>
+        <interrupt index="15" name="USI_START" caption="USI Start Condition"/>
+        <interrupt index="16" name="USI_OVERFLOW" caption="USI Overflow"/>
+        <interrupt index="17" name="EEPROM_Ready" caption=""/>
+        <interrupt index="18" name="WDT_OVERFLOW" caption="Watchdog Timer Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x910A"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0a"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="0"/>
+          <property name="OCD_DATAREG" value="0x1f"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="6"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="6"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+          <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_EESAVE_BODLEVEL"/>
+          <bitfield caption="External reset disable" mask="0x01" name="RSTDISBL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x64">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTD2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time: 14 CK + 0   ms" name="EXTCLK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 4.1 ms" name="EXTCLK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 65  ms" name="EXTCLK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1" value="0x12"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS" value="0x22"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS" value="0x04"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1" value="0x14"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS" value="0x24"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x06"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x16"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_EESAVE_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTD">
+        <register caption="Data Register, Port D" name="PORTD" offset="0x32" size="1" mask="0x7F"/>
+        <register caption="Data Direction Register, Port D" name="DDRD" offset="0x31" size="1" mask="0x7F"/>
+        <register caption="Input Pins, Port D" name="PIND" offset="0x30" size="1" mask="0x7F" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0x07"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0x07"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0x07" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare B" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x80" name="TOV1"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Input Capture Flag 1" mask="0x08" name="ICF1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="R">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="Extended Interrupt Flag Register" name="EIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="" mask="0x20" name="PCIF"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART">
+        <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSRA" offset="0x02B" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+          <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+          <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSRB" offset="0x02A" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSRC" offset="0x23" size="1">
+          <bitfield caption="USART Mode Select" mask="0x40" name="UMSEL" values="COMM_USART_MODE"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+        </register>
+        <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0x22" size="1" mask="0x0F"/>
+        <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE">
+        <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR" offset="0x21" size="1" mask="0x03"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="1" mask="0x7F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57" size="1" ocd-rw="">
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x80" name="PUD"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x50" name="SM" values="CPU_SLEEP_MODE_2BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="General Timer Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="" mask="0x01" name="PSR10"/>
+        </register>
+        <register caption="Pin-Change Mask register" name="PCMSK" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8 MHz" name="8_MHz"/>
+        <value value="0x01" caption="4 MHz" name="4_MHz"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE_2BITS">
+        <value value="0x00" caption="Idle" name="IDLE"/>
+        <value value="0x01" caption="Power Down" name="PDOWN2"/>
+        <value value="0x04" caption="Standby" name="STDBY"/>
+        <value value="0x05" caption="Power Down " name="PDOWN"/>
+      </value-group>
+      
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY2313A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY2313A.xml
new file mode 100644
index 00000000..ee676a77
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY2313A.xml
@@ -0,0 +1,725 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny2313A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTD" caption="I/O Port">
+            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART" caption="USART">
+            <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="4" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USART_RX" caption="USART, Rx Complete"/>
+        <interrupt index="8" name="USART_UDRE" caption="USART Data Register Empty"/>
+        <interrupt index="9" name="USART_TX" caption="USART, Tx Complete"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="PCINT_B" caption="Pin Change Interrupt Request B"/>
+        <interrupt index="12" name="TIMER1_COMPB" caption=""/>
+        <interrupt index="13" name="TIMER0_COMPA" caption=""/>
+        <interrupt index="14" name="TIMER0_COMPB" caption=""/>
+        <interrupt index="15" name="USI_START" caption="USI Start Condition"/>
+        <interrupt index="16" name="USI_OVERFLOW" caption="USI Overflow"/>
+        <interrupt index="17" name="EEPROM_Ready" caption=""/>
+        <interrupt index="18" name="WDT_OVERFLOW" caption="Watchdog Timer Overflow"/>
+        <interrupt index="19" name="PCINT_A" caption="Pin Change Interrupt Request A"/>
+        <interrupt index="20" name="PCINT_D" caption="Pin Change Interrupt Request D"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x910A"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0a"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="0"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="6"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="6"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+          <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_EESAVE_BODLEVEL"/>
+          <bitfield caption="External reset disable" mask="0x01" name="RSTDISBL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTD2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time: 14 CK + 0   ms" name="EXTCLK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 4.1 ms" name="EXTCLK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 65  ms" name="EXTCLK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1" value="0x12"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS" value="0x22"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS" value="0x04"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1" value="0x14"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS" value="0x24"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x06"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x16"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_EESAVE_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTD">
+        <register caption="Data Register, Port D" name="PORTD" offset="0x32" size="1" mask="0x7F"/>
+        <register caption="Data Direction Register, Port D" name="DDRD" offset="0x31" size="1" mask="0x7F"/>
+        <register caption="Input Pins, Port D" name="PIND" offset="0x30" size="1" mask="0x7F" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0x07"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0x07"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0x07" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare B" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x80" name="TOV1"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Input Capture Flag 1" mask="0x08" name="ICF1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="R">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART">
+        <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSRA" offset="0x02B" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+          <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+          <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSRB" offset="0x02A" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSRC" offset="0x23" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+        </register>
+        <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0x22" size="1" mask="0x0F"/>
+        <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE">
+        <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+        <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR" offset="0x21" size="1" mask="0x03"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="1" mask="0x7F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x38" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Interrupt Mask Register 2" name="PCMSK2" offset="0x25" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Masks" mask="0x7F" name="PCINT" lsb="11"/>
+        </register>
+        <register caption="Pin Change Interrupt Mask Register 1" name="PCMSK1" offset="0x24" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Masks" mask="0x07" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Interrupt Mask Register 0" name="PCMSK0" offset="0x40" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57" size="1" ocd-rw="">
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x80" name="PUD"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x50" name="SM" values="CPU_SLEEP_MODE_2BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="General Timer Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="" mask="0x01" name="PSR10"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Power reduction register" name="PRR" offset="0x26" size="1">
+          <bitfield caption="" mask="0x0C" name="PRTIM"/>
+          <bitfield caption="" mask="0x02" name="PRUSI"/>
+          <bitfield caption="" mask="0x01" name="PRUSART"/>
+        </register>
+        <register caption="BOD control register" name="BODCR" offset="0x27" size="1">
+          <bitfield caption="" mask="0x02" name="BPDS"/>
+          <bitfield caption="" mask="0x01" name="BPDSE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8 MHz" name="8_MHz"/>
+        <value value="0x01" caption="4 MHz" name="4_MHz"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE_2BITS">
+        <value value="0x00" caption="Idle" name="IDLE"/>
+        <value value="0x01" caption="Power Down" name="PDOWN2"/>
+        <value value="0x04" caption="Standby" name="STDBY"/>
+        <value value="0x05" caption="Power Down " name="PDOWN"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY24.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY24.xml
new file mode 100644
index 00000000..32e7c8e6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY24.xml
@@ -0,0 +1,686 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny24" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="EXT_INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="USI_STR" caption="USI START"/>
+        <interrupt index="16" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x910B"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0b"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="50"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="150"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x09"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB3 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY24A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY24A.xml
new file mode 100644
index 00000000..d1fab6f6
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY24A.xml
@@ -0,0 +1,817 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny24A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-MF" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-MM8" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny24A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device name="ATtiny24A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA1"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+              <signal function="AREF" group="AREF" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SCL" pad="PA4"/>
+              <signal function="TWI" group="SDA" pad="PA6"/>
+              <signal function="SPI" group="USCK" pad="PA4"/>
+              <signal function="SPI" group="DO" pad="PA5"/>
+              <signal function="SPI" group="DI" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="T0" pad="PA3"/>
+              <signal function="T0" group="OC0B" pad="PA7"/>
+              <signal function="T0" group="OC0A" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="T1" group="T1" pad="PA4"/>
+              <signal function="T1" group="OC1B" pad="PA5"/>
+              <signal function="T1" group="OC1A" pad="PA6"/>
+              <signal function="T1" group="ICP1" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="EXT_INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="USI_STR" caption="USI START"/>
+        <interrupt index="16" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x910B"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0b"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="50"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="150"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x09"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB3 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1" mask="0xFF">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x3F" name="MUX"/>
+        </register>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00" value="0x00"/>
+        <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal 1.1V voltage reference" name="VAL_0x02" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_14">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PB0" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="PB2" position="5"/>
+      <pin pad="PA7" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA5" position="8"/>
+      <pin pad="PA4" position="9"/>
+      <pin pad="PA3" position="10"/>
+      <pin pad="PA2" position="11"/>
+      <pin pad="PA1" position="12"/>
+      <pin pad="PA0" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PA4" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA0" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PA7" position="15"/>
+      <pin pad="PA6" position="16"/>
+      <pin pad="PA5" position="20"/>
+    </pinout>
+    <pinout name="BGA_16">
+      <pin pad="PA5" position="A2"/>
+      <pin pad="PA6" position="A3"/>
+      <pin pad="PB2" position="A4"/>
+      <pin pad="PA4" position="B1"/>
+      <pin pad="PA7" position="B2"/>
+      <pin pad="PB1" position="B3"/>
+      <pin pad="PB3" position="B4"/>
+      <pin pad="PA3" position="C1"/>
+      <pin pad="PA2" position="C2"/>
+      <pin pad="PA1" position="C3"/>
+      <pin pad="PB0" position="C4"/>
+      <pin pad="PA0" position="D1"/>
+      <pin pad="GND" position="D2"/>
+      <pin pad="GND" position="D3"/>
+      <pin pad="VCC" position="D4"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY25.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY25.xml
new file mode 100644
index 00000000..a44b6275
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY25.xml
@@ -0,0 +1,808 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny25V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10SSU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10SSH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10SN" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10SSN" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-10MF" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny25V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20SSU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20SSH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20SN" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20SSN" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny25V-20MF" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny25" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+              <signal function="PORTB" group="P" index="4" pad="PB4"/>
+              <signal function="PORTB" group="P" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="1" pad="PB1"/>
+              <signal function="ACIN" group="AIN" index="0" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PB5"/>
+              <signal function="ADC" group="ADC" index="1" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="2" pad="PB4"/>
+              <signal function="AREF" group="AREF" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SDA" pad="PB0"/>
+              <signal function="TWI" group="SCL" pad="PB2"/>
+              <signal function="SPI" group="DI" pad="PB0"/>
+              <signal function="SPI" group="DO" pad="PB1"/>
+              <signal function="SPI" group="USCK" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PB3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PB4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PB5"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="T0" pad="PB2"/>
+              <signal function="T0" group="OC0B" pad="PB1"/>
+              <signal function="T0" group="OC0A" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T1" group="OC1B" pad="PB4"/>
+              <signal function="T1" group="OC1BINV" pad="PB3"/>
+              <signal function="T1" group="OC1A" pad="PB1"/>
+              <signal function="T1" group="OC1AINV" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin change Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="5" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="6" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog comparator"/>
+        <interrupt index="8" name="ADC" caption="ADC Conversion ready"/>
+        <interrupt index="9" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="10" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="11" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="13" name="USI_START" caption="USI START"/>
+        <interrupt index="14" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9108"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x08"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x22"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="50"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0B"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB5 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB4" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms" name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x3F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Reference Selection Bit 2" mask="0x10" name="REFS2"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x10" name="ADC2D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x04" name="ADC1D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask" name="PCMSK" offset="0x35" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change on INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x4A" size="1">
+          <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x4C" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR0"/>
+        </register>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x50" size="1">
+          <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4F" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4E" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer counter control register" name="GTCCR" offset="0x4C" size="1">
+          <bitfield caption="Pulse Width Modulator B Enable" mask="0x40" name="PWM1B"/>
+          <bitfield caption="Comparator B Output Mode" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x08" name="FOC1B"/>
+          <bitfield caption="Force Output Compare 1A" mask="0x04" name="FOC1A"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1" mask="0x02" name="PSR1"/>
+        </register>
+        <register caption="Dead time prescaler register" name="DTPS" offset="0x43" size="1">
+          <bitfield caption="" mask="0x03" name="DTPS"/>
+        </register>
+        <register caption="Dead time value register" name="DT1A" offset="0x45" size="1">
+          <bitfield caption="" mask="0xF0" name="DTVH"/>
+          <bitfield caption="" mask="0x0F" name="DTVL"/>
+        </register>
+        <register caption="Dead time value B" name="DT1B" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DTVH"/>
+          <bitfield caption="" mask="0x0F" name="DTVL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="CLK_COMP_MATCH_OUT_MODE">
+        <value caption="Disconnected from OCn/PWMn" name="VAL_0x00" value="0x00"/>
+        <value caption="Toggle OCn/PWMn output line" name="VAL_0x01" value="0x01"/>
+        <value caption="Clear OCn/PWMn output line" name="VAL_0x02" value="0x02"/>
+        <value caption="set OCn/PWMn output line" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x40" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x47" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x42" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x32" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x31" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+        <value value="0x01" caption="6.4 MHz" name="6_4_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_8">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB1" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="VCC" position="8"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="VCC" position="15"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY26.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY26.xml
new file mode 100644
index 00000000..e7aea04d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY26.xml
@@ -0,0 +1,638 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny26" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0002">
+          <memory-segment start="0" size="0x0002" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="4">
+          <memory-segment start="0" size="4" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V1"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z"/>
+      </parameters></instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="IO_PINS" caption="External Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER1_CMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_CMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF1" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF0" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_STRT" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x09"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="20"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x21"/>
+          <property name="IspProgramFlash_blockSize" value="16"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x20"/>
+          <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x04"/>
+          <property name="IspProgramEeprom_blockSize" value="64"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+          <property name="IspProgramEeprom_cmd2" value="0x00"/>
+          <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+          <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+          <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="20"/>
+          <property name="PpProgramFlash_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="10"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="10"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="10"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="20"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x21"/>
+          <property name="IspProgramFlash_blockSize" value="16"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x20"/>
+          <property name="IspProgramFlash_pollVal1" value="0xFF"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x04"/>
+          <property name="IspProgramEeprom_blockSize" value="64"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC0"/>
+          <property name="IspProgramEeprom_cmd2" value="0x00"/>
+          <property name="IspProgramEeprom_cmd3" value="0xA0"/>
+          <property name="IspProgramEeprom_pollVal1" value="0xFF"/>
+          <property name="IspProgramEeprom_pollVal2" value="0xFF"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="20"/>
+          <property name="PpProgramFlash_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="10"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="10"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="10"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="2"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="20"/>
+          <property name="PpProgramFlash_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="10"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="10"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="10"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xF7">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x10" name="RSTDISBL"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x08" name="SPIEN"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x04" name="EESAVE"/>
+          <bitfield caption="Brownout detector trigger level" mask="0x02" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Brown-out detection enabled" mask="0x01" name="BODEN"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0xE1">
+          <bitfield caption="CKOPT fuse (operation dependent of CKSEL fuses)" mask="0x40" name="CKOPT"/>
+          <bitfield caption="Select Clock Source" mask="0xBF" name="PLLCK_SUT_CKSEL" values="ENUM_PLLCK_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_PLLCK_SUT_CKSEL">
+        <value caption="PLL Clock; Start-up time: 1K CK + 0 ms" name="PLLCLK_1KCK_0MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time: 1K CK + 4 ms" name="PLLCLK_1KCK_4MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time: 1K CK + 64 ms" name="PLLCLK_1KCK_64MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time: 16K CK + 64 ms" name="PLLCLK_16KCK_64MS" value="0x31"/>
+        <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x80"/>
+        <value caption="Ext. Clock; Start-up time: 6 CK + 4 ms" name="EXTCLK_6CK_4MS" value="0x90"/>
+        <value caption="Ext. Clock; Start-up time: 6 CK + 64 ms" name="EXTCLK_6CK_64MS" value="0xA0"/>
+        <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_1MHZ_6CK_0MS" value="0x81"/>
+        <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_1MHZ_6CK_4MS" value="0x91"/>
+        <value caption="Int. RC Osc. 1 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_1MHZ_6CK_64MS" value="0xA1"/>
+        <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_2MHZ_6CK_0MS" value="0x82"/>
+        <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_2MHZ_6CK_4MS" value="0x92"/>
+        <value caption="Int. RC Osc. 2 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_2MHZ_6CK_64MS" value="0xA2"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_4MHZ_6CK_0MS" value="0x83"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_4MHZ_6CK_4MS" value="0x93"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_4MHZ_6CK_64MS" value="0xA3"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_0MS" value="0x84"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_4MS" value="0x94"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 6 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_64MS" value="0xA4"/>
+        <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_XX_0MHZ9_18CK_0MS" value="0x85"/>
+        <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_18CK_4MS" value="0x95"/>
+        <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_XX_0MHZ9_18CK_64MS" value="0xA5"/>
+        <value caption="Ext. RC Osc.         -  0.9 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_XX_0MHZ9_6CK_4MS" value="0xB5"/>
+        <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_0MS" value="0x86"/>
+        <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_4MS" value="0x96"/>
+        <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_0MHZ9_3MHZ_18CK_64MS" value="0xA6"/>
+        <value caption="Ext. RC Osc. 0.9 MHz -  3.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_0MHZ9_3MHZ_6CK_4MS" value="0xB6"/>
+        <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_0MS" value="0x87"/>
+        <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_4MS" value="0x97"/>
+        <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_3MHZ_8MHZ_18CK_64MS" value="0xA7"/>
+        <value caption="Ext. RC Osc. 3.0 MHz -  8.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_3MHZ_8MHZ_6CK_4MS" value="0xB7"/>
+        <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 0 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_0MS" value="0x88"/>
+        <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_4MS" value="0x98"/>
+        <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 18 CK + 64 ms" name="EXTRCOSC_8MHZ_12MHZ_18CK_64MS" value="0xA8"/>
+        <value caption="Ext. RC Osc. 8.0 MHz - 12.0 MHz; Start-up time: 6 CK + 4 ms" name="EXTRCOSC_8MHZ_12MHZ_6CK_4MS" value="0xB8"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x89"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x99"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0xA9"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 4 ms" name="EXTLOFXTALRES_258CK_4MS" value="0x8A"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 258 CK + 64 ms" name="EXTLOFXTALRES_258CK_64MS" value="0x9A"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 0 ms" name="EXTLOFXTALRES_1KCK_0MS" value="0xAA"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 4 ms" name="EXTLOFXTALRES_1KCK_4MS" value="0xBA"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 1K CK + 64 ms" name="EXTLOFXTALRES_1KCK_64MS" value="0x8B"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 0 ms" name="EXTLOFXTALRES_16KCK_0MS" value="0x9B"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 4 ms" name="EXTLOFXTALRES_16KCK_4MS" value="0xAB"/>
+        <value caption="Ext. Crystal/Resonator Low Freq.; Start-up time: 16K CK + 64 ms" name="EXTLOFXTALRES_16KCK_64MS" value="0xBB"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 4 ms" name="EXTMEDFXTALRES_258CK_4MS" value="0x8C"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 258 CK + 64 ms" name="EXTMEDFXTALRES_258CK_64MS" value="0x9C"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 0 ms" name="EXTMEDFXTALRES_1KCK_0MS" value="0xAC"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 4 ms" name="EXTMEDFXTALRES_1KCK_4MS" value="0xBC"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 1K CK + 64 ms" name="EXTMEDFXTALRES_1KCK_64MS" value="0x8D"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 0 ms" name="EXTMEDFXTALRES_16KCK_0MS" value="0x9D"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 4 ms" name="EXTMEDFXTALRES_16KCK_4MS" value="0xAD"/>
+        <value caption="Ext. Crystal/Resonator Medium Freq.; Start-up time: 16K CK + 64 ms" name="EXTMEDFXTALRES_16KCK_64MS" value="0xBD"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 4 ms" name="EXTHIFXTALRES_258CK_4MS" value="0x8E"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 258 CK + 64 ms" name="EXTHIFXTALRES_258CK_64MS" value="0x9E"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 0 ms" name="EXTHIFXTALRES_1KCK_0MS" value="0xAE"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 4 ms" name="EXTHIFXTALRES_1KCK_4MS" value="0xBE"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 1K CK + 64 ms" name="EXTHIFXTALRES_1KCK_64MS" value="0x8F"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 0 ms" name="EXTHIFXTALRES_16KCK_0MS" value="0x9F"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 4 ms" name="EXTHIFXTALRES_16KCK_4MS" value="0xAF"/>
+        <value caption="Ext. Crystal/Resonator High Freq.; Start-up time: 16K CK + 64 ms" name="EXTHIFXTALRES_16KCK_64MS" value="0xBF"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.0 V" name="4V0" value="0x00"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSR" offset="0x26" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Free Running Select" mask="0x20" name="ADFR"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="AVCC" name="VAL_0x00" value="0x00"/>
+        <value caption="AREF" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal Voltage Referance" name="VAL_0x02" value="0x02"/>
+        <value caption="Internal Voltage Reference With External Capacitor at AREF Pin." name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="1" mask="0x7F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1">
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+          <bitfield caption="Watch Dog Timer Prescaler bits" mask="0x07" name="WDP" values="WDOG_TIMER_PRESCALE_3BITS"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_3BITS">
+        <value caption="Oscillator Cycles 16K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 2048K" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer" name="SP" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Status Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="1.0 MHz" name="1_0_MHz"/>
+        <value value="0x01" caption="2.0 MHz" name="2_0_MHz"/>
+        <value value="0x02" caption="4.0 MHz" name="4_0_MHz"/>
+        <value value="0x03" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register" name="TCCR0" offset="0x53" size="1">
+          <bitfield caption="Prescaler Reset Timer/Counter0" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select0 bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer Counter 0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Comparator A Output Mode Bits" mask="0xC0" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
+          <bitfield caption="Comparator B Output Mode Bits" mask="0x30" name="COM1B" values="CLK_COMP_MATCH_OUT_MODE"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator A Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator B Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1" mask="0x40" name="PSR1"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="PLL Control and Status Register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="CLK_COMP_MATCH_OUT_MODE">
+        <value caption="Disconnected from OCn/PWMn" name="VAL_0x00" value="0x00"/>
+        <value caption="Toggle OCn/PWMn output line" name="VAL_0x01" value="0x01"/>
+        <value caption="Clear OCn/PWMn output line" name="VAL_0x02" value="0x02"/>
+        <value caption="set OCn/PWMn output line" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+      </register-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY261.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY261.xml
new file mode 100644
index 00000000..f4e7befb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY261.xml
@@ -0,0 +1,936 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny261V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny261V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny261V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny261-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny261-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny261-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny261" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+              <signal function="PORTB" group="P" index="4" pad="PB4"/>
+              <signal function="PORTB" group="P" index="5" pad="PB5"/>
+              <signal function="PORTB" group="P" index="6" pad="PB6"/>
+              <signal function="PORTB" group="P" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA7"/>
+              <signal function="ADC" group="ADC" index="7" pad="PB4"/>
+              <signal function="ADC" group="ADC" index="8" pad="PB5"/>
+              <signal function="ADC" group="ADC" index="9" pad="PB6"/>
+              <signal function="ADC" group="ADC" index="10" pad="PB7"/>
+              <signal function="AREF" group="AREF" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
+              <signal function="ACIN" group="AIN" index="2" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
+              <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
+              <signal field="USIPOS" function="USI_ALT" group="SCL " pad="PA2"/>
+              <signal field="USIPOS" function="USI_ALT" group="SDA" pad="PA0"/>
+              <signal field="USIPOS" function="USI" group="DI" pad="PB0"/>
+              <signal field="USIPOS" function="USI" group="DO" pad="PB1"/>
+              <signal field="USIPOS" function="USI" group="USCK" pad="PB2"/>
+              <signal field="USIPOS" function="USI_ALT" group="USCK" pad="PA2"/>
+              <signal field="USIPOS" function="USI_ALT" group="DO" pad="PA1"/>
+              <signal field="USIPOS" function="USI_ALT" group="DI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="ICP0" pad="PA4"/>
+              <signal function="T0" group="T0" pad="PB6"/>
+            </signals>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T1" group="OC1AINV" pad="PB0"/>
+              <signal function="T1" group="OC1A" pad="PB1"/>
+              <signal function="T1" group="OC1BINV" pad="PB2"/>
+              <signal function="T1" group="OC1B" pad="PB3"/>
+              <signal function="T1" group="OC1DINV" pad="PB4"/>
+              <signal function="T1" group="OC1D" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="PCINT" index="12" pad="PB4"/>
+              <signal function="EXTINT" group="PCINT" index="13" pad="PB5"/>
+              <signal function="EXTINT" group="PCINT" index="14" pad="PB6"/>
+              <signal function="EXTINT" group="PCINT" index="15" pad="PB7"/>
+              <signal function="EXTINT" group="INT" index="1" pad="PA2"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_START" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+        <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+        <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+        <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x910C"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0c"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x20"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="" mask="0x10" name="REFS2"/>
+          <bitfield caption="" mask="0x08" name="MUX5"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+          <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x35" size="1">
+          <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+          <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+          <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+          <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+          <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+          <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+          <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+          <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+          <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+          <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+          <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+          <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+        </register>
+        <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+          <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+          <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+          <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+          <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+          <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+          <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+          <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+          <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DT1H"/>
+          <bitfield caption="" mask="0x0F" name="DT1L"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="MISC_2BIT_SCALE">
+        <value caption="1x" name="VAL_0x00" value="0x00"/>
+        <value caption="2x" name="VAL_0x01" value="0x01"/>
+        <value caption="4x" name="VAL_0x02" value="0x02"/>
+        <value caption="8x" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+      <value-group caption="" name="PULSE_WIDTH_MODU2">
+        <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+        <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+        <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+        <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_20">
+      <pin pad="PB0" position="1"/>
+      <pin pad="PB1" position="2"/>
+      <pin pad="PB2" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="GND" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB5" position="8"/>
+      <pin pad="PB6" position="9"/>
+      <pin pad="PB7" position="10"/>
+      <pin pad="PA7" position="11"/>
+      <pin pad="PA6" position="12"/>
+      <pin pad="PA5" position="13"/>
+      <pin pad="PA4" position="14"/>
+      <pin pad="AVCC" position="15"/>
+      <pin pad="AGND" position="16"/>
+      <pin pad="PA3" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA1" position="19"/>
+      <pin pad="PA0" position="20"/>
+    </pinout>
+    <pinout name="QFN_32">
+      <pin pad="PB3" position="2"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB5" position="8"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB7" position="11"/>
+      <pin pad="PA7" position="13"/>
+      <pin pad="PA6" position="14"/>
+      <pin pad="PA5" position="15"/>
+      <pin pad="PA4" position="17"/>
+      <pin pad="AVCC" position="18"/>
+      <pin pad="AGND" position="21"/>
+      <pin pad="PA3" position="22"/>
+      <pin pad="PA2" position="23"/>
+      <pin pad="PA1" position="25"/>
+      <pin pad="PA0" position="26"/>
+      <pin pad="PB0" position="30"/>
+      <pin pad="PB1" position="31"/>
+      <pin pad="PB2" position="32"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY261A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY261A.xml
new file mode 100644
index 00000000..f4904ac9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY261A.xml
@@ -0,0 +1,804 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny261A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0800">
+          <memory-segment start="0x0000" size="0x0800" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x20"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x00e0">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0080" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0080">
+          <memory-segment start="0x0000" size="0x0080" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_START" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+        <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+        <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+        <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x910C"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x91"/>
+          <property name="SIGNATURE2" value="0x0c"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x20"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="" mask="0x10" name="REFS2"/>
+          <bitfield caption="" mask="0x08" name="MUX5"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+          <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x35" size="1">
+          <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+          <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+          <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+          <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+          <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+          <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+          <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+          <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+          <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+          <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+          <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+          <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+        </register>
+        <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+          <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+          <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+          <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+          <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+          <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+          <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+          <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+          <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DT1H"/>
+          <bitfield caption="" mask="0x0F" name="DT1L"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="MISC_2BIT_SCALE">
+        <value caption="1x" name="VAL_0x00" value="0x00"/>
+        <value caption="2x" name="VAL_0x01" value="0x01"/>
+        <value caption="4x" name="VAL_0x02" value="0x02"/>
+        <value caption="8x" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+      <value-group caption="" name="PULSE_WIDTH_MODU2">
+        <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+        <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+        <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+        <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer Low Byte" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x80" name="BODS"/>
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY3216.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY3216.xml
new file mode 100644
index 00000000..907ebb0d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY3216.xml
@@ -0,0 +1,2641 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny3216-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny3216-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny3216">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+            </signals>
+          </instance>
+          <instance name="AC1">
+            <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
+            <signals>
+              <signal function="AC1" group="N" index="0" pad="PA5"/>
+              <signal function="AC1" group="OUT" index="0" pad="PB3"/>
+              <signal function="AC1" group="P" index="0" pad="PA7"/>
+              <signal function="AC1" group="P" index="1" pad="PA6"/>
+              <signal function="AC1" group="P" index="2" pad="PB0"/>
+              <signal function="AC1" group="P" index="3" pad="PB4"/>
+            </signals>
+          </instance>
+          <instance name="AC2">
+            <register-group address-space="data" name="AC2" name-in-module="AC" offset="0x0690"/>
+            <signals>
+              <signal function="AC2" group="N" index="0" pad="PA7"/>
+              <signal function="AC2" group="OUT" index="0" pad="PB2"/>
+              <signal function="AC2" group="P" index="0" pad="PA6"/>
+              <signal function="AC2" group="P" index="1" pad="PB0"/>
+              <signal function="AC2" group="P" index="2" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="ADC1">
+            <register-group address-space="data" name="ADC1" name-in-module="ADC" offset="0x0640"/>
+            <signals>
+              <signal function="AIN1" group="AIN" index="0" pad="PA4"/>
+              <signal function="AIN1" group="AIN" index="1" pad="PA5"/>
+              <signal function="AIN1" group="AIN" index="2" pad="PA6"/>
+              <signal function="AIN1" group="AIN" index="3" pad="PA7"/>
+              <signal function="AIN1" group="AIN" index="6" pad="PC0"/>
+              <signal function="AIN1" group="AIN" index="7" pad="PC1"/>
+              <signal function="AIN1" group="AIN" index="8" pad="PC2"/>
+              <signal function="AIN1" group="AIN" index="9" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="DAC1">
+            <register-group address-space="data" name="DAC1" name-in-module="DAC" offset="0x06A8"/>
+          </instance>
+          <instance name="DAC2">
+            <register-group address-space="data" name="DAC2" name-in-module="DAC" offset="0x06B0"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_X" group="X" index="6" pad="PC0"/>
+              <signal function="PTC_X" group="X" index="7" pad="PC1"/>
+              <signal function="PTC_X" group="X" index="8" pad="PC2"/>
+              <signal function="PTC_X" group="X" index="9" pad="PC3"/>
+              <signal function="PTC_X" group="X" index="12" pad="PB5"/>
+              <signal function="PTC_X" group="X" index="13" pad="PB4"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="6" pad="PC0"/>
+              <signal function="PTC_Y" group="Y" index="7" pad="PC1"/>
+              <signal function="PTC_Y" group="Y" index="8" pad="PC2"/>
+              <signal function="PTC_Y" group="Y" index="9" pad="PC3"/>
+              <signal function="PTC_Y" group="Y" index="12" pad="PB5"/>
+              <signal function="PTC_Y" group="Y" index="13" pad="PB4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A50"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCB1" name="INT"/>
+        <interrupt index="15" module-instance="TCD0" name="OVF"/>
+        <interrupt index="16" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="18" module-instance="AC1" name="AC"/>
+        <interrupt index="19" module-instance="AC2" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="22" module-instance="ADC1" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC1" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x95"/>
+          <property name="SIGNATURE2" value="0x21"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="PTC/DAC2" name="PTC" value="0x1B"/>
+        <value caption="DAC0/DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x10"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x10"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+        <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+        <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+        <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+        <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+        <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+        <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+        <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+        <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+        <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+        <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+        <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+        <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+        <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+        <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+        <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+        <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+        <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+        <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+        <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+        <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+        <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+        <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+        <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+        <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+        <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+        <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+        <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+        <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+        <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+        <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+        <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+        <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="ADC1 reference enable" mask="0x10" name="ADC1REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+          <bitfield caption="DAC1/AC1 reference enable" mask="0x8" name="DAC1REFEN" rw="RW"/>
+          <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+          <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="ADC1 reference select select" name="VREF_ADC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC1/AC1 reference select select" name="VREF_DAC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC2/AC2 reference select select" name="VREF_DAC2REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY3217.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY3217.xml
new file mode 100644
index 00000000..78716e07
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY3217.xml
@@ -0,0 +1,2675 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny3217-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny3217-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny3217">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x10000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x40" rw="RW" size="0x0100" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x40" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0800" start="0x3800" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x40" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x80" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x80" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x40" rw="RW" size="0x40" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x8000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x80" rw="RW" size="0x8000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+              <signal function="AC0" group="P" index="2" pad="PB1"/>
+              <signal function="AC0" group="P" index="3" pad="PB6"/>
+            </signals>
+          </instance>
+          <instance name="AC1">
+            <register-group address-space="data" name="AC1" name-in-module="AC" offset="0x0688"/>
+            <signals>
+              <signal function="AC1" group="N" index="0" pad="PA5"/>
+              <signal function="AC1" group="N" index="1" pad="PB7"/>
+              <signal function="AC1" group="OUT" index="0" pad="PB3"/>
+              <signal function="AC1" group="P" index="0" pad="PA7"/>
+              <signal function="AC1" group="P" index="1" pad="PA6"/>
+              <signal function="AC1" group="P" index="2" pad="PB0"/>
+              <signal function="AC1" group="P" index="3" pad="PB4"/>
+            </signals>
+          </instance>
+          <instance name="AC2">
+            <register-group address-space="data" name="AC2" name-in-module="AC" offset="0x0690"/>
+            <signals>
+              <signal function="AC2" group="N" index="0" pad="PA7"/>
+              <signal function="AC2" group="N" index="1" pad="PB6"/>
+              <signal function="AC2" group="OUT" index="0" pad="PB2"/>
+              <signal function="AC2" group="P" index="0" pad="PA6"/>
+              <signal function="AC2" group="P" index="1" pad="PB0"/>
+              <signal function="AC2" group="P" index="2" pad="PB5"/>
+              <signal function="AC2" group="P" index="3" pad="PB7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="ADC1">
+            <register-group address-space="data" name="ADC1" name-in-module="ADC" offset="0x0640"/>
+            <signals>
+              <signal function="AIN1" group="AIN" index="0" pad="PA4"/>
+              <signal function="AIN1" group="AIN" index="1" pad="PA5"/>
+              <signal function="AIN1" group="AIN" index="2" pad="PA6"/>
+              <signal function="AIN1" group="AIN" index="3" pad="PA7"/>
+              <signal function="AIN1" group="AIN" index="4" pad="PB7"/>
+              <signal function="AIN1" group="AIN" index="5" pad="PB6"/>
+              <signal function="AIN1" group="AIN" index="6" pad="PC0"/>
+              <signal function="AIN1" group="AIN" index="7" pad="PC1"/>
+              <signal function="AIN1" group="AIN" index="8" pad="PC2"/>
+              <signal function="AIN1" group="AIN" index="9" pad="PC3"/>
+              <signal function="AIN1" group="AIN" index="10" pad="PC4"/>
+              <signal function="AIN1" group="AIN" index="11" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal function="CCL" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal function="CCL" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK_ALT" group="BREAK" pad="PC4"/>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x06A0"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="DAC1">
+            <register-group address-space="data" name="DAC1" name-in-module="DAC" offset="0x06A8"/>
+          </instance>
+          <instance name="DAC2">
+            <register-group address-space="data" name="DAC2" name-in-module="DAC" offset="0x06B0"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_X" group="X" index="6" pad="PC0"/>
+              <signal function="PTC_X" group="X" index="7" pad="PC1"/>
+              <signal function="PTC_X" group="X" index="8" pad="PC2"/>
+              <signal function="PTC_X" group="X" index="9" pad="PC3"/>
+              <signal function="PTC_X" group="X" index="10" pad="PC4"/>
+              <signal function="PTC_X" group="X" index="11" pad="PC5"/>
+              <signal function="PTC_X" group="X" index="12" pad="PB5"/>
+              <signal function="PTC_X" group="X" index="13" pad="PB4"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="6" pad="PC0"/>
+              <signal function="PTC_Y" group="Y" index="7" pad="PC1"/>
+              <signal function="PTC_Y" group="Y" index="8" pad="PC2"/>
+              <signal function="PTC_Y" group="Y" index="9" pad="PC3"/>
+              <signal function="PTC_Y" group="Y" index="10" pad="PC4"/>
+              <signal function="PTC_Y" group="Y" index="11" pad="PC5"/>
+              <signal function="PTC_Y" group="Y" index="12" pad="PB5"/>
+              <signal function="PTC_Y" group="Y" index="13" pad="PB4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+          <instance name="TCB1">
+            <register-group address-space="data" name="TCB1" name-in-module="TCB" offset="0x0A50"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1_ALT" group="WO" index="0" pad="PC4"/>
+              <signal field="PORTMUX.CTRLD.TCB1" function="TCB1" group="WO" index="0" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCB1" name="INT"/>
+        <interrupt index="15" module-instance="TCD0" name="OVF"/>
+        <interrupt index="16" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="18" module-instance="AC1" name="AC"/>
+        <interrupt index="19" module-instance="AC2" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="22" module-instance="ADC1" name="RESRDY"/>
+        <interrupt index="23" module-instance="ADC1" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x95"/>
+          <property name="SIGNATURE2" value="0x22"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="PTC/DAC2" name="PTC" value="0x1B"/>
+        <value caption="DAC0/DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x10"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x10"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB0" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+          <bitfield caption="Port Multiplexer TCB1" mask="0x2" name="TCB1" rw="RW" values="PORTMUX_TCB1"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB0 select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB1 select" name="PORTMUX_TCB1">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Synchronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selected clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selected clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selected clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selected clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+        <register caption="User Row Byte 32" name="USERROW32" offset="0x20" rw="RW" size="1"/>
+        <register caption="User Row Byte 33" name="USERROW33" offset="0x21" rw="RW" size="1"/>
+        <register caption="User Row Byte 34" name="USERROW34" offset="0x22" rw="RW" size="1"/>
+        <register caption="User Row Byte 35" name="USERROW35" offset="0x23" rw="RW" size="1"/>
+        <register caption="User Row Byte 36" name="USERROW36" offset="0x24" rw="RW" size="1"/>
+        <register caption="User Row Byte 37" name="USERROW37" offset="0x25" rw="RW" size="1"/>
+        <register caption="User Row Byte 38" name="USERROW38" offset="0x26" rw="RW" size="1"/>
+        <register caption="User Row Byte 39" name="USERROW39" offset="0x27" rw="RW" size="1"/>
+        <register caption="User Row Byte 40" name="USERROW40" offset="0x28" rw="RW" size="1"/>
+        <register caption="User Row Byte 41" name="USERROW41" offset="0x29" rw="RW" size="1"/>
+        <register caption="User Row Byte 42" name="USERROW42" offset="0x2A" rw="RW" size="1"/>
+        <register caption="User Row Byte 43" name="USERROW43" offset="0x2B" rw="RW" size="1"/>
+        <register caption="User Row Byte 44" name="USERROW44" offset="0x2C" rw="RW" size="1"/>
+        <register caption="User Row Byte 45" name="USERROW45" offset="0x2D" rw="RW" size="1"/>
+        <register caption="User Row Byte 46" name="USERROW46" offset="0x2E" rw="RW" size="1"/>
+        <register caption="User Row Byte 47" name="USERROW47" offset="0x2F" rw="RW" size="1"/>
+        <register caption="User Row Byte 48" name="USERROW48" offset="0x30" rw="RW" size="1"/>
+        <register caption="User Row Byte 49" name="USERROW49" offset="0x31" rw="RW" size="1"/>
+        <register caption="User Row Byte 50" name="USERROW50" offset="0x32" rw="RW" size="1"/>
+        <register caption="User Row Byte 51" name="USERROW51" offset="0x33" rw="RW" size="1"/>
+        <register caption="User Row Byte 52" name="USERROW52" offset="0x34" rw="RW" size="1"/>
+        <register caption="User Row Byte 53" name="USERROW53" offset="0x35" rw="RW" size="1"/>
+        <register caption="User Row Byte 54" name="USERROW54" offset="0x36" rw="RW" size="1"/>
+        <register caption="User Row Byte 55" name="USERROW55" offset="0x37" rw="RW" size="1"/>
+        <register caption="User Row Byte 56" name="USERROW56" offset="0x38" rw="RW" size="1"/>
+        <register caption="User Row Byte 57" name="USERROW57" offset="0x39" rw="RW" size="1"/>
+        <register caption="User Row Byte 58" name="USERROW58" offset="0x3A" rw="RW" size="1"/>
+        <register caption="User Row Byte 59" name="USERROW59" offset="0x3B" rw="RW" size="1"/>
+        <register caption="User Row Byte 60" name="USERROW60" offset="0x3C" rw="RW" size="1"/>
+        <register caption="User Row Byte 61" name="USERROW61" offset="0x3D" rw="RW" size="1"/>
+        <register caption="User Row Byte 62" name="USERROW62" offset="0x3E" rw="RW" size="1"/>
+        <register caption="User Row Byte 63" name="USERROW63" offset="0x3F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="ADC1 reference enable" mask="0x10" name="ADC1REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+          <bitfield caption="DAC1/AC1 reference enable" mask="0x8" name="DAC1REFEN" rw="RW"/>
+          <bitfield caption="DAC2/AC2 reference enable" mask="0x20" name="DAC2REFEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="ADC1 reference select" mask="0x70" name="ADC1REFSEL" rw="RW" values="VREF_ADC1REFSEL"/>
+          <bitfield caption="DAC1/AC1 reference select" mask="0x7" name="DAC1REFSEL" rw="RW" values="VREF_DAC1REFSEL"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="DAC2/AC2 reference select" mask="0x7" name="DAC2REFSEL" rw="RW" values="VREF_DAC2REFSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="ADC1 reference select select" name="VREF_ADC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC1/AC1 reference select select" name="VREF_DAC1REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC2/AC2 reference select select" name="VREF_DAC2REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY4.xml
new file mode 100644
index 00000000..cd8325a2
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY4.xml
@@ -0,0 +1,360 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny4-TSHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+    <variant ordercode="ATtiny4-MAHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UDFN8" pinout="UDFN8"/>
+    <variant ordercode="ATtiny4-TS8R" speedmax="10000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+  </variants>
+  <devices>
+    <device name="ATtiny4" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4200" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x20" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="flash" start="0x4000" name="MAPPED_FLASH" size="0x0200"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PB0" function="default"/>
+              <signal group="AIN" index="1" pad="PB1" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PB0" function="default"/>
+              <signal group="PCINT" index="1" pad="PB1" function="default"/>
+              <signal group="PCINT" index="2" pad="PB2" function="default"/>
+              <signal group="PCINT" index="3" pad="PB3" function="default"/>
+              <signal group="INT" index="0" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC0" caption="Timer/Counter, 16-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="OCA" pad="PB0" function="default"/>
+              <signal group="OCB" pad="PB1" function="default"/>
+              <signal group="T" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="TIM0_CAPT" caption="Timer/Counter0 Input Capture"/>
+        <interrupt index="4" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="5" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="6" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="8" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="9" name="VLM" caption="Vcc Voltage Level Monitor"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x8f"/>
+          <property name="SIGNATURE2" value="0x0a"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x1F" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture  Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x3A" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction ADC" mask="0x02" name="PRADC"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+        </register>
+        <register caption="Vcc Level Monitoring Control and Status Register" name="VLMCSR" offset="0x34" size="1">
+          <bitfield caption="VLM Flag" mask="0x80" name="VLMF"/>
+          <bitfield caption="VLM Interrupt Enable" mask="0x40" name="VLMIE"/>
+          <bitfield caption="Trigger Level of Voltage Level Monitor bits" mask="0x07" name="VLM"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE_3BITS">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x0C" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x03" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x01" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x00" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x02" size="1" mask="0x0F"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x15" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"/>
+        </register>
+        <register caption="External Interrupt Mask register" name="EIMSK" offset="0x13" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+        <register caption="External Interrupt Flag register" name="EIFR" offset="0x14" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x12" size="1">
+          <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x11" size="1">
+          <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+        </register>
+        <register caption="Pin Change Mask Register" name="PCMSK" offset="0x10" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x2E" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x2D" size="1">
+          <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM0" lsb="2"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register C" name="TCCR0C" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC0B"/>
+        </register>
+        <register caption="Timer/Counter0 " name="TCNT0" offset="0x28" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 0 Output Compare Register A " name="OCR0A" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B " name="OCR0B" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR0" offset="0x22" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register 0" name="TIMSK0" offset="0x2B" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x20" name="ICIE0"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR0" offset="0x2A" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x20" name="ICF0"/>
+          <bitfield caption="Timer Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x2F" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOT23_6">
+      <pin pad="PB0" position="1"/>
+      <pin pad="GND" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB2" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="PB3" position="6"/>
+    </pinout>
+    <pinout name="UDFN8">
+      <pin pad="PB1" position="1"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="VCC" position="7"/>
+      <pin pad="PB2" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY40.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY40.xml
new file mode 100644
index 00000000..9bf4c87a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY40.xml
@@ -0,0 +1,661 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny40-SU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOIC20" pinout="DIP"/>
+    <variant ordercode="ATtiny40-XU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TSSOP20" pinout="DIP"/>
+    <variant ordercode="ATtiny40-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="VQFN20" pinout="VQFN"/>
+  </variants>
+  <devices>
+    <device name="ATtiny40" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x5000" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x100" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="flash" start="0x4000" name="MAPPED_FLASH" size="0x1000"/>
+        </address-space>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" pad="PA0" function="default"/>
+              <signal group="ADC" index="1" pad="PA1" function="default"/>
+              <signal group="ADC" index="2" pad="PA2" function="default"/>
+              <signal group="ADC" index="3" pad="PA3" function="default"/>
+              <signal group="ADC" index="4" pad="PA4" function="default"/>
+              <signal group="ADC" index="5" pad="PA5" function="default"/>
+              <signal group="ADC" index="6" pad="PA6" function="default"/>
+              <signal group="ADC" index="7" pad="PA7" function="default"/>
+              <signal group="ADC" index="8" pad="PB0" function="default"/>
+              <signal group="ADC" index="9" pad="PB1" function="default"/>
+              <signal group="ADC" index="10" pad="PB2" function="default"/>
+              <signal group="ADC" index="11" pad="PB3" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PA1" function="default"/>
+              <signal group="AIN" index="1" pad="PA2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+            <signals>
+              <signal group="SCL" pad="PC1" function="default"/>
+              <signal group="SDA" pad="PC4" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PA0" function="default"/>
+              <signal group="PCINT" index="1" pad="PA1" function="default"/>
+              <signal group="PCINT" index="2" pad="PA2" function="default"/>
+              <signal group="PCINT" index="3" pad="PA3" function="default"/>
+              <signal group="PCINT" index="4" pad="PA4" function="default"/>
+              <signal group="PCINT" index="5" pad="PA5" function="default"/>
+              <signal group="PCINT" index="6" pad="PA6" function="default"/>
+              <signal group="PCINT" index="7" pad="PA7" function="default"/>
+              <signal group="PCINT" index="8" pad="PB0" function="default"/>
+              <signal group="PCINT" index="9" pad="PB1" function="default"/>
+              <signal group="PCINT" index="10" pad="PB2" function="default"/>
+              <signal group="PCINT" index="11" pad="PB3" function="default"/>
+              <signal group="PCINT" index="12" pad="PC0" function="default"/>
+              <signal group="PCINT" index="13" pad="PC1" function="default"/>
+              <signal group="PCINT" index="14" pad="PC2" function="default"/>
+              <signal group="PCINT" index="15" pad="PC3" function="default"/>
+              <signal group="PCINT" index="16" pad="PC4" function="default"/>
+              <signal group="PCINT" index="17" pad="PC5" function="default"/>
+              <signal group="INT" index="0" pad="PC2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" index="0" pad="PB0" function="default"/>
+              <signal group="P" index="1" pad="PB1" function="default"/>
+              <signal group="P" index="2" pad="PB2" function="default"/>
+              <signal group="P" index="3" pad="PB3" function="default"/>
+            </signals>
+          </instance>
+          <instance name="PORTC" caption="I/O Port">
+            <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" index="0" pad="PC0" function="default"/>
+              <signal group="P" index="1" pad="PC1" function="default"/>
+              <signal group="P" index="2" pad="PC2" function="default"/>
+              <signal group="P" index="3" pad="PC3" function="default"/>
+              <signal group="P" index="4" pad="PC4" function="default"/>
+              <signal group="P" index="5" pad="PC5" function="default"/>
+            </signals>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" index="0" pad="PA0" function="default"/>
+              <signal group="P" index="1" pad="PA1" function="default"/>
+              <signal group="P" index="2" pad="PA2" function="default"/>
+              <signal group="P" index="3" pad="PA3" function="default"/>
+              <signal group="P" index="4" pad="PA4" function="default"/>
+              <signal group="P" index="5" pad="PA5" function="default"/>
+              <signal group="P" index="6" pad="PA6" function="default"/>
+              <signal group="P" index="7" pad="PA7" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal group="T" pad="PA4" function="default"/>
+              <signal group="OCB" pad="PA5" function="default"/>
+              <signal group="OCA" pad="PC0" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+            <signals>
+              <signal group="SS" pad="PC0" function="default"/>
+              <signal group="SCK" pad="PC1" function="default"/>
+              <signal group="MISO" pad="PC2" function="default"/>
+              <signal group="MOSI" pad="PC4" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+        <interrupt index="5" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="6" name="TIM1_CAPT" caption="Timer/Counter1 Input Capture"/>
+        <interrupt index="7" name="TIM1_COMPA" caption=" Timer/Counter1 Compare Match A"/>
+        <interrupt index="8" name="TIM1_COMPB" caption=" Timer/Counter1 Compare Match B"/>
+        <interrupt index="9" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="10" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="11" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="12" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="13" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="14" name="ADC" caption="Conversion Complete"/>
+        <interrupt index="15" name="TWI_SLAVE" caption="Two-Wire Interface"/>
+        <interrupt index="16" name="SPI" caption="Serial Peripheral Interface"/>
+        <interrupt index="17" name="QTRIP" caption="Touch Sensing"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x0e"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Brown-out Detector trigger level" mask="0x70" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled; [BODLEVEL=111]" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x10" size="1">
+          <bitfield caption="Reference Selection Bit" mask="0x40" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX" values="ADC_MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x12" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x0E" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x11" size="1">
+          <bitfield caption="" mask="0x08" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x0D" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="Vcc used as internal reference" name="VAL_0x00" value="0x00"/>
+        <value caption="Internal 1.1V Referemce" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="ADC_MUX">
+        <value caption="ADC0" name="ADC0" value="0x00"/>
+        <value caption="ADC1" name="ADC1" value="0x01"/>
+        <value caption="ADC2" name="ADC2" value="0x02"/>
+        <value caption="ADC3" name="ADC3" value="0x03"/>
+        <value caption="ADC4" name="ADC4" value="0x04"/>
+        <value caption="ADC5" name="ADC5" value="0x05"/>
+        <value caption="ADC6" name="ADC6" value="0x06"/>
+        <value caption="ADC7" name="ADC7" value="0x07"/>
+        <value caption="ADC8" name="ADC8" value="0x08"/>
+        <value caption="ADC9" name="ADC9" value="0x09"/>
+        <value caption="ADC10" name="ADC10" value="0x0A"/>
+        <value caption="ADC11" name="ADC11" value="0x0B"/>
+        <value caption="0V (AGND)" name="ADC_GND" value="0x0C"/>
+        <value caption="1.1V Internal Reference" name="ADC_VBG" value="0x0D"/>
+        <value caption="Temperature sensor" name="TEMPSENS" value="0x0E"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x13" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x14" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0x2D" size="1">
+          <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+          <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+          <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+          <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+          <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+          <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+          <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+        </register>
+        <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0x2C" size="1">
+          <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+          <bitfield caption="" mask="0x03" name="TWCMD"/>
+        </register>
+        <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0x2B" size="1" mask="0xFF">
+          <bitfield caption="TWI Data Interrupt Flag" mask="0x80" name="TWDIF"/>
+          <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+          <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+          <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+          <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+          <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+          <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+          <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+        </register>
+        <register caption="TWI Slave Address Register" name="TWSA" offset="0x2A" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave address bit" mask="0xFF" name="TWSA"/>
+        </register>
+        <register caption="TWI Slave Data Register" name="TWSD" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+        </register>
+        <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0x29" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction TWI" mask="0x10" name="PRTWI"/>
+          <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x08" name="PRSPI"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x3A" size="1" mask="0xDF">
+          <bitfield caption="BOD Sleep" mask="0x10" name="BODS"/>
+          <bitfield caption="Sleep Mode" mask="0x0E" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="RAM Address Register" name="RAMAR" offset="0x20" size="1" mask="0xFF"/>
+        <register caption="RAM Data Register" name="RAMDR" offset="0x1F" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC noise reduction" name="ADC" value="0x01"/>
+        <value caption="Power-down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+	      <register caption="MCU Control Register" name="MCUCR" offset="0x3A" size="1">
+		      <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x80" name="ISC01"/>
+		      <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x40" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+	      </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x0C" size="1" mask="0x71">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x70" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag Register" name="GIFR" offset="0x0B" size="1" mask="0x71">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x70" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x1A" size="1">
+          <bitfield caption="Pin Change Enable Mask 3" mask="0x3F" name="PCINT" lsb="12"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x0A" size="1">
+          <bitfield caption="Pin Change Enable Mask 3" mask="0x0F" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x09" size="1">
+          <bitfield caption="Pin Change Enable Mask 3" mask="0xFF" name="PCINT"/>
+        </register>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any logical change on INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x08" size="1">
+          <bitfield caption="" mask="0x80" name="ADC11D"/>
+          <bitfield caption="" mask="0x40" name="ADC10D"/>
+          <bitfield caption="" mask="0x20" name="ADC9D"/>
+          <bitfield caption="" mask="0x10" name="ADC8D"/>
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x04" name="BBMC"/>
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x07" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x05" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x04" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x06" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTC">
+        <register caption="Port Control Register" name="PORTCR" offset="0x08" size="1">
+          <bitfield caption="" mask="0x80" name="ADC11D"/>
+          <bitfield caption="" mask="0x40" name="ADC10D"/>
+          <bitfield caption="" mask="0x20" name="ADC9D"/>
+          <bitfield caption="" mask="0x10" name="ADC8D"/>
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x04" name="BBMC"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEC" offset="0x1E" size="1" mask="0x3F"/>
+        <register caption="Port C Data Register" name="PORTC" offset="0x1D" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port C" name="DDRC" offset="0x1C" size="1" mask="0x3F"/>
+        <register caption="Port C Input Pins" name="PINC" offset="0x1B" size="1" mask="0x3F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x08" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x03" size="1" mask="0xFF"/>
+        <register caption="Port A Data Register" name="PORTA" offset="0x02" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x01" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x00" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x19" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x18" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x20" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter" mask="0x10" name="PSR"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x24" size="1">
+          <bitfield caption="Timer/Counter1 Width" mask="0x80" name="TCW1"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN1"/>
+          <bitfield caption=": Input Capture Noise Canceler" mask="0x20" name="ICNC1"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x08" name="CTC1"/>
+          <bitfield caption="The Clock Select1 bits 2, 1, and 0 define the prescaling source of Timer1." mask="0x07" name="CS1"/>
+        </register>
+        <register caption="Timer/Counter1 High" name="TCNT1H" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter1 Low" name="TCNT1L" offset="0x23" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter 1 Output Compare Register A" name="OCR1A" offset="0x22" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter 1 Output Compare Register B" name="OCR1B" offset="0x21" size="1" mask="0xFF"/>
+        <register caption="Timer Interrupt Mask Register" name="TIMSK" offset="0x26" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x80" name="ICIE1"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x10" name="OCIE1A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x09" name="TOIE"/>
+          <bitfield caption="Timer/Counter Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR" offset="0x25" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x80" name="ICF1"/>
+          <bitfield caption="Timer Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer Output Compare Flag 1A" mask="0x10" name="OCF1A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x09" name="TOV"/>
+          <bitfield caption="Output Compare Flag 0 B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Output Compare Flag 0 A" mask="0x02" name="OCF0A"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x17" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x16" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x15" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Control Register" name="SPCR" offset="0x30" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE"/>
+        </register>
+        <register caption="SPI Status Register" name="SPSR" offset="0x2F" size="1">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Data Register" name="SPDR" offset="0x2E" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE">
+        <value caption="fcl/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fcl/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fcl/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fcl/128" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="DIP">
+      <pin pad="PB0" position="1"/>
+      <pin pad="PA7" position="2"/>
+      <pin pad="PA6" position="3"/>
+      <pin pad="PA5" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA3" position="6"/>
+      <pin pad="PA2" position="7"/>
+      <pin pad="PA1" position="8"/>
+      <pin pad="PA0" position="9"/>
+      <pin pad="GND" position="10"/>
+      <pin pad="VCC" position="11"/>
+      <pin pad="PC5" position="12"/>
+      <pin pad="PC4" position="13"/>
+      <pin pad="PC3" position="14"/>
+      <pin pad="PC2" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PB3" position="18"/>
+      <pin pad="PB2" position="19"/>
+      <pin pad="PB1" position="20"/>
+    </pinout>
+    <pinout name="VQFN">
+      <pin pad="PA6" position="1"/>
+      <pin pad="PA5" position="2"/>
+      <pin pad="PA4" position="3"/>
+      <pin pad="PA3" position="4"/>
+      <pin pad="PA2" position="5"/>
+      <pin pad="PA1" position="6"/>
+      <pin pad="PA0" position="7"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PC5" position="10"/>
+      <pin pad="PC4" position="11"/>
+      <pin pad="PC3" position="12"/>
+      <pin pad="PC2" position="13"/>
+      <pin pad="PC1" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PB3" position="16"/>
+      <pin pad="PB2" position="17"/>
+      <pin pad="PB1" position="18"/>
+      <pin pad="PB0" position="19"/>
+      <pin pad="PA7" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY402.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY402.xml
new file mode 100644
index 00000000..ca10a013
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY402.xml
@@ -0,0 +1,2032 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny402-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny402-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny402">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" pad="PA3"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal function="CCL" group="LUT1_OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal function="SPI0" group="SCK" pad="PA3"/>
+              <signal function="SPI0" group="SS" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PA3"/>
+              <signal function="TCA0" group="WO" index="1" pad="PA1"/>
+              <signal function="TCA0" group="WO" index="2" pad="PA2"/>
+              <signal function="TCA0" group="WO" index="3" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal function="TCB0" group="WO" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal function="TWI0" group="SCL" pad="PA2"/>
+              <signal function="TWI0" group="SDA" pad="PA1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PA6"/>
+              <signal function="USART0" group="XCK" pad="PA3"/>
+              <signal function="USART0" group="XDIR" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x27"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC8">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA6" position="2"/>
+      <pin pad="PA7" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA2" position="5"/>
+      <pin pad="PA0" position="6"/>
+      <pin pad="PA3" position="7"/>
+      <pin pad="GND" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY404.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY404.xml
new file mode 100644
index 00000000..f4d44520
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY404.xml
@@ -0,0 +1,2111 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny404-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny404-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny404">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x26"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY406.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY406.xml
new file mode 100644
index 00000000..49982fff
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY406.xml
@@ -0,0 +1,2155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny406-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny406-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny406-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny406-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny406">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY412.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY412.xml
new file mode 100644
index 00000000..e27cdee4
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY412.xml
@@ -0,0 +1,2344 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny412-SSFR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny412-SSNR" package="SOIC8" pinout="SOIC8" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny412">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" pad="PA3"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal function="CCL" group="LUT1_OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal function="SPI0" group="SCK" pad="PA3"/>
+              <signal function="SPI0" group="SS" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PA7"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PA3"/>
+              <signal function="TCA0" group="WO" index="1" pad="PA1"/>
+              <signal function="TCA0" group="WO" index="2" pad="PA2"/>
+              <signal function="TCA0" group="WO" index="3" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal function="TCB0" group="WO" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA6"/>
+              <signal function="TCD0" group="WOB" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal function="TWI0" group="SCL" pad="PA2"/>
+              <signal function="TWI0" group="SDA" pad="PA1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PA6"/>
+              <signal function="USART0" group="XCK" pad="PA3"/>
+              <signal function="USART0" group="XDIR" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x23"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC8">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA6" position="2"/>
+      <pin pad="PA7" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA2" position="5"/>
+      <pin pad="PA0" position="6"/>
+      <pin pad="PA3" position="7"/>
+      <pin pad="GND" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY414.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY414.xml
new file mode 100644
index 00000000..6203ef0c
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY414.xml
@@ -0,0 +1,2403 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny414-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny414-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny414">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PA7"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PA6"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x22"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64k cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY416.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY416.xml
new file mode 100644
index 00000000..1e2f2738
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY416.xml
@@ -0,0 +1,2476 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny416-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny416-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny416-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny416-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny416">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal function="OTHER" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2601" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2601" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2601" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2601" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2601" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x21"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2601" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2601" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2601" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2601" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2601" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2601" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2601" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2601" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2601" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2601" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY417.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY417.xml
new file mode 100644
index 00000000..95f99316
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY417.xml
@@ -0,0 +1,2499 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny417-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny417-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny417">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0x9000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0100" start="0x3f00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x1000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x1000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal function="CCL" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal function="CCL" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK_ALT" group="BREAK" pad="PC4"/>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2600" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2600" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2600" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2600" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x20"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.1 V" name="BODLEVEL1" value="0x01"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="2.9 V" name="BODLEVEL3" value="0x03"/>
+        <value caption="3.3 V" name="BODLEVEL4" value="0x04"/>
+        <value caption="3.7 V" name="BODLEVEL5" value="0x05"/>
+        <value caption="4.0 V" name="BODLEVEL6" value="0x06"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2600" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2600" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2600" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2600" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2600" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2600" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2600" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2600" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY4313.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY4313.xml
new file mode 100644
index 00000000..6ee56568
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY4313.xml
@@ -0,0 +1,725 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny4313" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTD" caption="I/O Port">
+            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART" caption="USART">
+            <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="4" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USART_RX" caption="USART, Rx Complete"/>
+        <interrupt index="8" name="USART_UDRE" caption="USART Data Register Empty"/>
+        <interrupt index="9" name="USART_TX" caption="USART, Tx Complete"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="PCINT_B" caption="Pin Change Interrupt Request B"/>
+        <interrupt index="12" name="TIMER1_COMPB" caption=""/>
+        <interrupt index="13" name="TIMER0_COMPA" caption=""/>
+        <interrupt index="14" name="TIMER0_COMPB" caption=""/>
+        <interrupt index="15" name="USI_START" caption="USI Start Condition"/>
+        <interrupt index="16" name="USI_OVERFLOW" caption="USI Overflow"/>
+        <interrupt index="17" name="EEPROM_Ready" caption=""/>
+        <interrupt index="18" name="WDT_OVERFLOW" caption="Watchdog Timer Overflow"/>
+        <interrupt index="19" name="PCINT_A" caption="Pin Change Interrupt Request A"/>
+        <interrupt index="20" name="PCINT_D" caption="Pin Change Interrupt Request D"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x920D"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x0d"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="0"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="6"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="32"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="6"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x26 0x36 0x66 0x76 0x2A 0x3A 0x6A 0x7A 0x2E 0xFD 0x04 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Debug Wire enable" mask="0x80" name="DWEN"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x40" name="EESAVE"/>
+          <bitfield caption="Serial program downloading (SPI) enable" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x0E" name="BODLEVEL" values="ENUM_EESAVE_BODLEVEL"/>
+          <bitfield caption="External reset disable" mask="0x01" name="RSTDISBL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTD2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time: 14 CK + 0   ms" name="EXTCLK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 4.1 ms" name="EXTCLK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time: 14 CK + 65  ms" name="EXTCLK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_4MHZ_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_4MHZ_14CK_4MS1" value="0x12"/>
+        <value caption="Int. RC Osc. 4 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_4MHZ_14CK_65MS" value="0x22"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 0   ms" name="INTRCOSC_8MHZ_14CK_0MS" value="0x04"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_14CK_4MS1" value="0x14"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time: 14 CK + 65  ms" name="INTRCOSC_8MHZ_14CK_65MS" value="0x24"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 0 ms" name="INTRCOSC_128KHZ_14CK_0MS" value="0x06"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 4 ms" name="INTRCOSC_128KHZ_14CK_4MS" value="0x16"/>
+        <value caption="Int. RC Osc. 128 kHz; Start-up time: 14 CK + 64 ms" name="INTRCOSC_128KHZ_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_EESAVE_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTD">
+        <register caption="Data Register, Port D" name="PORTD" offset="0x32" size="1" mask="0x7F"/>
+        <register caption="Data Direction Register, Port D" name="DDRD" offset="0x31" size="1" mask="0x7F"/>
+        <register caption="Input Pins, Port D" name="PIND" offset="0x30" size="1" mask="0x7F" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0x07"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0x07"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0x07" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x01" name="OCIE0A"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x01" name="OCF0A"/>
+        </register>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare B" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x80" name="TOIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x08" name="ICIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x80" name="TOV1"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Input Capture Flag 1" mask="0x08" name="ICF1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="R">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART">
+        <register caption="USART I/O Data Register" name="UDR" offset="0x2C" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSRA" offset="0x02B" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+          <bitfield caption="USART Parity Error" mask="0x04" name="UPE"/>
+          <bitfield caption="Double the USART Transmission Speed" mask="0x02" name="U2X"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSRB" offset="0x02A" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSRC" offset="0x23" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size Bits" mask="0x06" name="UCSZ"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+        </register>
+        <register caption="USART Baud Rate Register High Byte" name="UBRRH" offset="0x22" size="1" mask="0x0F"/>
+        <register caption="USART Baud Rate Register Low Byte" name="UBRRL" offset="0x29" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE">
+        <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+        <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR" offset="0x21" size="1" mask="0x03"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x3E" size="1" mask="0x7F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag Register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x38" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Interrupt Mask Register 2" name="PCMSK2" offset="0x25" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Masks" mask="0x7F" name="PCINT" lsb="11"/>
+        </register>
+        <register caption="Pin Change Interrupt Mask Register 1" name="PCMSK1" offset="0x24" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Masks" mask="0x07" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Interrupt Mask Register 0" name="PCMSK0" offset="0x40" size="1" mask="0xFF"/>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
+        <register caption="Store Program Memory Control and Status register" name="SPMCSR" offset="0x57" size="1" ocd-rw="">
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x80" name="PUD"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x50" name="SM" values="CPU_SLEEP_MODE3"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Interrupt Sense Control 1 bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0x7F" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="General Timer Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="" mask="0x01" name="PSR10"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Power reduction register" name="PRR" offset="0x26" size="1">
+          <bitfield caption="" mask="0x0C" name="PRTIM"/>
+          <bitfield caption="" mask="0x02" name="PRUSI"/>
+          <bitfield caption="" mask="0x01" name="PRUSART"/>
+        </register>
+        <register caption="BOD control register" name="BODCR" offset="0x27" size="1">
+          <bitfield caption="" mask="0x02" name="BPDS"/>
+          <bitfield caption="" mask="0x01" name="BPDSE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE3">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="Power Down" name="PDOWN2" value="0x01"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Power Down " name="PDOWN" value="0x05"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8 MHz" name="8_MHz"/>
+        <value value="0x01" caption="4 MHz" name="4_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY43U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY43U.xml
new file mode 100644
index 00000000..ce9b07b8
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY43U.xml
@@ -0,0 +1,701 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="0.7" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny43U" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="6" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="7" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="8" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="9" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="10" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="11" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="12" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="13" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="14" name="USI_START" caption="USI START"/>
+        <interrupt index="15" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x920C"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x0c"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter1 Interrupt Flag Register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag B" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag A" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC1B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM12"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1" name="TCNT1" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A" name="OCR1A" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x01FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x80" name="BODS"/>
+          <bitfield caption="Pull-Up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
+          <bitfield caption="Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask Byte 1" name="PCMSK1" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask Byte 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bit" mask="0x40" name="REFS" values="ANALOG_ADC_V_REF5"/>
+          <bitfield caption="Analog Channel Selection Bits" mask="0x07" name="MUX"/>
+        </register>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Boost Regulator Status Bit" mask="0x80" name="BVRON"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T43U"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="Analog Comparator IO" mask="0x20" name="AIN1D"/>
+          <bitfield caption="Analog Comparator IO" mask="0x10" name="AIN0D"/>
+          <bitfield caption="ADC3 Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital Input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital Input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital Input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF5">
+        <value caption="Vcc" name="VAL_0x00" value="0x00"/>
+        <value caption="Internal 1.1V Voltage Reference" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T43U">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match A" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Match B" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register" name="EEAR" offset="0x3E" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY44.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY44.xml
new file mode 100644
index 00000000..e8a64424
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY44.xml
@@ -0,0 +1,686 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny44" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="EXT_INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="USI_STR" caption="USI START"/>
+        <interrupt index="16" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9207"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x07"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="50"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="150"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB3 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x01FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY441.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY441.xml
new file mode 100644
index 00000000..2dde65cf
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY441.xml
@@ -0,0 +1,1126 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny441-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+    <variant ordercode="ATtiny441-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+    <variant ordercode="ATtiny441-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny441" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x10"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART1" caption="USART">
+            <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
+            <signals>
+              <signal function="USART" group="RXD" pad="PA4"/>
+              <signal function="USART" group="TXD" pad="PA5"/>
+              <signal function="USART" group="XCK" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="USART0" caption="USART">
+            <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
+            <signals>
+              <signal field="U0MAP" function="USART" group="TXD" pad="PA1"/>
+              <signal field="U0MAP" function="USART" group="RXD" pad="PA2"/>
+              <signal field="U0MAP" function="USART" group="XCK" pad="PA3"/>
+              <signal field="U0MAP" function="USART_ALT" group="TXD" pad="PA7"/>
+              <signal field="U0MAP" function="USART_ALT" group="RXD" pad="PB2"/>
+              <signal field="U0MAP" function="USART_ALT" group="XCK" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SCL" pad="PA4"/>
+              <signal function="TWI" group="SDA" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+              <signal function="ADC" group="ADC" index="8" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="9" pad="PB3"/>
+              <signal function="ADC" group="ADC" index="10" pad="PB0"/>
+              <signal function="ADC" group="ADC" index="11" pad="PB1"/>
+              <signal function="AREF" group="AREF" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN0" group="AIN0" index="0" pad="PA1"/>
+              <signal function="ACIN0" group="AIN0" index="1" pad="PA2"/>
+              <signal function="ACOUT" group="ACO0" pad="PA5"/>
+              <signal function="ACOUT" group="ACO1" pad="PA6"/>
+              <signal function="ACIN1" group="AIN1" index="0" pad="PA3"/>
+              <signal function="ACIN1" group="AIN1" index="1" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+              <signal function="OC" group="TOCC" index="1" pad="PA2"/>
+              <signal function="OC" group="TOCC" index="2" pad="PA3"/>
+              <signal function="OC" group="TOCC" index="3" pad="PA4"/>
+              <signal function="OC" group="TOCC" index="4" pad="PA5"/>
+              <signal function="OC" group="TOCC" index="5" pad="PA6"/>
+              <signal function="OC" group="TOCC" index="6" pad="PA7"/>
+              <signal function="OC" group="TOCC" index="7" pad="PB2"/>
+              <signal function="CS" group="T0" pad="PA3"/>
+              <signal function="CS" group="T1" pad="PA4"/>
+              <signal function="CS" group="T2" pad="PA5"/>
+              <signal function="ICP" group="ICP1" pad="PA7"/>
+            </signals>
+          </instance>
+        <instance name="TC2" caption="Timer/Counter, 16-bit">
+            <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+              <signal function="OC" group="TOCC" index="1" pad="PA2"/>
+              <signal function="OC" group="TOCC" index="2" pad="PA3"/>
+              <signal function="OC" group="TOCC" index="3" pad="PA4"/>
+              <signal function="OC" group="TOCC" index="4" pad="PA5"/>
+              <signal function="OC" group="TOCC" index="5" pad="PA6"/>
+              <signal function="OC" group="TOCC" index="6" pad="PA7"/>
+              <signal function="OC" group="TOCC" index="7" pad="PB2"/>
+              <signal function="CS" group="T0" pad="PA3"/>
+              <signal function="CS" group="T1" pad="PA4"/>
+              <signal function="CS" group="T2" pad="PA5"/>
+              <signal function="ICP" group="ICP2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA2"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA3"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA4"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA5"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA6"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA7"/>
+              <signal function="OC" group="TOCC" index="0" pad="PB2"/>
+              <signal function="CS" group="T0" pad="PA3"/>
+              <signal function="CS" group="T1" pad="PA4"/>
+              <signal function="CS" group="T2" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="TOCPM">
+          <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
+            <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+            <signals>
+              <signal field="SPIMAP" function="SPI_ALT" group="MISO" pad="PA0"/>
+              <signal field="SPIMAP" function="SPI_ALT" group="MOSI" pad="PA1"/>
+              <signal field="SPIMAP" function="SPI_ALT" group="SS" pad="PA2"/>
+              <signal field="SPIMAP" function="SPI_ALT" group="SCK" pad="PA3"/>
+              <signal field="SPIMAP" function="SPI" group="SCK" pad="PA4"/>
+              <signal field="SPIMAP" function="SPI" group="MISO" pad="PA5"/>
+              <signal field="SPIMAP" function="SPI" group="MOSI" pad="PA6"/>
+              <signal field="SPIMAP" function="SPI" group="SS" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out Interrupt"/>
+        <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+        <interrupt index="10" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+        <interrupt index="11" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP0" caption="Analog Comparator 0"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="ANA_COMP1" caption="Analog Comparator 1"/>
+        <interrupt index="16" name="TIMER2_CAPT" caption="Timer/Counter2 Capture Event"/>
+        <interrupt index="17" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+        <interrupt index="18" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+        <interrupt index="19" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+        <interrupt index="20" name="SPI" caption="Serial Peripheral Interface"/>
+        <interrupt index="21" name="USART0_START" caption="USART0, Start"/>
+        <interrupt index="22" name="USART0_RX" caption="USART0, Rx Complete"/>
+        <interrupt index="23" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+        <interrupt index="24" name="USART0_TX" caption="USART0, Tx Complete"/>
+        <interrupt index="25" name="USART1_START" caption="USART1, Start"/>
+        <interrupt index="26" name="USART1_RX" caption="USART1, Rx Complete"/>
+        <interrupt index="27" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+        <interrupt index="28" name="USART1_TX" caption="USART1, Tx Complete"/>
+        <interrupt index="29" name="TWI_SLAVE" caption="Two-wire Serial Interface"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9215"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x15"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+          <property name="BUFFERS_PER_FLASH_PAGE" value="4"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="16"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x07"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="16"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x07"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock." mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
+          <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+          <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PC2 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTC2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x1F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+        <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms" name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+        <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+        <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+        <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODMODE">
+        <value caption="Sampled" name="BOD_SAMPLED" value="0x01"/>
+        <value caption="Enabled" name="BOD_ENABLED" value="0x02"/>
+        <value caption="Disabled" name="BOD_DISABLED" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ENUM_ULPOSCSEL">
+        <value caption="32 kHz" name="ULPOSC_32KHZ" value="0x07"/>
+        <value caption="64 kHz" name="ULPOSC_64KHZ" value="0x06"/>
+        <value caption="128 kHz" name="ULPOSC_128KHZ" value="0x05"/>
+        <value caption="256 kHz" name="ULPOSC_256KHZ" value="0x04"/>
+        <value caption="512 kHz" name="ULPOSC_512KHZ" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x64" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x62" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x36" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x64" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x63" size="1" mask="0xFF"/>
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Port High Drive Enable Register" name="PHDE" offset="0x6A" size="1">
+          <bitfield caption="PortA High Drive Enable" mask="0x03" name="PHDEA"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART1">
+        <register caption="USART I/O Data Register" name="UDR1" offset="0x90" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x96" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x95" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x94" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSR1D" offset="0x93" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE1"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS1"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE1"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0x91" size="2" mask="0x0FFF"/>
+      </register-group>
+      <register-group caption="USART" name="USART0">
+        <register caption="USART I/O Data Register" name="UDR0" offset="0x80" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x86" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x85" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x84" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSR0D" offset="0x83" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE0"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS0"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE0"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0x81" size="2" mask="0x0FFF"/>
+        <register caption="Remap Port Pins" name="REMAP" offset="0x65" size="1">
+          <bitfield caption="USART0 Pin Mapping" mask="0x01" name="U0MAP"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE_2BIT">
+        <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+        <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x41" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS_32KHZ">
+        <value caption="Oscillator Cycles 512 (16 ms)" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 1K (32 ms)" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 2K (64 ms)" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 4K (0.125 s)" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 8K (0.25 s)" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 16K (0.5 s)" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 32K (1.0 s)" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 64K (2.0 s)" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 128K (4.0 s)" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 256K (8.0 s)" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0xA5" size="1">
+          <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+          <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+          <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+          <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+          <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+          <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+          <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+        </register>
+        <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0xA4" size="1">
+          <bitfield caption="TWI High Noise Mode" mask="0x08" name="TWHNM"/>
+          <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+          <bitfield caption="" mask="0x03" name="TWCMD"/>
+        </register>
+        <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0xA3" size="1">
+          <bitfield caption="TWI Data Interrupt Flag." mask="0x80" name="TWDIF"/>
+          <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+          <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+          <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+          <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+          <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+          <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+          <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+        </register>
+        <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="TWI Slave Data Register" name="TWSD" offset="0xA0" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+        </register>
+        <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0xA1" size="1">
+          <bitfield caption="TWI Address Mask Bits" mask="0xFE" name="TWSAM" lsb="1"/>
+          <bitfield caption="TWI Address Enable" mask="0x01" name="TWAE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register A" name="ADMUXA" offset="0x29" size="1">
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x3F" name="MUX"/>
+        </register>
+        <register caption="The ADC multiplexer Selection Register B" name="ADMUXB" offset="0x28" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xE0" name="REFS"/>
+          <bitfield caption="Gain Selection Bits" mask="0x03" name="GSEL"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x25" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x24" size="1">
+          <bitfield caption="" mask="0x08" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x61" size="1">
+          <bitfield caption="ADC9 Digital Input Disable" mask="0x08" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x04" name="ADC8D"/>
+          <bitfield caption="ADC10 Digital input Disable" mask="0x02" name="ADC10D"/>
+          <bitfield caption="ADC11 Digital input Disable" mask="0x01" name="ADC11D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x60" size="1">
+          <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC4/AIN11 Digital input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="ADC3/AIN10 Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2/AIN01 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1/AIN00 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0/AREF Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T841">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator 0" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match A" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B" size="1">
+          <bitfield caption="Analog Comparator 0 Hysteresis Select" mask="0x80" name="HSEL0"/>
+          <bitfield caption="Analog Comparator 0 Hysteresis Level" mask="0x40" name="HLEV0"/>
+          <bitfield caption="Analog Comparator 0 Output Pin Enable" mask="0x10" name="ACOE0"/>
+          <bitfield caption="Analog Comparator 0 Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
+          <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
+        </register>
+        <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A" size="1">
+          <bitfield caption="Analog Comparator 0 Disable" mask="0x80" name="ACD0"/>
+          <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40" name="ACPMUX2"/>
+          <bitfield caption="Analog Comparator 0 Output" mask="0x20" name="ACO0"/>
+          <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x10" name="ACI0"/>
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x08" name="ACIE0"/>
+          <bitfield caption="Analog Comparator 0 Input Capture Enable" mask="0x04" name="ACIC0"/>
+          <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D" size="1">
+          <bitfield caption="Analog Comparator 1 Hysteresis Select" mask="0x80" name="HSEL1"/>
+          <bitfield caption="Analog Comparator 1 Hysteresis Level" mask="0x40" name="HLEV1"/>
+          <bitfield caption="Analog Comparator 1 Output Pin Enable" mask="0x10" name="ACOE1"/>
+          <bitfield caption="Analog Comparator 1 Multiplexer Enable" mask="0x04" name="ACME1"/>
+        </register>
+        <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C" size="1">
+          <bitfield caption="Analog Comparator 1 Disable" mask="0x80" name="ACD1"/>
+          <bitfield caption="Analog Comparator 1 Bandgap Select" mask="0x40" name="ACBG1"/>
+          <bitfield caption="Analog Comparator 1 Output" mask="0x20" name="ACO1"/>
+          <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x10" name="ACI1"/>
+          <bitfield caption="Analog Comparator 1 Interrupt Enable" mask="0x08" name="ACIE1"/>
+          <bitfield caption="Analog Comparator 1 Input Capture Enable" mask="0x04" name="ACIC1"/>
+          <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <register-group caption="Timer/Counter, 16-bit" name="TC2">
+        <register caption="Timer/Counter2 Interrupt Mask Register" name="TIMSK2" offset="0x31" size="1">
+          <bitfield caption="Timer/Counter2 Input Capture Interrupt Enable" mask="0x20" name="ICIE2"/>
+          <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE2B"/>
+          <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+          <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter2 Input Capture Flag" mask="0x20" name="ICF2"/>
+          <bitfield caption="Timer/Counter2 Output Compare B Match Flag" mask="0x04" name="OCF2B"/>
+          <bitfield caption="Timer/Counter2 Output Compare A Match Flag" mask="0x02" name="OCF2A"/>
+          <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+        </register>
+        <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xCA" size="1">
+          <bitfield caption="Compare Output Mode 2A, bits" mask="0xC0" name="COM2A"/>
+          <bitfield caption="Compare Output Mode 2B, bits" mask="0x30" name="COM2B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM2"/>
+        </register>
+        <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xC9" size="1">
+          <bitfield caption="Input Capture 2 Noise Canceler" mask="0x80" name="ICNC2"/>
+          <bitfield caption="Input Capture 2 Edge Select" mask="0x40" name="ICES2"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM2" lsb="2"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter2 Control Register C" name="TCCR2C" offset="0xC8" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC2A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC2B"/>
+        </register>
+        <register caption="Timer/Counter2  Bytes" name="TCNT2" offset="0xC6" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter2 Output Compare Register A  Bytes" name="OCR2A" offset="0xC4" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter2 Output Compare Register B  Bytes" name="OCR2B" offset="0xC2" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter2 Input Capture Register  Bytes" name="ICR2" offset="0xC0" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F">
+          <bitfield caption="Pin Change Enable Mask 1 Bit 0" mask="0x01" name="PCINT8"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 1" mask="0x02" name="PCINT9"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 2" mask="0x04" name="PCINT10"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 3" mask="0x08" name="PCINT11"/>
+        </register>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF">
+          <bitfield caption="Pin Change Enable Mask 0 Bit 0" mask="0x01" name="PCINT0"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 1" mask="0x02" name="PCINT1"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 2" mask="0x04" name="PCINT2"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 3" mask="0x08" name="PCINT3"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 4" mask="0x10" name="PCINT4"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 5" mask="0x20" name="PCINT5"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 6" mask="0x40" name="PCINT6"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 7" mask="0x80" name="PCINT7"/>
+        </register>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x70" size="1">
+          <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+          <bitfield caption="Power Reduction USART1" mask="0x40" name="PRUSART1"/>
+          <bitfield caption="Power Reduction USART0" mask="0x20" name="PRUSART0"/>
+          <bitfield caption="Power Reduction SPI" mask="0x10" name="PRSPI"/>
+          <bitfield caption="Power Reduction Timer/Counter2" mask="0x08" name="PRTIM2"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Configuration Change Protection" name="CCP" offset="0x71" size="1" mask="0xFF"/>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x73" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Clock Control Register" name="CLKCR" offset="0x72" size="1">
+          <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
+          <bitfield caption="Clock Switch Trigger" mask="0x40" name="CSTR"/>
+          <bitfield caption="Clock Output (Copy). Active low." mask="0x20" name="CKOUTC"/>
+          <bitfield caption="Start-up Time" mask="0x10" name="SUT"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CKSEL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1" mask="0xFF"/>
+        <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1" mask="0x03"/>
+        <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75" size="1" mask="0xFF"/>
+        <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+        <value value="0x03" caption="32 kHz" name="32_kHz"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      
+    </module>
+    <module caption="Timer/Counter Output Compare Pin" name="TOCPM">
+      <register-group caption="Timer/Counter Output Compare Pin" name="TOCPM">
+        <register caption="Timer Output Compare Pin Mux Selection 1" name="TOCPMSA1" offset="0x68" size="1">
+          <bitfield caption="Timer Output Compare Channel 7 Selection Bits" mask="0xC0" name="TOCC7S"/>
+          <bitfield caption="Timer Output Compare Channel 6 Selection Bits" mask="0x30" name="TOCC6S"/>
+          <bitfield caption="Timer Output Compare Channel 5 Selection Bits" mask="0x0C" name="TOCC5S"/>
+          <bitfield caption="Timer Output Compare Channel 4 Selection Bits" mask="0x03" name="TOCC4S"/>
+        </register>
+        <register caption="Timer Output Compare Pin Mux Selection 0" name="TOCPMSA0" offset="0x67" size="1">
+          <bitfield caption="Timer Output Compare Channel 3 Selection Bits" mask="0xC0" name="TOCC3S"/>
+          <bitfield caption="Timer Output Compare Channel 2 Selection Bits" mask="0x30" name="TOCC2S"/>
+          <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
+          <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
+        </register>
+        <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66" size="1">
+          <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
+          <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
+          <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
+          <bitfield caption="Timer Output Compare Channel 4 Output Enable" mask="0x10" name="TOCC4OE"/>
+          <bitfield caption="Timer Output Compare Channel 3 Output Enable" mask="0x08" name="TOCC3OE"/>
+          <bitfield caption="Timer Output Compare Channel 2 Output Enable" mask="0x04" name="TOCC2OE"/>
+          <bitfield caption="Timer Output Compare Channel 1 Output Enable" mask="0x02" name="TOCC1OE"/>
+          <bitfield caption="Timer Output Compare Channel 0 Output Enable" mask="0x01" name="TOCC0OE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Control Register" name="SPCR" offset="0xB2" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE"/>
+        </register>
+        <register caption="SPI Status Register" name="SPSR" offset="0xB1" size="1">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Data Register" name="SPDR" offset="0xB0" size="1" mask="0xFF"/>
+        <register caption="Remap Port Pins" name="REMAP" offset="0x65" size="1">
+          <bitfield caption="SPI Pin Mapping" mask="0x02" name="SPIMAP"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE">
+        <value caption="fcl/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fcl/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fcl/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fcl/128" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_14">
+      <pin pad="GND" position="14"/>
+      <pin pad="PA0" position="13"/>
+      <pin pad="PA1" position="12"/>
+      <pin pad="PA2" position="11"/>
+      <pin pad="PA3" position="10"/>
+      <pin pad="PA4" position="9"/>
+      <pin pad="PA5" position="8"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="6"/>
+      <pin pad="PB2" position="5"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB0" position="2"/>
+      <pin pad="VCC" position="1"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PA4" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA0" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PA7" position="15"/>
+      <pin pad="PA6" position="16"/>
+      <pin pad="PA5" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY44A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY44A.xml
new file mode 100644
index 00000000..572be88a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY44A.xml
@@ -0,0 +1,816 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny44A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-MF" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny44A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device name="ATtiny44A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA1"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+              <signal function="AREF" group="AREF" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SCL" pad="PA4"/>
+              <signal function="TWI" group="SDA" pad="PA6"/>
+              <signal function="SPI" group="USCK" pad="PA4"/>
+              <signal function="SPI" group="DO" pad="PA5"/>
+              <signal function="SPI" group="DI" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="T0" pad="PA3"/>
+              <signal function="T0" group="OC0B" pad="PA7"/>
+              <signal function="T0" group="OC0A" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="T1" group="T1" pad="PA4"/>
+              <signal function="T1" group="OC1B" pad="PA5"/>
+              <signal function="T1" group="OC1A" pad="PA6"/>
+              <signal function="T1" group="ICP1" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="EXT_INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="USI_STR" caption="USI START"/>
+        <interrupt index="16" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9207"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x07"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="50"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="150"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB3 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1" mask="0xFF">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x3F" name="MUX"/>
+        </register>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00" value="0x00"/>
+        <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal 1.1V voltage reference" name="VAL_0x02" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x01FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_14">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PB0" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="PB2" position="5"/>
+      <pin pad="PA7" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA5" position="8"/>
+      <pin pad="PA4" position="9"/>
+      <pin pad="PA3" position="10"/>
+      <pin pad="PA2" position="11"/>
+      <pin pad="PA1" position="12"/>
+      <pin pad="PA0" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PA4" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA0" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PA7" position="15"/>
+      <pin pad="PA6" position="16"/>
+      <pin pad="PA5" position="20"/>
+    </pinout>
+    <pinout name="BGA_16">
+      <pin pad="PA5" position="A2"/>
+      <pin pad="PA6" position="A3"/>
+      <pin pad="PB2" position="A4"/>
+      <pin pad="PA4" position="B1"/>
+      <pin pad="PA7" position="B2"/>
+      <pin pad="PB1" position="B3"/>
+      <pin pad="PB3" position="B4"/>
+      <pin pad="PA3" position="C1"/>
+      <pin pad="PA2" position="C2"/>
+      <pin pad="PA1" position="C3"/>
+      <pin pad="PB0" position="C4"/>
+      <pin pad="PA0" position="D1"/>
+      <pin pad="GND" position="D2"/>
+      <pin pad="GND" position="D3"/>
+      <pin pad="VCC" position="D4"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY45.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY45.xml
new file mode 100644
index 00000000..b587327f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY45.xml
@@ -0,0 +1,802 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny45V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny45V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny45V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny45V-10XU" package="TSSOP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny45V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny45V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny45V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny45V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny45V-20XU" package="TSSOP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny45V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny45" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+              <signal function="PORTB" group="P" index="4" pad="PB4"/>
+              <signal function="PORTB" group="P" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="1" pad="PB1"/>
+              <signal function="ACIN" group="AIN" index="0" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PB5"/>
+              <signal function="ADC" group="ADC" index="1" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="2" pad="PB4"/>
+              <signal function="AREF" group="AREF" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SDA" pad="PB0"/>
+              <signal function="TWI" group="SCL" pad="PB2"/>
+              <signal function="SPI" group="DI" pad="PB0"/>
+              <signal function="SPI" group="DO" pad="PB1"/>
+              <signal function="SPI" group="USCK" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PB3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PB4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PB5"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="T0" pad="PB2"/>
+              <signal function="T0" group="OC0B" pad="PB1"/>
+              <signal function="T0" group="OC0A" pad="PB0"/>
+            </signals>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T1" group="OC1B" pad="PB4"/>
+              <signal function="T1" group="OC1BINV" pad="PB3"/>
+              <signal function="T1" group="OC1A" pad="PB1"/>
+              <signal function="T1" group="OC1AINV" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin change Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="5" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="6" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog comparator"/>
+        <interrupt index="8" name="ADC" caption="ADC Conversion ready"/>
+        <interrupt index="9" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="10" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="11" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="13" name="USI_START" caption="USI START"/>
+        <interrupt index="14" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9206"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x06"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x22"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="50"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB5 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB4" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms" name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x3F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Reference Selection Bit 2" mask="0x10" name="REFS2"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x10" name="ADC2D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x04" name="ADC1D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask" name="PCMSK" offset="0x35" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change on INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x4A" size="1">
+          <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x4C" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR0"/>
+        </register>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x50" size="1">
+          <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4F" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4E" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer counter control register" name="GTCCR" offset="0x4C" size="1">
+          <bitfield caption="Pulse Width Modulator B Enable" mask="0x40" name="PWM1B"/>
+          <bitfield caption="Comparator B Output Mode" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x08" name="FOC1B"/>
+          <bitfield caption="Force Output Compare 1A" mask="0x04" name="FOC1A"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1" mask="0x02" name="PSR1"/>
+        </register>
+        <register caption="Dead time prescaler register" name="DTPS" offset="0x43" size="1">
+          <bitfield caption="" mask="0x03" name="DTPS"/>
+        </register>
+        <register caption="Dead time value register" name="DT1A" offset="0x45" size="1">
+          <bitfield caption="" mask="0xF0" name="DTVH"/>
+          <bitfield caption="" mask="0x0F" name="DTVL"/>
+        </register>
+        <register caption="Dead time value B" name="DT1B" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DTVH"/>
+          <bitfield caption="" mask="0x0F" name="DTVL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="CLK_COMP_MATCH_OUT_MODE">
+        <value caption="Disconnected from OCn/PWMn" name="VAL_0x00" value="0x00"/>
+        <value caption="Toggle OCn/PWMn output line" name="VAL_0x01" value="0x01"/>
+        <value caption="Clear OCn/PWMn output line" name="VAL_0x02" value="0x02"/>
+        <value caption="set OCn/PWMn output line" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x40" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x80" name="BODS"/>
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x47" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x42" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x32" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x31" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+        <value value="0x01" caption="6.4 MHz" name="6_4_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_8">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB1" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="VCC" position="8"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="VCC" position="15"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY461.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY461.xml
new file mode 100644
index 00000000..8077ecc9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY461.xml
@@ -0,0 +1,936 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny461V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny461V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny461V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny461-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny461-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny461-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny461" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+              <signal function="PORTB" group="P" index="4" pad="PB4"/>
+              <signal function="PORTB" group="P" index="5" pad="PB5"/>
+              <signal function="PORTB" group="P" index="6" pad="PB6"/>
+              <signal function="PORTB" group="P" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA7"/>
+              <signal function="ADC" group="ADC" index="7" pad="PB4"/>
+              <signal function="ADC" group="ADC" index="8" pad="PB5"/>
+              <signal function="ADC" group="ADC" index="9" pad="PB6"/>
+              <signal function="ADC" group="ADC" index="10" pad="PB7"/>
+              <signal function="AREF" group="AREF" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
+              <signal function="ACIN" group="AIN" index="2" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+             <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
+              <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
+              <signal field="USIPOS" function="USI_ALT" group="SCL " pad="PA2"/>
+              <signal field="USIPOS" function="USI_ALT" group="SDA" pad="PA0"/>
+              <signal field="USIPOS" function="USI" group="DI" pad="PB0"/>
+              <signal field="USIPOS" function="USI" group="DO" pad="PB1"/>
+              <signal field="USIPOS" function="USI" group="USCK" pad="PB2"/>
+              <signal field="USIPOS" function="USI_ALT" group="USCK" pad="PA2"/>
+              <signal field="USIPOS" function="USI_ALT" group="DO" pad="PA1"/>
+              <signal field="USIPOS" function="USI_ALT" group="DI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="ICP0" pad="PA4"/>
+              <signal function="T0" group="T0" pad="PB6"/>
+            </signals>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T1" group="OC1AINV" pad="PB0"/>
+              <signal function="T1" group="OC1A" pad="PB1"/>
+              <signal function="T1" group="OC1BINV" pad="PB2"/>
+              <signal function="T1" group="OC1B" pad="PB3"/>
+              <signal function="T1" group="OC1DINV" pad="PB4"/>
+              <signal function="T1" group="OC1D" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="PCINT" index="12" pad="PB4"/>
+              <signal function="EXTINT" group="PCINT" index="13" pad="PB5"/>
+              <signal function="EXTINT" group="PCINT" index="14" pad="PB6"/>
+              <signal function="EXTINT" group="PCINT" index="15" pad="PB7"/>
+              <signal function="EXTINT" group="INT" index="1" pad="PA2"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_START" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+        <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+        <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+        <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9208"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x08"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x20"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="" mask="0x10" name="REFS2"/>
+          <bitfield caption="" mask="0x08" name="MUX5"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+          <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x35" size="1">
+          <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+          <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+          <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+          <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+          <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+          <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+          <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+          <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+          <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+          <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+          <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+          <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+        </register>
+        <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+          <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+          <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+          <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+          <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+          <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+          <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+          <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+          <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DT1H"/>
+          <bitfield caption="" mask="0x0F" name="DT1L"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="MISC_2BIT_SCALE">
+        <value caption="1x" name="VAL_0x00" value="0x00"/>
+        <value caption="2x" name="VAL_0x01" value="0x01"/>
+        <value caption="4x" name="VAL_0x02" value="0x02"/>
+        <value caption="8x" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+      <value-group caption="" name="PULSE_WIDTH_MODU2">
+        <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+        <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+        <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+        <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x01FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_20">
+      <pin pad="PB0" position="1"/>
+      <pin pad="PB1" position="2"/>
+      <pin pad="PB2" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="GND" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB5" position="8"/>
+      <pin pad="PB6" position="9"/>
+      <pin pad="PB7" position="10"/>
+      <pin pad="PA7" position="11"/>
+      <pin pad="PA6" position="12"/>
+      <pin pad="PA5" position="13"/>
+      <pin pad="PA4" position="14"/>
+      <pin pad="AVCC" position="15"/>
+      <pin pad="AGND" position="16"/>
+      <pin pad="PA3" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA1" position="19"/>
+      <pin pad="PA0" position="20"/>
+    </pinout>
+    <pinout name="QFN_32">
+      <pin pad="PB3" position="2"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB5" position="8"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB7" position="11"/>
+      <pin pad="PA7" position="13"/>
+      <pin pad="PA6" position="14"/>
+      <pin pad="PA5" position="15"/>
+      <pin pad="PA4" position="17"/>
+      <pin pad="AVCC" position="18"/>
+      <pin pad="AGND" position="21"/>
+      <pin pad="PA3" position="22"/>
+      <pin pad="PA2" position="23"/>
+      <pin pad="PA1" position="25"/>
+      <pin pad="PA0" position="26"/>
+      <pin pad="PB0" position="30"/>
+      <pin pad="PB1" position="31"/>
+      <pin pad="PB2" position="32"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY461A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY461A.xml
new file mode 100644
index 00000000..ec2190d8
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY461A.xml
@@ -0,0 +1,804 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny461A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0160">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+          <instance name="TC1" caption="Timer/Counter, 8-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_START" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+        <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+        <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+        <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9208"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x08"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x20"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="" mask="0x10" name="REFS2"/>
+          <bitfield caption="" mask="0x08" name="MUX5"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+          <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x35" size="1">
+          <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+          <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+          <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="Timer/Counter, 8-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+          <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+          <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+          <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+          <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+          <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+          <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+          <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+          <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+          <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+        </register>
+        <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+          <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+          <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+          <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+          <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+          <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+          <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+          <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+          <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DT1H"/>
+          <bitfield caption="" mask="0x0F" name="DT1L"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="MISC_2BIT_SCALE">
+        <value caption="1x" name="VAL_0x00" value="0x00"/>
+        <value caption="2x" name="VAL_0x01" value="0x01"/>
+        <value caption="4x" name="VAL_0x02" value="0x02"/>
+        <value caption="8x" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+      <value-group caption="" name="PULSE_WIDTH_MODU2">
+        <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+        <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+        <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+        <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x01FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x80" name="BODS"/>
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY48.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY48.xml
new file mode 100644
index 00000000..f64387b0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY48.xml
@@ -0,0 +1,1016 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny48-MMU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+    <variant ordercode="ATtiny48-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+    <variant ordercode="ATtiny48-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP28" pinout="PDIP"/>
+    <variant ordercode="ATtiny48-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP32" pinout="TQFP32_QFN32"/>
+    <variant ordercode="ATtiny48-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UFBGA32" pinout="UFBGA"/>
+    <variant ordercode="ATtiny48-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN32" pinout="TQFP32_QFN32"/>
+  </variants>
+  <devices>
+    <device name="ATtiny48" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x1000">
+          <memory-segment start="0x0000" size="0x1000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0200">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0100" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="T" pad="PD5"/>
+              <signal group="ICP" pad="PB0"/>
+              <signal group="OCA" pad="PB1"/>
+              <signal group="OCB" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PD6"/>
+              <signal group="AIN" index="1" pad="PD7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+              <signal group="P" function="default" pad="PB4" index="4"/>
+              <signal group="P" function="default" pad="PB5" index="5"/>
+              <signal group="P" function="default" pad="PB6" index="6"/>
+              <signal group="P" function="default" pad="PB7" index="7"/>
+            </signals>
+          </instance>
+          <instance name="PORTD" caption="I/O Port">
+            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PD0" index="0"/>
+              <signal group="P" function="default" pad="PD1" index="1"/>
+              <signal group="P" function="default" pad="PD2" index="2"/>
+              <signal group="P" function="default" pad="PD3" index="3"/>
+              <signal group="P" function="default" pad="PD4" index="4"/>
+              <signal group="P" function="default" pad="PD5" index="5"/>
+              <signal group="P" function="default" pad="PD6" index="6"/>
+              <signal group="P" function="default" pad="PD7" index="7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC" caption="I/O Port">
+            <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PC0" index="0"/>
+              <signal group="P" function="default" pad="PC1" index="1"/>
+              <signal group="P" function="default" pad="PC2" index="2"/>
+              <signal group="P" function="default" pad="PC3" index="3"/>
+              <signal group="P" function="default" pad="PC4" index="4"/>
+              <signal group="P" function="default" pad="PC5" index="5"/>
+              <signal group="P" function="default" pad="PC6" index="6"/>
+              <signal group="P" function="default" pad="PC7" index="7"/>
+            </signals>
+         </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PA0" index="0"/>
+              <signal group="P" function="default" pad="PA1" index="1"/>
+              <signal group="P" function="default" pad="PA2" index="2"/>
+              <signal group="P" function="default" pad="PA3" index="3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+            <signals>
+              <signal group="SCK" pad="PB5"/>
+              <signal group="MISO" pad="PB4"/>
+              <signal group="MOSI" pad="PB3"/>
+              <signal group="SS" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+            <signals>
+              <signal group="SCL" pad="PC6"/>
+              <signal group="SDA" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" pad="PC0"/>
+              <signal group="ADC" index="1" pad="PC1"/>
+              <signal group="ADC" index="2" pad="PC2"/>
+              <signal group="ADC" index="3" pad="PC3"/>
+              <signal group="ADC" index="4" pad="PC4"/>
+              <signal group="ADC" index="5" pad="PC5"/>
+              <signal group="ADC" index="6" pad="PA0"/>
+              <signal group="ADC" index="7" pad="PA1"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PB0"/>
+              <signal group="PCINT" index="1" pad="PB1"/>
+              <signal group="PCINT" index="2" pad="PB2"/>
+              <signal group="PCINT" index="3" pad="PB3"/>
+              <signal group="PCINT" index="4" pad="PB4"/>
+              <signal group="PCINT" index="5" pad="PB5"/>
+              <signal group="PCINT" index="6" pad="PB6"/>
+              <signal group="PCINT" index="7" pad="PB7"/>
+              <signal group="PCINT" index="8" pad="PC0"/>
+              <signal group="PCINT" index="9" pad="PC1"/>
+              <signal group="PCINT" index="10" pad="PC2"/>
+              <signal group="PCINT" index="11" pad="PC3"/>
+              <signal group="PCINT" index="12" pad="PC4"/>
+              <signal group="PCINT" index="13" pad="PC5"/>
+              <signal group="PCINT" index="14" pad="PC6"/>
+              <signal group="PCINT" index="15" pad="PC7"/>
+              <signal group="PCINT" index="16" pad="PD0"/>
+              <signal group="PCINT" index="17" pad="PD1"/>
+              <signal group="PCINT" index="18" pad="PD2"/>
+              <signal group="PCINT" index="19" pad="PD3"/>
+              <signal group="PCINT" index="20" pad="PD4"/>
+              <signal group="PCINT" index="21" pad="PD5"/>
+              <signal group="PCINT" index="22" pad="PD6"/>
+              <signal group="PCINT" index="23" pad="PD7"/>
+              <signal group="PCINT" index="24" pad="PA0"/>
+              <signal group="PCINT" index="25" pad="PA1"/>
+              <signal group="PCINT" index="26" pad="PA2"/>
+              <signal group="PCINT" index="27" pad="PA3"/>
+              <signal group="INT" index="0" pad="PD2"/>
+              <signal group="INT" index="1" pad="PD3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal group="T" pad="PD4"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+        <interrupt index="6" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+        <interrupt index="7" name="WDT" caption="Watchdog Time-out Interrupt"/>
+        <interrupt index="8" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="9" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="10" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="11" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="12" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+        <interrupt index="13" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+        <interrupt index="14" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+        <interrupt index="15" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+        <interrupt index="16" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+        <interrupt index="19" name="TWI" caption="Two-wire Serial Interface"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9209"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x92"/>
+          <property name="SIGNATURE2" value="0x09"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x31"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x0C"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x1C"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x2C"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x0E"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x1E"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x2E"/>
+        <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x0F"/>
+        <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x1F"/>
+        <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x2F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
+          <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+          <bitfield caption="" mask="0x80" name="FOC1A"/>
+          <bitfield caption="" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTD">
+        <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+        <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTC">
+        <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+        <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x2E" size="1" mask="0x0F" ocd-rw="R"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x2D" size="1" mask="0x0F" ocd-rw="R"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE_3BIT">
+        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+          <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer High" name="SPH" offset="0x5E" size="1" mask="0x01"/>
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+          <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+          <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+          <bitfield caption="Sleep Mode" mask="0x06" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+        <register caption="Port Configuration Register" name="PORTCR" offset="0x32" size="1" ocd-rw="R">
+          <bitfield caption="" mask="0x80" name="BBMD"/>
+          <bitfield caption="" mask="0x40" name="BBMC"/>
+          <bitfield caption="" mask="0x20" name="BBMB"/>
+          <bitfield caption="" mask="0x10" name="BBMA"/>
+          <bitfield caption="" mask="0x08" name="PUDD"/>
+          <bitfield caption="" mask="0x04" name="PUDC"/>
+          <bitfield caption="" mask="0x02" name="PUDB"/>
+          <bitfield caption="" mask="0x01" name="PUDA"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Power Save" name="PSAVE" value="0x03"/>
+        <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWHSR" name="TWHSR" offset="0xBE" size="1">
+          <bitfield caption="" mask="0x01" name="TWHS"/>
+        </register>
+        <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+          <bitfield caption="" mask="0xFE" name="TWAM"/>
+        </register>
+        <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+        <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1">
+          <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+          <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+          <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+          <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+          <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+          <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+          <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+        </register>
+        <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+          <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+          <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+        </register>
+        <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+        <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+          <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+          <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_TWI_PRESACLE">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="4" name="VAL_0x01" value="0x01"/>
+        <value caption="16" name="VAL_0x02" value="0x02"/>
+        <value caption="64" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+          <bitfield caption="Reference Selection Bit 0" mask="0x40" name="REFS0" values="ANALOG_ADC_V_REF7"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="" mask="0x40" name="ACME"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="" mask="0x02" name="AIN1D"/>
+          <bitfield caption="" mask="0x01" name="AIN0D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+          <bitfield caption="" mask="0x80" name="ADC7D"/>
+          <bitfield caption="" mask="0x40" name="ADC6D"/>
+          <bitfield caption="" mask="0x20" name="ADC5D"/>
+          <bitfield caption="" mask="0x10" name="ADC4D"/>
+          <bitfield caption="" mask="0x08" name="ADC3D"/>
+          <bitfield caption="" mask="0x04" name="ADC2D"/>
+          <bitfield caption="" mask="0x02" name="ADC1D"/>
+          <bitfield caption="" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF7">
+        <value caption="Internal 1.1V Voltage Reference" name="VAL_0x00" value="0x00"/>
+        <value caption="AVcc Reference" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+          <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+        </register>
+        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+        </register>
+        <register caption="" name="PCICR" offset="0x68" size="1">
+          <bitfield caption="" mask="0x0F" name="PCIE"/>
+        </register>
+        <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6A" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT" lsb="24"/>
+        </register>
+        <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x45" size="1">
+          <bitfield caption="Clear Timer on Compare Match" mask="0x08" name="CTC0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="TQFP32_QFN32">
+      <pin pad="PD3" position="1"/>
+      <pin pad="PD4" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PA3" position="6"/>
+      <pin pad="PB6" position="7"/>
+      <pin pad="PB7" position="8"/>
+      <pin pad="PD5" position="9"/>
+      <pin pad="PD6" position="10"/>
+      <pin pad="PD7" position="11"/>
+      <pin pad="PB0" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB3" position="15"/>
+      <pin pad="PB4" position="16"/>
+      <pin pad="PB5" position="17"/>
+      <pin pad="AVCC" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PC7" position="20"/>
+      <pin pad="GND" position="21"/>
+      <pin pad="PA1" position="22"/>
+      <pin pad="PC0" position="23"/>
+      <pin pad="PC1" position="24"/>
+      <pin pad="PC2" position="25"/>
+      <pin pad="PC3" position="26"/>
+      <pin pad="PC4" position="27"/>
+      <pin pad="PC5" position="28"/>
+      <pin pad="PC6" position="29"/>
+      <pin pad="PD0" position="30"/>
+      <pin pad="PD1" position="31"/>
+      <pin pad="PD2" position="32"/>
+    </pinout>
+    <pinout name="PDIP">
+      <pin pad="PC6" position="1"/>
+      <pin pad="PD0" position="2"/>
+      <pin pad="PD1" position="3"/>
+      <pin pad="PD2" position="4"/>
+      <pin pad="PD3" position="5"/>
+      <pin pad="PD4" position="6"/>
+      <pin pad="VCC" position="7"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="PB6" position="9"/>
+      <pin pad="PB7" position="10"/>
+      <pin pad="PD5" position="11"/>
+      <pin pad="PD6" position="12"/>
+      <pin pad="PD7" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB2" position="16"/>
+      <pin pad="PB3" position="17"/>
+      <pin pad="PB4" position="18"/>
+      <pin pad="PB5" position="19"/>
+      <pin pad="AVCC" position="20"/>
+      <pin pad="PC7" position="21"/>
+      <pin pad="GND" position="22"/>
+      <pin pad="PC0" position="23"/>
+      <pin pad="PC1" position="24"/>
+      <pin pad="PC2" position="25"/>
+      <pin pad="PC3" position="26"/>
+      <pin pad="PC4" position="27"/>
+      <pin pad="PC5" position="28"/>
+    </pinout>
+    <pinout name="QFN28">
+      <pin pad="PD3" position="1"/>
+      <pin pad="PD4" position="2"/>
+      <pin pad="VCC" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB6" position="5"/>
+      <pin pad="PB7" position="6"/>
+      <pin pad="PD5" position="7"/>
+      <pin pad="PD6" position="8"/>
+      <pin pad="PD7" position="9"/>
+      <pin pad="PB0" position="10"/>
+      <pin pad="PB1" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB4" position="14"/>
+      <pin pad="PB5" position="15"/>
+      <pin pad="AVCC" position="16"/>
+      <pin pad="PC7" position="17"/>
+      <pin pad="GND" position="18"/>
+      <pin pad="PC0" position="19"/>
+      <pin pad="PC1" position="20"/>
+      <pin pad="PC2" position="21"/>
+      <pin pad="PC3" position="22"/>
+      <pin pad="PC4" position="23"/>
+      <pin pad="PC5" position="24"/>
+      <pin pad="PC6" position="25"/>
+      <pin pad="PD0" position="26"/>
+      <pin pad="PD1" position="27"/>
+      <pin pad="PD2" position="28"/>
+    </pinout>
+    <pinout name="UFBGA">
+      <pin pad="PD2" position="A1"/>
+      <pin pad="PD3" position="B1"/>
+      <pin pad="GND" position="C1"/>
+      <pin pad="VCC" position="D1"/>
+      <pin pad="PB6" position="E1"/>
+      <pin pad="PB7" position="F1"/>
+      <pin pad="PD1" position="A2"/>
+      <pin pad="PD4" position="B2"/>
+      <pin pad="PA2" position="C2"/>
+      <pin pad="PA3" position="D2"/>
+      <pin pad="PD6" position="E2"/>
+      <pin pad="PD5" position="F2"/>
+      <pin pad="PC6" position="A3"/>
+      <pin pad="PD0" position="B3"/>
+      <pin pad="PB0" position="E3"/>
+      <pin pad="PD7" position="F3"/>
+      <pin pad="PC4" position="A4"/>
+      <pin pad="PC5" position="B4"/>
+      <pin pad="PB2" position="E4"/>
+      <pin pad="PB1" position="F4"/>
+      <pin pad="PC2" position="A5"/>
+      <pin pad="PC3" position="B5"/>
+      <pin pad="PA1" position="C5"/>
+      <pin pad="PC7" position="D5"/>
+      <pin pad="AVCC" position="E5"/>
+      <pin pad="PB3" position="F5"/>
+      <pin pad="PC1" position="A6"/>
+      <pin pad="PC0" position="B6"/>
+      <pin pad="GND" position="C6"/>
+      <pin pad="PA0" position="D6"/>
+      <pin pad="PB5" position="E6"/>
+      <pin pad="PB4" position="F6"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY5.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY5.xml
new file mode 100644
index 00000000..b72f72d1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY5.xml
@@ -0,0 +1,417 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+      <variant ordercode="ATtiny5-TSHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+      <variant ordercode="ATtiny5-MAHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UDFN8" pinout="UDFN8"/>
+      <variant ordercode="ATtiny5-TS8R" speedmax="10000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+  </variants>
+  <devices>
+    <device name="ATtiny5" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4200" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x20" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="flash" start="0x4000" name="MAPPED_FLASH" size="0x0200"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" pad="PB0" function="default"/>
+              <signal group="ADC" index="1" pad="PB1" function="default"/>
+              <signal group="ADC" index="2" pad="PB2" function="default"/>
+              <signal group="ADC" index="3" pad="PB3" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PB0" function="default"/>
+              <signal group="AIN" index="1" pad="PB1" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PB0" function="default"/>
+              <signal group="PCINT" index="1" pad="PB1" function="default"/>
+              <signal group="PCINT" index="2" pad="PB2" function="default"/>
+              <signal group="PCINT" index="3" pad="PB3" function="default"/>
+              <signal group="INT" index="0" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC0" caption="Timer/Counter, 16-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="OCA" pad="PB0" function="default"/>
+              <signal group="OCB" pad="PB1" function="default"/>
+              <signal group="T" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="TIM0_CAPT" caption="Timer/Counter0 Input Capture"/>
+        <interrupt index="4" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="5" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="6" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="8" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="9" name="VLM" caption="Vcc Voltage Level Monitor"/>
+        <interrupt index="10" name="ADC" caption="ADC Conversion Complete"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x8f"/>
+          <property name="SIGNATURE2" value="0x09"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x1B" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x03" name="MUX"/>
+        </register>
+        <register caption="ADC Data Register" name="ADCL" offset="0x19" size="1" mask="0xFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x1D" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x1C" size="1">
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T10"/>
+        </register>
+        <register caption="Digital Input Disable Register" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="" mask="0x08" name="ADC3D"/>
+          <bitfield caption="" mask="0x04" name="ADC2D"/>
+          <bitfield caption="" mask="0x02" name="ADC1D"/>
+          <bitfield caption="" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T10">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter0 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Pin Change Interrupt 0 Request" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter0 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x1F" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture  Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x3A" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction ADC" mask="0x02" name="PRADC"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+        </register>
+        <register caption="Vcc Level Monitoring Control and Status Register" name="VLMCSR" offset="0x34" size="1">
+          <bitfield caption="VLM Flag" mask="0x80" name="VLMF"/>
+          <bitfield caption="VLM Interrupt Enable" mask="0x40" name="VLMIE"/>
+          <bitfield caption="Trigger Level of Voltage Level Monitor bits" mask="0x07" name="VLM"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE_3BITS">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x0C" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x03" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x01" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x00" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x02" size="1" mask="0x0F"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x15" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"/>
+        </register>
+        <register caption="External Interrupt Mask register" name="EIMSK" offset="0x13" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+        <register caption="External Interrupt Flag register" name="EIFR" offset="0x14" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x12" size="1">
+          <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x11" size="1">
+          <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+        </register>
+        <register caption="Pin Change Mask Register" name="PCMSK" offset="0x10" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x2E" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x2D" size="1">
+          <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM0" lsb="2"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register C" name="TCCR0C" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC0B"/>
+        </register>
+        <register caption="Timer/Counter0 " name="TCNT0" offset="0x28" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 0 Output Compare Register A " name="OCR0A" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B " name="OCR0B" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR0" offset="0x22" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register 0" name="TIMSK0" offset="0x2B" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x20" name="ICIE0"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR0" offset="0x2A" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x20" name="ICF0"/>
+          <bitfield caption="Timer Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x2F" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOT23_6">
+      <pin pad="PB0" position="1"/>
+      <pin pad="GND" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB2" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="PB3" position="6"/>
+    </pinout>
+    <pinout name="UDFN8">
+      <pin pad="PB1" position="1"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="VCC" position="7"/>
+      <pin pad="PB2" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY804.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY804.xml
new file mode 100644
index 00000000..dbcd4288
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY804.xml
@@ -0,0 +1,2088 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny804-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny804-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny804">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY806.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY806.xml
new file mode 100644
index 00000000..c2118db9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY806.xml
@@ -0,0 +1,2155 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny806-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny806-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny806-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny806-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny806">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x24"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY807.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY807.xml
new file mode 100644
index 00000000..bbda556e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY807.xml
@@ -0,0 +1,2152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny807-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny807-MRF" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny807">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0680"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal function="CCL" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal function="CCL" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK_ALT" group="BREAK" pad="PC4"/>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2603" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2603" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2603" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2603" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2603" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2603" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="17" module-instance="AC0" name="AC"/>
+        <interrupt index="20" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="21" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="24" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="25" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="26" module-instance="SPI0" name="INT"/>
+        <interrupt index="27" module-instance="USART0" name="RXC"/>
+        <interrupt index="28" module-instance="USART0" name="DRE"/>
+        <interrupt index="29" module-instance="USART0" name="TXC"/>
+        <interrupt index="30" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x23"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x18" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Positive Pin 2" name="PIN2" value="0x02"/>
+        <value caption="Positive Pin 3" name="PIN3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+        <value caption="External reference" name="VREFA" value="0x02"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor/DAC1" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x40">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2603" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x02" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Event System" id="I2603" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Asynchronous User Ch 11 Input Selection - TCB1" initval="0x00" name="ASYNCUSER11" offset="0x1D" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 11 Input Selection - TCB1" mask="0xff" name="ASYNCUSER11" rw="RW" values="EVSYS_ASYNCUSER11"/>
+        </register>
+        <register caption="Asynchronous User Ch 12 Input Selection - ADC1" initval="0x00" name="ASYNCUSER12" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 12 Input Selection - ADC0" mask="0xff" name="ASYNCUSER12" rw="RW" values="EVSYS_ASYNCUSER12"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x13"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x14"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+        <value caption="Analog Comparator 1 out" name="AC1_OUT" value="0x12"/>
+        <value caption="Analog Comparator 2 out" name="AC2_OUT" value="0x13"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 11 Input Selection - TCB1 select" name="EVSYS_ASYNCUSER11">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 12 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER12">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+        <value caption="Timer/Counter B1" name="TCB1" value="0x15"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2603" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125HZ" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2603" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2603" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x0"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x1"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x2"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x3"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x4"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x5"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2603" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2603" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2603" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x0"/>
+        <value caption="Force Update" name="UPDATE" value="0x1"/>
+        <value caption="Force Restart" name="RESTART" value="0x2"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x3"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+            <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_DEFAULT_SDAHOLD"/>
+            <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_DEFAULT_SDASETUP"/>
+          </mode>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <mode name="DEFAULT">
+            <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+          </mode>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_DEFAULT_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_DEFAULT_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Autobaud majority voter bypass" mask="0x80" name="ABMBP" rw="RW"/>
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2603" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2603" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x0"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x1"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x2"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x3"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x4"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY814.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY814.xml
new file mode 100644
index 00000000..c7452b09
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY814.xml
@@ -0,0 +1,2429 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny814-SSFR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny814-SSNR" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny814-SSNRES" package="SOIC14" pinout="SOIC14" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny814">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2600" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2600" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2600" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2600" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x22"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.1 V" name="BODLEVEL1" value="0x01"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="2.9 V" name="BODLEVEL3" value="0x03"/>
+        <value caption="3.3 V" name="BODLEVEL4" value="0x04"/>
+        <value caption="3.7 V" name="BODLEVEL5" value="0x05"/>
+        <value caption="4.0 V" name="BODLEVEL6" value="0x06"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2600" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2600" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2600" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2600" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2600" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2600" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2600" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2600" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC14">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="PB1" position="8"/>
+      <pin pad="PB0" position="9"/>
+      <pin pad="PA0" position="10"/>
+      <pin pad="PA1" position="11"/>
+      <pin pad="PA2" position="12"/>
+      <pin pad="PA3" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY816.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY816.xml
new file mode 100644
index 00000000..4ee6d548
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY816.xml
@@ -0,0 +1,2503 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny816-MFR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny816-MNR" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny816-MNRES" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny816-SFR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny816-SNR" package="SOIC20" pinout="SOIC20" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny816">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2600" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2600" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2600" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2600" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x21"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.1 V" name="BODLEVEL1" value="0x01"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="2.9 V" name="BODLEVEL3" value="0x03"/>
+        <value caption="3.3 V" name="BODLEVEL4" value="0x04"/>
+        <value caption="3.7 V" name="BODLEVEL5" value="0x05"/>
+        <value caption="4.0 V" name="BODLEVEL6" value="0x06"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2600" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2600" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2600" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2600" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2600" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2600" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2600" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2600" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN20">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB5" position="9"/>
+      <pin pad="PB4" position="10"/>
+      <pin pad="PB3" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PC0" position="15"/>
+      <pin pad="PC1" position="16"/>
+      <pin pad="PC2" position="17"/>
+      <pin pad="PC3" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PA1" position="20"/>
+    </pinout>
+    <pinout name="SOIC20">
+      <pin pad="VDD" position="1"/>
+      <pin pad="PA4" position="2"/>
+      <pin pad="PA5" position="3"/>
+      <pin pad="PA6" position="4"/>
+      <pin pad="PA7" position="5"/>
+      <pin pad="PB5" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB3" position="8"/>
+      <pin pad="PB2" position="9"/>
+      <pin pad="PB1" position="10"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PC0" position="12"/>
+      <pin pad="PC1" position="13"/>
+      <pin pad="PC2" position="14"/>
+      <pin pad="PC3" position="15"/>
+      <pin pad="PA0" position="16"/>
+      <pin pad="PA1" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA3" position="19"/>
+      <pin pad="GND" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY817.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY817.xml
new file mode 100644
index 00000000..023897a0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY817.xml
@@ -0,0 +1,2500 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny817-MFR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny817-MNR" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny817-MNRES" package="VQFN24" pinout="QFN24" speedmax="20000000" tempmax="105" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device architecture="AVR8X" family="AVR TINY" name="ATtiny817">
+      <address-spaces>
+        <address-space endianness="little" id="data" name="data" size="0xA000" start="0x0000">
+          <memory-segment exec="0" name="EEPROM" pagesize="0x20" rw="RW" size="0x0080" start="0x00001400" type="eeprom"/>
+          <memory-segment exec="0" name="FUSES" pagesize="0x20" rw="RW" size="0xA" start="0x00001280" type="fuses"/>
+          <memory-segment exec="0" name="INTERNAL_SRAM" rw="RW" size="0x0200" start="0x3e00" type="ram"/>
+          <memory-segment exec="0" name="IO" rw="RW" size="0x1100" start="0x00000000" type="io"/>
+          <memory-segment exec="0" name="LOCKBITS" pagesize="0x20" rw="RW" size="0x1" start="0x0000128A" type="lockbits"/>
+          <memory-segment exec="0" name="MAPPED_PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00008000" type="other"/>
+          <memory-segment exec="0" name="PROD_SIGNATURES" pagesize="0x40" rw="R" size="0x3D" start="0x00001103" type="signatures"/>
+          <memory-segment exec="0" name="SIGNATURES" pagesize="0x40" rw="R" size="0x3" start="0x00001100" type="signatures"/>
+          <memory-segment exec="0" name="USER_SIGNATURES" pagesize="0x20" rw="RW" size="0x20" start="0x00001300" type="user_signatures"/>
+        </address-space>
+        <address-space endianness="little" id="prog" name="prog" size="0x2000" start="0x0000">
+          <memory-segment exec="1" name="PROGMEM" pagesize="0x40" rw="RW" size="0x2000" start="0x00000000" type="flash"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module id="I2106" name="AC">
+          <instance name="AC0">
+            <register-group address-space="data" name="AC0" name-in-module="AC" offset="0x0670"/>
+            <signals>
+              <signal function="AC0" group="N" index="0" pad="PA6"/>
+              <signal function="AC0" group="N" index="1" pad="PB4"/>
+              <signal function="AC0" group="OUT" index="0" pad="PA5"/>
+              <signal function="AC0" group="P" index="0" pad="PA7"/>
+              <signal function="AC0" group="P" index="1" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2132" name="ADC">
+          <instance name="ADC0">
+            <register-group address-space="data" name="ADC0" name-in-module="ADC" offset="0x0600"/>
+            <signals>
+              <signal function="AIN0" group="AIN" index="0" pad="PA0"/>
+              <signal function="AIN0" group="AIN" index="1" pad="PA1"/>
+              <signal function="AIN0" group="AIN" index="2" pad="PA2"/>
+              <signal function="AIN0" group="AIN" index="3" pad="PA3"/>
+              <signal function="AIN0" group="AIN" index="4" pad="PA4"/>
+              <signal function="AIN0" group="AIN" index="5" pad="PA5"/>
+              <signal function="AIN0" group="AIN" index="6" pad="PA6"/>
+              <signal function="AIN0" group="AIN" index="7" pad="PA7"/>
+              <signal function="AIN0" group="AIN" index="8" pad="PB5"/>
+              <signal function="AIN0" group="AIN" index="9" pad="PB4"/>
+              <signal function="AIN0" group="AIN" index="10" pad="PB1"/>
+              <signal function="AIN0" group="AIN" index="11" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2114" name="BOD">
+          <instance name="BOD">
+            <register-group address-space="data" name="BOD" name-in-module="BOD" offset="0x0080"/>
+          </instance>
+        </module>
+        <module id="I2128" name="CCL">
+          <instance name="CCL">
+            <register-group address-space="data" name="CCL" name-in-module="CCL" offset="0x01C0"/>
+            <signals>
+              <signal function="CCL" group="LUT0_IN" index="0" pad="PA0"/>
+              <signal function="CCL" group="LUT0_IN" index="1" pad="PA1"/>
+              <signal function="CCL" group="LUT0_IN" index="2" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL_ALT" group="LUT0_OUT" index="0" pad="PB4"/>
+              <signal field="PORTMUX.CTRLA.LUT0" function="CCL" group="LUT0_OUT" index="0" pad="PA4"/>
+              <signal function="CCL" group="LUT1_IN" index="0" pad="PC3"/>
+              <signal function="CCL" group="LUT1_IN" index="1" pad="PC4"/>
+              <signal function="CCL" group="LUT1_IN" index="2" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL_ALT" group="LUT1_OUT" index="0" pad="PC1"/>
+              <signal field="PORTMUX.CTRLA.LUT1" function="CCL" group="LUT1_OUT" index="0" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="CLKCTRL">
+          <instance name="CLKCTRL">
+            <register-group address-space="data" name="CLKCTRL" name-in-module="CLKCTRL" offset="0x0060"/>
+            <signals>
+              <signal function="CLKCTRL" group="CLKI" pad="PA3"/>
+              <signal function="CLKCTRL" group="CLKO" pad="PB5"/>
+              <signal function="CLKCTRL" group="TOSC1" pad="PB3"/>
+              <signal function="CLKCTRL" group="TOSC2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2100" name="CPU">
+          <instance name="CPU">
+            <register-group address-space="data" name="CPU" name-in-module="CPU" offset="0x0030"/>
+            <signals>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK_ALT" group="BREAK" pad="PC4"/>
+              <signal field="PORTMUX.CTRLA.EXTBRK" function="BREAK" group="BREAK" pad="PA1"/>
+            </signals>
+            <parameters>
+              <param name="CORE_VERSION" value="V4"/>
+            </parameters>
+          </instance>
+        </module>
+        <module id="I2104" name="CPUINT">
+          <instance name="CPUINT">
+            <register-group address-space="data" name="CPUINT" name-in-module="CPUINT" offset="0x0110"/>
+          </instance>
+        </module>
+        <module id="I2122" name="CRCSCAN">
+          <instance name="CRCSCAN">
+            <register-group address-space="data" name="CRCSCAN" name-in-module="CRCSCAN" offset="0x0120"/>
+          </instance>
+        </module>
+        <module id="I2121" name="DAC">
+          <instance name="DAC0">
+            <register-group address-space="data" name="DAC0" name-in-module="DAC" offset="0x0680"/>
+            <signals>
+              <signal function="DAC0" group="OUT" index="0" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="EVSYS">
+          <instance name="EVSYS">
+            <register-group address-space="data" name="EVSYS" name-in-module="EVSYS" offset="0x0180"/>
+            <signals>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.ASYNCCH0.ASYNCCH0" function="EVAINCH0" group="EVAPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.ASYNCCH1.ASYNCCH1" function="EVAINCH1" group="EVAPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.ASYNCCH2.ASYNCCH2" function="EVAINCH2" group="EVAPC" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLA.EVOUT0" function="EVSYS" group="EVOUT" index="0" pad="PA2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT1" function="EVSYS" group="EVOUT" index="1" pad="PB2"/>
+              <signal field="PORTMUX.CTRLA.EVOUT2" function="EVSYS" group="EVOUT" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="0" pad="PA0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="1" pad="PA1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="2" pad="PA2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="3" pad="PA3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="4" pad="PA4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="5" pad="PA5"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="6" pad="PA6"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPA" index="7" pad="PA7"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="0" pad="PB0"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="1" pad="PB1"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="2" pad="PB2"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="3" pad="PB3"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="4" pad="PB4"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="5" pad="PB5"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="6" pad="PB6"/>
+              <signal field="EVSYS.SYNCCH1.SYNCCH1" function="EVSINCH1" group="EVSPB" index="7" pad="PB7"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="0" pad="PC0"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="1" pad="PC1"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="2" pad="PC2"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="3" pad="PC3"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="4" pad="PC4"/>
+              <signal field="EVSYS.SYNCCH0.SYNCCH0" function="EVSINCH0" group="EVSPC" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="FUSE">
+          <instance name="FUSE">
+            <register-group address-space="data" name="FUSE" name-in-module="FUSE" offset="0x1280"/>
+          </instance>
+        </module>
+        <module id="I2600" name="GPIO">
+          <instance name="GPIO">
+            <register-group address-space="data" name="GPIO" name-in-module="GPIO" offset="0x001C"/>
+          </instance>
+        </module>
+        <module id="I2600" name="LOCKBIT">
+          <instance name="LOCKBIT">
+            <register-group address-space="data" name="LOCKBIT" name-in-module="LOCKBIT" offset="0x128A"/>
+          </instance>
+        </module>
+        <module id="I2109" name="NVMCTRL">
+          <instance name="NVMCTRL">
+            <register-group address-space="data" name="NVMCTRL" name-in-module="NVMCTRL" offset="0x1000"/>
+          </instance>
+        </module>
+        <module id="I2103" name="PORT">
+          <instance name="PORTA">
+            <register-group address-space="data" name="PORTA" name-in-module="PORT" offset="0x0400"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PA0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PA1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PA2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PA3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PA4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PA5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PA6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB">
+            <register-group address-space="data" name="PORTB" name-in-module="PORT" offset="0x0420"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PB0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PB1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PB2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PB4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PB5"/>
+              <signal function="IOPORT" group="PIN" index="6" pad="PB6"/>
+              <signal function="IOPORT" group="PIN" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC">
+            <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
+            <signals>
+              <signal function="IOPORT" group="PIN" index="0" pad="PC0"/>
+              <signal function="IOPORT" group="PIN" index="1" pad="PC1"/>
+              <signal function="IOPORT" group="PIN" index="2" pad="PC2"/>
+              <signal function="IOPORT" group="PIN" index="3" pad="PC3"/>
+              <signal function="IOPORT" group="PIN" index="4" pad="PC4"/>
+              <signal function="IOPORT" group="PIN" index="5" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="PORTMUX">
+          <instance name="PORTMUX">
+            <register-group address-space="data" name="PORTMUX" name-in-module="PORTMUX" offset="0x0200"/>
+          </instance>
+        </module>
+        <module id="I2120" name="PTC">
+          <instance name="PTC">
+            <signals>
+              <signal function="PTC_DS" group="DS" index="0" pad="PB2"/>
+              <signal function="PTC_DS" group="DS" index="1" pad="PB4"/>
+              <signal function="PTC_X" group="X" index="0" pad="PA4"/>
+              <signal function="PTC_X" group="X" index="1" pad="PA5"/>
+              <signal function="PTC_X" group="X" index="2" pad="PA6"/>
+              <signal function="PTC_X" group="X" index="3" pad="PA7"/>
+              <signal function="PTC_X" group="X" index="4" pad="PB1"/>
+              <signal function="PTC_X" group="X" index="5" pad="PB0"/>
+              <signal function="PTC_Y" group="Y" index="0" pad="PA4"/>
+              <signal function="PTC_Y" group="Y" index="1" pad="PA5"/>
+              <signal function="PTC_Y" group="Y" index="2" pad="PA6"/>
+              <signal function="PTC_Y" group="Y" index="3" pad="PA7"/>
+              <signal function="PTC_Y" group="Y" index="4" pad="PB1"/>
+              <signal function="PTC_Y" group="Y" index="5" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2111" name="RSTCTRL">
+          <instance name="RSTCTRL">
+            <register-group address-space="data" name="RSTCTRL" name-in-module="RSTCTRL" offset="0x0040"/>
+            <signals>
+              <signal function="OTHER" group="RESET" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2116" name="RTC">
+          <instance name="RTC">
+            <register-group address-space="data" name="RTC" name-in-module="RTC" offset="0x0140"/>
+          </instance>
+        </module>
+        <module id="I2600" name="SIGROW">
+          <instance name="SIGROW">
+            <register-group address-space="data" name="SIGROW" name-in-module="SIGROW" offset="0x1100"/>
+          </instance>
+        </module>
+        <module id="I2112" name="SLPCTRL">
+          <instance name="SLPCTRL">
+            <register-group address-space="data" name="SLPCTRL" name-in-module="SLPCTRL" offset="0x0050"/>
+          </instance>
+        </module>
+        <module id="I2107" name="SPI">
+          <instance name="SPI0">
+            <register-group address-space="data" name="SPI0" name-in-module="SPI" offset="0x0820"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MISO" pad="PC1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MISO" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="MOSI" pad="PC2"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="MOSI" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SCK" pad="PC0"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0_ALT" group="SS" pad="PC3"/>
+              <signal field="PORTMUX.CTRLB.SPI0" function="SPI0" group="SS" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="SYSCFG">
+          <instance name="SYSCFG">
+            <register-group address-space="data" name="SYSCFG" name-in-module="SYSCFG" offset="0x0F00"/>
+            <signals>
+              <signal function="OTHER" group="UPDI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2117" name="TCA">
+          <instance name="TCA0">
+            <register-group address-space="data" name="TCA0" name-in-module="TCA" offset="0x0A00"/>
+            <signals>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0_ALT" group="WO" index="0" pad="PB3"/>
+              <signal field="PORTMUX.CTRLC.TCA00" function="TCA0" group="WO" index="0" pad="PB0"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0_ALT" group="WO" index="1" pad="PB4"/>
+              <signal field="PORTMUX.CTRLC.TCA01" function="TCA0" group="WO" index="1" pad="PB1"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0_ALT" group="WO" index="2" pad="PB5"/>
+              <signal field="PORTMUX.CTRLC.TCA02" function="TCA0" group="WO" index="2" pad="PB2"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0_ALT" group="WO" index="3" pad="PC3"/>
+              <signal field="PORTMUX.CTRLC.TCA03" function="TCA0" group="WO" index="3" pad="PA3"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0_ALT" group="WO" index="4" pad="PC4"/>
+              <signal field="PORTMUX.CTRLC.TCA04" function="TCA0" group="WO" index="4" pad="PA4"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0_ALT" group="WO" index="5" pad="PC5"/>
+              <signal field="PORTMUX.CTRLC.TCA05" function="TCA0" group="WO" index="5" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2119" name="TCB">
+          <instance name="TCB0">
+            <register-group address-space="data" name="TCB0" name-in-module="TCB" offset="0x0A40"/>
+            <signals>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0_ALT" group="WO" index="0" pad="PC0"/>
+              <signal field="PORTMUX.CTRLD.TCB0" function="TCB0" group="WO" index="0" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2129" name="TCD">
+          <instance name="TCD0">
+            <register-group address-space="data" name="TCD0" name-in-module="TCD" offset="0x0A80"/>
+            <signals>
+              <signal function="TCD0" group="WOA" pad="PA4"/>
+              <signal function="TCD0" group="WOB" pad="PA5"/>
+              <signal function="TCD0" group="WOC" pad="PC0"/>
+              <signal function="TCD0" group="WOD" pad="PC1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2110" name="TWI">
+          <instance name="TWI0">
+            <register-group address-space="data" name="TWI0" name-in-module="TWI" offset="0x0810"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SCL" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SCL" pad="PB0"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0_ALT" group="SDA" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.TWI0" function="TWI0" group="SDA" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2108" name="USART">
+          <instance name="USART0">
+            <register-group address-space="data" name="USART0" name-in-module="USART" offset="0x0800"/>
+            <signals>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="RXD" pad="PA2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="RXD" pad="PB3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="TXD" pad="PA1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="TXD" pad="PB2"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XCK" pad="PA3"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XCK" pad="PB1"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0_ALT" group="XDIR" pad="PA4"/>
+              <signal field="PORTMUX.CTRLB.USART0" function="USART0" group="XDIR" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module id="I2600" name="USERROW">
+          <instance name="USERROW">
+            <register-group address-space="data" name="USERROW" name-in-module="USERROW" offset="0x1300"/>
+          </instance>
+        </module>
+        <module id="I2103" name="VPORT">
+          <instance name="VPORTA">
+            <register-group address-space="data" name="VPORTA" name-in-module="VPORT" offset="0x0000"/>
+          </instance>
+          <instance name="VPORTB">
+            <register-group address-space="data" name="VPORTB" name-in-module="VPORT" offset="0x0004"/>
+          </instance>
+          <instance name="VPORTC">
+            <register-group address-space="data" name="VPORTC" name-in-module="VPORT" offset="0x0008"/>
+          </instance>
+        </module>
+        <module id="I2600" name="VREF">
+          <instance name="VREF">
+            <register-group address-space="data" name="VREF" name-in-module="VREF" offset="0x00A0"/>
+          </instance>
+        </module>
+        <module id="I2127" name="WDT">
+          <instance name="WDT">
+            <register-group address-space="data" name="WDT" name-in-module="WDT" offset="0x0100"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="1" module-instance="CRCSCAN" name="NMI"/>
+        <interrupt index="2" module-instance="BOD" name="VLM"/>
+        <interrupt index="3" module-instance="PORTA" name="PORT"/>
+        <interrupt index="4" module-instance="PORTB" name="PORT"/>
+        <interrupt index="5" module-instance="PORTC" name="PORT"/>
+        <interrupt index="6" module-instance="RTC" name="CNT"/>
+        <interrupt index="7" module-instance="RTC" name="PIT"/>
+        <interrupt index="8" module-instance="TCA0" name="LUNF"/>
+        <interrupt index="8" module-instance="TCA0" name="OVF"/>
+        <interrupt index="9" module-instance="TCA0" name="HUNF"/>
+        <interrupt index="10" module-instance="TCA0" name="CMP0"/>
+        <interrupt index="10" module-instance="TCA0" name="LCMP0"/>
+        <interrupt index="11" module-instance="TCA0" name="CMP1"/>
+        <interrupt index="11" module-instance="TCA0" name="LCMP1"/>
+        <interrupt index="12" module-instance="TCA0" name="CMP2"/>
+        <interrupt index="12" module-instance="TCA0" name="LCMP2"/>
+        <interrupt index="13" module-instance="TCB0" name="INT"/>
+        <interrupt index="14" module-instance="TCD0" name="OVF"/>
+        <interrupt index="15" module-instance="TCD0" name="TRIG"/>
+        <interrupt index="16" module-instance="AC0" name="AC"/>
+        <interrupt index="17" module-instance="ADC0" name="RESRDY"/>
+        <interrupt index="18" module-instance="ADC0" name="WCOMP"/>
+        <interrupt index="19" module-instance="TWI0" name="TWIS"/>
+        <interrupt index="20" module-instance="TWI0" name="TWIM"/>
+        <interrupt index="21" module-instance="SPI0" name="INT"/>
+        <interrupt index="22" module-instance="USART0" name="RXC"/>
+        <interrupt index="23" module-instance="USART0" name="DRE"/>
+        <interrupt index="24" module-instance="USART0" name="TXC"/>
+        <interrupt index="25" module-instance="NVMCTRL" name="EE"/>
+      </interrupts>
+      <interfaces>
+        <interface name="UPDI" type="updi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="OCD_FEATURES">
+          <property name="BREAK_PIN" value="PA1"/>
+          <property name="BREAK_PIN_ALT" value="PC4"/>
+        </property-group>
+        <property-group name="PROGRAMMING_INFO">
+          <property name="FUSE_ENABLED_VALUE" value="1"/>
+        </property-group>
+        <property-group name="UPDI_INTERFACE">
+          <property name="PROGMEM_OFFSET" value="0x00008000"/>
+        </property-group>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1E"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x20"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Analog Comparator" id="I2106" name="AC">
+      <register-group caption="Analog Comparator" name="AC" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Hysteresis Mode" mask="0x6" name="HYSMODE" rw="RW" values="AC_HYSMODE"/>
+          <bitfield caption="Interrupt Mode" mask="0x30" name="INTMODE" rw="RW" values="AC_INTMODE"/>
+          <bitfield caption="Low Power Mode" mask="0x8" name="LPMODE" rw="RW" values="AC_LPMODE"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x1" name="CMP" rw="RW"/>
+        </register>
+        <register caption="Mux Control A" initval="0x00" name="MUXCTRLA" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Invert AC Output" mask="0x80" name="INVERT" rw="RW"/>
+          <bitfield caption="Negative Input MUX Selection" mask="0x3" name="MUXNEG" rw="RW" values="AC_MUXNEG"/>
+          <bitfield caption="Positive Input MUX Selection" mask="0x8" name="MUXPOS" rw="RW" values="AC_MUXPOS"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="RW" size="1">
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x1" name="CMP" rw="RW"/>
+          <bitfield caption="Analog Comparator State" mask="0x10" name="STATE" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Hysteresis Mode select" name="AC_HYSMODE">
+        <value caption="No hysteresis" name="OFF" value="0x00"/>
+        <value caption="10mV hysteresis" name="10mV" value="0x01"/>
+        <value caption="25mV hysteresis" name="25mV" value="0x02"/>
+        <value caption="50mV hysteresis" name="50mV" value="0x03"/>
+      </value-group>
+      <value-group caption="Interrupt Mode select" name="AC_INTMODE">
+        <value caption="Any Edge" name="BOTHEDGE" value="0x00"/>
+        <value caption="Negative Edge" name="NEGEDGE" value="0x02"/>
+        <value caption="Positive Edge" name="POSEDGE" value="0x03"/>
+      </value-group>
+      <value-group caption="Low Power Mode select" name="AC_LPMODE">
+        <value caption="Low power mode disabled" name="DIS" value="0x0"/>
+        <value caption="Low power mode enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Negative Input MUX Selection select" name="AC_MUXNEG">
+        <value caption="Negative Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Negative Pin 1" name="PIN1" value="0x01"/>
+        <value caption="Voltage Reference" name="VREF" value="0x02"/>
+        <value caption="DAC output" name="DAC" value="0x03"/>
+      </value-group>
+      <value-group caption="Positive Input MUX Selection select" name="AC_MUXPOS">
+        <value caption="Positive Pin 0" name="PIN0" value="0x00"/>
+        <value caption="Positive Pin 1" name="PIN1" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Analog to Digital Converter" id="I2132" name="ADC">
+      <register-group caption="Analog to Digital Converter" name="ADC" size="0x18">
+        <register caption="Calibration" initval="0x00" name="CALIB" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Duty Cycle" mask="0x1" name="DUTYCYC" rw="RW" values="ADC_DUTYCYC"/>
+        </register>
+        <register caption="Command" initval="0x00" name="COMMAND" offset="0x08" rw="RW" size="1">
+          <bitfield caption="Start Conversion Operation" mask="0x1" name="STCONV" rw="RW"/>
+        </register>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="ADC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="ADC Freerun mode" mask="0x2" name="FREERUN" rw="RW"/>
+          <bitfield caption="ADC Resolution" mask="0x4" name="RESSEL" rw="RW" values="ADC_RESSEL"/>
+          <bitfield caption="Run standby mode" mask="0x80" name="RUNSTBY" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Accumulation Samples" mask="0x7" name="SAMPNUM" rw="RW" values="ADC_SAMPNUM"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Clock Pre-scaler" mask="0x7" name="PRESC" rw="RW" values="ADC_PRESC"/>
+          <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" rw="RW" values="ADC_REFSEL"/>
+          <bitfield caption="Sample Capacitance Selection" mask="0x40" name="SAMPCAP" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Automatic Sampling Delay Variation" mask="0x10" name="ASDV" rw="RW" values="ADC_ASDV"/>
+          <bitfield caption="Initial Delay Selection" mask="0xe0" name="INITDLY" rw="RW" values="ADC_INITDLY"/>
+          <bitfield caption="Sampling Delay Selection" mask="0xf" name="SAMPDLY" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Window Comparator Mode" mask="0x7" name="WINCM" rw="RW" values="ADC_WINCM"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Start Event Input Enable" mask="0x1" name="STARTEI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Result Ready Interrupt Enable" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Interrupt Enable" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Result Ready Flag" mask="0x1" name="RESRDY" rw="RW"/>
+          <bitfield caption="Window Comparator Flag" mask="0x2" name="WCMP" rw="RW"/>
+        </register>
+        <register caption="Positive mux input" initval="0x00" name="MUXPOS" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Analog Channel Selection Bits" mask="0x1f" name="MUXPOS" rw="RW" values="ADC_MUXPOS"/>
+        </register>
+        <register caption="ADC Accumulator Result" name="RES" offset="0x10" rw="R" size="2"/>
+        <register caption="Sample Control" initval="0x00" name="SAMPCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Sample lenght" mask="0x1f" name="SAMPLEN" rw="RW"/>
+        </register>
+        <register caption="Temporary Data" initval="0x00" name="TEMP" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Temporary" mask="0xff" name="TEMP" rw="RW"/>
+        </register>
+        <register caption="Window comparator high threshold" name="WINHT" offset="0x14" rw="RW" size="2"/>
+        <register caption="Window comparator low threshold" name="WINLT" offset="0x12" rw="RW" size="2"/>
+      </register-group>
+      <value-group caption="Duty Cycle select" name="ADC_DUTYCYC">
+        <value caption="50% Duty cycle" name="DUTY50" value="0x0"/>
+        <value caption="25% Duty cycle" name="DUTY25" value="0x1"/>
+      </value-group>
+      <value-group caption="ADC Resolution select" name="ADC_RESSEL">
+        <value caption="10-bit mode" name="10BIT" value="0x0"/>
+        <value caption="8-bit mode" name="8BIT" value="0x1"/>
+      </value-group>
+      <value-group caption="Accumulation Samples select" name="ADC_SAMPNUM">
+        <value caption="1 ADC sample" name="ACC1" value="0x00"/>
+        <value caption="Accumulate 2 samples" name="ACC2" value="0x01"/>
+        <value caption="Accumulate 4 samples" name="ACC4" value="0x02"/>
+        <value caption="Accumulate 8 samples" name="ACC8" value="0x03"/>
+        <value caption="Accumulate 16 samples" name="ACC16" value="0x04"/>
+        <value caption="Accumulate 32 samples" name="ACC32" value="0x05"/>
+        <value caption="Accumulate 64 samples" name="ACC64" value="0x06"/>
+      </value-group>
+      <value-group caption="Clock Pre-scaler select" name="ADC_PRESC">
+        <value caption="CLK_PER divided by 2" name="DIV2" value="0x00"/>
+        <value caption="CLK_PER divided by 4" name="DIV4" value="0x01"/>
+        <value caption="CLK_PER divided by 8" name="DIV8" value="0x02"/>
+        <value caption="CLK_PER divided by 16" name="DIV16" value="0x03"/>
+        <value caption="CLK_PER divided by 32" name="DIV32" value="0x04"/>
+        <value caption="CLK_PER divided by 64" name="DIV64" value="0x05"/>
+        <value caption="CLK_PER divided by 128" name="DIV128" value="0x06"/>
+        <value caption="CLK_PER divided by 256" name="DIV256" value="0x07"/>
+      </value-group>
+      <value-group caption="Reference Selection select" name="ADC_REFSEL">
+        <value caption="Internal reference" name="INTREF" value="0x00"/>
+        <value caption="VDD" name="VDDREF" value="0x01"/>
+      </value-group>
+      <value-group caption="Automatic Sampling Delay Variation select" name="ADC_ASDV">
+        <value caption="The Automatic Sampling Delay Variation is disabled" name="ASVOFF" value="0x0"/>
+        <value caption="The Automatic Sampling Delay Variation is enabled" name="ASVON" value="0x1"/>
+      </value-group>
+      <value-group caption="Initial Delay Selection select" name="ADC_INITDLY">
+        <value caption="Delay 0 CLK_ADC cycles" name="DLY0" value="0x00"/>
+        <value caption="Delay 16 CLK_ADC cycles" name="DLY16" value="0x01"/>
+        <value caption="Delay 32 CLK_ADC cycles" name="DLY32" value="0x02"/>
+        <value caption="Delay 64 CLK_ADC cycles" name="DLY64" value="0x03"/>
+        <value caption="Delay 128 CLK_ADC cycles" name="DLY128" value="0x04"/>
+        <value caption="Delay 256 CLK_ADC cycles" name="DLY256" value="0x05"/>
+      </value-group>
+      <value-group caption="Window Comparator Mode select" name="ADC_WINCM">
+        <value caption="No Window Comparison" name="NONE" value="0x00"/>
+        <value caption="Below Window" name="BELOW" value="0x01"/>
+        <value caption="Above Window" name="ABOVE" value="0x02"/>
+        <value caption="Inside Window" name="INSIDE" value="0x03"/>
+        <value caption="Outside Window" name="OUTSIDE" value="0x04"/>
+      </value-group>
+      <value-group caption="Analog Channel Selection Bits select" name="ADC_MUXPOS">
+        <value caption="ADC input pin 0" name="AIN0" value="0x00"/>
+        <value caption="ADC input pin 1" name="AIN1" value="0x01"/>
+        <value caption="ADC input pin 2" name="AIN2" value="0x02"/>
+        <value caption="ADC input pin 3" name="AIN3" value="0x03"/>
+        <value caption="ADC input pin 4" name="AIN4" value="0x04"/>
+        <value caption="ADC input pin 5" name="AIN5" value="0x05"/>
+        <value caption="ADC input pin 6" name="AIN6" value="0x06"/>
+        <value caption="ADC input pin 7" name="AIN7" value="0x07"/>
+        <value caption="ADC input pin 8" name="AIN8" value="0x08"/>
+        <value caption="ADC input pin 9" name="AIN9" value="0x09"/>
+        <value caption="ADC input pin 10" name="AIN10" value="0x0A"/>
+        <value caption="ADC input pin 11" name="AIN11" value="0x0B"/>
+        <value caption="DAC0" name="DAC0" value="0x1C"/>
+        <value caption="Internal Ref" name="INTREF" value="0x1D"/>
+        <value caption="Temp sensor" name="TEMPSENSE" value="0x1E"/>
+        <value caption="GND" name="GND" value="0x1F"/>
+      </value-group>
+    </module>
+    <module caption="Bod interface" id="I2114" name="BOD">
+      <register-group caption="Bod interface" name="BOD" size="0x10">
+        <register caption="Control A" initval="0x05" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Operation in active mode" mask="0xc" name="ACTIVE" rw="R" values="BOD_ACTIVE"/>
+          <bitfield caption="Sample frequency" mask="0x10" name="SAMPFREQ" rw="R" values="BOD_SAMPFREQ"/>
+          <bitfield caption="Operation in sleep mode" mask="0x3" name="SLEEP" rw="RW" values="BOD_SLEEP"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Bod level" mask="0x7" name="LVL" rw="R" values="BOD_LVL"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Control" initval="0x00" name="INTCTRL" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Configuration" mask="0x6" name="VLMCFG" rw="RW" values="BOD_VLMCFG"/>
+          <bitfield caption="voltage level monitor interrrupt enable" mask="0x1" name="VLMIE" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor interrupt Flags" initval="0x00" name="INTFLAGS" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor interrupt flag" mask="0x1" name="VLMIF" rw="RW"/>
+        </register>
+        <register caption="Voltage level monitor status" initval="0x00" name="STATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Voltage level monitor status" mask="0x1" name="VLMS" rw="R"/>
+        </register>
+        <register caption="Voltage level monitor Control" initval="0x00" name="VLMCTRLA" offset="0x8" rw="RW" size="1">
+          <bitfield caption="voltage level monitor level" mask="0x3" name="VLMLVL" rw="RW" values="BOD_VLMLVL"/>
+        </register>
+      </register-group>
+      <value-group caption="Operation in active mode select" name="BOD_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wakeup halt" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="Sample frequency select" name="BOD_SAMPFREQ">
+        <value caption="1kHz sampling" name="1KHZ" value="0x0"/>
+        <value caption="125Hz sampling" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="Operation in sleep mode select" name="BOD_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Bod level select" name="BOD_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.1 V" name="BODLEVEL1" value="0x01"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="2.9 V" name="BODLEVEL3" value="0x03"/>
+        <value caption="3.3 V" name="BODLEVEL4" value="0x04"/>
+        <value caption="3.7 V" name="BODLEVEL5" value="0x05"/>
+        <value caption="4.0 V" name="BODLEVEL6" value="0x06"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="Configuration select" name="BOD_VLMCFG">
+        <value caption="Interrupt when supply goes below VLM level" name="BELOW" value="0x00"/>
+        <value caption="Interrupt when supply goes above VLM level" name="ABOVE" value="0x01"/>
+        <value caption="Interrupt when supply crosses VLM level" name="CROSS" value="0x02"/>
+      </value-group>
+      <value-group caption="voltage level monitor level select" name="BOD_VLMLVL">
+        <value caption="VLM threshold 5% above BOD level" name="5ABOVE" value="0x0"/>
+        <value caption="VLM threshold 15% above BOD level" name="15ABOVE" value="0x1"/>
+        <value caption="VLM threshold 25% above BOD level" name="25ABOVE" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Configurable Custom Logic" id="I2128" name="CCL">
+      <register-group caption="Configurable Custom Logic" name="CCL" size="0x10">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run in Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 A" initval="0x00" name="LUT0CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 0 B" initval="0x00" name="LUT0CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 0 C" initval="0x00" name="LUT0CTRLC" offset="0x7" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="LUT Control 1 A" initval="0x00" name="LUT1CTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Clock Source Selection" mask="0x40" name="CLKSRC" rw="RW"/>
+          <bitfield caption="Edge Detection Enable" mask="0x80" name="EDGEDET" rw="RW" values="CCL_EDGEDET"/>
+          <bitfield caption="LUT Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Filter Selection" mask="0x30" name="FILTSEL" rw="RW" values="CCL_FILTSEL"/>
+          <bitfield caption="Output Enable" mask="0x8" name="OUTEN" rw="RW"/>
+        </register>
+        <register caption="LUT Control 1 B" initval="0x00" name="LUT1CTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="LUT Input 0 Source Selection" mask="0xf" name="INSEL0" rw="RW" values="CCL_INSEL0"/>
+          <bitfield caption="LUT Input 1 Source Selection" mask="0xf0" name="INSEL1" rw="RW" values="CCL_INSEL1"/>
+        </register>
+        <register caption="LUT Control 1 C" initval="0x00" name="LUT1CTRLC" offset="0xB" rw="RW" size="1">
+          <bitfield caption="LUT Input 2 Source Selection" mask="0xf" name="INSEL2" rw="RW" values="CCL_INSEL2"/>
+        </register>
+        <register caption="Sequential Control 0" initval="0x00" name="SEQCTRL0" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Sequential Selection" mask="0x7" name="SEQSEL" rw="RW" values="CCL_SEQSEL"/>
+        </register>
+        <register caption="Truth 0" name="TRUTH0" offset="0x8" rw="RW" size="1"/>
+        <register caption="Truth 1" name="TRUTH1" offset="0xC" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Edge Detection Enable select" name="CCL_EDGEDET">
+        <value caption="Edge detector is disabled" name="DIS" value="0x0"/>
+        <value caption="Edge detector is enabled" name="EN" value="0x1"/>
+      </value-group>
+      <value-group caption="Filter Selection select" name="CCL_FILTSEL">
+        <value caption="Filter disabled" name="DISABLE" value="0x0"/>
+        <value caption="Synchronizer enabled" name="SYNCH" value="0x1"/>
+        <value caption="Filter enabled" name="FILTER" value="0x2"/>
+      </value-group>
+      <value-group caption="LUT Input 0 Source Selection select" name="CCL_INSEL0">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN0 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO0 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 XCK input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 SCK source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 1 Source Selection select" name="CCL_INSEL1">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-N1 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO1 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOB input source" name="TCD0" value="0x09"/>
+        <value caption="USART0 TXD input source" name="USART0" value="0x0A"/>
+        <value caption="SPI0 MOSI input source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="LUT Input 2 Source Selection select" name="CCL_INSEL2">
+        <value caption="Masked input" name="MASK" value="0x00"/>
+        <value caption="Feedback input source" name="FEEDBACK" value="0x01"/>
+        <value caption="Linked LUT input source" name="LINK" value="0x02"/>
+        <value caption="Event input source 0" name="EVENT0" value="0x03"/>
+        <value caption="Event input source 1" name="EVENT1" value="0x04"/>
+        <value caption="IO pin LUTn-IN2 input source" name="IO" value="0x05"/>
+        <value caption="AC0 OUT input source" name="AC0" value="0x06"/>
+        <value caption="TCB0 WO input source" name="TCB0" value="0x07"/>
+        <value caption="TCA0 WO2 input source" name="TCA0" value="0x08"/>
+        <value caption="TCD0 WOA input source" name="TCD0" value="0x09"/>
+        <value caption="SPI0 MISO source" name="SPI0" value="0x0B"/>
+      </value-group>
+      <value-group caption="Sequential Selection select" name="CCL_SEQSEL">
+        <value caption="Sequential logic disabled" name="DISABLE" value="0x00"/>
+        <value caption="D FlipFlop" name="DFF" value="0x01"/>
+        <value caption="JK FlipFlop" name="JK" value="0x02"/>
+        <value caption="D Latch" name="LATCH" value="0x03"/>
+        <value caption="RS Latch" name="RS" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Clock controller" id="I2600" name="CLKCTRL">
+      <register-group caption="Clock controller" name="CLKCTRL" size="0x20">
+        <register caption="MCLK Control A" initval="0x00" name="MCLKCTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="System clock out" mask="0x80" name="CLKOUT" rw="RW"/>
+          <bitfield caption="clock select" mask="0x3" name="CLKSEL" rw="RW" values="CLKCTRL_CLKSEL"/>
+        </register>
+        <register caption="MCLK Control B" initval="0x00" name="MCLKCTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Prescaler division" mask="0x1e" name="PDIV" rw="RW" values="CLKCTRL_PDIV"/>
+          <bitfield caption="Prescaler enable" mask="0x1" name="PEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Lock" name="MCLKLOCK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="lock ebable" mask="0x1" name="LOCKEN" rw="RW"/>
+        </register>
+        <register caption="MCLK Status" initval="0x00" name="MCLKSTATUS" offset="0x03" rw="R" size="1">
+          <bitfield caption="External Clock status" mask="0x80" name="EXTS" rw="R"/>
+          <bitfield caption="20MHz oscillator status" mask="0x10" name="OSC20MS" rw="R"/>
+          <bitfield caption="32KHz oscillator status" mask="0x20" name="OSC32KS" rw="R"/>
+          <bitfield caption="System Oscillator changing" mask="0x1" name="SOSC" rw="R"/>
+          <bitfield caption="32.768 kHz Crystal Oscillator status" mask="0x40" name="XOSC32KS" rw="R"/>
+        </register>
+        <register caption="OSC20M Calibration A" initval="0x00" name="OSC20MCALIBA" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Calibration" mask="0x3f" name="CAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Calibration B" initval="0x00" name="OSC20MCALIBB" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Lock" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Oscillator temperature coefficient" mask="0xf" name="TEMPCAL20M" rw="RW"/>
+        </register>
+        <register caption="OSC20M Control A" name="OSC20MCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="OSC32K Control A" initval="0x00" name="OSC32KCTRLA" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="XOSC32K Control A" initval="0x00" name="XOSC32KCTRLA" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Crystal startup time" mask="0x30" name="CSUT" rw="RW" values="CLKCTRL_CSUT"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run standby" mask="0x2" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Select" mask="0x4" name="SEL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="CLKCTRL_CLKSEL">
+        <value caption="20MHz internal oscillator" name="OSC20M" value="0x00"/>
+        <value caption="32KHz internal Ultra Low Power oscillator" name="OSCULP32K" value="0x01"/>
+        <value caption="32.768kHz external crystal oscillator" name="XOSC32K" value="0x02"/>
+        <value caption="External clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaler division select" name="CLKCTRL_PDIV">
+        <value caption="2X" name="2X" value="0x00"/>
+        <value caption="4X" name="4X" value="0x01"/>
+        <value caption="8X" name="8X" value="0x02"/>
+        <value caption="16X" name="16X" value="0x03"/>
+        <value caption="32X" name="32X" value="0x04"/>
+        <value caption="64X" name="64X" value="0x05"/>
+        <value caption="6X" name="6X" value="0x08"/>
+        <value caption="10X" name="10X" value="0x09"/>
+        <value caption="12X" name="12X" value="0x0A"/>
+        <value caption="24X" name="24X" value="0x0B"/>
+        <value caption="48X" name="48X" value="0x0C"/>
+      </value-group>
+      <value-group caption="Crystal startup time select" name="CLKCTRL_CSUT">
+        <value caption="1K cycles" name="1K" value="0x00"/>
+        <value caption="16K cycles" name="16K" value="0x01"/>
+        <value caption="32K cycles" name="32K" value="0x02"/>
+        <value caption="64K cycles" name="64K" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU" id="I2100" name="CPU">
+      <register-group caption="CPU" name="CPU" size="0x10">
+        <register caption="Configuration Change Protection" initval="0x00" name="CCP" offset="0x4" rw="RW" size="1">
+          <bitfield caption="CCP signature" mask="0xff" name="CCP" rw="RW" values="CPU_CCP"/>
+        </register>
+        <register caption="Stack Pointer High" name="SPH" offset="0xE" rw="RW" size="1"/>
+        <register caption="Stack Pointer Low" name="SPL" offset="0xD" rw="RW" size="1"/>
+        <register caption="Status Register" initval="0x00" name="SREG" offset="0xF" rw="RW" size="1">
+          <bitfield caption="Carry Flag" mask="0x1" name="C" rw="RW"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H" rw="RW"/>
+          <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I" rw="RW"/>
+          <bitfield caption="Negative Flag" mask="0x4" name="N" rw="RW"/>
+          <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S" rw="RW"/>
+          <bitfield caption="Transfer Bit" mask="0x40" name="T" rw="RW"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x8" name="V" rw="RW"/>
+          <bitfield caption="Zero Flag" mask="0x2" name="Z" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="CCP signature select" name="CPU_CCP">
+        <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+        <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+      </value-group>
+    </module>
+    <module caption="Interrupt Controller" id="I2104" name="CPUINT">
+      <register-group caption="Interrupt Controller" name="CPUINT" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Compact Vector Table" mask="0x20" name="CVT" rw="RW"/>
+          <bitfield caption="Interrupt Vector Select" mask="0x40" name="IVSEL" rw="RW"/>
+          <bitfield caption="Round-robin Scheduling Enable" mask="0x1" name="LVL0RR" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 0 Priority" initval="0x00" name="LVL0PRI" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Interrupt Level Priority" mask="0xff" name="LVL0PRI" rw="RW"/>
+        </register>
+        <register caption="Interrupt Level 1 Priority Vector" initval="0x00" name="LVL1VEC" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Interrupt Vector with High Priority" mask="0xff" name="LVL1VEC" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Level 0 Interrupt Executing" mask="0x1" name="LVL0EX" rw="R"/>
+          <bitfield caption="Level 1 Interrupt Executing" mask="0x2" name="LVL1EX" rw="R"/>
+          <bitfield caption="Non-maskable Interrupt Executing" mask="0x80" name="NMIEX" rw="R"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CRCSCAN" id="I2122" name="CRCSCAN">
+      <register-group caption="CRCSCAN" name="CRCSCAN" size="0x4">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable CRC scan" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Enable NMI Trigger" mask="0x2" name="NMIEN" rw="RW"/>
+          <bitfield caption="Reset CRC scan" mask="0x80" name="RESET" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="CRC Flash Access Mode" mask="0x30" name="MODE" rw="RW" values="CRCSCAN_MODE"/>
+          <bitfield caption="CRC Source" mask="0x3" name="SRC" rw="RW" values="CRCSCAN_SRC"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="CRC Busy" mask="0x1" name="BUSY" rw="R"/>
+          <bitfield caption="CRC Ok" mask="0x2" name="OK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="CRC Flash Access Mode select" name="CRCSCAN_MODE">
+        <value caption="Priority to flash" name="PRIORITY" value="0x0"/>
+        <value caption="Reserved" name="RESERVED" value="0x1"/>
+        <value caption="Lowest priority to flash" name="BACKGROUND" value="0x2"/>
+        <value caption="Continuous checks in background" name="CONTINUOUS" value="0x3"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="CRCSCAN_SRC">
+        <value caption="CRC on entire flash" name="FLASH" value="0x0"/>
+        <value caption="CRC on boot and appl section of flash" name="APPLICATION" value="0x1"/>
+        <value caption="CRC on boot section of flash" name="BOOT" value="0x2"/>
+      </value-group>
+    </module>
+    <module caption="Digital to Analog Converter" id="I2121" name="DAC">
+      <register-group caption="Digital to Analog Converter" name="DAC" size="0x4">
+        <register caption="Control Register A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="DAC Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Output Buffer Enable" mask="0x40" name="OUTEN" rw="RW"/>
+          <bitfield caption="Run in Standby Mode" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="DATA Register" name="DATA" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Event System" id="I2600" name="EVSYS">
+      <register-group caption="Event System" name="EVSYS" size="0x40">
+        <register caption="Asynchronous Channel 0 Generator Selection" initval="0x00" name="ASYNCCH0" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 0 Generator Selection" mask="0xff" name="ASYNCCH0" rw="RW" values="EVSYS_ASYNCCH0"/>
+        </register>
+        <register caption="Asynchronous Channel 1 Generator Selection" initval="0x00" name="ASYNCCH1" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 1 Generator Selection" mask="0xff" name="ASYNCCH1" rw="RW" values="EVSYS_ASYNCCH1"/>
+        </register>
+        <register caption="Asynchronous Channel 2 Generator Selection" initval="0x00" name="ASYNCCH2" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 2 Generator Selection" mask="0xff" name="ASYNCCH2" rw="RW" values="EVSYS_ASYNCCH2"/>
+        </register>
+        <register caption="Asynchronous Channel 3 Generator Selection" initval="0x00" name="ASYNCCH3" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Asynchronous Channel 3 Generator Selection" mask="0xff" name="ASYNCCH3" rw="RW" values="EVSYS_ASYNCCH3"/>
+        </register>
+        <register caption="Asynchronous Channel Strobe" initval="0x00" name="ASYNCSTROBE" offset="0x00" rw="W" size="1"/>
+        <register caption="Asynchronous User Ch 0 Input Selection - TCB0" initval="0x00" name="ASYNCUSER0" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 0 Input Selection - TCB0" mask="0xff" name="ASYNCUSER0" rw="RW" values="EVSYS_ASYNCUSER0"/>
+        </register>
+        <register caption="Asynchronous User Ch 1 Input Selection - ADC0" initval="0x00" name="ASYNCUSER1" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 1 Input Selection - ADC0" mask="0xff" name="ASYNCUSER1" rw="RW" values="EVSYS_ASYNCUSER1"/>
+        </register>
+        <register caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" initval="0x00" name="ASYNCUSER2" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0" mask="0xff" name="ASYNCUSER2" rw="RW" values="EVSYS_ASYNCUSER2"/>
+        </register>
+        <register caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" initval="0x00" name="ASYNCUSER3" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0" mask="0xff" name="ASYNCUSER3" rw="RW" values="EVSYS_ASYNCUSER3"/>
+        </register>
+        <register caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" initval="0x00" name="ASYNCUSER4" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1" mask="0xff" name="ASYNCUSER4" rw="RW" values="EVSYS_ASYNCUSER4"/>
+        </register>
+        <register caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" initval="0x00" name="ASYNCUSER5" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1" mask="0xff" name="ASYNCUSER5" rw="RW" values="EVSYS_ASYNCUSER5"/>
+        </register>
+        <register caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" initval="0x00" name="ASYNCUSER6" offset="0x18" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0" mask="0xff" name="ASYNCUSER6" rw="RW" values="EVSYS_ASYNCUSER6"/>
+        </register>
+        <register caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" initval="0x00" name="ASYNCUSER7" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1" mask="0xff" name="ASYNCUSER7" rw="RW" values="EVSYS_ASYNCUSER7"/>
+        </register>
+        <register caption="Asynchronous User Ch 8 Input Selection - Event Out 0" initval="0x00" name="ASYNCUSER8" offset="0x1A" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 8 Input Selection - Event Out 0" mask="0xff" name="ASYNCUSER8" rw="RW" values="EVSYS_ASYNCUSER8"/>
+        </register>
+        <register caption="Asynchronous User Ch 9 Input Selection - Event Out 1" initval="0x00" name="ASYNCUSER9" offset="0x1B" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 9 Input Selection - Event Out 1" mask="0xff" name="ASYNCUSER9" rw="RW" values="EVSYS_ASYNCUSER9"/>
+        </register>
+        <register caption="Asynchronous User Ch 10 Input Selection - Event Out 2" initval="0x00" name="ASYNCUSER10" offset="0x1C" rw="RW" size="1">
+          <bitfield caption="Asynchronous User Ch 10 Input Selection - Event Out 2" mask="0xff" name="ASYNCUSER10" rw="RW" values="EVSYS_ASYNCUSER10"/>
+        </register>
+        <register caption="Synchronous Channel 0 Generator Selection" initval="0x00" name="SYNCCH0" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 0 Generator Selection" mask="0xff" name="SYNCCH0" rw="RW" values="EVSYS_SYNCCH0"/>
+        </register>
+        <register caption="Synchronous Channel 1 Generator Selection" initval="0x00" name="SYNCCH1" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Synchronous Channel 1 Generator Selection" mask="0xff" name="SYNCCH1" rw="RW" values="EVSYS_SYNCCH1"/>
+        </register>
+        <register caption="Synchronous Channel Strobe" initval="0x00" name="SYNCSTROBE" offset="0x01" rw="W" size="1"/>
+        <register caption="Synchronous User Ch 0 Input Selection - TCA0" initval="0x00" name="SYNCUSER0" offset="0x22" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 0 Input Selection - TCA0" mask="0xff" name="SYNCUSER0" rw="RW" values="EVSYS_SYNCUSER0"/>
+        </register>
+        <register caption="Synchronous User Ch 1 Input Selection - USART0" initval="0x00" name="SYNCUSER1" offset="0x23" rw="RW" size="1">
+          <bitfield caption="Synchronous User Ch 1 Input Selection - USART0" mask="0xff" name="SYNCUSER1" rw="RW" values="EVSYS_SYNCUSER1"/>
+        </register>
+      </register-group>
+      <value-group caption="Asynchronous Channel 0 Generator Selection select" name="EVSYS_ASYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PA3" name="PORTA_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PA4" name="PORTA_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PA5" name="PORTA_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PA6" name="PORTA_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PA7" name="PORTA_PIN7" value="0x11"/>
+        <value caption="Unified Program and debug interface" name="UPDI" value="0x12"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 1 Generator Selection select" name="EVSYS_ASYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PB0" name="PORTB_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PB1" name="PORTB_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0F"/>
+        <value caption="Asynchronous Event from Pin PB6" name="PORTB_PIN6" value="0x10"/>
+        <value caption="Asynchronous Event from Pin PB7" name="PORTB_PIN7" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 2 Generator Selection select" name="EVSYS_ASYNCCH2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable Custom Logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable Custom Logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter D0 compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter D0 compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter D0 compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter D0 program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Asynchronous Event from Pin PC0" name="PORTC_PIN0" value="0x0A"/>
+        <value caption="Asynchronous Event from Pin PC1" name="PORTC_PIN1" value="0x0B"/>
+        <value caption="Asynchronous Event from Pin PC2" name="PORTC_PIN2" value="0x0C"/>
+        <value caption="Asynchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0D"/>
+        <value caption="Asynchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0E"/>
+        <value caption="Asynchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0F"/>
+      </value-group>
+      <value-group caption="Asynchronous Channel 3 Generator Selection select" name="EVSYS_ASYNCCH3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Configurable custom logic LUT0" name="CCL_LUT0" value="0x01"/>
+        <value caption="Configurable custom logic LUT1" name="CCL_LUT1" value="0x02"/>
+        <value caption="Analog Comparator 0 out" name="AC0_OUT" value="0x03"/>
+        <value caption="Timer/Counter type D compare B clear" name="TCD0_CMPBCLR" value="0x04"/>
+        <value caption="Timer/Counter type D compare A set" name="TCD0_CMPASET" value="0x05"/>
+        <value caption="Timer/Counter type D compare B set" name="TCD0_CMPBSET" value="0x06"/>
+        <value caption="Timer/Counter type D program event" name="TCD0_PROGEV" value="0x07"/>
+        <value caption="Real Time Counter overflow" name="RTC_OVF" value="0x08"/>
+        <value caption="Real Time Counter compare" name="RTC_CMP" value="0x09"/>
+        <value caption="Periodic Interrupt CLK_RTC div 8192" name="PIT_DIV8192" value="0x0A"/>
+        <value caption="Periodic Interrupt CLK_RTC div 4096" name="PIT_DIV4096" value="0x0B"/>
+        <value caption="Periodic Interrupt CLK_RTC div 2048" name="PIT_DIV2048" value="0x0C"/>
+        <value caption="Periodic Interrupt CLK_RTC div 1024" name="PIT_DIV1024" value="0x0D"/>
+        <value caption="Periodic Interrupt CLK_RTC div 512" name="PIT_DIV512" value="0x0E"/>
+        <value caption="Periodic Interrupt CLK_RTC div 256" name="PIT_DIV256" value="0x0F"/>
+        <value caption="Periodic Interrupt CLK_RTC div 128" name="PIT_DIV128" value="0x10"/>
+        <value caption="Periodic Interrupt CLK_RTC div 64" name="PIT_DIV64" value="0x11"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 0 Input Selection - TCB0 select" name="EVSYS_ASYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 1 Input Selection - ADC0 select" name="EVSYS_ASYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0 select" name="EVSYS_ASYNCUSER2">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0 select" name="EVSYS_ASYNCUSER3">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1 select" name="EVSYS_ASYNCUSER4">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1 select" name="EVSYS_ASYNCUSER5">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 6 Input Selection - TCD0 Event 0 select" name="EVSYS_ASYNCUSER6">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 7 Input Selection - TCD0 Event 1 select" name="EVSYS_ASYNCUSER7">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 8 Input Selection - Event Out 0 select" name="EVSYS_ASYNCUSER8">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 9 Input Selection - Event Out 1 select" name="EVSYS_ASYNCUSER9">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Asynchronous User Ch 10 Input Selection - Event Out 2 select" name="EVSYS_ASYNCUSER10">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+        <value caption="Asynchronous Event Channel 0" name="ASYNCCH0" value="0x03"/>
+        <value caption="Asynchronous Event Channel 1" name="ASYNCCH1" value="0x04"/>
+        <value caption="Asynchronous Event Channel 2" name="ASYNCCH2" value="0x05"/>
+        <value caption="Asynchronous Event Channel 3" name="ASYNCCH3" value="0x06"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 0 Generator Selection select" name="EVSYS_SYNCCH0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PC0" name="PORTC_PIN0" value="0x07"/>
+        <value caption="Synchronous Event from Pin PC1" name="PORTC_PIN1" value="0x08"/>
+        <value caption="Synchronous Event from Pin PC2" name="PORTC_PIN2" value="0x09"/>
+        <value caption="Synchronous Event from Pin PC3" name="PORTC_PIN3" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PC4" name="PORTC_PIN4" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PC5" name="PORTC_PIN5" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PA0" name="PORTA_PIN0" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PA1" name="PORTA_PIN1" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PA2" name="PORTA_PIN2" value="0x0F"/>
+        <value caption="Synchronous Event from Pin PA3" name="PORTA_PIN3" value="0x10"/>
+        <value caption="Synchronous Event from Pin PA4" name="PORTA_PIN4" value="0x11"/>
+        <value caption="Synchronous Event from Pin PA5" name="PORTA_PIN5" value="0x12"/>
+        <value caption="Synchronous Event from Pin PA6" name="PORTA_PIN6" value="0x13"/>
+        <value caption="Synchronous Event from Pin PA7" name="PORTA_PIN7" value="0x14"/>
+      </value-group>
+      <value-group caption="Synchronous Channel 1 Generator Selection select" name="EVSYS_SYNCCH1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Timer/Counter B0" name="TCB0" value="0x01"/>
+        <value caption="Timer/Counter A0 overflow" name="TCA0_OVF_LUNF" value="0x02"/>
+        <value caption="Timer/Counter A0 underflow high byte (split mode)" name="TCA0_HUNF" value="0x03"/>
+        <value caption="Timer/Counter A0 compare 0" name="TCA0_CMP0" value="0x04"/>
+        <value caption="Timer/Counter A0 compare 1" name="TCA0_CMP1" value="0x05"/>
+        <value caption="Timer/Counter A0 compare 2" name="TCA0_CMP2" value="0x06"/>
+        <value caption="Synchronous Event from Pin PB0" name="PORTB_PIN0" value="0x08"/>
+        <value caption="Synchronous Event from Pin PB1" name="PORTB_PIN1" value="0x09"/>
+        <value caption="Synchronous Event from Pin PB2" name="PORTB_PIN2" value="0x0A"/>
+        <value caption="Synchronous Event from Pin PB3" name="PORTB_PIN3" value="0x0B"/>
+        <value caption="Synchronous Event from Pin PB4" name="PORTB_PIN4" value="0x0C"/>
+        <value caption="Synchronous Event from Pin PB5" name="PORTB_PIN5" value="0x0D"/>
+        <value caption="Synchronous Event from Pin PB6" name="PORTB_PIN6" value="0x0E"/>
+        <value caption="Synchronous Event from Pin PB7" name="PORTB_PIN7" value="0x0F"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 0 Input Selection - TCA0 select" name="EVSYS_SYNCUSER0">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+      <value-group caption="Synchronous User Ch 1 Input Selection - USART0 select" name="EVSYS_SYNCUSER1">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="Synchronous Event Channel 0" name="SYNCCH0" value="0x01"/>
+        <value caption="Synchronous Event Channel 1" name="SYNCCH1" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Fuses" id="I2600" name="FUSE">
+      <register-group caption="Fuses" name="FUSE" size="0x09">
+        <register caption="Application Code Section End" initval="0x00" name="APPEND" offset="0x7" rw="RW" size="1"/>
+        <register caption="BOD Configuration" initval="0x00" name="BODCFG" offset="0x1" rw="RW" size="1">
+          <bitfield caption="BOD Operation in Active Mode" mask="0xc" name="ACTIVE" rw="RW" values="FUSE_ACTIVE"/>
+          <bitfield caption="BOD Level" mask="0xe0" name="LVL" rw="RW" values="FUSE_LVL"/>
+          <bitfield caption="BOD Sample Frequency" mask="0x10" name="SAMPFREQ" rw="RW" values="FUSE_SAMPFREQ"/>
+          <bitfield caption="BOD Operation in Sleep Mode" mask="0x3" name="SLEEP" rw="RW" values="FUSE_SLEEP"/>
+        </register>
+        <register caption="Boot Section End" initval="0x00" name="BOOTEND" offset="0x8" rw="RW" size="1"/>
+        <register caption="Oscillator Configuration" initval="0x02" name="OSCCFG" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Frequency Select" mask="0x3" name="FREQSEL" rw="RW" values="FUSE_FREQSEL"/>
+          <bitfield caption="Oscillator Lock" mask="0x80" name="OSCLOCK" rw="RW"/>
+        </register>
+        <register caption="System Configuration 0" initval="0xC4" name="SYSCFG0" offset="0x5" rw="RW" size="1">
+          <bitfield caption="CRC Source" mask="0xc0" name="CRCSRC" rw="RW" values="FUSE_CRCSRC"/>
+          <bitfield caption="EEPROM Save" mask="0x1" name="EESAVE" rw="RW"/>
+          <bitfield caption="Reset Pin Configuration" mask="0xc" name="RSTPINCFG" rw="RW" values="FUSE_RSTPINCFG"/>
+        </register>
+        <register caption="System Configuration 1" initval="0x07" name="SYSCFG1" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Startup Time" mask="0x7" name="SUT" rw="RW" values="FUSE_SUT"/>
+        </register>
+        <register caption="TCD0 Configuration" initval="0x00" name="TCD0CFG" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Compare A Default Output Value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A Output Enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B Default Output Value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B Output Enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C Default Output Value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C Output Enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D Default Output Value" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D Output Enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Watchdog Configuration" initval="0x00" name="WDTCFG" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Watchdog Timeout Period" mask="0xf" name="PERIOD" rw="RW" values="FUSE_PERIOD"/>
+          <bitfield caption="Watchdog Window Timeout Period" mask="0xf0" name="WINDOW" rw="RW" values="FUSE_WINDOW"/>
+        </register>
+      </register-group>
+      <value-group caption="BOD Operation in Active Mode select" name="FUSE_ACTIVE">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+        <value caption="Enabled with wake-up halted until BOD is ready" name="ENWAKE" value="0x03"/>
+      </value-group>
+      <value-group caption="BOD Level select" name="FUSE_LVL">
+        <value caption="1.8 V" name="BODLEVEL0" value="0x00"/>
+        <value caption="2.6 V" name="BODLEVEL2" value="0x02"/>
+        <value caption="4.2 V" name="BODLEVEL7" value="0x07"/>
+      </value-group>
+      <value-group caption="BOD Sample Frequency select" name="FUSE_SAMPFREQ">
+        <value caption="1kHz sampling frequency" name="1KHz" value="0x0"/>
+        <value caption="125Hz sampling frequency" name="125Hz" value="0x1"/>
+      </value-group>
+      <value-group caption="BOD Operation in Sleep Mode select" name="FUSE_SLEEP">
+        <value caption="Disabled" name="DIS" value="0x00"/>
+        <value caption="Enabled" name="ENABLED" value="0x01"/>
+        <value caption="Sampled" name="SAMPLED" value="0x02"/>
+      </value-group>
+      <value-group caption="Frequency Select select" name="FUSE_FREQSEL">
+        <value caption="16 MHz" name="16MHZ" value="0x1"/>
+        <value caption="20 MHz" name="20MHZ" value="0x2"/>
+      </value-group>
+      <value-group caption="CRC Source select" name="FUSE_CRCSRC">
+        <value caption="The CRC is performed on the entire Flash (boot, application code and application data section)." name="FLASH" value="0x0"/>
+        <value caption="The CRC is performed on the boot section of Flash" name="BOOT" value="0x1"/>
+        <value caption="The CRC is performed on the boot and application code section of Flash" name="BOOTAPP" value="0x2"/>
+        <value caption="Disable CRC." name="NOCRC" value="0x3"/>
+      </value-group>
+      <value-group caption="Reset Pin Configuration select" name="FUSE_RSTPINCFG">
+        <value caption="GPIO mode" name="GPIO" value="0x0"/>
+        <value caption="UPDI mode" name="UPDI" value="0x1"/>
+        <value caption="Reset mode" name="RST" value="0x2"/>
+      </value-group>
+      <value-group caption="Startup Time select" name="FUSE_SUT">
+        <value caption="0 ms" name="0MS" value="0x00"/>
+        <value caption="1 ms" name="1MS" value="0x01"/>
+        <value caption="2 ms" name="2MS" value="0x02"/>
+        <value caption="4 ms" name="4MS" value="0x03"/>
+        <value caption="8 ms" name="8MS" value="0x04"/>
+        <value caption="16 ms" name="16MS" value="0x05"/>
+        <value caption="32 ms" name="32MS" value="0x06"/>
+        <value caption="64 ms" name="64MS" value="0x07"/>
+      </value-group>
+      <value-group caption="Watchdog Timeout Period select" name="FUSE_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Watchdog Window Timeout Period select" name="FUSE_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+    <module caption="General Purpose IO" id="I2600" name="GPIO">
+      <register-group caption="General Purpose IO" name="GPIO" size="0x4">
+        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x0" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x1" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x2" rw="RW" size="1"/>
+        <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x3" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Lockbit" id="I2600" name="LOCKBIT">
+      <register-group caption="Lockbit" name="LOCKBIT" size="0x01">
+        <register caption="Lock bits" initval="0xC5" name="LOCKBIT" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Lock Bits" mask="0xff" name="LB" rw="RW" values="LOCKBIT_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="Lock Bits select" name="LOCKBIT_LB">
+        <value caption="Read and write lock" name="RWLOCK" value="0x3A"/>
+        <value caption="No locks" name="NOLOCK" value="0xC5"/>
+      </value-group>
+    </module>
+    <module caption="Non-volatile Memory Controller" id="I2109" name="NVMCTRL">
+      <register-group caption="Non-volatile Memory Controller" name="NVMCTRL" size="0x10">
+        <register caption="Address" name="ADDR" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Command" mask="0x7" name="CMD" rw="RW" values="NVMCTRL_CMD"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Application code write protect" mask="0x1" name="APCWP" rw="RW"/>
+          <bitfield caption="Boot Lock" mask="0x2" name="BOOTLOCK" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x6" rw="RW" size="2"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x3" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="EEPROM Ready" mask="0x1" name="EEREADY" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x2" rw="R" size="1">
+          <bitfield caption="EEPROM busy" mask="0x2" name="EEBUSY" rw="R"/>
+          <bitfield caption="Flash busy" mask="0x1" name="FBUSY" rw="R"/>
+          <bitfield caption="Write error" mask="0x4" name="WRERROR" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Command select" name="NVMCTRL_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Write page" name="PAGEWRITE" value="0x01"/>
+        <value caption="Erase page" name="PAGEERASE" value="0x02"/>
+        <value caption="Erase and write page" name="PAGEERASEWRITE" value="0x03"/>
+        <value caption="Page buffer clear" name="PAGEBUFCLR" value="0x04"/>
+        <value caption="Chip erase" name="CHIPERASE" value="0x05"/>
+        <value caption="EEPROM erase" name="EEERASE" value="0x06"/>
+        <value caption="Write fuse (PDI only)" name="FUSEWRITE" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Ports" id="I2103" name="PORT">
+      <register-group caption="I/O Ports" name="PORT" size="0x20">
+        <register caption="Data Direction" name="DIR" offset="0x00" rw="RW" size="1"/>
+        <register caption="Data Direction Clear" name="DIRCLR" offset="0x02" rw="RW" size="1"/>
+        <register caption="Data Direction Set" name="DIRSET" offset="0x01" rw="RW" size="1"/>
+        <register caption="Data Direction Toggle" name="DIRTGL" offset="0x03" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x08" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x04" rw="RW" size="1"/>
+        <register caption="Output Value Clear" name="OUTCLR" offset="0x06" rw="RW" size="1"/>
+        <register caption="Output Value Set" name="OUTSET" offset="0x05" rw="RW" size="1"/>
+        <register caption="Output Value Toggle" name="OUTTGL" offset="0x07" rw="RW" size="1"/>
+        <register caption="Pin 0 Control" initval="0x00" name="PIN0CTRL" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 1 Control" initval="0x00" name="PIN1CTRL" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 2 Control" initval="0x00" name="PIN2CTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 3 Control" initval="0x00" name="PIN3CTRL" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 4 Control" initval="0x00" name="PIN4CTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 5 Control" initval="0x00" name="PIN5CTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 6 Control" initval="0x00" name="PIN6CTRL" offset="0x16" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+        <register caption="Pin 7 Control" initval="0x00" name="PIN7CTRL" offset="0x17" rw="RW" size="1">
+          <bitfield caption="Inverted I/O Enable" mask="0x80" name="INVEN" rw="RW"/>
+          <bitfield caption="Input/Sense Configuration" mask="0x7" name="ISC" rw="RW" values="PORT_ISC"/>
+          <bitfield caption="Pullup enable" mask="0x8" name="PULLUPEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="Input/Sense Configuration select" name="PORT_ISC">
+        <value caption="Interrupt disabled but input buffer enabled" name="INTDISABLE" value="0x00"/>
+        <value caption="Sense Both Edges" name="BOTHEDGES" value="0x01"/>
+        <value caption="Sense Rising Edge" name="RISING" value="0x02"/>
+        <value caption="Sense Falling Edge" name="FALLING" value="0x03"/>
+        <value caption="Digital Input Buffer disabled" name="INPUT_DISABLE" value="0x04"/>
+        <value caption="Sense low Level" name="LEVEL" value="0x05"/>
+      </value-group>
+    </module>
+    <module caption="Port Multiplexer" id="I2600" name="PORTMUX">
+      <register-group caption="Port Multiplexer" name="PORTMUX" size="0x10">
+        <register caption="Port Multiplexer Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Event Output 0" mask="0x1" name="EVOUT0" rw="RW"/>
+          <bitfield caption="Event Output 1" mask="0x2" name="EVOUT1" rw="RW"/>
+          <bitfield caption="Event Output 2" mask="0x4" name="EVOUT2" rw="RW"/>
+          <bitfield caption="Configurable Custom Logic LUT0" mask="0x10" name="LUT0" rw="RW" values="PORTMUX_LUT0"/>
+          <bitfield caption="Configurable Custom Logic LUT1" mask="0x20" name="LUT1" rw="RW" values="PORTMUX_LUT1"/>
+        </register>
+        <register caption="Port Multiplexer Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer SPI0" mask="0x4" name="SPI0" rw="RW" values="PORTMUX_SPI0"/>
+          <bitfield caption="Port Multiplexer TWI0" mask="0x10" name="TWI0" rw="RW" values="PORTMUX_TWI0"/>
+          <bitfield caption="Port Multiplexer USART0" mask="0x1" name="USART0" rw="RW" values="PORTMUX_USART0"/>
+        </register>
+        <register caption="Port Multiplexer Control C" initval="0x00" name="CTRLC" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCA0 Output 0" mask="0x1" name="TCA00" rw="RW" values="PORTMUX_TCA00"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 1" mask="0x2" name="TCA01" rw="RW" values="PORTMUX_TCA01"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 2" mask="0x4" name="TCA02" rw="RW" values="PORTMUX_TCA02"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 3" mask="0x8" name="TCA03" rw="RW" values="PORTMUX_TCA03"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 4" mask="0x10" name="TCA04" rw="RW" values="PORTMUX_TCA04"/>
+          <bitfield caption="Port Multiplexer TCA0 Output 5" mask="0x20" name="TCA05" rw="RW" values="PORTMUX_TCA05"/>
+        </register>
+        <register caption="Port Multiplexer Control D" initval="0x00" name="CTRLD" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Port Multiplexer TCB" mask="0x1" name="TCB0" rw="RW" values="PORTMUX_TCB0"/>
+        </register>
+      </register-group>
+      <value-group caption="Configurable Custom Logic LUT0 select" name="PORTMUX_LUT0">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Configurable Custom Logic LUT1 select" name="PORTMUX_LUT1">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer SPI0 select" name="PORTMUX_SPI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TWI0 select" name="PORTMUX_TWI0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer USART0 select" name="PORTMUX_USART0">
+        <value caption="Default pins" name="DEFAULT" value="0"/>
+        <value caption="Alternate pins" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 0 select" name="PORTMUX_TCA00">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 1 select" name="PORTMUX_TCA01">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 2 select" name="PORTMUX_TCA02">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 3 select" name="PORTMUX_TCA03">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 4 select" name="PORTMUX_TCA04">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCA0 Output 5 select" name="PORTMUX_TCA05">
+        <value caption="Default pin" name="DEFAULT" value="0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="1"/>
+      </value-group>
+      <value-group caption="Port Multiplexer TCB select" name="PORTMUX_TCB0">
+        <value caption="Default pin" name="DEFAULT" value="0x0"/>
+        <value caption="Alternate pin" name="ALTERNATE" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Peripherial Touch Controller" id="I2120" name="PTC"/>
+    <module caption="Reset controller" id="I2111" name="RSTCTRL">
+      <register-group caption="Reset controller" name="RSTCTRL" size="0x4">
+        <register caption="Reset Flags" initval="0x00" name="RSTFR" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Brown out detector Reset flag" mask="0x2" name="BORF" rw="RW"/>
+          <bitfield caption="External Reset flag" mask="0x4" name="EXTRF" rw="RW"/>
+          <bitfield caption="Power on Reset flag" mask="0x1" name="PORF" rw="RW"/>
+          <bitfield caption="Software Reset flag" mask="0x10" name="SWRF" rw="RW"/>
+          <bitfield caption="UPDI Reset flag" mask="0x20" name="UPDIRF" rw="RW"/>
+          <bitfield caption="Watch dog Reset flag" mask="0x8" name="WDRF" rw="RW"/>
+        </register>
+        <register caption="Software Reset" initval="0x00" name="SWRR" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Software reset enable" mask="0x1" name="SWRE" rw="RW"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Real-Time Counter" id="I2116" name="RTC">
+      <register-group caption="Real-Time Counter" name="RTC" size="0x20">
+        <register caption="Clock Select" initval="0x00" name="CLKSEL" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x3" name="CLKSEL" rw="RW" values="RTC_CLKSEL"/>
+        </register>
+        <register caption="Compare" name="CMP" offset="0x0C" rw="RW" size="2"/>
+        <register caption="Counter" name="CNT" offset="0x08" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Prescaling Factor" mask="0x78" name="PRESCALER" rw="RW" values="RTC_PRESCALER"/>
+          <bitfield caption="Enable" mask="0x1" name="RTCEN" rw="RW"/>
+          <bitfield caption="Run In Standby" mask="0x80" name="RUNSTDBY" rw="RW"/>
+        </register>
+        <register caption="Debug control" initval="0x00" name="DBGCTRL" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt enable" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare Match Interrupt" mask="0x2" name="CMP" rw="RW"/>
+          <bitfield caption="Overflow Interrupt Flag" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x0A" rw="RW" size="2"/>
+        <register caption="PIT Control A" initval="0x00" name="PITCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Period" mask="0x78" name="PERIOD" rw="RW" values="RTC_PERIOD"/>
+          <bitfield caption="Enable" mask="0x1" name="PITEN" rw="RW"/>
+        </register>
+        <register caption="PIT Debug control" initval="0x00" name="PITDBGCTRL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Run in debug" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Control" initval="0x00" name="PITINTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Interrupt Flags" initval="0x00" name="PITINTFLAGS" offset="0x13" rw="RW" size="1">
+          <bitfield caption="Periodic Interrupt" mask="0x1" name="PI" rw="RW"/>
+        </register>
+        <register caption="PIT Status" initval="0x00" name="PITSTATUS" offset="0x11" rw="R" size="1">
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLBUSY" rw="R"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x01" rw="R" size="1">
+          <bitfield caption="Comparator Synchronization Busy Flag" mask="0x8" name="CMPBUSY" rw="R"/>
+          <bitfield caption="Count Synchronization Busy Flag" mask="0x2" name="CNTBUSY" rw="R"/>
+          <bitfield caption="CTRLA Synchronization Busy Flag" mask="0x1" name="CTRLABUSY" rw="R"/>
+          <bitfield caption="Period Synchronization Busy Flag" mask="0x4" name="PERBUSY" rw="R"/>
+        </register>
+        <register caption="Temporary" name="TEMP" offset="0x04" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="RTC_CLKSEL">
+        <value caption="Internal 32kHz OSC" name="INT32K" value="0x00"/>
+        <value caption="Internal 1kHz OSC" name="INT1K" value="0x01"/>
+        <value caption="32KHz Crystal OSC" name="TOSC32K" value="0x02"/>
+        <value caption="External Clock" name="EXTCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="Prescaling Factor select" name="RTC_PRESCALER">
+        <value caption="RTC Clock / 1" name="DIV1" value="0x00"/>
+        <value caption="RTC Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="RTC Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="RTC Clock / 32" name="DIV32" value="0x05"/>
+        <value caption="RTC Clock / 64" name="DIV64" value="0x06"/>
+        <value caption="RTC Clock / 128" name="DIV128" value="0x07"/>
+        <value caption="RTC Clock / 256" name="DIV256" value="0x08"/>
+        <value caption="RTC Clock / 512" name="DIV512" value="0x09"/>
+        <value caption="RTC Clock / 1024" name="DIV1024" value="0x0A"/>
+        <value caption="RTC Clock / 2048" name="DIV2048" value="0x0B"/>
+        <value caption="RTC Clock / 4096" name="DIV4096" value="0x0C"/>
+        <value caption="RTC Clock / 8192" name="DIV8192" value="0x0D"/>
+        <value caption="RTC Clock / 16384" name="DIV16384" value="0x0E"/>
+        <value caption="RTC Clock / 32768" name="DIV32768" value="0x0F"/>
+      </value-group>
+      <value-group caption="Period select" name="RTC_PERIOD">
+        <value caption="Off" name="OFF" value="0x00"/>
+        <value caption="RTC Clock Cycles 4" name="CYC4" value="0x01"/>
+        <value caption="RTC Clock Cycles 8" name="CYC8" value="0x02"/>
+        <value caption="RTC Clock Cycles 16" name="CYC16" value="0x03"/>
+        <value caption="RTC Clock Cycles 32" name="CYC32" value="0x04"/>
+        <value caption="RTC Clock Cycles 64" name="CYC64" value="0x05"/>
+        <value caption="RTC Clock Cycles 128" name="CYC128" value="0x06"/>
+        <value caption="RTC Clock Cycles 256" name="CYC256" value="0x07"/>
+        <value caption="RTC Clock Cycles 512" name="CYC512" value="0x08"/>
+        <value caption="RTC Clock Cycles 1024" name="CYC1024" value="0x09"/>
+        <value caption="RTC Clock Cycles 2048" name="CYC2048" value="0x0A"/>
+        <value caption="RTC Clock Cycles 4096" name="CYC4096" value="0x0B"/>
+        <value caption="RTC Clock Cycles 8192" name="CYC8192" value="0x0C"/>
+        <value caption="RTC Clock Cycles 16384" name="CYC16384" value="0x0D"/>
+        <value caption="RTC Clock Cycles 32768" name="CYC32768" value="0x0E"/>
+      </value-group>
+    </module>
+    <module caption="Signature row" id="I2600" name="SIGROW">
+      <register-group caption="Signature row" name="SIGROW" size="0x40">
+        <register caption="Device ID Byte 0" name="DEVICEID0" offset="0x00" rw="R" size="1"/>
+        <register caption="Device ID Byte 1" name="DEVICEID1" offset="0x01" rw="R" size="1"/>
+        <register caption="Device ID Byte 2" name="DEVICEID2" offset="0x02" rw="R" size="1"/>
+        <register caption="OSC16 error at 3V" name="OSC16ERR3V" offset="0x22" rw="R" size="1"/>
+        <register caption="OSC16 error at 5V" name="OSC16ERR5V" offset="0x23" rw="R" size="1"/>
+        <register caption="OSC20 error at 3V" name="OSC20ERR3V" offset="0x24" rw="R" size="1"/>
+        <register caption="OSC20 error at 5V" name="OSC20ERR5V" offset="0x25" rw="R" size="1"/>
+        <register caption="Serial Number Byte 0" name="SERNUM0" offset="0x03" rw="R" size="1"/>
+        <register caption="Serial Number Byte 1" name="SERNUM1" offset="0x04" rw="R" size="1"/>
+        <register caption="Serial Number Byte 2" name="SERNUM2" offset="0x05" rw="R" size="1"/>
+        <register caption="Serial Number Byte 3" name="SERNUM3" offset="0x06" rw="R" size="1"/>
+        <register caption="Serial Number Byte 4" name="SERNUM4" offset="0x07" rw="R" size="1"/>
+        <register caption="Serial Number Byte 5" name="SERNUM5" offset="0x08" rw="R" size="1"/>
+        <register caption="Serial Number Byte 6" name="SERNUM6" offset="0x09" rw="R" size="1"/>
+        <register caption="Serial Number Byte 7" name="SERNUM7" offset="0x0A" rw="R" size="1"/>
+        <register caption="Serial Number Byte 8" name="SERNUM8" offset="0x0B" rw="R" size="1"/>
+        <register caption="Serial Number Byte 9" name="SERNUM9" offset="0x0C" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x20" rw="R" size="1"/>
+        <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x21" rw="R" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Sleep Controller" id="I2112" name="SLPCTRL">
+      <register-group caption="Sleep Controller" name="SLPCTRL" size="0x2">
+        <register caption="Control" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Sleep enable" mask="0x1" name="SEN" rw="RW"/>
+          <bitfield caption="Sleep mode" mask="0x6" name="SMODE" rw="RW" values="SLPCTRL_SMODE"/>
+        </register>
+      </register-group>
+      <value-group caption="Sleep mode select" name="SLPCTRL_SMODE">
+        <value caption="Idle mode" name="IDLE" value="0x00"/>
+        <value caption="Standby Mode" name="STDBY" value="0x01"/>
+        <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" id="I2107" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI" size="0x8">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Enable Double Speed" mask="0x10" name="CLK2X" rw="RW"/>
+          <bitfield caption="Data Order Setting" mask="0x40" name="DORD" rw="RW"/>
+          <bitfield caption="Enable Module" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Master Operation Enable" mask="0x20" name="MASTER" rw="RW"/>
+          <bitfield caption="Prescaler" mask="0x6" name="PRESC" rw="RW" values="SPI_PRESC"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Buffer Mode Enable" mask="0x80" name="BUFEN" rw="RW"/>
+          <bitfield caption="Buffer Write Mode" mask="0x40" name="BUFWR" rw="RW"/>
+          <bitfield caption="SPI Mode" mask="0x3" name="MODE" rw="RW" values="SPI_MODE"/>
+          <bitfield caption="Slave Select Disable" mask="0x4" name="SSD" rw="RW"/>
+        </register>
+        <register caption="Data" name="DATA" offset="0x4" rw="RW" size="1"/>
+        <register caption="Interrupt Control" name="INTCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Interrupt Enable" mask="0x1" name="IE" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Slave Select Trigger Interrupt Enable" mask="0x10" name="SSIE" rw="RW"/>
+          <bitfield caption="Transfer Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <mode name="BUFFERED">
+            <bitfield caption="Buffer Overflow" mask="0x1" name="BUFOVF" rw="RW"/>
+            <bitfield caption="Data Register Empty Interrupt Flag" mask="0x20" name="DREIF" rw="RW"/>
+            <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="RW"/>
+            <bitfield caption="Slave Select Trigger Interrupt Flag" mask="0x10" name="SSIF" rw="RW"/>
+            <bitfield caption="Transfer Complete Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          </mode>
+          <mode name="DEFAULT">
+            <bitfield caption="Interrupt Flag" mask="0x80" name="IF" rw="RW"/>
+            <bitfield caption="Write Collision" mask="0x40" name="WRCOL" rw="RW"/>
+          </mode>
+        </register>
+      </register-group>
+      <value-group caption="Prescaler select" name="SPI_PRESC">
+        <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+        <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+      </value-group>
+      <value-group caption="SPI Mode select" name="SPI_MODE">
+        <value caption="SPI Mode 0" name="0" value="0x00"/>
+        <value caption="SPI Mode 1" name="1" value="0x01"/>
+        <value caption="SPI Mode 2" name="2" value="0x02"/>
+        <value caption="SPI Mode 3" name="3" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="System Configuration Registers" id="I2600" name="SYSCFG">
+      <register-group caption="System Configuration Registers" name="SYSCFG" size="0x20">
+        <register caption="External Break" initval="0x00" name="EXTBRK" offset="0x02" rw="RW" size="1">
+          <bitfield caption="External break enable" mask="0x1" name="ENEXTBRK" rw="RW"/>
+        </register>
+        <register caption="Revision ID" name="REVID" offset="0x01" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="16-bit Timer/Counter Type A" id="I2117" name="TCA">
+      <register-group caption="16-bit Timer/Counter Type A - Single Mode" name="TCA_SINGLE" size="0x40">
+        <register caption="Compare 0" name="CMP0" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare 0 Buffer" name="CMP0BUF" offset="0x38" rw="RW" size="2"/>
+        <register caption="Compare 1" name="CMP1" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare 1 Buffer" name="CMP1BUF" offset="0x3A" rw="RW" size="2"/>
+        <register caption="Compare 2" name="CMP2" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Compare 2 Buffer" name="CMP2BUF" offset="0x3C" rw="RW" size="2"/>
+        <register caption="Count" name="CNT" offset="0x20" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SINGLE_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Auto Lock Update" mask="0x8" name="ALUPD" rw="RW"/>
+          <bitfield caption="Compare 0 Enable" mask="0x10" name="CMP0EN" rw="RW"/>
+          <bitfield caption="Compare 1 Enable" mask="0x20" name="CMP1EN" rw="RW"/>
+          <bitfield caption="Compare 2 Enable" mask="0x40" name="CMP2EN" rw="RW"/>
+          <bitfield caption="Waveform generation mode" mask="0x7" name="WGMODE" rw="RW" values="TCA_SINGLE_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Compare 0 Waveform Output Value" mask="0x1" name="CMP0OV" rw="RW"/>
+          <bitfield caption="Compare 1 Waveform Output Value" mask="0x2" name="CMP1OV" rw="RW"/>
+          <bitfield caption="Compare 2 Waveform Output Value" mask="0x4" name="CMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SINGLE_CMD"/>
+          <bitfield caption="Direction" mask="0x1" name="DIR" rw="RW" values="TCA_SINGLE_DIR"/>
+          <bitfield caption="Lock Update" mask="0x2" name="LUPD" rw="RW"/>
+        </register>
+        <register caption="Control F Clear" initval="0x00" name="CTRLFCLR" offset="0x06" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Control F Set" initval="0x00" name="CTRLFSET" offset="0x07" rw="RW" size="1">
+          <bitfield caption="Compare 0 Buffer Valid" mask="0x2" name="CMP0BV" rw="RW"/>
+          <bitfield caption="Compare 1 Buffer Valid" mask="0x4" name="CMP1BV" rw="RW"/>
+          <bitfield caption="Compare 2 Buffer Valid" mask="0x8" name="CMP2BV" rw="RW"/>
+          <bitfield caption="Period Buffer Valid" mask="0x1" name="PERBV" rw="RW"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x09" rw="RW" size="1">
+          <bitfield caption="Count on Event Input" mask="0x1" name="CNTEI" rw="RW"/>
+          <bitfield caption="Event Action" mask="0x6" name="EVACT" rw="RW" values="TCA_SINGLE_EVACT"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="Compare 0 Interrupt" mask="0x10" name="CMP0" rw="RW"/>
+          <bitfield caption="Compare 1 Interrupt" mask="0x20" name="CMP1" rw="RW"/>
+          <bitfield caption="Compare 2 Interrupt" mask="0x40" name="CMP2" rw="RW"/>
+          <bitfield caption="Overflow Interrupt" mask="0x1" name="OVF" rw="RW"/>
+        </register>
+        <register caption="Period" name="PER" offset="0x26" rw="RW" size="2"/>
+        <register caption="Period Buffer" name="PERBUF" offset="0x36" rw="RW" size="2"/>
+        <register caption="Temporary data for 16-bit Access" name="TEMP" offset="0x0F" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A - Split Mode" name="TCA_SPLIT" size="0x40">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="Clock Selection" mask="0xe" name="CLKSEL" rw="RW" values="TCA_SPLIT_CLKSEL"/>
+          <bitfield caption="Module Enable" mask="0x1" name="ENABLE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Enable" mask="0x10" name="HCMP0EN" rw="RW"/>
+          <bitfield caption="High Compare 1 Enable" mask="0x20" name="HCMP1EN" rw="RW"/>
+          <bitfield caption="High Compare 2 Enable" mask="0x40" name="HCMP2EN" rw="RW"/>
+          <bitfield caption="Low Compare 0 Enable" mask="0x1" name="LCMP0EN" rw="RW"/>
+          <bitfield caption="Low Compare 1 Enable" mask="0x2" name="LCMP1EN" rw="RW"/>
+          <bitfield caption="Low Compare 2 Enable" mask="0x4" name="LCMP2EN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="High Compare 0 Output Value" mask="0x10" name="HCMP0OV" rw="RW"/>
+          <bitfield caption="High Compare 1 Output Value" mask="0x20" name="HCMP1OV" rw="RW"/>
+          <bitfield caption="High Compare 2 Output Value" mask="0x40" name="HCMP2OV" rw="RW"/>
+          <bitfield caption="Low Compare 0 Output Value" mask="0x1" name="LCMP0OV" rw="RW"/>
+          <bitfield caption="Low Compare 1 Output Value" mask="0x2" name="LCMP1OV" rw="RW"/>
+          <bitfield caption="Low Compare 2 Output Value" mask="0x4" name="LCMP2OV" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Split Mode Enable" mask="0x1" name="SPLITM" rw="RW"/>
+        </register>
+        <register caption="Control E Clear" initval="0x00" name="CTRLECLR" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Control E Set" initval="0x00" name="CTRLESET" offset="0x05" rw="RW" size="1">
+          <bitfield caption="Command" mask="0xc" name="CMD" rw="RW" values="TCA_SPLIT_CMD"/>
+        </register>
+        <register caption="Degbug Control" initval="0x00" name="DBGCTRL" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="High Compare" name="HCMP0" offset="0x29" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP1" offset="0x2B" rw="RW" size="1"/>
+        <register caption="High Compare" name="HCMP2" offset="0x2D" rw="RW" size="1"/>
+        <register caption="High Count" name="HCNT" offset="0x21" rw="RW" size="1"/>
+        <register caption="High Period" name="HPER" offset="0x27" rw="RW" size="1"/>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0A" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Enable" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Enable" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Enable" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Enable" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Enable" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0B" rw="RW" size="1">
+          <bitfield caption="High Underflow Interrupt Flag" mask="0x2" name="HUNF" rw="RW"/>
+          <bitfield caption="Low Compare 2 Interrupt Flag" mask="0x10" name="LCMP0" rw="RW"/>
+          <bitfield caption="Low Compare 1 Interrupt Flag" mask="0x20" name="LCMP1" rw="RW"/>
+          <bitfield caption="Low Compare 0 Interrupt Flag" mask="0x40" name="LCMP2" rw="RW"/>
+          <bitfield caption="Low Underflow Interrupt Flag" mask="0x1" name="LUNF" rw="RW"/>
+        </register>
+        <register caption="Low Compare" name="LCMP0" offset="0x28" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP1" offset="0x2A" rw="RW" size="1"/>
+        <register caption="Low Compare" name="LCMP2" offset="0x2C" rw="RW" size="1"/>
+        <register caption="Low Count" name="LCNT" offset="0x20" rw="RW" size="1"/>
+        <register caption="Low Period" name="LPER" offset="0x26" rw="RW" size="1"/>
+      </register-group>
+      <register-group caption="16-bit Timer/Counter Type A" class="union" name="TCA" size="0x40" union-tag="TCA.SINGLE.CTRLD.SPLITM">
+        <register-group name="SINGLE" name-in-module="TCA_SINGLE" offset="0" union-tag-value="0"/>
+        <register-group name="SPLIT" name-in-module="TCA_SPLIT" offset="0" union-tag-value="1"/>
+      </register-group>
+      <value-group caption="Clock Selection select" name="TCA_SINGLE_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCA_SINGLE_WGMODE">
+        <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+        <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+        <value caption="Single Slope PWM" name="SINGLESLOPE" value="0x03"/>
+        <value caption="Dual Slope PWM, overflow on TOP" name="DSTOP" value="0x05"/>
+        <value caption="Dual Slope PWM, overflow on TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+        <value caption="Dual Slope PWM, overflow on BOTTOM" name="DSBOTTOM" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SINGLE_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+      <value-group caption="Direction select" name="TCA_SINGLE_DIR">
+        <value caption="Count up" name="UP" value="0x0"/>
+        <value caption="Count down" name="DOWN" value="0x1"/>
+      </value-group>
+      <value-group caption="Event Action select" name="TCA_SINGLE_EVACT">
+        <value caption="Count on positive edge event" name="POSEDGE" value="0x00"/>
+        <value caption="Count on any edge event" name="ANYEDGE" value="0x01"/>
+        <value caption="Count on prescaled clock while event line is 1." name="HIGHLVL" value="0x02"/>
+        <value caption="Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1." name="UPDOWN" value="0x03"/>
+      </value-group>
+      <value-group caption="Clock Selection select" name="TCA_SPLIT_CLKSEL">
+        <value caption="System Clock" name="DIV1" value="0x00"/>
+        <value caption="System Clock / 2" name="DIV2" value="0x01"/>
+        <value caption="System Clock / 4" name="DIV4" value="0x02"/>
+        <value caption="System Clock / 8" name="DIV8" value="0x03"/>
+        <value caption="System Clock / 16" name="DIV16" value="0x04"/>
+        <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+        <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+        <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+      </value-group>
+      <value-group caption="Command select" name="TCA_SPLIT_CMD">
+        <value caption="No Command" name="NONE" value="0x00"/>
+        <value caption="Force Update" name="UPDATE" value="0x01"/>
+        <value caption="Force Restart" name="RESTART" value="0x02"/>
+        <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="16-bit Timer Type B" id="I2119" name="TCB">
+      <register-group caption="16-bit Timer Type B" name="TCB" size="0x10">
+        <register caption="Compare or Capture" name="CCMP" offset="0xC" rw="RW" size="2"/>
+        <register caption="Count" initval="0x0000" name="CNT" offset="0xA" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Clock Select" mask="0x6" name="CLKSEL" rw="RW" values="TCB_CLKSEL"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Run Standby" mask="0x40" name="RUNSTDBY" rw="RW"/>
+          <bitfield caption="Synchronize Update" mask="0x10" name="SYNCUPD" rw="RW"/>
+        </register>
+        <register caption="Control Register B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Asynchronous Enable" mask="0x40" name="ASYNC" rw="RW"/>
+          <bitfield caption="Pin Output Enable" mask="0x10" name="CCMPEN" rw="RW"/>
+          <bitfield caption="Pin Initial State" mask="0x20" name="CCMPINIT" rw="RW"/>
+          <bitfield caption="Timer Mode" mask="0x7" name="CNTMODE" rw="RW" values="TCB_CNTMODE"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x8" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Event Input Enable" mask="0x1" name="CAPTEI" rw="RW"/>
+          <bitfield caption="Event Edge" mask="0x10" name="EDGE" rw="RW"/>
+          <bitfield caption="Input Capture Noise Cancellation Filter" mask="0x40" name="FILTER" rw="RW"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Capture or Timeout" mask="0x1" name="CAPT" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x7" rw="R" size="1">
+          <bitfield caption="Run" mask="0x1" name="RUN" rw="R"/>
+        </register>
+        <register caption="Temporary Value" name="TEMP" offset="0x9" rw="RW" size="1"/>
+      </register-group>
+      <value-group caption="Clock Select select" name="TCB_CLKSEL">
+        <value caption="CLK_PER (No Prescaling)" name="CLKDIV1" value="0x00"/>
+        <value caption="CLK_PER/2 (From Prescaler)" name="CLKDIV2" value="0x01"/>
+        <value caption="Use Clock from TCA" name="CLKTCA" value="0x02"/>
+      </value-group>
+      <value-group caption="Timer Mode select" name="TCB_CNTMODE">
+        <value caption="Periodic Interrupt" name="INT" value="0x00"/>
+        <value caption="Periodic Timeout" name="TIMEOUT" value="0x01"/>
+        <value caption="Input Capture Event" name="CAPT" value="0x02"/>
+        <value caption="Input Capture Frequency measurement" name="FRQ" value="0x03"/>
+        <value caption="Input Capture Pulse-Width measurement" name="PW" value="0x04"/>
+        <value caption="Input Capture Frequency and Pulse-Width measurement" name="FRQPW" value="0x05"/>
+        <value caption="Single Shot" name="SINGLE" value="0x06"/>
+        <value caption="8-bit PWM" name="PWM8" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer Counter D" id="I2129" name="TCD">
+      <register-group caption="Timer Counter D" name="TCD" size="0x40">
+        <register caption="Capture A" name="CAPTUREA" offset="0x22" rw="R" size="2"/>
+        <register caption="Capture B" name="CAPTUREB" offset="0x24" rw="R" size="2"/>
+        <register caption="Compare A Clear" name="CMPACLR" offset="0x2A" rw="RW" size="2"/>
+        <register caption="Compare A Set" name="CMPASET" offset="0x28" rw="RW" size="2"/>
+        <register caption="Compare B Clear" name="CMPBCLR" offset="0x2E" rw="RW" size="2"/>
+        <register caption="Compare B Set" name="CMPBSET" offset="0x2C" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x00" rw="RW" size="1">
+          <bitfield caption="clock select" mask="0x60" name="CLKSEL" rw="RW" values="TCD_CLKSEL"/>
+          <bitfield caption="counter prescaler" mask="0x18" name="CNTPRES" rw="RW" values="TCD_CNTPRES"/>
+          <bitfield caption="Enable" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Syncronization prescaler" mask="0x6" name="SYNCPRES" rw="RW" values="TCD_SYNCPRES"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x01" rw="RW" size="1">
+          <bitfield caption="Waveform generation mode" mask="0x3" name="WGMODE" rw="RW" values="TCD_WGMODE"/>
+        </register>
+        <register caption="Control C" initval="0x00" name="CTRLC" offset="0x02" rw="RW" size="1">
+          <bitfield caption="Auto update" mask="0x2" name="AUPDATE" rw="RW"/>
+          <bitfield caption="Compare C output select" mask="0x40" name="CMPCSEL" rw="RW" values="TCD_CMPCSEL"/>
+          <bitfield caption="Compare D output select" mask="0x80" name="CMPDSEL" rw="RW" values="TCD_CMPDSEL"/>
+          <bitfield caption="Compare output value override" mask="0x1" name="CMPOVR" rw="RW"/>
+          <bitfield caption="Fifty percent waveform" mask="0x8" name="FIFTY" rw="RW"/>
+        </register>
+        <register caption="Control D" initval="0x00" name="CTRLD" offset="0x03" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0xf" name="CMPAVAL" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0xf0" name="CMPBVAL" rw="RW"/>
+        </register>
+        <register caption="Control E" initval="0x00" name="CTRLE" offset="0x04" rw="RW" size="1">
+          <bitfield caption="Disable at end of cycle" mask="0x80" name="DISEOC" rw="RW"/>
+          <bitfield caption="Restart strobe" mask="0x4" name="RESTART" rw="RW"/>
+          <bitfield caption="Software Capture A Strobe" mask="0x8" name="SCAPTUREA" rw="RW"/>
+          <bitfield caption="Software Capture B Strobe" mask="0x10" name="SCAPTUREB" rw="RW"/>
+          <bitfield caption="synchronize strobe" mask="0x2" name="SYNC" rw="RW"/>
+          <bitfield caption="synchronize end of cycle strobe" mask="0x1" name="SYNCEOC" rw="RW"/>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0x1E" rw="RW" size="1">
+          <bitfield caption="Debug run" mask="0x1" name="DBGRUN" rw="RW"/>
+          <bitfield caption="Fault detection" mask="0x4" name="FAULTDET" rw="RW"/>
+        </register>
+        <register caption="Dither Control A" initval="0x00" name="DITCTRL" offset="0x18" rw="RW" size="1">
+          <bitfield caption="dither select" mask="0x3" name="DITHERSEL" rw="RW" values="TCD_DITHERSEL"/>
+        </register>
+        <register caption="Dither value" initval="0x00" name="DITVAL" offset="0x19" rw="RW" size="1">
+          <bitfield caption="Dither value" mask="0xf" name="DITHER" rw="RW"/>
+        </register>
+        <register caption="Delay Control" initval="0x00" name="DLYCTRL" offset="0x14" rw="RW" size="1">
+          <bitfield caption="Delay prescaler" mask="0x30" name="DLYPRESC" rw="RW" values="TCD_DLYPRESC"/>
+          <bitfield caption="Delay select" mask="0x3" name="DLYSEL" rw="RW" values="TCD_DLYSEL"/>
+          <bitfield caption="Delay trigger" mask="0xc" name="DLYTRIG" rw="RW" values="TCD_DLYTRIG"/>
+        </register>
+        <register caption="Delay value" initval="0x00" name="DLYVAL" offset="0x15" rw="RW" size="1">
+          <bitfield caption="Delay value" mask="0xff" name="DLYVAL" rw="RW"/>
+        </register>
+        <register caption="EVCTRLA" initval="0x00" name="EVCTRLA" offset="0x08" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="EVCTRLB" initval="0x00" name="EVCTRLB" offset="0x09" rw="RW" size="1">
+          <bitfield caption="event action" mask="0x4" name="ACTION" rw="RW" values="TCD_ACTION"/>
+          <bitfield caption="event config" mask="0xc0" name="CFG" rw="RW" values="TCD_CFG"/>
+          <bitfield caption="edge select" mask="0x10" name="EDGE" rw="RW" values="TCD_EDGE"/>
+          <bitfield caption="Trigger event enable" mask="0x1" name="TRIGEI" rw="RW"/>
+        </register>
+        <register caption="Fault Control" initval="0x00" name="FAULTCTRL" offset="0x12" rw="RW" size="1">
+          <bitfield caption="Compare A value" mask="0x1" name="CMPA" rw="RW"/>
+          <bitfield caption="Compare A enable" mask="0x10" name="CMPAEN" rw="RW"/>
+          <bitfield caption="Compare B value" mask="0x2" name="CMPB" rw="RW"/>
+          <bitfield caption="Compare B enable" mask="0x20" name="CMPBEN" rw="RW"/>
+          <bitfield caption="Compare C value" mask="0x4" name="CMPC" rw="RW"/>
+          <bitfield caption="Compare C enable" mask="0x40" name="CMPCEN" rw="RW"/>
+          <bitfield caption="Compare D vaule" mask="0x8" name="CMPD" rw="RW"/>
+          <bitfield caption="Compare D enable" mask="0x80" name="CMPDEN" rw="RW"/>
+        </register>
+        <register caption="Input Control A" initval="0x00" name="INPUTCTRLA" offset="0x10" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Input Control B" initval="0x00" name="INPUTCTRLB" offset="0x11" rw="RW" size="1">
+          <bitfield caption="Input mode" mask="0xf" name="INPUTMODE" rw="RW" values="TCD_INPUTMODE"/>
+        </register>
+        <register caption="Interrupt Control" initval="0x00" name="INTCTRL" offset="0x0C" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x0D" rw="RW" size="1">
+          <bitfield caption="Overflow interrupt enable" mask="0x1" name="OVF" rw="RW"/>
+          <bitfield caption="Trigger A interrupt enable" mask="0x4" name="TRIGA" rw="RW"/>
+          <bitfield caption="Trigger B interrupt enable" mask="0x8" name="TRIGB" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x0E" rw="RW" size="1">
+          <bitfield caption="Command ready" mask="0x2" name="CMDRDY" rw="R"/>
+          <bitfield caption="Enable ready" mask="0x1" name="ENRDY" rw="R"/>
+          <bitfield caption="PWM activity on A" mask="0x40" name="PWMACTA" rw="RW"/>
+          <bitfield caption="PWM activity on B" mask="0x80" name="PWMACTB" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="clock select select" name="TCD_CLKSEL">
+        <value caption="20 MHz oscillator" name="20MHZ" value="0x00"/>
+        <value caption="External clock" name="EXTCLK" value="0x02"/>
+        <value caption="System clock" name="SYSCLK" value="0x03"/>
+      </value-group>
+      <value-group caption="counter prescaler select" name="TCD_CNTPRES">
+        <value caption="Sync clock divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Sync clock divided by 4" name="DIV4" value="0x01"/>
+        <value caption="Sync clock divided by 32" name="DIV32" value="0x02"/>
+      </value-group>
+      <value-group caption="Syncronization prescaler select" name="TCD_SYNCPRES">
+        <value caption="Selevted clock source divided by 1" name="DIV1" value="0x00"/>
+        <value caption="Selevted clock source divided by 2" name="DIV2" value="0x01"/>
+        <value caption="Selevted clock source divided by 4" name="DIV4" value="0x02"/>
+        <value caption="Selevted clock source divided by 8" name="DIV8" value="0x03"/>
+      </value-group>
+      <value-group caption="Waveform generation mode select" name="TCD_WGMODE">
+        <value caption="One ramp mode" name="ONERAMP" value="0x0"/>
+        <value caption="Two ramp mode" name="TWORAMP" value="0x1"/>
+        <value caption="Four ramp mode" name="FOURRAMP" value="0x2"/>
+        <value caption="Dual slope mode" name="DS" value="0x3"/>
+      </value-group>
+      <value-group caption="Compare C output select select" name="TCD_CMPCSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="Compare D output select select" name="TCD_CMPDSEL">
+        <value caption="PWM A output" name="PWMA" value="0x0"/>
+        <value caption="PWM B output" name="PWMB" value="0x1"/>
+      </value-group>
+      <value-group caption="dither select select" name="TCD_DITHERSEL">
+        <value caption="On-time ramp B" name="ONTIMEB" value="0x0"/>
+        <value caption="On-time ramp A and B" name="ONTIMEAB" value="0x1"/>
+        <value caption="Dead-time rampB" name="DEADTIMEB" value="0x2"/>
+        <value caption="Dead-time ramp A and B" name="DEADTIMEAB" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay prescaler select" name="TCD_DLYPRESC">
+        <value caption="No prescaling" name="DIV1" value="0x0"/>
+        <value caption="Prescale with 2" name="DIV2" value="0x1"/>
+        <value caption="Prescale with 4" name="DIV4" value="0x2"/>
+        <value caption="Prescale with 8" name="DIV8" value="0x3"/>
+      </value-group>
+      <value-group caption="Delay select select" name="TCD_DLYSEL">
+        <value caption="No delay" name="OFF" value="0x0"/>
+        <value caption="Input blanking enabled" name="INBLANK" value="0x1"/>
+        <value caption="Event delay enabled" name="EVENT" value="0x2"/>
+      </value-group>
+      <value-group caption="Delay trigger select" name="TCD_DLYTRIG">
+        <value caption="Compare A set" name="CMPASET" value="0x0"/>
+        <value caption="Compare A clear" name="CMPACLR" value="0x1"/>
+        <value caption="Compare B set" name="CMPBSET" value="0x2"/>
+        <value caption="Compare B clear" name="CMPBCLR" value="0x3"/>
+      </value-group>
+      <value-group caption="event action select" name="TCD_ACTION">
+        <value caption="Event trigger a fault" name="FAULT" value="0x0"/>
+        <value caption="Event trigger a fault and capture" name="CAPTURE" value="0x1"/>
+      </value-group>
+      <value-group caption="event config select" name="TCD_CFG">
+        <value caption="Neither Filter nor Asynchronous Event is enabled" name="NEITHER" value="0x0"/>
+        <value caption="Input Capture Noise Cancellation Filter enabled" name="FILTER" value="0x1"/>
+        <value caption="Asynchronous Event output qualification enabled" name="ASYNC" value="0x2"/>
+      </value-group>
+      <value-group caption="edge select select" name="TCD_EDGE">
+        <value caption="The falling edge or low level of event generates retrigger or fault action" name="FALL_LOW" value="0x0"/>
+        <value caption="The rising edge or high level of event generates retrigger or fault action" name="RISE_HIGH" value="0x1"/>
+      </value-group>
+      <value-group caption="Input mode select" name="TCD_INPUTMODE">
+        <value caption="Input has no actions" name="NONE" value="0x0"/>
+        <value caption="Stop output, jump to opposite compare cycle and wait" name="JMPWAIT" value="0x1"/>
+        <value caption="Stop output, execute opposite compare cycle and wait" name="EXECWAIT" value="0x2"/>
+        <value caption="stop output, execute opposite compare cycle while fault active" name="EXECFAULT" value="0x3"/>
+        <value caption="Stop all outputs, maintain frequency" name="FREQ" value="0x4"/>
+        <value caption="Stop all outputs, execute dead time while fault active" name="EXECDT" value="0x5"/>
+        <value caption="Stop all outputs, jump to next compare cycle and wait" name="WAIT" value="0x6"/>
+        <value caption="Stop all outputs, wait for software action" name="WAITSW" value="0x7"/>
+        <value caption="Stop output on edge, jump to next compare cycle" name="EDGETRIG" value="0x8"/>
+        <value caption="Stop output on edge, maintain frequency" name="EDGETRIGFREQ" value="0x9"/>
+        <value caption="Stop output at level, maintain frequency" name="LVLTRIGFREQ" value="0xA"/>
+      </value-group>
+    </module>
+    <module caption="Two-Wire Interface" id="I2110" name="TWI">
+      <register-group caption="Two-Wire Interface" name="TWI" size="0x10">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="FM Plus Enable" mask="0x2" name="FMPEN" rw="RW"/>
+          <bitfield caption="SDA Hold Time" mask="0xc" name="SDAHOLD" rw="RW" values="TWI_SDAHOLD"/>
+          <bitfield caption="SDA Setup Time" mask="0x10" name="SDASETUP" rw="RW" values="TWI_SDASETUP"/>
+        </register>
+        <register caption="Debug Control Register" initval="0x00" name="DBGCTRL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Master Address" name="MADDR" offset="0x7" rw="RW" size="1"/>
+        <register caption="Master Baurd Rate Control" name="MBAUD" offset="0x6" rw="RW" size="1"/>
+        <register caption="Master Control A" initval="0x00" name="MCTRLA" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Enable TWI Master" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Quick Command Enable" mask="0x10" name="QCEN" rw="RW"/>
+          <bitfield caption="Read Interrupt Enable" mask="0x80" name="RIEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+          <bitfield caption="Inactive Bus Timeout" mask="0xc" name="TIMEOUT" rw="RW" values="TWI_TIMEOUT"/>
+          <bitfield caption="Write Interrupt Enable" mask="0x40" name="WIEN" rw="RW"/>
+        </register>
+        <register caption="Master Control B" initval="0x00" name="MCTRLB" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Flush" mask="0x8" name="FLUSH" rw="RW"/>
+          <bitfield caption="Command" mask="0x3" name="MCMD" rw="RW" values="TWI_MCMD"/>
+        </register>
+        <register caption="Master Data" name="MDATA" offset="0x8" rw="RW" size="1"/>
+        <register caption="Master Status" initval="0x00" name="MSTATUS" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Arbitration Lost" mask="0x8" name="ARBLOST" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Bus State" mask="0x3" name="BUSSTATE" rw="RW" values="TWI_BUSSTATE"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="RW"/>
+          <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF" rw="RW"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+          <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF" rw="RW"/>
+        </register>
+        <register caption="Slave Address" name="SADDR" offset="0xC" rw="RW" size="1"/>
+        <register caption="Slave Address Mask" name="SADDRMASK" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Address Enable" mask="0x1" name="ADDREN" rw="RW"/>
+          <bitfield caption="Address Mask" mask="0xfe" name="ADDRMASK" rw="RW"/>
+        </register>
+        <register caption="Slave Control A" initval="0x00" name="SCTRLA" offset="0x9" rw="RW" size="1">
+          <bitfield caption="Address/Stop Interrupt Enable" mask="0x40" name="APIEN" rw="RW"/>
+          <bitfield caption="Data Interrupt Enable" mask="0x80" name="DIEN" rw="RW"/>
+          <bitfield caption="Enable TWI Slave" mask="0x1" name="ENABLE" rw="RW"/>
+          <bitfield caption="Stop Interrupt Enable" mask="0x20" name="PIEN" rw="RW"/>
+          <bitfield caption="Promiscuous Mode Enable" mask="0x4" name="PMEN" rw="RW"/>
+          <bitfield caption="Smart Mode Enable" mask="0x2" name="SMEN" rw="RW"/>
+        </register>
+        <register caption="Slave Control B" initval="0x00" name="SCTRLB" offset="0xA" rw="RW" size="1">
+          <bitfield caption="Acknowledge Action" mask="0x4" name="ACKACT" rw="RW" values="TWI_ACKACT"/>
+          <bitfield caption="Command" mask="0x3" name="SCMD" rw="RW" values="TWI_SCMD"/>
+        </register>
+        <register caption="Slave Data" name="SDATA" offset="0xD" rw="RW" size="1"/>
+        <register caption="Slave Status" initval="0x00" name="SSTATUS" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Slave Address or Stop" mask="0x1" name="AP" rw="R" values="TWI_AP"/>
+          <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF" rw="RW"/>
+          <bitfield caption="Bus Error" mask="0x4" name="BUSERR" rw="RW"/>
+          <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD" rw="R"/>
+          <bitfield caption="Collision" mask="0x8" name="COLL" rw="RW"/>
+          <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF" rw="RW"/>
+          <bitfield caption="Read/Write Direction" mask="0x2" name="DIR" rw="R"/>
+          <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="SDA Hold Time select" name="TWI_SDAHOLD">
+        <value caption="SDA hold time off" name="OFF" value="0x00"/>
+        <value caption="Typical 50ns hold time" name="50NS" value="0x01"/>
+        <value caption="Typical 300ns hold time" name="300NS" value="0x02"/>
+        <value caption="Typical 500ns hold time" name="500NS" value="0x03"/>
+      </value-group>
+      <value-group caption="SDA Setup Time select" name="TWI_SDASETUP">
+        <value caption="SDA setup time is 4 clock cycles" name="4CYC" value="0x0"/>
+        <value caption="SDA setup time is 8 clock cycles" name="8CYC" value="0x1"/>
+      </value-group>
+      <value-group caption="Inactive Bus Timeout select" name="TWI_TIMEOUT">
+        <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+        <value caption="50 Microseconds" name="50US" value="0x01"/>
+        <value caption="100 Microseconds" name="100US" value="0x02"/>
+        <value caption="200 Microseconds" name="200US" value="0x03"/>
+      </value-group>
+      <value-group caption="Acknowledge Action select" name="TWI_ACKACT">
+        <value caption="Send ACK" name="ACK" value="0x0"/>
+        <value caption="Send NACK" name="NACK" value="0x1"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_MCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+        <value caption="Receive or Transmit Data, depending on DIR" name="RECVTRANS" value="0x02"/>
+        <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+      </value-group>
+      <value-group caption="Bus State select" name="TWI_BUSSTATE">
+        <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+        <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+        <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+        <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+      </value-group>
+      <value-group caption="Command select" name="TWI_SCMD">
+        <value caption="No Action" name="NOACT" value="0x00"/>
+        <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+        <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+      </value-group>
+      <value-group caption="Slave Address or Stop select" name="TWI_AP">
+        <value caption="Stop condition generated APIF" name="STOP" value="0x0"/>
+        <value caption="Address detection generated APIF" name="ADR" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="Universal Synchronous and Asynchronous Receiver and Transmitter" id="I2108" name="USART">
+      <register-group caption="Universal Synchronous and Asynchronous Receiver and Transmitter" name="USART" size="0x10">
+        <register caption="Baud Rate" initval="0x0000" name="BAUD" offset="0x8" rw="RW" size="2"/>
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x5" rw="RW" size="1">
+          <bitfield caption="Auto-baud Error Interrupt Enable" mask="0x4" name="ABEIE" rw="RW"/>
+          <bitfield caption="Data Register Empty Interrupt Enable" mask="0x20" name="DREIE" rw="RW"/>
+          <bitfield caption="Loop-back Mode Enable" mask="0x8" name="LBME" rw="RW"/>
+          <bitfield caption="RS485 Mode internal transmitter" mask="0x3" name="RS485" rw="RW" values="USART_RS485"/>
+          <bitfield caption="Receive Complete Interrupt Enable" mask="0x80" name="RXCIE" rw="RW"/>
+          <bitfield caption="Receiver Start Frame Interrupt Enable" mask="0x10" name="RXSIE" rw="RW"/>
+          <bitfield caption="Transmit Complete Interrupt Enable" mask="0x40" name="TXCIE" rw="RW"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x6" rw="RW" size="1">
+          <bitfield caption="Multi-processor Communication Mode" mask="0x1" name="MPCM" rw="RW"/>
+          <bitfield caption="Open Drain Mode Enable" mask="0x8" name="ODME" rw="RW"/>
+          <bitfield caption="Reciever enable" mask="0x80" name="RXEN" rw="RW"/>
+          <bitfield caption="Receiver Mode" mask="0x6" name="RXMODE" rw="RW" values="USART_RXMODE"/>
+          <bitfield caption="Start Frame Detection Enable" mask="0x10" name="SFDEN" rw="RW"/>
+          <bitfield caption="Transmitter Enable" mask="0x40" name="TXEN" rw="RW"/>
+        </register>
+        <register caption="Control C" initval="0x03" name="CTRLC" offset="0x7" rw="RW" size="1">
+          <mode name="MSPI">
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_MSPI_CMODE"/>
+            <bitfield caption="SPI Master Mode, Clock Phase" mask="0x2" name="UCPHA" rw="RW"/>
+            <bitfield caption="SPI Master Mode, Data Order" mask="0x4" name="UDORD" rw="RW"/>
+          </mode>
+          <mode name="NORMAL">
+            <bitfield caption="Character Size" mask="0x7" name="CHSIZE" rw="RW" values="USART_NORMAL_CHSIZE"/>
+            <bitfield caption="Communication Mode" mask="0xc0" name="CMODE" rw="RW" values="USART_NORMAL_CMODE"/>
+            <bitfield caption="Parity Mode" mask="0x30" name="PMODE" rw="RW" values="USART_NORMAL_PMODE"/>
+            <bitfield caption="Stop Bit Mode" mask="0x8" name="SBMODE" rw="RW" values="USART_NORMAL_SBMODE"/>
+          </mode>
+        </register>
+        <register caption="Debug Control" initval="0x00" name="DBGCTRL" offset="0xB" rw="RW" size="1">
+          <bitfield caption="Debug Run" mask="0x1" name="DBGRUN" rw="RW"/>
+        </register>
+        <register caption="Event Control" initval="0x00" name="EVCTRL" offset="0xC" rw="RW" size="1">
+          <bitfield caption="IrDA Event Input Enable" mask="0x1" name="IREI" rw="RW"/>
+        </register>
+        <register caption="Receive Data High Byte" initval="0x00" name="RXDATAH" offset="0x1" rw="R" size="1">
+          <bitfield caption="Buffer Overflow" mask="0x40" name="BUFOVF" rw="R"/>
+          <bitfield caption="Receiver Data Register" mask="0x1" name="DATA8" rw="R"/>
+          <bitfield caption="Frame Error" mask="0x4" name="FERR" rw="R"/>
+          <bitfield caption="Parity Error" mask="0x2" name="PERR" rw="R"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+        </register>
+        <register caption="Receive Data Low Byte" initval="0x00" name="RXDATAL" offset="0x0" rw="R" size="1">
+          <bitfield caption="RX Data" mask="0xff" name="DATA" rw="R"/>
+        </register>
+        <register caption="IRCOM Receiver Pulse Length Control" initval="0x00" name="RXPLCTRL" offset="0xE" rw="RW" size="1">
+          <bitfield caption="Receiver Pulse Lenght" mask="0x7f" name="RXPL" rw="RW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x4" rw="RW" size="1">
+          <bitfield caption="Break Detected Flag" mask="0x2" name="BDF" rw="RW"/>
+          <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF" rw="R"/>
+          <bitfield caption="Inconsistent Sync Field Interrupt Flag" mask="0x8" name="ISFIF" rw="RW"/>
+          <bitfield caption="Receive Complete Interrupt Flag" mask="0x80" name="RXCIF" rw="R"/>
+          <bitfield caption="Receive Start Interrupt" mask="0x10" name="RXSIF" rw="R"/>
+          <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF" rw="RW"/>
+          <bitfield caption="Wait For Break" mask="0x1" name="WFB" rw="RW"/>
+        </register>
+        <register caption="Transmit Data High Byte" initval="0x00" name="TXDATAH" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register (CHSIZE=9bit)" mask="0x1" name="DATA8" rw="RW"/>
+        </register>
+        <register caption="Transmit Data Low Byte" initval="0x00" name="TXDATAL" offset="0x2" rw="RW" size="1">
+          <bitfield caption="Transmit Data Register" mask="0xff" name="DATA" rw="RW"/>
+        </register>
+        <register caption="IRCOM Transmitter Pulse Length Control" initval="0x00" name="TXPLCTRL" offset="0xD" rw="RW" size="1">
+          <bitfield caption="Transmit pulse length" mask="0xff" name="TXPL" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="RS485 Mode internal transmitter select" name="USART_RS485">
+        <value caption="RS485 Mode disabled" name="OFF" value="0x00"/>
+        <value caption="RS485 Mode External drive" name="EXT" value="0x01"/>
+        <value caption="RS485 Mode Internal drive" name="INT" value="0x02"/>
+      </value-group>
+      <value-group caption="Receiver Mode select" name="USART_RXMODE">
+        <value caption="Normal mode" name="NORMAL" value="0x0"/>
+        <value caption="CLK2x mode" name="CLK2X" value="0x1"/>
+        <value caption="Generic autobaud mode" name="GENAUTO" value="0x2"/>
+        <value caption="LIN constrained autobaud mode" name="LINAUTO" value="0x3"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_MSPI_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Character Size select" name="USART_NORMAL_CHSIZE">
+        <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+        <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+        <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+        <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+        <value caption="Character size: 9 bit read low byte first" name="9BITL" value="0x06"/>
+        <value caption="Character size: 9 bit read high byte first" name="9BITH" value="0x07"/>
+      </value-group>
+      <value-group caption="Communication Mode select" name="USART_NORMAL_CMODE">
+        <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+        <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+        <value caption="Infrared Communication" name="IRCOM" value="0x02"/>
+        <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+      </value-group>
+      <value-group caption="Parity Mode select" name="USART_NORMAL_PMODE">
+        <value caption="No Parity" name="DISABLED" value="0x00"/>
+        <value caption="Even Parity" name="EVEN" value="0x02"/>
+        <value caption="Odd Parity" name="ODD" value="0x03"/>
+      </value-group>
+      <value-group caption="Stop Bit Mode select" name="USART_NORMAL_SBMODE">
+        <value caption="1 stop bit" name="1BIT" value="0x0"/>
+        <value caption="2 stop bits" name="2BIT" value="0x1"/>
+      </value-group>
+    </module>
+    <module caption="User Row" id="I2600" name="USERROW">
+      <register-group caption="User Row" name="USERROW" size="0x20">
+        <register caption="User Row Byte 0" name="USERROW0" offset="0x00" rw="RW" size="1"/>
+        <register caption="User Row Byte 1" name="USERROW1" offset="0x01" rw="RW" size="1"/>
+        <register caption="User Row Byte 2" name="USERROW2" offset="0x02" rw="RW" size="1"/>
+        <register caption="User Row Byte 3" name="USERROW3" offset="0x03" rw="RW" size="1"/>
+        <register caption="User Row Byte 4" name="USERROW4" offset="0x04" rw="RW" size="1"/>
+        <register caption="User Row Byte 5" name="USERROW5" offset="0x05" rw="RW" size="1"/>
+        <register caption="User Row Byte 6" name="USERROW6" offset="0x06" rw="RW" size="1"/>
+        <register caption="User Row Byte 7" name="USERROW7" offset="0x07" rw="RW" size="1"/>
+        <register caption="User Row Byte 8" name="USERROW8" offset="0x08" rw="RW" size="1"/>
+        <register caption="User Row Byte 9" name="USERROW9" offset="0x09" rw="RW" size="1"/>
+        <register caption="User Row Byte 10" name="USERROW10" offset="0x0A" rw="RW" size="1"/>
+        <register caption="User Row Byte 11" name="USERROW11" offset="0x0B" rw="RW" size="1"/>
+        <register caption="User Row Byte 12" name="USERROW12" offset="0x0C" rw="RW" size="1"/>
+        <register caption="User Row Byte 13" name="USERROW13" offset="0x0D" rw="RW" size="1"/>
+        <register caption="User Row Byte 14" name="USERROW14" offset="0x0E" rw="RW" size="1"/>
+        <register caption="User Row Byte 15" name="USERROW15" offset="0x0F" rw="RW" size="1"/>
+        <register caption="User Row Byte 16" name="USERROW16" offset="0x10" rw="RW" size="1"/>
+        <register caption="User Row Byte 17" name="USERROW17" offset="0x11" rw="RW" size="1"/>
+        <register caption="User Row Byte 18" name="USERROW18" offset="0x12" rw="RW" size="1"/>
+        <register caption="User Row Byte 19" name="USERROW19" offset="0x13" rw="RW" size="1"/>
+        <register caption="User Row Byte 20" name="USERROW20" offset="0x14" rw="RW" size="1"/>
+        <register caption="User Row Byte 21" name="USERROW21" offset="0x15" rw="RW" size="1"/>
+        <register caption="User Row Byte 22" name="USERROW22" offset="0x16" rw="RW" size="1"/>
+        <register caption="User Row Byte 23" name="USERROW23" offset="0x17" rw="RW" size="1"/>
+        <register caption="User Row Byte 24" name="USERROW24" offset="0x18" rw="RW" size="1"/>
+        <register caption="User Row Byte 25" name="USERROW25" offset="0x19" rw="RW" size="1"/>
+        <register caption="User Row Byte 26" name="USERROW26" offset="0x1A" rw="RW" size="1"/>
+        <register caption="User Row Byte 27" name="USERROW27" offset="0x1B" rw="RW" size="1"/>
+        <register caption="User Row Byte 28" name="USERROW28" offset="0x1C" rw="RW" size="1"/>
+        <register caption="User Row Byte 29" name="USERROW29" offset="0x1D" rw="RW" size="1"/>
+        <register caption="User Row Byte 30" name="USERROW30" offset="0x1E" rw="RW" size="1"/>
+        <register caption="User Row Byte 31" name="USERROW31" offset="0x1F" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Virtual Ports" id="I2103" name="VPORT">
+      <register-group caption="Virtual Ports" name="VPORT" size="0x4">
+        <register caption="Data Direction" name="DIR" offset="0x0" rw="RW" size="1"/>
+        <register caption="Input Value" name="IN" offset="0x2" rw="RW" size="1"/>
+        <register caption="Interrupt Flags" initval="0x00" name="INTFLAGS" offset="0x3" rw="RW" size="1">
+          <bitfield caption="Pin Interrupt" mask="0xff" name="INT" rw="RW"/>
+        </register>
+        <register caption="Output Value" name="OUT" offset="0x1" rw="RW" size="1"/>
+      </register-group>
+    </module>
+    <module caption="Voltage reference" id="I2600" name="VREF">
+      <register-group caption="Voltage reference" name="VREF" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="ADC0 reference select" mask="0x70" name="ADC0REFSEL" rw="RW" values="VREF_ADC0REFSEL"/>
+          <bitfield caption="DAC0/AC0 reference select" mask="0x7" name="DAC0REFSEL" rw="RW" values="VREF_DAC0REFSEL"/>
+        </register>
+        <register caption="Control B" initval="0x00" name="CTRLB" offset="0x1" rw="RW" size="1">
+          <bitfield caption="ADC0 reference enable" mask="0x2" name="ADC0REFEN" rw="RW"/>
+          <bitfield caption="DAC0/AC0 reference enable" mask="0x1" name="DAC0REFEN" rw="RW"/>
+        </register>
+      </register-group>
+      <value-group caption="ADC0 reference select select" name="VREF_ADC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+      <value-group caption="DAC0/AC0 reference select select" name="VREF_DAC0REFSEL">
+        <value caption="Voltage reference at 0.55V" name="0V55" value="0x00"/>
+        <value caption="Voltage reference at 1.1V" name="1V1" value="0x01"/>
+        <value caption="Voltage reference at 2.5V" name="2V5" value="0x02"/>
+        <value caption="Voltage reference at 4.34V" name="4V34" value="0x03"/>
+        <value caption="Voltage reference at 1.5V" name="1V5" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Watch-Dog Timer" id="I2127" name="WDT">
+      <register-group caption="Watch-Dog Timer" name="WDT" size="0x2">
+        <register caption="Control A" initval="0x00" name="CTRLA" offset="0x0" rw="RW" size="1">
+          <bitfield caption="Period" mask="0xf" name="PERIOD" rw="RW" values="WDT_PERIOD"/>
+          <bitfield caption="Window" mask="0xf0" name="WINDOW" rw="RW" values="WDT_WINDOW"/>
+        </register>
+        <register caption="Status" initval="0x00" name="STATUS" offset="0x1" rw="RW" size="1">
+          <bitfield caption="Lock enable" mask="0x80" name="LOCK" rw="RW"/>
+          <bitfield caption="Syncronization busy" mask="0x1" name="SYNCBUSY" rw="R"/>
+        </register>
+      </register-group>
+      <value-group caption="Period select" name="WDT_PERIOD">
+        <value caption="Watch-Dog timer Off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+      <value-group caption="Window select" name="WDT_WINDOW">
+        <value caption="Window mode off" name="OFF" value="0x00"/>
+        <value caption="8 cycles (8ms)" name="8CLK" value="0x01"/>
+        <value caption="16 cycles (16ms)" name="16CLK" value="0x02"/>
+        <value caption="32 cycles (32ms)" name="32CLK" value="0x03"/>
+        <value caption="64 cycles (64ms)" name="64CLK" value="0x04"/>
+        <value caption="128 cycles (0.128s)" name="128CLK" value="0x05"/>
+        <value caption="256 cycles (0.256s)" name="256CLK" value="0x06"/>
+        <value caption="512 cycles (0.512s)" name="512CLK" value="0x07"/>
+        <value caption="1K cycles (1.0s)" name="1KCLK" value="0x08"/>
+        <value caption="2K cycles (2.0s)" name="2KCLK" value="0x09"/>
+        <value caption="4K cycles (4.1s)" name="4KCLK" value="0x0A"/>
+        <value caption="8K cycles (8.2s)" name="8KCLK" value="0x0B"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="QFN24">
+      <pin pad="PA2" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="GND" position="3"/>
+      <pin pad="VDD" position="4"/>
+      <pin pad="PA4" position="5"/>
+      <pin pad="PA5" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="8"/>
+      <pin pad="PB7" position="9"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB5" position="11"/>
+      <pin pad="PB4" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB0" position="16"/>
+      <pin pad="PC0" position="17"/>
+      <pin pad="PC1" position="18"/>
+      <pin pad="PC2" position="19"/>
+      <pin pad="PC3" position="20"/>
+      <pin pad="PC4" position="21"/>
+      <pin pad="PC5" position="22"/>
+      <pin pad="PA0" position="23"/>
+      <pin pad="PA1" position="24"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY828.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY828.xml
new file mode 100644
index 00000000..24a257a5
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY828.xml
@@ -0,0 +1,913 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.62" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny828" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+          <memory-segment start="0x1f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x40"/>
+          <memory-segment start="0x1e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x40"/>
+          <memory-segment start="0x1c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x40"/>
+          <memory-segment start="0x1800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0100">
+          <memory-segment start="0x0000" size="0x0100" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTC" caption="I/O Port">
+            <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTD" caption="I/O Port">
+            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="TOCPM">
+          <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
+            <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART" caption="USART">
+            <register-group name="USART" name-in-module="USART" offset="0x00" address-space="data" caption="USART"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+        <interrupt index="6" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+        <interrupt index="7" name="WDT" caption="Watchdog Time-out Interrupt"/>
+        <interrupt index="8" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="9" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="10" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="11" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="12" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="13" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="14" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="15" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+        <interrupt index="16" name="USART_START" caption="USART, Start"/>
+        <interrupt index="17" name="USART_RX" caption="USART Rx Complete"/>
+        <interrupt index="18" name="USART_UDRE" caption="USART, Data Register Empty"/>
+        <interrupt index="19" name="USART_TX" caption="USART Tx Complete"/>
+        <interrupt index="20" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="21" name="EE_READY" caption="EEPROM Ready"/>
+        <interrupt index="22" name="ANALOG_COMP" caption="Analog Comparator"/>
+        <interrupt index="23" name="TWI_SLAVE" caption="Two-wire Serial Interface"/>
+        <interrupt index="24" name="SPM_Ready" caption="Store Program Memory Read"/>
+        <interrupt index="25" name="QTRIP" caption="Touch Sensing"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9314"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x14"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x31"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Select boot size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
+          <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
+          <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0xC0" name="BODPD" values="ENUM_BODMODE"/>
+          <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x30" name="BODACT" values="ENUM_BODMODE"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)]" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x6E">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x33" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x01"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x11"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x30"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x21"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x22"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTRCOSC_8MHZ_6CK_14CK_65MS" value="0x32"/>
+        <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 0 ms" name="INTULPOSC_32KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 4.1 ms" name="INTULPOSC_32KHZ_6CK_14CK_4MS1" value="0x13"/>
+        <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTULPOSC_32KHZ_6CK_14CK_65MS" value="0x23"/>
+        <value caption="Int. ULP Osc. 32kHz; Start-up time PWRDWN/RESET: 6 + 14 CK + 65 ms" name="INTULPOSC_32KHZ_6CK_14CK_65MS" value="0x33"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BOOTSZ">
+        <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
+        <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
+        <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
+        <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODMODE">
+        <value caption="Sampled" name="BOD_SAMPLED" value="0x01"/>
+        <value caption="Enabled" name="BOD_ENABLED" value="0x02"/>
+        <value caption="Disabled" name="BOD_DISABLED" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+          <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
+          <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BLB">
+        <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
+        <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
+        <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
+        <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BLB2">
+        <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
+        <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
+        <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
+        <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE_3BIT">
+        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x23" size="1" mask="0xFF"/>
+        <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="Port B Data Register" name="PORTB" offset="0x26" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x25" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x24" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTC">
+        <register caption="Port High Drive Enable Register" name="PHDE" offset="0x34" size="1">
+          <bitfield caption="Port C High Drive Enable" mask="0x04" name="PHDEC"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEC" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="Port C Data Register" name="PORTC" offset="0x2A" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port C" name="DDRC" offset="0x29" size="1" mask="0xFF"/>
+        <register caption="Port C Input Pins" name="PINC" offset="0x28" size="1" mask="0xFF"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTD">
+        <register caption="Pull-up Enable Control Register" name="PUED" offset="0x2F" size="1" mask="0x0F"/>
+        <register caption="Port D Data Register" name="PORTD" offset="0x2E" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port D" name="DDRD" offset="0x2D" size="1" mask="0x0F"/>
+        <register caption="Port D Input Pins" name="PIND" offset="0x2C" size="1" mask="0x0F"/>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+          <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction SPI" mask="0x04" name="PRSPI"/>
+          <bitfield caption="Power Reduction USART 0" mask="0x02" name="PRUSART0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Configuration Change Protection" name="CCP" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1">
+          <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
+          <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Read-While-Write section read enable" mask="0x10" name="RWWSRE"/>
+          <bitfield caption="Read/Write Fuse and Lock Bits" mask="0x08" name="RWFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x66" size="1" mask="0xFF"/>
+        <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x67" size="1" mask="0x03"/>
+        <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0xF0" size="1" mask="0xFF"/>
+        <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0xF1" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+        <value value="0x03" caption="32 kHz" name="32_kHz"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
+          <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
+          <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+          <bitfield caption="" mask="0x80" name="FOC1A"/>
+          <bitfield caption="" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter Output Compare Pin" name="TOCPM">
+      <register-group caption="Timer/Counter Output Compare Pin" name="TOCPM">
+        <register caption="Timer Output Compare Pin Mux Selection 1" name="TOCPMSA1" offset="0xE9" size="1">
+          <bitfield caption="Timer Output Compare Channel 7 Selection Bits" mask="0xC0" name="TOCC7S"/>
+          <bitfield caption="Timer Output Compare Channel 6 Selection Bits" mask="0x30" name="TOCC6S"/>
+          <bitfield caption="Timer Output Compare Channel 5 Selection Bits" mask="0x0C" name="TOCC5S"/>
+          <bitfield caption="Timer Output Compare Channel 4 Selection Bits" mask="0x03" name="TOCC4S"/>
+        </register>
+        <register caption="Timer Output Compare Pin Mux Selection 0" name="TOCPMSA0" offset="0xE8" size="1">
+          <bitfield caption="Timer Output Compare Channel 3 Selection Bits" mask="0xC0" name="TOCC3S"/>
+          <bitfield caption="Timer Output Compare Channel 2 Selection Bits" mask="0x30" name="TOCC2S"/>
+          <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
+          <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
+        </register>
+        <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0xE2" size="1">
+          <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
+          <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
+          <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
+          <bitfield caption="Timer Output Compare Channel 4 Output Enable" mask="0x10" name="TOCC4OE"/>
+          <bitfield caption="Timer Output Compare Channel 3 Output Enable" mask="0x08" name="TOCC3OE"/>
+          <bitfield caption="Timer Output Compare Channel 2 Output Enable" mask="0x04" name="TOCC2OE"/>
+          <bitfield caption="Timer Output Compare Channel 1 Output Enable" mask="0x02" name="TOCC1OE"/>
+          <bitfield caption="Timer Output Compare Channel 0 Output Enable" mask="0x01" name="TOCC0OE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register A" name="ADMUXA" offset="0x7C" size="1">
+          <bitfield caption="Analog Channel Selection Bits 4:0" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC multiplexer Selection Register B" name="ADMUXB" offset="0x7D" size="1">
+          <bitfield caption="Reference Selection Bit" mask="0x20" name="REFS"/>
+          <bitfield caption="Analog Channel Selection Bit 5" mask="0x01" name="MUX5"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="" mask="0x08" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 2" name="DIDR3" offset="0xDF" size="1">
+          <bitfield caption="ADC27 Digital input Disable" mask="0x08" name="ADC27D"/>
+          <bitfield caption="ADC26 Digital input Disable" mask="0x04" name="ADC26D"/>
+          <bitfield caption="ADC25 Digital input Disable" mask="0x02" name="ADC25D"/>
+          <bitfield caption="ADC24 Digital input Disable" mask="0x01" name="ADC24D"/>
+        </register>
+        <register caption="Digital Input Disable Register 2" name="DIDR2" offset="0xDE" size="1">
+          <bitfield caption="ADC23 Digital input Disable" mask="0x80" name="ADC23D"/>
+          <bitfield caption="ADC22 Digital input Disable" mask="0x40" name="ADC22D"/>
+          <bitfield caption="ADC21 Digital input Disable" mask="0x20" name="ADC21D"/>
+          <bitfield caption="ADC20 Digital input Disable" mask="0x10" name="ADC20D"/>
+          <bitfield caption="ADC19 Digital input Disable" mask="0x08" name="ADC19D"/>
+          <bitfield caption="ADC18 Digital input Disable" mask="0x04" name="ADC18D"/>
+          <bitfield caption="ADC17 Digital input Disable" mask="0x02" name="ADC17D"/>
+          <bitfield caption="ADC16 Digital input Disable" mask="0x01" name="ADC16D"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="ADC15 Digital input Disable" mask="0x80" name="ADC15D"/>
+          <bitfield caption="ADC14 Digital input Disable" mask="0x40" name="ADC14D"/>
+          <bitfield caption="ADC13 Digital input Disable" mask="0x20" name="ADC13D"/>
+          <bitfield caption="ADC12 Digital input Disable" mask="0x10" name="ADC12D"/>
+          <bitfield caption="ADC11 Digital input Disable" mask="0x08" name="ADC11D"/>
+          <bitfield caption="ADC10 Digital input Disable" mask="0x04" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x02" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x01" name="ADC8D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+          <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x4F" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
+          <bitfield caption="Analog Comparator Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x50" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Positive Input Multiplexer Bit 2" mask="0x40" name="ACPMUX2"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+          <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
+          <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+          <bitfield caption="External Interrupt Request Enables" mask="0x03" name="INT"/>
+        </register>
+        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x0F" name="PCIE"/>
+        </register>
+        <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x73" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT" lsb="24"/>
+        </register>
+        <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+        </register>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x60" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS_32KHZ">
+        <value caption="Oscillator Cycles 512 (16 ms)" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 1K (32 ms)" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 2K (64 ms)" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 4K (0.125 s)" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 8K (0.25 s)" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 16K (0.5 s)" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 32K (1.0 s)" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 64K (2.0 s)" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 128K (4.0 s)" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 256K (8.0 s)" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Read/Write Access" name="EEAR" offset="0x41" size="1" mask="0xFF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEProm Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0xB8" size="1">
+          <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+          <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+          <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+          <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+          <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+          <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+          <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+        </register>
+        <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0xB9" size="1">
+          <bitfield caption="TWI High Noise Mode" mask="0x08" name="TWHNM"/>
+          <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+          <bitfield caption="" mask="0x03" name="TWCMD"/>
+        </register>
+        <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0xBA" size="1">
+          <bitfield caption="TWI Data Interrupt Flag." mask="0x80" name="TWDIF"/>
+          <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+          <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+          <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+          <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+          <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+          <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+          <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+        </register>
+        <register caption="TWI Slave Address Register" name="TWSA" offset="0xBC" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="TWI Slave Data Register" name="TWSD" offset="0xBD" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+        </register>
+        <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0xBB" size="1">
+          <bitfield caption="TWI Address Mask Bits" mask="0xFE" name="TWSAM" lsb="1"/>
+          <bitfield caption="TWI Address Enable" mask="0x01" name="TWAE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART">
+        <register caption="USART I/O Data Register" name="UDR" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSRA" offset="0xC0" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSRB" offset="0xC1" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ2"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB8"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB8"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSRC" offset="0xC2" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL" values="COMM_USART_MODE"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSRD" offset="0xC3" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE"/>
+        </register>
+        <register caption="USART Baud Rate Register  Bytes" name="UBRR" offset="0xC4" size="2" mask="0x0FFF"/>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE">
+        <value caption="Asynchronous Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous Operation" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY84.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY84.xml
new file mode 100644
index 00000000..619946d0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY84.xml
@@ -0,0 +1,686 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny84" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="EXT_INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="USI_STR" caption="USI START"/>
+        <interrupt index="16" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x930C"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x0c"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="50"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="150"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB3 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY841.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY841.xml
new file mode 100644
index 00000000..a112f1dc
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY841.xml
@@ -0,0 +1,1126 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny841-SSU" package="SOIC14" pinout="SOIC_14" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+    <variant ordercode="ATtiny841-MU" package="MLF20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+    <variant ordercode="ATtiny841-MMH" package="VQFN20" pinout="QFN_20" speedmax="16000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny841" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x10"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USART">
+          <instance name="USART1" caption="USART">
+            <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
+            <signals>
+              <signal function="USART" group="RXD" pad="PA4"/>
+              <signal function="USART" group="TXD" pad="PA5"/>
+              <signal function="USART" group="XCK" pad="PA6"/>
+            </signals>
+          </instance>
+          <instance name="USART0" caption="USART">
+            <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
+            <signals>
+              <signal field="U0MAP" function="USART" group="TXD" pad="PA1"/>
+              <signal field="U0MAP" function="USART" group="RXD" pad="PA2"/>
+              <signal field="U0MAP" function="USART" group="XCK" pad="PA3"/>
+              <signal field="U0MAP" function="USART_ALT" group="TXD" pad="PA7"/>
+              <signal field="U0MAP" function="USART_ALT" group="RXD" pad="PB2"/>
+              <signal field="U0MAP" function="USART_ALT" group="XCK" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SCL" pad="PA4"/>
+              <signal function="TWI" group="SDA" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+              <signal function="ADC" group="ADC" index="8" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="9" pad="PB3"/>
+              <signal function="ADC" group="ADC" index="10" pad="PB0"/>
+              <signal function="ADC" group="ADC" index="11" pad="PB1"/>
+              <signal function="AREF" group="AREF" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN0" group="AIN0" index="0" pad="PA1"/>
+              <signal function="ACIN0" group="AIN0" index="1" pad="PA2"/>
+              <signal function="ACOUT" group="ACO0" pad="PA5"/>
+              <signal function="ACOUT" group="ACO1" pad="PA6"/>
+              <signal function="ACIN1" group="AIN1" index="0" pad="PA3"/>
+              <signal function="ACIN1" group="AIN1" index="1" pad="PA4"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+              <signal function="OC" group="TOCC" index="1" pad="PA2"/>
+              <signal function="OC" group="TOCC" index="2" pad="PA3"/>
+              <signal function="OC" group="TOCC" index="3" pad="PA4"/>
+              <signal function="OC" group="TOCC" index="4" pad="PA5"/>
+              <signal function="OC" group="TOCC" index="5" pad="PA6"/>
+              <signal function="OC" group="TOCC" index="6" pad="PA7"/>
+              <signal function="OC" group="TOCC" index="7" pad="PB2"/>
+              <signal function="CS" group="T0" pad="PA3"/>
+              <signal function="CS" group="T1" pad="PA4"/>
+              <signal function="CS" group="T2" pad="PA5"/>
+              <signal function="ICP" group="ICP1" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="TC2" caption="Timer/Counter, 16-bit">
+            <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+              <signal function="OC" group="TOCC" index="1" pad="PA2"/>
+              <signal function="OC" group="TOCC" index="2" pad="PA3"/>
+              <signal function="OC" group="TOCC" index="3" pad="PA4"/>
+              <signal function="OC" group="TOCC" index="4" pad="PA5"/>
+              <signal function="OC" group="TOCC" index="5" pad="PA6"/>
+              <signal function="OC" group="TOCC" index="6" pad="PA7"/>
+              <signal function="OC" group="TOCC" index="7" pad="PB2"/>
+              <signal function="CS" group="T0" pad="PA3"/>
+              <signal function="CS" group="T1" pad="PA4"/>
+              <signal function="CS" group="T2" pad="PA5"/>
+              <signal function="ICP" group="ICP2" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="OC" group="TOCC" index="0" pad="PA1"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA2"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA3"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA4"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA5"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA6"/>
+              <signal function="OC" group="TOCC" index="0" pad="PA7"/>
+              <signal function="OC" group="TOCC" index="0" pad="PB2"/>
+              <signal function="CS" group="T0" pad="PA3"/>
+              <signal function="CS" group="T1" pad="PA4"/>
+              <signal function="CS" group="T2" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB1"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="TOCPM">
+          <instance name="TOCPM" caption="Timer/Counter Output Compare Pin">
+            <register-group name="TOCPM" name-in-module="TOCPM" offset="0x00" address-space="data" caption="Timer/Counter Output Compare Pin"/>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+            <signals>
+              <signal field="SPIMAP" function="SPI_ALT" group="MISO" pad="PA0"/>
+              <signal field="SPIMAP" function="SPI_ALT" group="MOSI" pad="PA1"/>
+              <signal field="SPIMAP" function="SPI_ALT" group="SS" pad="PA2"/>
+              <signal field="SPIMAP" function="SPI_ALT" group="SCK" pad="PA3"/>
+              <signal field="SPIMAP" function="SPI" group="SCK" pad="PA4"/>
+              <signal field="SPIMAP" function="SPI" group="MISO" pad="PA5"/>
+              <signal field="SPIMAP" function="SPI" group="MOSI" pad="PA6"/>
+              <signal field="SPIMAP" function="SPI" group="SS" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out Interrupt"/>
+        <interrupt index="5" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+        <interrupt index="10" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+        <interrupt index="11" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP0" caption="Analog Comparator 0"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="ANA_COMP1" caption="Analog Comparator 1"/>
+        <interrupt index="16" name="TIMER2_CAPT" caption="Timer/Counter2 Capture Event"/>
+        <interrupt index="17" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
+        <interrupt index="18" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
+        <interrupt index="19" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
+        <interrupt index="20" name="SPI" caption="Serial Peripheral Interface"/>
+        <interrupt index="21" name="USART0_START" caption="USART0, Start"/>
+        <interrupt index="22" name="USART0_RX" caption="USART0, Rx Complete"/>
+        <interrupt index="23" name="USART0_UDRE" caption="USART0 Data Register Empty"/>
+        <interrupt index="24" name="USART0_TX" caption="USART0, Tx Complete"/>
+        <interrupt index="25" name="USART1_START" caption="USART1, Start"/>
+        <interrupt index="26" name="USART1_RX" caption="USART1, Rx Complete"/>
+        <interrupt index="27" name="USART1_UDRE" caption="USART1 Data Register Empty"/>
+        <interrupt index="28" name="USART1_TX" caption="USART1, Tx Complete"/>
+        <interrupt index="29" name="TWI_SLAVE" caption="Two-wire Serial Interface"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9315"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x15"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+          <property name="BUFFERS_PER_FLASH_PAGE" value="4"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="16"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="70"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x07"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="16"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x07"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock." mask="0xE0" name="ULPOSCSEL" values="ENUM_ULPOSCSEL"/>
+          <bitfield caption="BOD mode of operation when the device is in sleep mode" mask="0x18" name="BODPD" values="ENUM_BODMODE"/>
+          <bitfield caption="BOD mode of operation when the device is active or idle" mask="0x06" name="BODACT" values="ENUM_BODMODE"/>
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PC2 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTC2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x1F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="EXTCLK_6CK_16CK_16MS" value="0x00"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTRCOSC_8MHZ_6CK_16CK_16MS" value="0x02"/>
+        <value caption="Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms" name="INTULPOSC_32KHZ_6CK_16CK_16MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTLOFXTAL_1KCK_16CK_16MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms" name="EXTLOFXTAL_32KCK_14CK_16MS" value="0x16"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_16CK_16MS" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_16CK_16MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_16CK_16MS" value="0x09"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_16CK_16MS" value="0x0a"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_16CK_16MS" value="0x1a"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_16CK_16MS" value="0x0b"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_258CK_16CK_16MS" value="0x0c"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_16CK_16MS" value="0x1c"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_16CK_16MS" value="0x0d"/>
+        <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_258CK_16CK_16MS" value="0x0e"/>
+        <value caption="Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms" name="EXTCRES_8MHZ_XX_1KCK_16CK_16MS" value="0x1e"/>
+        <value caption="Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms" name="EXTXOSC_8MHZ_XX_16KCK_16CK_16MS" value="0x0f"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODMODE">
+        <value caption="Sampled" name="BOD_SAMPLED" value="0x01"/>
+        <value caption="Enabled" name="BOD_ENABLED" value="0x02"/>
+        <value caption="Disabled" name="BOD_DISABLED" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ENUM_ULPOSCSEL">
+        <value caption="32 kHz" name="ULPOSC_32KHZ" value="0x07"/>
+        <value caption="64 kHz" name="ULPOSC_64KHZ" value="0x06"/>
+        <value caption="128 kHz" name="ULPOSC_128KHZ" value="0x05"/>
+        <value caption="256 kHz" name="ULPOSC_256KHZ" value="0x04"/>
+        <value caption="512 kHz" name="ULPOSC_512KHZ" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x64" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x62" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x36" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port Control Register" name="PORTCR" offset="0x64" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x01" name="BBMA"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEA" offset="0x63" size="1" mask="0xFF"/>
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Data Direction Register, Port A" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Port High Drive Enable Register" name="PHDE" offset="0x6A" size="1">
+          <bitfield caption="PortA High Drive Enable" mask="0x03" name="PHDEA"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="USART" name="USART">
+      <register-group caption="USART" name="USART1">
+        <register caption="USART I/O Data Register" name="UDR1" offset="0x90" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSR1A" offset="0x96" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSR1B" offset="0x95" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSR1C" offset="0x94" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSR1D" offset="0x93" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE1"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS1"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE1"/>
+        </register>
+        <register caption="USART Baud Rate Register Bytes" name="UBRR1" offset="0x91" size="2" mask="0x0FFF"/>
+      </register-group>
+      <register-group caption="USART" name="USART0">
+        <register caption="USART I/O Data Register" name="UDR0" offset="0x80" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="USART Control and Status Register A" name="UCSR0A" offset="0x86" size="1" ocd-rw="R">
+          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
+          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
+          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
+          <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
+          <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
+          <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
+          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
+          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
+        </register>
+        <register caption="USART Control and Status Register B" name="UCSR0B" offset="0x85" size="1">
+          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
+          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
+          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
+          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
+          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
+          <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
+          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
+          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
+        </register>
+        <register caption="USART Control and Status Register C" name="UCSR0C" offset="0x84" size="1">
+          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
+          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
+          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
+          <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
+          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
+        </register>
+        <register caption="USART Control and Status Register D" name="UCSR0D" offset="0x83" size="1">
+          <bitfield caption="USART RX Start Interrupt Enable" mask="0x80" name="RXSIE0"/>
+          <bitfield caption="USART RX Start Flag" mask="0x40" name="RXS0"/>
+          <bitfield caption="USART RX Start Frame Detection Enable" mask="0x20" name="SFDE0"/>
+        </register>
+        <register caption="USART Baud Rate Register Bytes" name="UBRR0" offset="0x81" size="2" mask="0x0FFF"/>
+        <register caption="Remap Port Pins" name="REMAP" offset="0x65" size="1">
+          <bitfield caption="USART0 Pin Mapping" mask="0x01" name="U0MAP"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USART_MODE_2BIT">
+        <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
+        <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
+        <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_UPM_PARITY_MODE">
+        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
+        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="COMM_STOP_BIT_SEL">
+        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
+        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x41" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS_32KHZ"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS_32KHZ">
+        <value caption="Oscillator Cycles 512 (16 ms)" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 1K (32 ms)" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 2K (64 ms)" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 4K (0.125 s)" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 8K (0.25 s)" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 16K (0.5 s)" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 32K (1.0 s)" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 64K (2.0 s)" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 128K (4.0 s)" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 256K (8.0 s)" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWI Slave Control Register A" name="TWSCRA" offset="0xA5" size="1">
+          <bitfield caption="TWI SDA Hold Time Enable" mask="0x80" name="TWSHE"/>
+          <bitfield caption="TWI Data Interrupt Enable" mask="0x20" name="TWDIE"/>
+          <bitfield caption="TWI Address/Stop Interrupt Enable" mask="0x10" name="TWASIE"/>
+          <bitfield caption="Two-Wire Interface Enable" mask="0x08" name="TWEN"/>
+          <bitfield caption="TWI Stop Interrupt Enable" mask="0x04" name="TWSIE"/>
+          <bitfield caption="TWI Promiscuous Mode Enable" mask="0x02" name="TWPME"/>
+          <bitfield caption="TWI Smart Mode Enable" mask="0x01" name="TWSME"/>
+        </register>
+        <register caption="TWI Slave Control Register B" name="TWSCRB" offset="0xA4" size="1">
+          <bitfield caption="TWI High Noise Mode" mask="0x08" name="TWHNM"/>
+          <bitfield caption="TWI Acknowledge Action" mask="0x04" name="TWAA"/>
+          <bitfield caption="" mask="0x03" name="TWCMD"/>
+        </register>
+        <register caption="TWI Slave Status Register A" name="TWSSRA" offset="0xA3" size="1">
+          <bitfield caption="TWI Data Interrupt Flag." mask="0x80" name="TWDIF"/>
+          <bitfield caption="TWI Address/Stop Interrupt Flag" mask="0x40" name="TWASIF"/>
+          <bitfield caption="TWI Clock Hold" mask="0x20" name="TWCH"/>
+          <bitfield caption="TWI Receive Acknowledge" mask="0x10" name="TWRA"/>
+          <bitfield caption="TWI Collision" mask="0x08" name="TWC"/>
+          <bitfield caption="TWI Bus Error" mask="0x04" name="TWBE"/>
+          <bitfield caption="TWI Read/Write Direction" mask="0x02" name="TWDIR"/>
+          <bitfield caption="TWI Address or Stop" mask="0x01" name="TWAS"/>
+        </register>
+        <register caption="TWI Slave Address Register" name="TWSA" offset="0xA2" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="TWI Slave Data Register" name="TWSD" offset="0xA0" size="1" ocd-rw="R">
+          <bitfield caption="TWI slave data bit" mask="0xFF" name="TWSD"/>
+        </register>
+        <register caption="TWI Slave Address Mask Register" name="TWSAM" offset="0xA1" size="1">
+          <bitfield caption="TWI Address Mask Bits" mask="0xFE" name="TWSAM" lsb="1"/>
+          <bitfield caption="TWI Address Enable" mask="0x01" name="TWAE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register A" name="ADMUXA" offset="0x29" size="1">
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x3F" name="MUX"/>
+        </register>
+        <register caption="The ADC multiplexer Selection Register B" name="ADMUXB" offset="0x28" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xE0" name="REFS"/>
+          <bitfield caption="Gain Selection Bits" mask="0x03" name="GSEL"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x25" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x24" size="1">
+          <bitfield caption="" mask="0x08" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_T841"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x61" size="1">
+          <bitfield caption="ADC9 Digital Input Disable" mask="0x08" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x04" name="ADC8D"/>
+          <bitfield caption="ADC10 Digital input Disable" mask="0x02" name="ADC10D"/>
+          <bitfield caption="ADC11 Digital input Disable" mask="0x01" name="ADC11D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x60" size="1">
+          <bitfield caption="ADC7 Digital input Disable" mask="0x80" name="ADC7D"/>
+          <bitfield caption="ADC6 Digital input Disable" mask="0x40" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
+          <bitfield caption="ADC4/AIN11 Digital input Disable" mask="0x10" name="ADC4D"/>
+          <bitfield caption="ADC3/AIN10 Digital Input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC2/AIN01 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1/AIN00 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0/AREF Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_T841">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator 0" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match A" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator 0 Control And Status Register B" name="ACSR0B" offset="0x2B" size="1">
+          <bitfield caption="Analog Comparator 0 Hysteresis Select" mask="0x80" name="HSEL0"/>
+          <bitfield caption="Analog Comparator 0 Hysteresis Level" mask="0x40" name="HLEV0"/>
+          <bitfield caption="Analog Comparator 0 Output Pin Enable" mask="0x10" name="ACOE0"/>
+          <bitfield caption="Analog Comparator 0 Negative Input Multiplexer" mask="0x0C" name="ACNMUX"/>
+          <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bits 1:0" mask="0x03" name="ACPMUX"/>
+        </register>
+        <register caption="Analog Comparator 0 Control And Status Register A" name="ACSR0A" offset="0x2A" size="1">
+          <bitfield caption="Analog Comparator 0 Disable" mask="0x80" name="ACD0"/>
+          <bitfield caption="Analog Comparator 0 Positive Input Multiplexer Bit 2" mask="0x40" name="ACPMUX2"/>
+          <bitfield caption="Analog Comparator 0 Output" mask="0x20" name="ACO0"/>
+          <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x10" name="ACI0"/>
+          <bitfield caption="Analog Comparator 0 Interrupt Enable" mask="0x08" name="ACIE0"/>
+          <bitfield caption="Analog Comparator 0 Input Capture Enable" mask="0x04" name="ACIC0"/>
+          <bitfield caption="Analog Comparator 0 Interrupt Mode Select bits" mask="0x03" name="ACIS0" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Analog Comparator 1 Control And Status Register B" name="ACSR1B" offset="0x2D" size="1">
+          <bitfield caption="Analog Comparator 1 Hysteresis Select" mask="0x80" name="HSEL1"/>
+          <bitfield caption="Analog Comparator 1 Hysteresis Level" mask="0x40" name="HLEV1"/>
+          <bitfield caption="Analog Comparator 1 Output Pin Enable" mask="0x10" name="ACOE1"/>
+          <bitfield caption="Analog Comparator 1 Multiplexer Enable" mask="0x04" name="ACME1"/>
+        </register>
+        <register caption="Analog Comparator 1 Control And Status Register A" name="ACSR1A" offset="0x2C" size="1">
+          <bitfield caption="Analog Comparator 1 Disable" mask="0x80" name="ACD1"/>
+          <bitfield caption="Analog Comparator 1 Bandgap Select" mask="0x40" name="ACBG1"/>
+          <bitfield caption="Analog Comparator 1 Output" mask="0x20" name="ACO1"/>
+          <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x10" name="ACI1"/>
+          <bitfield caption="Analog Comparator 1 Interrupt Enable" mask="0x08" name="ACIE1"/>
+          <bitfield caption="Analog Comparator 1 Input Capture Enable" mask="0x04" name="ACIC1"/>
+          <bitfield caption="Analog Comparator 1 Interrupt Mode Select bits" mask="0x03" name="ACIS1" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <register-group caption="Timer/Counter, 16-bit" name="TC2">
+        <register caption="Timer/Counter2 Interrupt Mask Register" name="TIMSK2" offset="0x31" size="1">
+          <bitfield caption="Timer/Counter2 Input Capture Interrupt Enable" mask="0x20" name="ICIE2"/>
+          <bitfield caption="Timer/Counter2 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE2B"/>
+          <bitfield caption="Timer/Counter2 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE2A"/>
+          <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR2" offset="0x30" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter2 Input Capture Flag" mask="0x20" name="ICF2"/>
+          <bitfield caption="Timer/Counter2 Output Compare B Match Flag" mask="0x04" name="OCF2B"/>
+          <bitfield caption="Timer/Counter2 Output Compare A Match Flag" mask="0x02" name="OCF2A"/>
+          <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
+        </register>
+        <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xCA" size="1">
+          <bitfield caption="Compare Output Mode 2A, bits" mask="0xC0" name="COM2A"/>
+          <bitfield caption="Compare Output Mode 2B, bits" mask="0x30" name="COM2B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM2"/>
+        </register>
+        <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xC9" size="1">
+          <bitfield caption="Input Capture 2 Noise Canceler" mask="0x80" name="ICNC2"/>
+          <bitfield caption="Input Capture 2 Edge Select" mask="0x40" name="ICES2"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM2" lsb="2"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter2 Control Register C" name="TCCR2C" offset="0xC8" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC2A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC2B"/>
+        </register>
+        <register caption="Timer/Counter2  Bytes" name="TCNT2" offset="0xC6" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter2 Output Compare Register A  Bytes" name="OCR2A" offset="0xC4" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter2 Output Compare Register B  Bytes" name="OCR2B" offset="0xC2" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter2 Input Capture Register  Bytes" name="ICR2" offset="0xC0" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F">
+          <bitfield caption="Pin Change Enable Mask 1 Bit 0" mask="0x01" name="PCINT8"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 1" mask="0x02" name="PCINT9"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 2" mask="0x04" name="PCINT10"/>
+          <bitfield caption="Pin Change Enable Mask 1 Bit 3" mask="0x08" name="PCINT11"/>
+        </register>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF">
+          <bitfield caption="Pin Change Enable Mask 0 Bit 0" mask="0x01" name="PCINT0"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 1" mask="0x02" name="PCINT1"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 2" mask="0x04" name="PCINT2"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 3" mask="0x08" name="PCINT3"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 4" mask="0x10" name="PCINT4"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 5" mask="0x20" name="PCINT5"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 6" mask="0x40" name="PCINT6"/>
+          <bitfield caption="Pin Change Enable Mask 0 Bit 7" mask="0x80" name="PCINT7"/>
+        </register>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x70" size="1">
+          <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+          <bitfield caption="Power Reduction USART1" mask="0x40" name="PRUSART1"/>
+          <bitfield caption="Power Reduction USART0" mask="0x20" name="PRUSART0"/>
+          <bitfield caption="Power Reduction SPI" mask="0x10" name="PRSPI"/>
+          <bitfield caption="Power Reduction Timer/Counter2" mask="0x08" name="PRTIM2"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x04" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x02" name="PRTIM0"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Configuration Change Protection" name="CCP" offset="0x71" size="1" mask="0xFF"/>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x73" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Clock Control Register" name="CLKCR" offset="0x72" size="1">
+          <bitfield caption="Oscillator Ready" mask="0x80" name="OSCRDY"/>
+          <bitfield caption="Clock Switch Trigger" mask="0x40" name="CSTR"/>
+          <bitfield caption="Clock Output (Copy). Active low." mask="0x20" name="CKOUTC"/>
+          <bitfield caption="Start-up Time" mask="0x10" name="SUT"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CKSEL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Store Program Memory Control and Status Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+        <register caption="Oscillator Calibration Register 8MHz" name="OSCCAL0" offset="0x74" size="1" mask="0xFF"/>
+        <register caption="Oscillator Calibration Register 32kHz" name="OSCCAL1" offset="0x77" size="1" mask="0x03"/>
+        <register caption="Oscillator Temperature Calibration Register A" name="OSCTCAL0A" offset="0x75" size="1" mask="0xFF"/>
+        <register caption="Oscillator Temperature Calibration Register B" name="OSCTCAL0B" offset="0x76" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+        <value value="0x03" caption="32 kHz" name="32_kHz"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      
+    </module>
+    <module caption="Timer/Counter Output Compare Pin" name="TOCPM">
+      <register-group caption="Timer/Counter Output Compare Pin" name="TOCPM">
+        <register caption="Timer Output Compare Pin Mux Selection 1" name="TOCPMSA1" offset="0x68" size="1">
+          <bitfield caption="Timer Output Compare Channel 7 Selection Bits" mask="0xC0" name="TOCC7S"/>
+          <bitfield caption="Timer Output Compare Channel 6 Selection Bits" mask="0x30" name="TOCC6S"/>
+          <bitfield caption="Timer Output Compare Channel 5 Selection Bits" mask="0x0C" name="TOCC5S"/>
+          <bitfield caption="Timer Output Compare Channel 4 Selection Bits" mask="0x03" name="TOCC4S"/>
+        </register>
+        <register caption="Timer Output Compare Pin Mux Selection 0" name="TOCPMSA0" offset="0x67" size="1">
+          <bitfield caption="Timer Output Compare Channel 3 Selection Bits" mask="0xC0" name="TOCC3S"/>
+          <bitfield caption="Timer Output Compare Channel 2 Selection Bits" mask="0x30" name="TOCC2S"/>
+          <bitfield caption="Timer Output Compare Channel 1 Selection Bits" mask="0x0C" name="TOCC1S"/>
+          <bitfield caption="Timer Output Compare Channel 0 Selection Bits" mask="0x03" name="TOCC0S"/>
+        </register>
+        <register caption="Timer Output Compare Pin Mux Channel Output Enable" name="TOCPMCOE" offset="0x66" size="1">
+          <bitfield caption="Timer Output Compare Channel 7 Output Enable" mask="0x80" name="TOCC7OE"/>
+          <bitfield caption="Timer Output Compare Channel 6 Output Enable" mask="0x40" name="TOCC6OE"/>
+          <bitfield caption="Timer Output Compare Channel 5 Output Enable" mask="0x20" name="TOCC5OE"/>
+          <bitfield caption="Timer Output Compare Channel 4 Output Enable" mask="0x10" name="TOCC4OE"/>
+          <bitfield caption="Timer Output Compare Channel 3 Output Enable" mask="0x08" name="TOCC3OE"/>
+          <bitfield caption="Timer Output Compare Channel 2 Output Enable" mask="0x04" name="TOCC2OE"/>
+          <bitfield caption="Timer Output Compare Channel 1 Output Enable" mask="0x02" name="TOCC1OE"/>
+          <bitfield caption="Timer Output Compare Channel 0 Output Enable" mask="0x01" name="TOCC0OE"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Control Register" name="SPCR" offset="0xB2" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE"/>
+        </register>
+        <register caption="SPI Status Register" name="SPSR" offset="0xB1" size="1">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Data Register" name="SPDR" offset="0xB0" size="1" mask="0xFF"/>
+        <register caption="Remap Port Pins" name="REMAP" offset="0x65" size="1">
+          <bitfield caption="SPI Pin Mapping" mask="0x02" name="SPIMAP"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE">
+        <value caption="fcl/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fcl/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fcl/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fcl/128" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_14">
+      <pin pad="GND" position="14"/>
+      <pin pad="PA0" position="13"/>
+      <pin pad="PA1" position="12"/>
+      <pin pad="PA2" position="11"/>
+      <pin pad="PA3" position="10"/>
+      <pin pad="PA4" position="9"/>
+      <pin pad="PA5" position="8"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA7" position="6"/>
+      <pin pad="PB2" position="5"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB0" position="2"/>
+      <pin pad="VCC" position="1"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PA4" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA0" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PA7" position="15"/>
+      <pin pad="PA6" position="16"/>
+      <pin pad="PA5" position="20"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY84A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY84A.xml
new file mode 100644
index 00000000..26bafbbd
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY84A.xml
@@ -0,0 +1,814 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny84A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny84A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny84A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny84A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny84A-SSU" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny84A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+  </variants>
+  <devices>
+    <device name="ATtiny84A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA1"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+              <signal function="AREF" group="AREF" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SCL" pad="PA4"/>
+              <signal function="TWI" group="SDA" pad="PA6"/>
+              <signal function="SPI" group="USCK" pad="PA4"/>
+              <signal function="SPI" group="DO" pad="PA5"/>
+              <signal function="SPI" group="DI" pad="PA6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="T0" pad="PA3"/>
+              <signal function="T0" group="OC0B" pad="PA7"/>
+              <signal function="T0" group="OC0A" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="T1" group="T1" pad="PA4"/>
+              <signal function="T1" group="OC1B" pad="PA5"/>
+              <signal function="T1" group="OC1A" pad="PA6"/>
+              <signal function="T1" group="ICP1" pad="PA7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="EXT_INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="4" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="5" name="TIM1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="6" name="TIM1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="7" name="TIM1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="8" name="TIM1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="9" name="TIM0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="10" name="TIM0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="11" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="14" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="15" name="USI_STR" caption="USI START"/>
+        <interrupt index="16" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x930C"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x0c"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x27"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="50"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x0F"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="50"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="150"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="3"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB3 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB2" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_64MS_DEFAULT" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC 1 Digital input buffer disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC 0 Digital input buffer disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="ADC Multiplexer Selection Register" name="ADMUX" offset="0x27" size="1" mask="0xFF">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x3F" name="MUX"/>
+        </register>
+        <register caption="ADC Control and Status Register A" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Left Adjust Result" mask="0x10" name="ADLAR"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF">
+        <value caption="VCC used as analog reference, disconnected from PA0 (AREF)" name="VAL_0x00" value="0x00"/>
+        <value caption="External voltage reference at PA0 (AREF) pin, internal reference turned off" name="VAL_0x01" value="0x01"/>
+        <value caption="Internal 1.1V voltage reference" name="VAL_0x02" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x30" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x40" size="1" mask="0x0F"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK0" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x50" size="1">
+          <bitfield caption="Compare Match Output A Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Match Output B Mode bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="Waveform Generation Mode bit 2" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x56" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B" name="OCR0B" offset="0x5C" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/CounterN" mask="0x01" name="PSR10"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x2C" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x2B" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x4F" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x4E" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Clock Select1 bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x42" size="1" ocd-rw="">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x4C" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x4A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x48" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x44" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x20" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x35" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x33" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+    <pinouts>
+    <pinout name="SOIC_14">
+      <pin pad="VCC" position="1"/>
+      <pin pad="PB0" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="PB2" position="5"/>
+      <pin pad="PA7" position="6"/>
+      <pin pad="PA6" position="7"/>
+      <pin pad="PA5" position="8"/>
+      <pin pad="PA4" position="9"/>
+      <pin pad="PA3" position="10"/>
+      <pin pad="PA2" position="11"/>
+      <pin pad="PA1" position="12"/>
+      <pin pad="PA0" position="13"/>
+      <pin pad="GND" position="14"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PA4" position="1"/>
+      <pin pad="PA3" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="PA1" position="4"/>
+      <pin pad="PA0" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="VCC" position="9"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PA7" position="15"/>
+      <pin pad="PA6" position="16"/>
+      <pin pad="PA5" position="20"/>
+    </pinout>
+    <pinout name="BGA_16">
+      <pin pad="PA5" position="A2"/>
+      <pin pad="PA6" position="A3"/>
+      <pin pad="PB2" position="A4"/>
+      <pin pad="PA4" position="B1"/>
+      <pin pad="PA7" position="B2"/>
+      <pin pad="PB1" position="B3"/>
+      <pin pad="PB3" position="B4"/>
+      <pin pad="PA3" position="C1"/>
+      <pin pad="PA2" position="C2"/>
+      <pin pad="PA1" position="C3"/>
+      <pin pad="PB0" position="C4"/>
+      <pin pad="PA0" position="D1"/>
+      <pin pad="GND" position="D2"/>
+      <pin pad="GND" position="D3"/>
+      <pin pad="VCC" position="D4"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY85.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY85.xml
new file mode 100644
index 00000000..1b2cb6ec
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY85.xml
@@ -0,0 +1,802 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny85V-10PU" package="PDIP8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny85V-10SU" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny85V-10SH" package="SOIC8" pinout="SOIC_8" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny85V-10MU" package="MLF20" pinout="QFN_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny85V-20PU" package="PDIP8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny85V-20SU" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny85V-20SH" package="SOIC8" pinout="SOIC_8" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny85V-20MU" package="MLF20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny85" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
+          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+              <signal function="PORTB" group="P" index="4" pad="PB4"/>
+              <signal function="PORTB" group="P" index="5" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="1" pad="PB1"/>
+              <signal function="ACIN" group="AIN" index="0" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PB5"/>
+              <signal function="ADC" group="ADC" index="1" pad="PB2"/>
+              <signal function="ADC" group="ADC" index="2" pad="PB4"/>
+              <signal function="AREF" group="AREF" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal function="TWI" group="SDA" pad="PB0"/>
+              <signal function="TWI" group="SCL" pad="PB2"/>
+              <signal function="SPI" group="DI" pad="PB0"/>
+              <signal function="SPI" group="DO" pad="PB1"/>
+              <signal function="SPI" group="USCK" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PB3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PB4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PB5"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="T0" pad="PB2"/>
+              <signal function="T0" group="OC0B" pad="PB1"/>
+              <signal function="T0" group="OC0A" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="T1" group="OC1B" pad="PB4"/>
+              <signal function="T1" group="OC1BINV" pad="PB3"/>
+              <signal function="T1" group="OC1A" pad="PB1"/>
+              <signal function="T1" group="OC1AINV" pad="PB0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset,Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin change Interrupt Request 0"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="5" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="6" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog comparator"/>
+        <interrupt index="8" name="ADC" caption="ADC Conversion ready"/>
+        <interrupt index="9" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="10" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="11" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="13" name="USI_START" caption="USI START"/>
+        <interrupt index="14" name="USI_OVF" caption="USI Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVSP" type="hvsp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x930B"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x0b"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x22"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="25"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="1"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="0"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="HVSP_INTERFACE_STK600">
+          <property name="HvspControlStack" value="0x4C 0x0C 0x1C 0x2C 0x3C 0x64 0x74 0x66 0x68 0x78 0x68 0x68 0x7A 0x6A 0x68 0x78 0x78 0x7D 0x6D 0x0C 0x80 0x40 0x20 0x10 0x11 0x08 0x04 0x02 0x03 0x08 0x04 0x00"/>
+          <property name="HvspEnterProgMode_stabDelay" value="100"/>
+          <property name="HvspEnterProgMode_cmdexeDelay" value="0"/>
+          <property name="HvspEnterProgMode_synchCycles" value="6"/>
+          <property name="HvspEnterProgMode_latchCycles" value="1"/>
+          <property name="HvspEnterProgMode_toggleVtg" value="1"/>
+          <property name="HvspEnterProgMode_powoffDelay" value="20"/>
+          <property name="HvspEnterProgMode_resetDelay1" value="0"/>
+          <property name="HvspEnterProgMode_resetDelay2" value="50"/>
+          <property name="HvspLeaveProgMode_stabDelay" value="100"/>
+          <property name="HvspLeaveProgMode_resetDelay" value="25"/>
+          <property name="HvspChipErase_pollTimeout" value="40"/>
+          <property name="HvspChipErase_eraseTime" value="0"/>
+          <property name="HvspProgramFlash_mode" value="0x0D"/>
+          <property name="HvspProgramFlash_blockSize" value="256"/>
+          <property name="HvspProgramFlash_pollTimeout" value="5"/>
+          <property name="HvspReadFlash_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_mode" value="0x05"/>
+          <property name="HvspProgramEeprom_blockSize" value="256"/>
+          <property name="HvspProgramEeprom_pollTimeout" value="5"/>
+          <property name="HvspReadEeprom_blockSize" value="256"/>
+          <property name="HvspProgramFuse_pollTimeout" value="25"/>
+          <property name="HvspProgramLock_pollTimeout" value="25"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB5 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB4" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="PLLCLK_1KCK_14CK_4MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms" name="PLLCLK_16KCK_14CK_4MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms" name="PLLCLK_1KCK_14CK_64MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms" name="PLLCLK_16KCK_14CK_64MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_6MHZ4_6CK_14CK_64MS" value="0x03"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_6MHZ4_6CK_14CK_4MS" value="0x23"/>
+        <value caption="ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms" name="INTRCOSC_6MHZ4_1CK_14CK_0MS" value="0x33"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x04"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x14"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x24"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms" name="EXTLOFXTAL_1KCK_14CK_0MS" value="0x06"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms" name="EXTLOFXTAL_1KCK_14CK_4MS" value="0x16"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms" name="EXTLOFXTAL_32KCK_14CK_64MS" value="0x26"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Data Register, Port B" name="PORTB" offset="0x38" size="1" mask="0x3F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x37" size="1" mask="0x3F"/>
+        <register caption="Input Pins, Port B" name="PINB" offset="0x36" size="1" mask="0x3F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x28" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Reference Selection Bit 2" mask="0x10" name="REFS2"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER2"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x34" size="1">
+          <bitfield caption="ADC0 Digital input Disable" mask="0x20" name="ADC0D"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x10" name="ADC2D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x04" name="ADC1D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER2">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x40" name="INT0"/>
+          <bitfield caption="Pin Change Interrupt Enable" mask="0x20" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flag 0" mask="0x40" name="INTF0"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask" name="PCMSK" offset="0x35" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change on INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x4A" size="1">
+          <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
+          <bitfield caption="" mask="0x08" name="WGM02"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x49" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x4C" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSR0"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Control Register" name="TCCR1" offset="0x50" size="1">
+          <bitfield caption="Clear Timer/Counter on Compare Match" mask="0x80" name="CTC1"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x40" name="PWM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1A" values="CLK_COMP_MATCH_OUT_MODE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4F" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4E" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer counter control register" name="GTCCR" offset="0x4C" size="1">
+          <bitfield caption="Pulse Width Modulator B Enable" mask="0x40" name="PWM1B"/>
+          <bitfield caption="Comparator B Output Mode" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x08" name="FOC1B"/>
+          <bitfield caption="Force Output Compare 1A" mask="0x04" name="FOC1A"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1" mask="0x02" name="PSR1"/>
+        </register>
+        <register caption="Dead time prescaler register" name="DTPS" offset="0x43" size="1">
+          <bitfield caption="" mask="0x03" name="DTPS"/>
+        </register>
+        <register caption="Dead time value register" name="DT1A" offset="0x45" size="1">
+          <bitfield caption="" mask="0xF0" name="DTVH"/>
+          <bitfield caption="" mask="0x0F" name="DTVL"/>
+        </register>
+        <register caption="Dead time value B" name="DT1B" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DTVH"/>
+          <bitfield caption="" mask="0x0F" name="DTVL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_COMP_MATCH_OUT_MODE">
+        <value caption="Disconnected from OCn/PWMn" name="VAL_0x00" value="0x00"/>
+        <value caption="Toggle OCn/PWMn output line" name="VAL_0x01" value="0x01"/>
+        <value caption="Clear OCn/PWMn output line" name="VAL_0x02" value="0x02"/>
+        <value caption="set OCn/PWMn output line" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Read Device Signature Imprint Table" mask="0x20" name="RSIG"/>
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x40" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x46" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x47" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x42" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x32" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x31" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+        <value value="0x01" caption="6.4 MHz" name="6_4_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_8">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB1" position="6"/>
+      <pin pad="PB2" position="7"/>
+      <pin pad="VCC" position="8"/>
+    </pinout>
+    <pinout name="QFN_20">
+      <pin pad="PB5" position="1"/>
+      <pin pad="PB3" position="2"/>
+      <pin pad="PB4" position="5"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="PB0" position="11"/>
+      <pin pad="PB1" position="12"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="VCC" position="15"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY861.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY861.xml
new file mode 100644
index 00000000..3fef102f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY861.xml
@@ -0,0 +1,940 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny861V-10MU" package="MLF32" pinout="QFN_32" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny861V-10PU" package="PDIP20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny861V-10SU" package="SOIC20" pinout="SOIC_20" speedmax="10000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="1.8"/>
+    <variant ordercode="ATtiny861-20MU" package="MLF32" pinout="QFN_32" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny861-20PU" package="PDIP20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+    <variant ordercode="ATtiny861-20SU" package="SOIC20" pinout="SOIC_20" speedmax="20000000" tempmax="85" tempmin="-40" vccmax="5.5" vccmin="2.7"/>
+  </variants>
+  <devices>
+    <device name="ATtiny861" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTA" group="P" index="0" pad="PA0"/>
+              <signal function="PORTA" group="P" index="1" pad="PA1"/>
+              <signal function="PORTA" group="P" index="2" pad="PA2"/>
+              <signal function="PORTA" group="P" index="3" pad="PA3"/>
+              <signal function="PORTA" group="P" index="4" pad="PA4"/>
+              <signal function="PORTA" group="P" index="5" pad="PA5"/>
+              <signal function="PORTA" group="P" index="6" pad="PA6"/>
+              <signal function="PORTA" group="P" index="7" pad="PA7"/>
+            </signals>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal function="PORTB" group="P" index="0" pad="PB0"/>
+              <signal function="PORTB" group="P" index="1" pad="PB1"/>
+              <signal function="PORTB" group="P" index="2" pad="PB2"/>
+              <signal function="PORTB" group="P" index="3" pad="PB3"/>
+              <signal function="PORTB" group="P" index="4" pad="PB4"/>
+              <signal function="PORTB" group="P" index="5" pad="PB5"/>
+              <signal function="PORTB" group="P" index="6" pad="PB6"/>
+              <signal function="PORTB" group="P" index="7" pad="PB7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+              <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+              <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+              <signal function="ADC" group="ADC" index="3" pad="PA4"/>
+              <signal function="ADC" group="ADC" index="4" pad="PA5"/>
+              <signal function="ADC" group="ADC" index="5" pad="PA6"/>
+              <signal function="ADC" group="ADC" index="6" pad="PA7"/>
+              <signal function="ADC" group="ADC" index="7" pad="PB4"/>
+              <signal function="ADC" group="ADC" index="8" pad="PB5"/>
+              <signal function="ADC" group="ADC" index="9" pad="PB6"/>
+              <signal function="ADC" group="ADC" index="10" pad="PB7"/>
+              <signal function="AREF" group="AREF" pad="PA3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal function="ACIN" group="AIN" index="0" pad="PA7"/>
+              <signal function="ACIN" group="AIN" index="1" pad="PA6"/>
+              <signal function="ACIN" group="AIN" index="2" pad="PA5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+            <signals>
+              <signal field="USIPOS" function="USI" group="SDA" pad="PB0"/>
+              <signal field="USIPOS" function="USI" group="SCL" pad="PB2"/>
+              <signal field="USIPOS" function="USI_ALT" group="SCL " pad="PA2"/>
+              <signal field="USIPOS" function="USI_ALT" group="SDA" pad="PA0"/>
+              <signal field="USIPOS" function="USI" group="DI" pad="PB0"/>
+              <signal field="USIPOS" function="USI" group="DO" pad="PB1"/>
+              <signal field="USIPOS" function="USI" group="USCK" pad="PB2"/>
+              <signal field="USIPOS" function="USI_ALT" group="USCK" pad="PA2"/>
+              <signal field="USIPOS" function="USI_ALT" group="DO" pad="PA1"/>
+              <signal field="USIPOS" function="USI_ALT" group="DI" pad="PA0"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal function="T0" group="ICP0" pad="PA4"/>
+              <signal function="T0" group="T0" pad="PB6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal function="T1" group="OC1AINV" pad="PB0"/>
+              <signal function="T1" group="OC1A" pad="PB1"/>
+              <signal function="T1" group="OC1BINV" pad="PB2"/>
+              <signal function="T1" group="OC1B" pad="PB3"/>
+              <signal function="T1" group="OC1DINV" pad="PB4"/>
+              <signal function="T1" group="OC1D" pad="PB5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal function="EXTINT" group="PCINT" index="0" pad="PA0"/>
+              <signal function="EXTINT" group="PCINT" index="1" pad="PA1"/>
+              <signal function="EXTINT" group="PCINT" index="2" pad="PA2"/>
+              <signal function="EXTINT" group="PCINT" index="3" pad="PA3"/>
+              <signal function="EXTINT" group="PCINT" index="4" pad="PA4"/>
+              <signal function="EXTINT" group="PCINT" index="5" pad="PA5"/>
+              <signal function="EXTINT" group="PCINT" index="6" pad="PA6"/>
+              <signal function="EXTINT" group="PCINT" index="7" pad="PA7"/>
+              <signal function="EXTINT" group="PCINT" index="8" pad="PB0"/>
+              <signal function="EXTINT" group="PCINT" index="9" pad="PB1"/>
+              <signal function="EXTINT" group="PCINT" index="10" pad="PB2"/>
+              <signal function="EXTINT" group="PCINT" index="11" pad="PB3"/>
+              <signal function="EXTINT" group="PCINT" index="12" pad="PB4"/>
+              <signal function="EXTINT" group="PCINT" index="13" pad="PB5"/>
+              <signal function="EXTINT" group="PCINT" index="14" pad="PB6"/>
+              <signal function="EXTINT" group="PCINT" index="15" pad="PB7"/>
+              <signal function="EXTINT" group="INT" index="1" pad="PA2"/>
+              <signal function="EXTINT" group="INT" index="0" pad="PB6"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_START" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+        <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+        <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+        <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x930D"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x0d"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x20"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="Reference Selection Bit" mask="0x10" name="REFS2"/>
+          <bitfield caption="Analog Channel and Gain Selection Bit 5" mask="0x08" name="MUX5"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+          <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x35" size="1">
+          <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+          <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+          <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+          <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+          <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+          <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+          <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+          <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+          <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+          <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+          <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+          <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+        </register>
+        <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+          <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+          <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+          <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+          <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+          <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+          <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+          <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+          <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DT1H"/>
+          <bitfield caption="" mask="0x0F" name="DT1L"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="MISC_2BIT_SCALE">
+        <value caption="1x" name="VAL_0x00" value="0x00"/>
+        <value caption="2x" name="VAL_0x01" value="0x01"/>
+        <value caption="4x" name="VAL_0x02" value="0x02"/>
+        <value caption="8x" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+      <value-group caption="" name="PULSE_WIDTH_MODU2">
+        <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+        <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+        <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+        <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOIC_20">
+      <pin pad="PB0" position="1"/>
+      <pin pad="PB1" position="2"/>
+      <pin pad="PB2" position="3"/>
+      <pin pad="PB3" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="GND" position="6"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB5" position="8"/>
+      <pin pad="PB6" position="9"/>
+      <pin pad="PB7" position="10"/>
+      <pin pad="PA7" position="11"/>
+      <pin pad="PA6" position="12"/>
+      <pin pad="PA5" position="13"/>
+      <pin pad="PA4" position="14"/>
+      <pin pad="AVCC" position="15"/>
+      <pin pad="AGND" position="16"/>
+      <pin pad="PA3" position="17"/>
+      <pin pad="PA2" position="18"/>
+      <pin pad="PA1" position="19"/>
+      <pin pad="PA0" position="20"/>
+    </pinout>
+    <pinout name="QFN_32">
+      <pin pad="PB3" position="2"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PB4" position="7"/>
+      <pin pad="PB5" position="8"/>
+      <pin pad="PB6" position="10"/>
+      <pin pad="PB7" position="11"/>
+      <pin pad="PA7" position="13"/>
+      <pin pad="PA6" position="14"/>
+      <pin pad="PA5" position="15"/>
+      <pin pad="PA4" position="17"/>
+      <pin pad="AVCC" position="18"/>
+      <pin pad="AGND" position="21"/>
+      <pin pad="PA3" position="22"/>
+      <pin pad="PA2" position="23"/>
+      <pin pad="PA1" position="25"/>
+      <pin pad="PA0" position="26"/>
+      <pin pad="PB0" position="30"/>
+      <pin pad="PB1" position="31"/>
+      <pin pad="PB2" position="32"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY861A.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY861A.xml
new file mode 100644
index 00000000..ade8c2ab
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY861A.xml
@@ -0,0 +1,808 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny861A" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0260">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x0040" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0060" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt 0"/>
+        <interrupt index="2" name="PCINT" caption="Pin Change Interrupt"/>
+        <interrupt index="3" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="4" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="5" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="6" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="7" name="USI_START" caption="USI Start"/>
+        <interrupt index="8" name="USI_OVF" caption="USI Overflow"/>
+        <interrupt index="9" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="10" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="11" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="12" name="WDT" caption="Watchdog Time-Out"/>
+        <interrupt index="13" name="INT1" caption="External Interrupt 1"/>
+        <interrupt index="14" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
+        <interrupt index="15" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
+        <interrupt index="16" name="TIMER0_CAPT" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="TIMER1_COMPD" caption="Timer/Counter1 Compare Match D"/>
+        <interrupt index="18" name="FAULT_PROTECTION" caption="Timer/Counter1 Fault Protection"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x930D"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x0d"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x20"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x80 0x06 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 8 ms" name="PLLCLK_1KCK_14CK_8MS" value="0x01"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 8 ms" name="PLLCLK_16KCK_14CK_8MS" value="0x11"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 68 ms" name="PLLCLK_1KCK_14CK_68MS" value="0x21"/>
+        <value caption="PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 68 ms" name="PLLCLK_16KCK_14CK_68MS" value="0x31"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK 4 ms" name="EXTLOFXTAL_1CK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1 CK + 64 ms" name="EXTLOFXTAL_1CK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32 CK + 64 ms" name="EXTLOFXTAL_32CK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_XX_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-    MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms" name="EXTCRES_8MHZ_XX_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x3B" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x3A" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x39" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x38" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x37" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x36" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x27" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x23" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="Gain Select" mask="0x40" name="GSEL"/>
+          <bitfield caption="Input Polarity Mode" mask="0x20" name="IPR"/>
+          <bitfield caption="" mask="0x10" name="REFS2"/>
+          <bitfield caption="" mask="0x08" name="MUX5"/>
+          <bitfield caption="ADC Auto Trigger Sources" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER3"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x22" size="1">
+          <bitfield caption="ADC10 Digital input Disable" mask="0x80" name="ADC10D"/>
+          <bitfield caption="ADC9 Digital input Disable" mask="0x40" name="ADC9D"/>
+          <bitfield caption="ADC8 Digital input Disable" mask="0x20" name="ADC8D"/>
+          <bitfield caption="ADC7 Digital input Disable" mask="0x10" name="ADC7D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x21" size="1">
+          <bitfield caption="ADC6 Digital input Disable" mask="0x80" name="ADC6D"/>
+          <bitfield caption="ADC5 Digital input Disable" mask="0x40" name="ADC5D"/>
+          <bitfield caption="ADC4 Digital input Disable" mask="0x20" name="ADC4D"/>
+          <bitfield caption="ADC3 Digital input Disable" mask="0x10" name="ADC3D"/>
+          <bitfield caption="AREF Digital Input Disable" mask="0x08" name="AREFD"/>
+          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
+          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
+          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER3">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register B" name="ACSRB" offset="0x29" size="1">
+          <bitfield caption="Hysteresis Select" mask="0x80" name="HSEL"/>
+          <bitfield caption="Hysteresis Level" mask="0x40" name="HLEV"/>
+          <bitfield caption="Analog Comparator Multiplexer" mask="0x07" name="ACM"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register A" name="ACSRA" offset="0x28" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x04" name="ACME"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0x31" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0x30" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0x2F" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0x2E" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0x2D" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x41" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x10" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x08" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x02" name="TOIE0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Interrupt Enable" mask="0x01" name="TICIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x10" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x08" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x02" name="TOV0"/>
+          <bitfield caption="Timer/Counter0 Input Capture Flag" mask="0x01" name="ICF0"/>
+        </register>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x35" size="1">
+          <bitfield caption="Timer/Counter 0 Width" mask="0x80" name="TCW0"/>
+          <bitfield caption="Input Capture Mode Enable" mask="0x40" name="ICEN0"/>
+          <bitfield caption="Input Capture Noice Canceler" mask="0x20" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x10" name="ICES0"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x08" name="ACIC0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x01" name="WGM00"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x53" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x10" name="TSM"/>
+          <bitfield caption="Timer/Counter 0 Prescaler Reset" mask="0x08" name="PSR0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 High" name="TCNT0H" offset="0x34" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Low" name="TCNT0L" offset="0x52" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x33" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x32" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Control Register A" name="TCCR1A" offset="0x50" size="1">
+          <bitfield caption="Compare Output Mode, Bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode, Bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Force Output Compare Match 1A" mask="0x08" name="FOC1A"/>
+          <bitfield caption="Force Output Compare Match 1B" mask="0x04" name="FOC1B"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x02" name="PWM1A"/>
+          <bitfield caption="Pulse Width Modulator Enable" mask="0x01" name="PWM1B"/>
+        </register>
+        <register caption="Timer/Counter Control Register B" name="TCCR1B" offset="0x4F" size="1">
+          <bitfield caption="PWM Inversion Mode" mask="0x80" name="PWM1X"/>
+          <bitfield caption="Timer/Counter 1 Prescaler reset" mask="0x40" name="PSR1"/>
+          <bitfield caption="Dead Time Prescaler" mask="0x30" name="DTPS1" values="MISC_2BIT_SCALE"/>
+          <bitfield caption="Clock Select Bits" mask="0x0F" name="CS1" values="CLK_SEL_4BIT"/>
+        </register>
+        <register caption="Timer/Counter Control Register C" name="TCCR1C" offset="0x47" size="1">
+          <bitfield caption="COM1A1 Shadow Bit" mask="0x80" name="COM1A1S"/>
+          <bitfield caption="COM1A0 Shadow Bit" mask="0x40" name="COM1A0S"/>
+          <bitfield caption="COM1B1 Shadow Bit" mask="0x20" name="COM1B1S"/>
+          <bitfield caption="COM1B0 Shadow Bit" mask="0x10" name="COM1B0S"/>
+          <bitfield caption="Comparator D output mode" mask="0x0C" name="COM1D"/>
+          <bitfield caption="Force Output Compare Match 1D" mask="0x02" name="FOC1D"/>
+          <bitfield caption="Pulse Width Modulator D Enable" mask="0x01" name="PWM1D"/>
+        </register>
+        <register caption="Timer/Counter Control Register D" name="TCCR1D" offset="0x46" size="1">
+          <bitfield caption="Fault Protection Interrupt Enable" mask="0x80" name="FPIE1"/>
+          <bitfield caption="Fault Protection Mode Enable" mask="0x40" name="FPEN1"/>
+          <bitfield caption="Fault Protection Noise Canceler" mask="0x20" name="FPNC1"/>
+          <bitfield caption="Fault Protection Edge Select" mask="0x10" name="FPES1"/>
+          <bitfield caption="Fault Protection Analog Comparator Enable" mask="0x08" name="FPAC1"/>
+          <bitfield caption="Fault Protection Interrupt Flag" mask="0x04" name="FPF1"/>
+          <bitfield caption="Waveform Generation Mode Bit" mask="0x03" name="WGM1" values="PULSE_WIDTH_MODU2"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register E" name="TCCR1E" offset="0x20" size="1">
+          <bitfield caption="Ouput Compare Override Enable Bits" mask="0x3F" name="OC1OE"/>
+        </register>
+        <register caption="Timer/Counter Register" name="TCNT1" offset="0x4E" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter 1 Register High" name="TC1H" offset="0x45" size="1" mask="0x03"/>
+        <register caption="Output Compare Register" name="OCR1A" offset="0x4D" size="1" mask="0xFF"/>
+        <register caption="Output Compare Register" name="OCR1B" offset="0x4C" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1C" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="Output compare register" name="OCR1D" offset="0x4A" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK" offset="0x59" size="1">
+          <bitfield caption="OCIE1D: Timer/Counter1 Output Compare Interrupt Enable" mask="0x80" name="OCIE1D"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare Interrupt Enable" mask="0x40" name="OCIE1A"/>
+          <bitfield caption="OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable" mask="0x20" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x04" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR" offset="0x58" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1D" mask="0x80" name="OCF1D"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1A" mask="0x40" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Output Compare Flag 1B" mask="0x20" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x04" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter 1 Dead Time Value" name="DT1" offset="0x44" size="1">
+          <bitfield caption="" mask="0xF0" name="DT1H"/>
+          <bitfield caption="" mask="0x0F" name="DT1L"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="MISC_2BIT_SCALE">
+        <value caption="1x" name="VAL_0x00" value="0x00"/>
+        <value caption="2x" name="VAL_0x01" value="0x01"/>
+        <value caption="4x" name="VAL_0x02" value="0x02"/>
+        <value caption="8x" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CLK_SEL_4BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/2" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/4" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/8" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/16" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/32" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/64" name="VAL_0x07" value="0x07"/>
+        <value caption="Running, CLK/128" name="VAL_0x08" value="0x08"/>
+        <value caption="Running, CLK/256" name="VAL_0x09" value="0x09"/>
+        <value caption="Running, CLK/512" name="VAL_0x0A" value="0x0A"/>
+        <value caption="Running, CLK/1024" name="VAL_0x0B" value="0x0B"/>
+        <value caption="Running, CLK/2048" name="VAL_0x0C" value="0x0C"/>
+        <value caption="Running, CLK/4096" name="VAL_0x0D" value="0x0D"/>
+        <value caption="Running, CLK/8192" name="VAL_0x0E" value="0x0E"/>
+        <value caption="Running, CLK/16384" name="VAL_0x0F" value="0x0F"/>
+      </value-group>
+      <value-group caption="" name="PULSE_WIDTH_MODU2">
+        <value caption="Fast PWM (NB! PWMx must be set!)" name="VAL_0x00" value="0x00"/>
+        <value caption="Phase and Frequency Correct PWM" name="VAL_0x01" value="0x01"/>
+        <value caption="PWM6/Single-slope" name="VAL_0x02" value="0x02"/>
+        <value caption="PWM6/Dual-slope" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1" ocd-rw="R">
+          <bitfield caption="Clear temporary page buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read fuse and lock bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00" values="INTERRUPT_SENSE_CONTROL"/>
+        </register>
+        <register caption="General Interrupt Mask Register" name="GIMSK" offset="0x5B" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0xC0" name="INT"/>
+          <bitfield caption="Pin Change Interrupt Enables" mask="0x30" name="PCIE"/>
+        </register>
+        <register caption="General Interrupt Flag register" name="GIFR" offset="0x5A" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0xC0" name="INTF"/>
+          <bitfield caption="Pin Change Interrupt Flag" mask="0x20" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Enable Mask 1" name="PCMSK1" offset="0x42" size="1" mask="0xFF"/>
+        <register caption="Pin Change Enable Mask 0" name="PCMSK0" offset="0x43" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x56" size="1">
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x03FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x80" name="BODS"/>
+          <bitfield caption="Pull-up Disable" mask="0x40" name="PUD"/>
+          <bitfield caption="Sleep Enable" mask="0x20" name="SE"/>
+          <bitfield caption="Sleep Mode Select Bits" mask="0x18" name="SM" values="CPU_SLEEP_MODE"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x04" name="BODSE"/>
+          <bitfield caption="Interrupt Sense Control 0 bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x51" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x48" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="PLL Control and status register" name="PLLCSR" offset="0x49" size="1">
+          <bitfield caption="Low speed mode" mask="0x80" name="LSM"/>
+          <bitfield caption="PCK Enable" mask="0x04" name="PCKE"/>
+          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
+          <bitfield caption="PLL Lock detector" mask="0x01" name="PLOCK"/>
+        </register>
+        <register caption="debugWire data register" name="DWDR" offset="0x40" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x2C" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x2A" size="1" mask="0xFF"/>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Standby" name="STDBY" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY87.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY87.xml
new file mode 100644
index 00000000..4cdd71b1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY87.xml
@@ -0,0 +1,888 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+  </variants>
+  <devices>
+    <device name="ATtiny87" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
+          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="PORT">
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+          </instance>
+        </module>
+        <module name="LINUART">
+          <instance name="LINUART" caption="Local Interconnect Network">
+            <register-group name="LINUART" name-in-module="LINUART" offset="0x00" address-space="data" caption="Local Interconnect Network"/>
+          </instance>
+        </module>
+        <module name="USI">
+          <instance name="USI" caption="Universal Serial Interface">
+            <register-group name="USI" name-in-module="USI" offset="0x00" address-space="data" caption="Universal Serial Interface"/>
+          </instance>
+        </module>
+        <module name="TC8_ASYNC">
+          <instance name="TC0" caption="Timer/Counter, 8-bit Async">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+          </instance>
+        </module>
+        <module name="CURRENT_SOURCE">
+          <instance name="CURRENT_SOURCE" caption="Current Source">
+            <register-group name="CURRENT_SOURCE" name-in-module="CURRENT_SOURCE" offset="0x00" address-space="data" caption="Current Source"/>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+          </instance>
+        </module>
+        <module name="BOOT_LOAD">
+          <instance name="BOOT_LOAD" caption="Bootloader">
+            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="5" name="WDT" caption="Watchdog Time-Out Interrupt"/>
+        <interrupt index="6" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="7" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match 1A"/>
+        <interrupt index="8" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match 1B"/>
+        <interrupt index="9" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="10" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match 0A"/>
+        <interrupt index="11" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="12" name="LIN_TC" caption="LIN Transfer Complete"/>
+        <interrupt index="13" name="LIN_ERR" caption="LIN Error"/>
+        <interrupt index="14" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+        <interrupt index="15" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="16" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="17" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="18" name="USI_START" caption="USI Start Condition Detection"/>
+        <interrupt index="19" name="USI_OVF" caption="USI Counter Overflow"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9387"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x87"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x31"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0B"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="10"/>
+          <property name="IspChipErase_pollMethod" value="0"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="10"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0E 0x1E 0x2E 0x3E 0x2E 0x3E 0x4E 0x5E 0x4E 0x5E 0x6E 0x7E 0x6E 0x7E 0x06 0x16 0x46 0x56 0x0A 0x1A 0x4A 0x5A 0x1E 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PB7 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always ON" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB5" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x00"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="EXTCLK_6CK_14CK_4MS" value="0x10"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="EXTCLK_6CK_14CK_64MS" value="0x20"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x02"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS" value="0x12"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="INTRCOSC_8MHZ_6CK_14CK_64MS" value="0x22"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="WDOSC_128KHZ_6CK_14CK_0MS" value="0x03"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms" name="WDOSC_128KHZ_6CK_14CK_4MS" value="0x13"/>
+        <value caption="WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms" name="WDOSC_128KHZ_6CK_14CK_64MS" value="0x23"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK 4 ms" name="EXTLOFXTAL_1KCK_4MS" value="0x04"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1024 CK + 64 ms" name="EXTLOFXTAL_1KCK_64MS" value="0x14"/>
+        <value caption="Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32768 CK + 64 ms" name="EXTLOFXTAL_32KCK_64MS" value="0x24"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_4MS1" value="0x08"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_258CK_14CK_65MS" value="0x18"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_0MS" value="0x28"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_4MS1" value="0x38"/>
+        <value caption="Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ4_0MHZ9_1KCK_14CK_65MS" value="0x09"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS" value="0x19"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1" value="0x29"/>
+        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS" value="0x39"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_4MS1" value="0x0A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_258CK_14CK_65MS" value="0x1A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_0MS" value="0x2A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_4MS1" value="0x3A"/>
+        <value caption="Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_0MHZ9_3MHZ_1KCK_14CK_65MS" value="0x0B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS" value="0x1B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1" value="0x2B"/>
+        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS" value="0x3B"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_4MS1" value="0x0C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_258CK_14CK_65MS" value="0x1C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_0MS" value="0x2C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_4MS1" value="0x3C"/>
+        <value caption="Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_3MHZ_8MHZ_1KCK_14CK_65MS" value="0x0D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS" value="0x1D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1" value="0x2D"/>
+        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS" value="0x3D"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_4MS1" value="0x0E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_258CK_14CK_65MS" value="0x1E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 0 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_0MS" value="0x2E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 4.1 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_4MS1" value="0x3E"/>
+        <value caption="Ext. Ceramic Res. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 1024 CK /14 CK + 65 ms" name="EXTCRES_8MHZ_16MHZ_1KCK_14CK_65MS" value="0x0F"/>
+        <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 0 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_0MS" value="0x1F"/>
+        <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 4.1 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_4MS1" value="0x2F"/>
+        <value caption="Ext. Crystal Osc. 8.0-16.0 MHz; Start-up time PWRDWN/RESET: 16384 CK/14 CK + 65 ms" name="EXTXOSC_8MHZ_16MHZ_16KCK_14CK_65MS" value="0x3F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
+        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
+        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
+        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Local Interconnect Network" name="LINUART">
+      <register-group caption="Local Interconnect Network" name="LINUART">
+        <register caption="LIN Control Register" name="LINCR" offset="0xC8" size="1">
+          <bitfield caption="Software Reset" mask="0x80" name="LSWRES"/>
+          <bitfield caption="LIN Standard" mask="0x40" name="LIN13"/>
+          <bitfield caption="LIN Configuration bits" mask="0x30" name="LCONF"/>
+          <bitfield caption="LIN or UART Enable" mask="0x08" name="LENA"/>
+          <bitfield caption="LIN Command and Mode bits" mask="0x07" name="LCMD"/>
+        </register>
+        <register caption="LIN Status and Interrupt Register" name="LINSIR" offset="0xC9" size="1">
+          <bitfield caption="Identifier Status bits" mask="0xE0" name="LIDST"/>
+          <bitfield caption="Busy Signal" mask="0x10" name="LBUSY"/>
+          <bitfield caption="Error Interrupt" mask="0x08" name="LERR"/>
+          <bitfield caption="Identifier Interrupt" mask="0x04" name="LIDOK"/>
+          <bitfield caption="Transmit Performed Interrupt" mask="0x02" name="LTXOK"/>
+          <bitfield caption="Receive Performed Interrupt" mask="0x01" name="LRXOK"/>
+        </register>
+        <register caption="LIN Enable Interrupt Register" name="LINENIR" offset="0xCA" size="1">
+          <bitfield caption="Enable Error Interrupt" mask="0x08" name="LENERR"/>
+          <bitfield caption="Enable Identifier Interrupt" mask="0x04" name="LENIDOK"/>
+          <bitfield caption="Enable Transmit Performed Interrupt" mask="0x02" name="LENTXOK"/>
+          <bitfield caption="Enable Receive Performed Interrupt" mask="0x01" name="LENRXOK"/>
+        </register>
+        <register caption="LIN Error Register" name="LINERR" offset="0xCB" size="1" ocd-rw="R">
+          <bitfield caption="Abort Flag" mask="0x80" name="LABORT"/>
+          <bitfield caption="Frame Time Out Error Flag" mask="0x40" name="LTOERR"/>
+          <bitfield caption="Overrun Error Flag" mask="0x20" name="LOVERR"/>
+          <bitfield caption="Framing Error Flag" mask="0x10" name="LFERR"/>
+          <bitfield caption="Synchronization Error Flag" mask="0x08" name="LSERR"/>
+          <bitfield caption="Parity Error Flag" mask="0x04" name="LPERR"/>
+          <bitfield caption="Checksum Error Flag" mask="0x02" name="LCERR"/>
+          <bitfield caption="Bit Error Flag" mask="0x01" name="LBERR"/>
+        </register>
+        <register caption="LIN Bit Timing Register" name="LINBTR" offset="0xCC" size="1">
+          <bitfield caption="Disable Bit Timing Resynchronization" mask="0x80" name="LDISR"/>
+          <bitfield caption="LIN Bit Timing bits" mask="0x3F" name="LBT"/>
+        </register>
+        <register caption="LIN Baud Rate Low Register" name="LINBRRL" offset="0xCD" size="1">
+          <bitfield caption="" mask="0xFF" name="LDIV"/>
+        </register>
+        <register caption="LIN Baud Rate High Register" name="LINBRRH" offset="0xCE" size="1">
+          <bitfield caption="" mask="0x0F" name="LDIV" lsb="8"/>
+        </register>
+        <register caption="LIN Data Length Register" name="LINDLR" offset="0xCF" size="1">
+          <bitfield caption="LIN Transmit Data Length bits" mask="0xF0" name="LTXDL"/>
+          <bitfield caption="LIN Receive Data Length bits" mask="0x0F" name="LRXDL"/>
+        </register>
+        <register caption="LIN Identifier Register" name="LINIDR" offset="0xD0" size="1">
+          <bitfield caption="Parity bits" mask="0xC0" name="LP"/>
+          <bitfield caption="Identifier bit 5 or Data Length bits" mask="0x3F" name="LID"/>
+        </register>
+        <register caption="LIN Data Buffer Selection Register" name="LINSEL" offset="0xD1" size="1">
+          <bitfield caption="Auto Increment of Data Buffer Index (Active Low)" mask="0x08" name="LAINC"/>
+          <bitfield caption="FIFO LIN Data Buffer Index bits" mask="0x07" name="LINDX"/>
+        </register>
+        <register caption="LIN Data Register" name="LINDAT" offset="0xD2" size="1" ocd-rw="">
+          <bitfield caption="" mask="0xFF" name="LDATA"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Universal Serial Interface" name="USI">
+      <register-group caption="Universal Serial Interface" name="USI">
+        <register caption="USI Pin Position" name="USIPP" offset="0xBC" size="1" mask="0x01"/>
+        <register caption="USI Buffer Register" name="USIBR" offset="0xBB" size="1" mask="0xFF" ocd-rw="R"/>
+        <register caption="USI Data Register" name="USIDR" offset="0xBA" size="1" mask="0xFF"/>
+        <register caption="USI Status Register" name="USISR" offset="0xB9" size="1" ocd-rw="R">
+          <bitfield caption="Start Condition Interrupt Flag" mask="0x80" name="USISIF"/>
+          <bitfield caption="Counter Overflow Interrupt Flag" mask="0x40" name="USIOIF"/>
+          <bitfield caption="Stop Condition Flag" mask="0x20" name="USIPF"/>
+          <bitfield caption="Data Output Collision" mask="0x10" name="USIDC"/>
+          <bitfield caption="USI Counter Value Bits" mask="0x0F" name="USICNT"/>
+        </register>
+        <register caption="USI Control Register" name="USICR" offset="0xB8" size="1">
+          <bitfield caption="Start Condition Interrupt Enable" mask="0x80" name="USISIE"/>
+          <bitfield caption="Counter Overflow Interrupt Enable" mask="0x40" name="USIOIE"/>
+          <bitfield caption="USI Wire Mode Bits" mask="0x30" name="USIWM" values="COMM_USI_OP"/>
+          <bitfield caption="USI Clock Source Select Bits" mask="0x0C" name="USICS"/>
+          <bitfield caption="Clock Strobe" mask="0x02" name="USICLK"/>
+          <bitfield caption="Toggle Clock Port Pin" mask="0x01" name="USITC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_USI_OP">
+        <value caption="Normal Operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Three-Wire Mode" name="VAL_0x01" value="0x01"/>
+        <value caption="Two-Wire Mode" name="VAL_0x02" value="0x02"/>
+        <value caption="Two-Wire Mode Held Low" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
+      <register-group caption="Timer/Counter, 8-bit Async" name="TC0">
+        <register caption="Timer/Counter0 Interrupt Mask register" name="TIMSK0" offset="0x6E" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag Register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
+          <bitfield caption="Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register A" name="TCCR0A" offset="0x45" size="1">
+          <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Waveform Genration Mode bits" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter0 Control Register B" name="TCCR0B" offset="0x46" size="1">
+          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Clock Select bits" mask="0x07" name="CS0" values="CLK_SEL_3BIT"/>
+        </register>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x47" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register A" name="OCR0A" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
+          <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
+          <bitfield caption="Asynchronous Timer/Counter0" mask="0x20" name="AS0"/>
+          <bitfield caption="Timer/Counter0 Update Busy" mask="0x10" name="TCN0UB"/>
+          <bitfield caption="Output Compare Register 0A  Update Busy" mask="0x08" name="OCR0AUB"/>
+          <bitfield caption="Timer/Counter0 Control Register A Update Busy" mask="0x02" name="TCR0AUB"/>
+          <bitfield caption="Timer/Counter0 Control Register B Update Busy" mask="0x01" name="TCR0BUB"/>
+        </register>
+        <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Asynchronous 8-bit Timer/Counter0" mask="0x02" name="PSR0"/>
+          <bitfield caption="Prescaler Reset Synchronous 16-bit Timer/Counter1" mask="0x01" name="PSR1"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter1 Input Capture Flag" mask="0x20" name="ICF1"/>
+          <bitfield caption="Timer/Counter1 Output Compare B Match Flag" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Timer/Counter1 Output Compare A Match Flag" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Pulse Width Modulator Select Bits" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode Bits" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Timer/Counter1 Clock Select bits" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1">
+          <bitfield caption="Timer/Counter1 Force Output Compare for Channel A" mask="0x80" name="FOC1A"/>
+          <bitfield caption="Timer/Counter1 Force Output Compare for Channel B" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register D" name="TCCR1D" offset="0x83" size="1">
+          <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel B" mask="0x80" name="OC1BX"/>
+          <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel B" mask="0x40" name="OC1BW"/>
+          <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel B" mask="0x20" name="OC1BV"/>
+          <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel B" mask="0x10" name="OC1BU"/>
+          <bitfield caption="Timer/Counter1 Output Compare X-pin Enable for Channel A" mask="0x08" name="OC1AX"/>
+          <bitfield caption="Timer/Counter1 Output Compare W-pin Enable for Channel A" mask="0x04" name="OC1AW"/>
+          <bitfield caption="Timer/Counter1 Output Compare V-pin Enable for Channel A" mask="0x02" name="OC1AV"/>
+          <bitfield caption="Timer/Counter1 Output Compare U-pin Enable for Channel A" mask="0x01" name="OC1AU"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCR" offset="0x60" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register  Bytes" name="EEAR" offset="0x41" size="2" mask="0x01FF"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE_3BIT">
+        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF8"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="Bipolar Input Mode" mask="0x80" name="BIN"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER4"/>
+        </register>
+        <register caption="Analog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)" name="AMISCR" offset="0x77" size="1">
+          <bitfield caption="External Voltage Reference Input Enable" mask="0x04" name="AREFEN"/>
+          <bitfield caption="Internal Voltage Reference Output Enable" mask="0x02" name="XREFEN"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="" mask="0x40" name="ADC10D"/>
+          <bitfield caption="" mask="0x20" name="ADC9D"/>
+          <bitfield caption="" mask="0x10" name="ADC8D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+          <bitfield caption="" mask="0x80" name="ADC7D"/>
+          <bitfield caption="" mask="0x40" name="ADC6D"/>
+          <bitfield caption="" mask="0x20" name="ADC5D"/>
+          <bitfield caption="" mask="0x10" name="ADC4D"/>
+          <bitfield caption="" mask="0x08" name="ADC3D"/>
+          <bitfield caption="" mask="0x04" name="ADC2D"/>
+          <bitfield caption="" mask="0x02" name="ADC1D"/>
+          <bitfield caption="" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF8">
+        <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x00" value="0x00"/>
+        <value caption="If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x01" value="0x01"/>
+        <value caption="If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.  " name="VAL_0x02" value="0x02"/>
+        <value caption="If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin." name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER4">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter1 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x06" value="0x06"/>
+        <value caption="Watchdog Interrupt Request" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Current Source" name="CURRENT_SOURCE">
+      <register-group caption="Current Source" name="CURRENT_SOURCE">
+        <register caption="Analog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)" name="AMISCR" offset="0x77" size="1">
+          <bitfield caption="Current Source Enable" mask="0x01" name="ISRCEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator &amp; ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
+          <bitfield caption="Analog Comparator Internal Voltage Reference Select Bits" mask="0x30" name="ACIR"/>
+        </register>
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Internal Reference Select" mask="0x40" name="ACIRS"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+          <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+        </register>
+        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
+          <bitfield caption="Pin Change Interrupt Enable  on any PCINT14..8 pin" mask="0x03" name="PCIE"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x03" name="PCIF"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Bootloader" name="BOOT_LOAD">
+      <register-group caption="Bootloader" name="BOOT_LOAD">
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+          <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
+          <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1">
+          <bitfield caption="Power Reduction LINUART" mask="0x20" name="PRLIN"/>
+          <bitfield caption="Power Reduction SPI" mask="0x10" name="PRSPI"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x04" name="PRTIM0"/>
+          <bitfield caption="Power Reduction USI" mask="0x02" name="PRUSI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Stack Pointer  Bytes" name="SP" offset="0x5D" size="2" mask="0x07FF"/>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+          <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+        </register>
+        <register caption="MCU Status register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-On Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x06" name="SM" values="CPU_SLEEP_MODE2"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Oscillator Calibration Register" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Clock Selection Register" name="CLKSELR" offset="0x63" size="1">
+          <bitfield caption="Clock Out - CKOUT fuse substitution" mask="0x40" name="COUT"/>
+          <bitfield caption="Clock Start-up Time bit 1 - SUT1 fuse substitution" mask="0x30" name="CSUT"/>
+          <bitfield caption="Clock Source Select bit 3 - CKSEL3 fuse substitution" mask="0x0F" name="CSEL"/>
+        </register>
+        <register caption="Clock Control &amp; Status Register" name="CLKCSR" offset="0x62" size="1">
+          <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
+          <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
+          <bitfield caption="Clock Control bits" mask="0x0F" name="CLKC" values="CPU_CLK_COMMAND_LIST_4_BITS"/>
+        </register>
+        <register caption="DebugWire data register" name="DWDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="General Purpose IO register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="General Purpose register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+        <register caption="General purpose register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+        <register caption="Port Control Register" name="PORTCR" offset="0x32" size="1">
+          <bitfield caption="" mask="0x20" name="BBMB"/>
+          <bitfield caption="" mask="0x10" name="BBMA"/>
+          <bitfield caption="" mask="0x02" name="PUDB"/>
+          <bitfield caption="" mask="0x01" name="PUDA"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_SLEEP_MODE2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_CLK_COMMAND_LIST_4_BITS">
+        <value caption="No Command" name="VAL_0x00" value="0x00"/>
+        <value caption="Disable Clock Source" name="VAL_0x01" value="0x01"/>
+        <value caption="Enable Clock Source" name="VAL_0x02" value="0x02"/>
+        <value caption="Request for Clock Availability" name="VAL_0x03" value="0x03"/>
+        <value caption="Clock Source Switch" name="VAL_0x04" value="0x04"/>
+        <value caption="Recovery System Clock Source Code" name="VAL_0x05" value="0x05"/>
+        <value caption="Enable Watchdog in Automatic Reload Mode" name="VAL_0x06" value="0x06"/>
+        <value caption="CKOUT Command" name="VAL_0x07" value="0x07"/>
+        <value caption="From 0x08 up to 0x0F: No command" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+  </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY88.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY88.xml
new file mode 100644
index 00000000..0095c639
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY88.xml
@@ -0,0 +1,1016 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny88-MMU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+    <variant ordercode="ATtiny88-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN28" pinout="QFN28"/>
+    <variant ordercode="ATtiny88-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="PDIP28" pinout="PDIP"/>
+    <variant ordercode="ATtiny88-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP32" pinout="TQFP32_QFN32"/>
+    <variant ordercode="ATtiny88-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UFBGA32" pinout="UFBGA"/>
+    <variant ordercode="ATtiny88-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="QFN32" pinout="TQFP32_QFN32"/>
+  </variants>
+  <devices>
+    <device name="ATtiny88" architecture="AVR8" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x2000">
+          <memory-segment start="0x0000" size="0x2000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x40"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
+          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0300">
+          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
+          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
+          <memory-segment name="IRAM" start="0x0100" size="0x0200" type="ram" external="false"/>
+        </address-space>
+        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0040">
+          <memory-segment start="0x0000" size="0x0040" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
+        </address-space>
+        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
+        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
+          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="TC16">
+          <instance name="TC1" caption="Timer/Counter, 16-bit">
+            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="T" pad="PD5"/>
+              <signal group="ICP" pad="PB0"/>
+              <signal group="OCA" pad="PB1"/>
+              <signal group="OCB" pad="PB3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PD6"/>
+              <signal group="AIN" index="1" pad="PD7"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+              <signal group="P" function="default" pad="PB4" index="4"/>
+              <signal group="P" function="default" pad="PB5" index="5"/>
+              <signal group="P" function="default" pad="PB6" index="6"/>
+              <signal group="P" function="default" pad="PB7" index="7"/>
+            </signals>
+          </instance>
+          <instance name="PORTD" caption="I/O Port">
+            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PD0" index="0"/>
+              <signal group="P" function="default" pad="PD1" index="1"/>
+              <signal group="P" function="default" pad="PD2" index="2"/>
+              <signal group="P" function="default" pad="PD3" index="3"/>
+              <signal group="P" function="default" pad="PD4" index="4"/>
+              <signal group="P" function="default" pad="PD5" index="5"/>
+              <signal group="P" function="default" pad="PD6" index="6"/>
+              <signal group="P" function="default" pad="PD7" index="7"/>
+            </signals>
+          </instance>
+          <instance name="PORTC" caption="I/O Port">
+            <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PC0" index="0"/>
+              <signal group="P" function="default" pad="PC1" index="1"/>
+              <signal group="P" function="default" pad="PC2" index="2"/>
+              <signal group="P" function="default" pad="PC3" index="3"/>
+              <signal group="P" function="default" pad="PC4" index="4"/>
+              <signal group="P" function="default" pad="PC5" index="5"/>
+              <signal group="P" function="default" pad="PC6" index="6"/>
+              <signal group="P" function="default" pad="PC7" index="7"/>
+            </signals>
+          </instance>
+          <instance name="PORTA" caption="I/O Port">
+            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PA0" index="0"/>
+              <signal group="P" function="default" pad="PA1" index="1"/>
+              <signal group="P" function="default" pad="PA2" index="2"/>
+              <signal group="P" function="default" pad="PA3" index="3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="SPI">
+          <instance name="SPI" caption="Serial Peripheral Interface">
+            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
+            <signals>
+              <signal group="SCK" pad="PB5"/>
+              <signal group="MISO" pad="PB4"/>
+              <signal group="MOSI" pad="PB3"/>
+              <signal group="SS" pad="PB2"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="TWI">
+          <instance name="TWI" caption="Two Wire Serial Interface">
+            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
+            <signals>
+              <signal group="SCL" pad="PC6"/>
+              <signal group="SDA" pad="PC5"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="ADC">
+          <instance name="ADC" caption="Analog-to-Digital Converter">
+            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
+            <signals>
+              <signal group="ADC" index="0" pad="PC0"/>
+              <signal group="ADC" index="1" pad="PC1"/>
+              <signal group="ADC" index="2" pad="PC2"/>
+              <signal group="ADC" index="3" pad="PC3"/>
+              <signal group="ADC" index="4" pad="PC4"/>
+              <signal group="ADC" index="5" pad="PC5"/>
+              <signal group="ADC" index="6" pad="PA0"/>
+              <signal group="ADC" index="7" pad="PA1"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PB0"/>
+              <signal group="PCINT" index="1" pad="PB1"/>
+              <signal group="PCINT" index="2" pad="PB2"/>
+              <signal group="PCINT" index="3" pad="PB3"/>
+              <signal group="PCINT" index="4" pad="PB4"/>
+              <signal group="PCINT" index="5" pad="PB5"/>
+              <signal group="PCINT" index="6" pad="PB6"/>
+              <signal group="PCINT" index="7" pad="PB7"/>
+              <signal group="PCINT" index="8" pad="PC0"/>
+              <signal group="PCINT" index="9" pad="PC1"/>
+              <signal group="PCINT" index="10" pad="PC2"/>
+              <signal group="PCINT" index="11" pad="PC3"/>
+              <signal group="PCINT" index="12" pad="PC4"/>
+              <signal group="PCINT" index="13" pad="PC5"/>
+              <signal group="PCINT" index="14" pad="PC6"/>
+              <signal group="PCINT" index="15" pad="PC7"/>
+              <signal group="PCINT" index="16" pad="PD0"/>
+              <signal group="PCINT" index="17" pad="PD1"/>
+              <signal group="PCINT" index="18" pad="PD2"/>
+              <signal group="PCINT" index="19" pad="PD3"/>
+              <signal group="PCINT" index="20" pad="PD4"/>
+              <signal group="PCINT" index="21" pad="PD5"/>
+              <signal group="PCINT" index="22" pad="PD6"/>
+              <signal group="PCINT" index="23" pad="PD7"/>
+              <signal group="PCINT" index="24" pad="PA0"/>
+              <signal group="PCINT" index="25" pad="PA1"/>
+              <signal group="PCINT" index="26" pad="PA2"/>
+              <signal group="PCINT" index="27" pad="PA3"/>
+              <signal group="INT" index="0" pad="PD2"/>
+              <signal group="INT" index="1" pad="PD3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC8">
+          <instance name="TC0" caption="Timer/Counter, 8-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
+            <signals>
+              <signal group="T" pad="PD4"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="V2"/>
+        <param name="NEW_INSTRUCTIONS" value="lpm rd,z+"/>
+      </parameters></instance>
+        </module>
+        <module name="EEPROM">
+          <instance name="EEPROM" caption="EEPROM">
+            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
+        <interrupt index="3" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="4" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
+        <interrupt index="5" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
+        <interrupt index="6" name="PCINT3" caption="Pin Change Interrupt Request 3"/>
+        <interrupt index="7" name="WDT" caption="Watchdog Time-out Interrupt"/>
+        <interrupt index="8" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
+        <interrupt index="9" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
+        <interrupt index="10" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
+        <interrupt index="11" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
+        <interrupt index="12" name="TIMER0_COMPA" caption="TimerCounter0 Compare Match A"/>
+        <interrupt index="13" name="TIMER0_COMPB" caption="TimerCounter0 Compare Match B"/>
+        <interrupt index="14" name="TIMER0_OVF" caption="Timer/Couner0 Overflow"/>
+        <interrupt index="15" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
+        <interrupt index="16" name="ADC" caption="ADC Conversion Complete"/>
+        <interrupt index="17" name="EE_RDY" caption="EEPROM Ready"/>
+        <interrupt index="18" name="ANALOG_COMP" caption="Analog Comparator"/>
+        <interrupt index="19" name="TWI" caption="Two-wire Serial Interface"/>
+      </interrupts>
+      <interfaces>
+        <interface name="ISP" type="isp"/>
+        <interface name="HVPP" type="hvpp"/>
+        <interface name="debugWIRE" type="dw"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="JTAGID" value="0x9311"/>
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x93"/>
+          <property name="SIGNATURE2" value="0x11"/>
+        </property-group>
+        <property-group name="OCD">
+          <property name="OCD_REVISION" value="1"/>
+          <property name="OCD_DATAREG" value="0x31"/>
+          <property name="PROGBASE" value="0x0000"/>
+        </property-group>
+        <property-group name="JTAG_INTERFACE">
+          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="10"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="20"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="ISP_INTERFACE_STK600">
+          <property name="IspEnterProgMode_timeout" value="200"/>
+          <property name="IspEnterProgMode_stabDelay" value="100"/>
+          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
+          <property name="IspEnterProgMode_synchLoops" value="32"/>
+          <property name="IspEnterProgMode_byteDelay" value="0"/>
+          <property name="IspEnterProgMode_pollIndex" value="3"/>
+          <property name="IspEnterProgMode_pollValue" value="0x53"/>
+          <property name="IspLeaveProgMode_preDelay" value="1"/>
+          <property name="IspLeaveProgMode_postDelay" value="1"/>
+          <property name="IspChipErase_eraseDelay" value="45"/>
+          <property name="IspChipErase_pollMethod" value="1"/>
+          <property name="IspProgramFlash_mode" value="0x41"/>
+          <property name="IspProgramFlash_blockSize" value="64"/>
+          <property name="IspProgramFlash_delay" value="6"/>
+          <property name="IspProgramFlash_cmd1" value="0x40"/>
+          <property name="IspProgramFlash_cmd2" value="0x4C"/>
+          <property name="IspProgramFlash_cmd3" value="0x00"/>
+          <property name="IspProgramFlash_pollVal1" value="0x00"/>
+          <property name="IspProgramFlash_pollVal2" value="0x00"/>
+          <property name="IspProgramEeprom_mode" value="0x41"/>
+          <property name="IspProgramEeprom_blockSize" value="4"/>
+          <property name="IspProgramEeprom_delay" value="5"/>
+          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
+          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
+          <property name="IspProgramEeprom_cmd3" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
+          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
+          <property name="IspReadFlash_blockSize" value="256"/>
+          <property name="IspReadEeprom_blockSize" value="256"/>
+          <property name="IspReadFuse_pollIndex" value="4"/>
+          <property name="IspReadLock_pollIndex" value="4"/>
+          <property name="IspReadSign_pollIndex" value="4"/>
+          <property name="IspReadOsccal_pollIndex" value="4"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_STK600">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+        <property-group name="PP_INTERFACE_AVRDRAGON">
+          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x0C 0x01 0x00 0x00 0x00 0x00"/>
+          <property name="PpEnterProgMode_stabDelay" value="100"/>
+          <property name="PpEnterProgMode_progModeDelay" value="0"/>
+          <property name="PpEnterProgMode_latchCycles" value="5"/>
+          <property name="PpEnterProgMode_toggleVtg" value="1"/>
+          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
+          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
+          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
+          <property name="PpLeaveProgMode_stabDelay" value="15"/>
+          <property name="PpLeaveProgMode_resetDelay" value="15"/>
+          <property name="PpChipErase_pulseWidth" value="0"/>
+          <property name="PpChipErase_pollTimeout" value="10"/>
+          <property name="PpProgramFlash_pollTimeout" value="5"/>
+          <property name="PpProgramFlash_mode" value="0x0D"/>
+          <property name="PpProgramFlash_blockSize" value="256"/>
+          <property name="PpReadFlash_blockSize" value="256"/>
+          <property name="PpProgramEeprom_pollTimeout" value="5"/>
+          <property name="PpProgramEeprom_mode" value="0x05"/>
+          <property name="PpProgramEeprom_blockSize" value="256"/>
+          <property name="PpReadEeprom_blockSize" value="256"/>
+          <property name="PpProgramFuse_pulseWidth" value="0"/>
+          <property name="PpProgramFuse_pollTimeout" value="5"/>
+          <property name="PpProgramLock_pulseWidth" value="0"/>
+          <property name="PpProgramLock_pollTimeout" value="5"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
+          <bitfield caption="Self Programming enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xDF">
+          <bitfield caption="Reset Disabled (Enable PC6 as i/o pin)" mask="0x80" name="RSTDISBL"/>
+          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
+          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
+          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
+          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
+          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
+        </register>
+        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
+          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
+          <bitfield caption="Clock output on PORTB0" mask="0x40" name="CKOUT"/>
+          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_SUT_CKSEL">
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="EXTCLK_6CK_14CK_0MS" value="0x0C"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="EXTCLK_6CK_14CK_4MS1" value="0x1C"/>
+        <value caption="Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="EXTCLK_6CK_14CK_65MS" value="0x2C"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_8MHZ_6CK_14CK_0MS" value="0x0E"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_8MHZ_6CK_14CK_4MS1" value="0x1E"/>
+        <value caption="Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; default value" name="INTRCOSC_8MHZ_6CK_14CK_65MS_DEFAULT" value="0x2E"/>
+        <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_14CK_0MS" value="0x0F"/>
+        <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms" name="INTRCOSC_128KHZ_6CK_14CK_4MS1" value="0x1F"/>
+        <value caption="Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms" name="INTRCOSC_128KHZ_6CK_14CK_65MS" value="0x2F"/>
+      </value-group>
+      <value-group caption="" name="ENUM_BODLEVEL">
+        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
+        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
+        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
+        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC1">
+        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
+          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
+          <bitfield caption="Timer/Counter1 Output CompareB Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
+          <bitfield caption="Timer/Counter1 Output CompareA Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
+        </register>
+        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
+          <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
+          <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
+          <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
+          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
+          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
+          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
+          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
+          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
+          <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter1 Control Register C" name="TCCR1C" offset="0x82" size="1" ocd-rw="">
+          <bitfield caption="" mask="0x80" name="FOC1A"/>
+          <bitfield caption="" mask="0x40" name="FOC1B"/>
+        </register>
+        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Output Compare Register  Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
+        <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
+        <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTD">
+        <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
+        <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
+        <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTC">
+        <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
+        <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
+        <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
+      </register-group>
+      <register-group caption="I/O Port" name="PORTA">
+        <register caption="Port A Data Register" name="PORTA" offset="0x2E" size="1" mask="0x0F" ocd-rw="R"/>
+        <register caption="Port A Data Direction Register" name="DDRA" offset="0x2D" size="1" mask="0x0F" ocd-rw="R"/>
+        <register caption="Port A Input Pins" name="PINA" offset="0x2C" size="1" mask="0x0F" ocd-rw="R"/>
+      </register-group>
+    </module>
+    <module caption="Serial Peripheral Interface" name="SPI">
+      <register-group caption="Serial Peripheral Interface" name="SPI">
+        <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
+        <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
+          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
+          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
+          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
+        </register>
+        <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
+          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
+          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
+          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
+          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
+          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
+          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
+          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_SCK_RATE_3BIT">
+        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
+        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
+        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
+        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
+        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
+        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
+        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
+        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
+          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+    <module caption="Two Wire Serial Interface" name="TWI">
+      <register-group caption="Two Wire Serial Interface" name="TWI">
+        <register caption="TWHSR" name="TWHSR" offset="0xBE" size="1">
+          <bitfield caption="" mask="0x01" name="TWHS"/>
+        </register>
+        <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
+          <bitfield caption="" mask="0xFE" name="TWAM"/>
+        </register>
+        <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
+        <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1">
+          <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
+          <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
+          <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
+          <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
+          <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
+          <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
+          <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
+        </register>
+        <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
+          <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
+          <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
+        </register>
+        <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
+        <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
+          <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
+          <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="COMM_TWI_PRESACLE">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="4" name="VAL_0x01" value="0x01"/>
+        <value caption="16" name="VAL_0x02" value="0x02"/>
+        <value caption="64" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog-to-Digital Converter" name="ADC">
+      <register-group caption="Analog-to-Digital Converter" name="ADC">
+        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
+          <bitfield caption="Reference Selection Bit 0" mask="0x40" name="REFS0" values="ANALOG_ADC_V_REF7"/>
+          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
+          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
+        </register>
+        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
+        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1">
+          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
+          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
+          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
+          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
+          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
+          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
+        </register>
+        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
+          <bitfield caption="" mask="0x40" name="ACME"/>
+          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
+        </register>
+        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
+          <bitfield caption="" mask="0x02" name="AIN1D"/>
+          <bitfield caption="" mask="0x01" name="AIN0D"/>
+        </register>
+        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x7E" size="1">
+          <bitfield caption="" mask="0x80" name="ADC7D"/>
+          <bitfield caption="" mask="0x40" name="ADC6D"/>
+          <bitfield caption="" mask="0x20" name="ADC5D"/>
+          <bitfield caption="" mask="0x10" name="ADC4D"/>
+          <bitfield caption="" mask="0x08" name="ADC3D"/>
+          <bitfield caption="" mask="0x04" name="ADC2D"/>
+          <bitfield caption="" mask="0x02" name="ADC1D"/>
+          <bitfield caption="" mask="0x01" name="ADC0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_ADC_V_REF7">
+        <value caption="Internal 1.1V Voltage Reference" name="VAL_0x00" value="0x00"/>
+        <value caption="AVcc Reference" name="VAL_0x01" value="0x01"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_PRESCALER">
+        <value caption="2" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
+        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
+        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
+        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
+        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
+        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
+        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
+        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
+        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register" name="EICRA" offset="0x69" size="1">
+          <bitfield caption="External Interrupt Sense Control 1 Bits" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL2"/>
+          <bitfield caption="External Interrupt Sense Control 0 Bits" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL2"/>
+        </register>
+        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
+          <bitfield caption="External Interrupt Request 1 Enable" mask="0x03" name="INT"/>
+        </register>
+        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
+          <bitfield caption="External Interrupt Flags" mask="0x03" name="INTF"/>
+        </register>
+        <register caption="" name="PCICR" offset="0x68" size="1">
+          <bitfield caption="" mask="0x0F" name="PCIE"/>
+        </register>
+        <register caption="Pin Change Mask Register 3" name="PCMSK3" offset="0x6A" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT" lsb="24"/>
+        </register>
+        <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="16"/>
+        </register>
+        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT" lsb="8"/>
+        </register>
+        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0xFF" name="PCINT"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
+          <bitfield caption="Pin Change Interrupt Flags" mask="0x0F" name="PCIF"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="INTERRUPT_SENSE_CONTROL2">
+        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
+        <value caption="Any Logical Change in INTX" name="VAL_0x01" value="0x01"/>
+        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
+        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Timer/Counter, 8-bit" name="TC8">
+      <register-group caption="Timer/Counter, 8-bit" name="TC0">
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
+        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x45" size="1">
+          <bitfield caption="Clear Timer on Compare Match" mask="0x08" name="CTC0"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
+          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
+          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Power Reduction Register" name="PRR" offset="0x64" size="1" ocd-rw="R">
+          <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
+          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
+          <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
+          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF" ocd-rw="R">
+          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPR" offset="0x61" size="1" ocd-rw="R">
+          <bitfield caption="Clock Prescaler Change Enable" mask="0x80" name="CLKPCE"/>
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Stack Pointer Low" name="SPL" offset="0x5D" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer High" name="SPH" offset="0x5E" size="1" mask="0x03"/>
+        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
+          <bitfield caption="Read-While-Write Section Busy" mask="0x40" name="RWWSB"/>
+          <bitfield caption="Clear Temporary Page Buffer" mask="0x10" name="CTPB"/>
+          <bitfield caption="Read Fuse and Lock Bits" mask="0x08" name="RFLB"/>
+          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
+          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
+          <bitfield caption="Self Programming Enable" mask="0x01" name="SELFPRGEN"/>
+        </register>
+        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
+          <bitfield caption="BOD Sleep" mask="0x40" name="BODS"/>
+          <bitfield caption="BOD Sleep Enable" mask="0x20" name="BODSE"/>
+          <bitfield caption="Pull-up Disable" mask="0x10" name="PUD"/>
+        </register>
+        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
+          <bitfield caption="Sleep Mode" mask="0x06" name="SM" values="CPU_SLEEP_MODE_3BITS2"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="General Purpose I/O Register 2" name="GPIOR2" offset="0x4B" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 1" name="GPIOR1" offset="0x4A" size="1" mask="0xFF"/>
+        <register caption="General Purpose I/O Register 0" name="GPIOR0" offset="0x3E" size="1" mask="0xFF"/>
+        <register caption="Port Configuration Register" name="PORTCR" offset="0x32" size="1" ocd-rw="R">
+          <bitfield caption="" mask="0x80" name="BBMD"/>
+          <bitfield caption="" mask="0x40" name="BBMC"/>
+          <bitfield caption="" mask="0x20" name="BBMB"/>
+          <bitfield caption="" mask="0x10" name="BBMA"/>
+          <bitfield caption="" mask="0x08" name="PUDD"/>
+          <bitfield caption="" mask="0x04" name="PUDC"/>
+          <bitfield caption="" mask="0x02" name="PUDB"/>
+          <bitfield caption="" mask="0x01" name="PUDA"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="" name="CPU_SLEEP_MODE_3BITS2">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Power Save" name="PSAVE" value="0x03"/>
+        <value caption="Reserved" name="VAL_0x04" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
+        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
+      </value-group>
+      
+    </module>
+    <module caption="EEPROM" name="EEPROM">
+      <register-group caption="EEPROM" name="EEPROM">
+        <register caption="EEPROM Address Register Low Byte" name="EEARL" offset="0x41" size="1" mask="0x3F"/>
+        <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
+        <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
+          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
+          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
+          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
+          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
+          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="EEP_MODE">
+        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
+        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
+        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="TQFP32_QFN32">
+      <pin pad="PD3" position="1"/>
+      <pin pad="PD4" position="2"/>
+      <pin pad="PA2" position="3"/>
+      <pin pad="VCC" position="4"/>
+      <pin pad="GND" position="5"/>
+      <pin pad="PA3" position="6"/>
+      <pin pad="PB6" position="7"/>
+      <pin pad="PB7" position="8"/>
+      <pin pad="PD5" position="9"/>
+      <pin pad="PD6" position="10"/>
+      <pin pad="PD7" position="11"/>
+      <pin pad="PB0" position="12"/>
+      <pin pad="PB1" position="13"/>
+      <pin pad="PB2" position="14"/>
+      <pin pad="PB3" position="15"/>
+      <pin pad="PB4" position="16"/>
+      <pin pad="PB5" position="17"/>
+      <pin pad="AVCC" position="18"/>
+      <pin pad="PA0" position="19"/>
+      <pin pad="PC7" position="20"/>
+      <pin pad="GND" position="21"/>
+      <pin pad="PA1" position="22"/>
+      <pin pad="PC0" position="23"/>
+      <pin pad="PC1" position="24"/>
+      <pin pad="PC2" position="25"/>
+      <pin pad="PC3" position="26"/>
+      <pin pad="PC4" position="27"/>
+      <pin pad="PC5" position="28"/>
+      <pin pad="PC6" position="29"/>
+      <pin pad="PD0" position="30"/>
+      <pin pad="PD1" position="31"/>
+      <pin pad="PD2" position="32"/>
+    </pinout>
+    <pinout name="PDIP">
+      <pin pad="PC6" position="1"/>
+      <pin pad="PD0" position="2"/>
+      <pin pad="PD1" position="3"/>
+      <pin pad="PD2" position="4"/>
+      <pin pad="PD3" position="5"/>
+      <pin pad="PD4" position="6"/>
+      <pin pad="VCC" position="7"/>
+      <pin pad="GND" position="8"/>
+      <pin pad="PB6" position="9"/>
+      <pin pad="PB7" position="10"/>
+      <pin pad="PD5" position="11"/>
+      <pin pad="PD6" position="12"/>
+      <pin pad="PD7" position="13"/>
+      <pin pad="PB0" position="14"/>
+      <pin pad="PB1" position="15"/>
+      <pin pad="PB2" position="16"/>
+      <pin pad="PB3" position="17"/>
+      <pin pad="PB4" position="18"/>
+      <pin pad="PB5" position="19"/>
+      <pin pad="AVCC" position="20"/>
+      <pin pad="PC7" position="21"/>
+      <pin pad="GND" position="22"/>
+      <pin pad="PC0" position="23"/>
+      <pin pad="PC1" position="24"/>
+      <pin pad="PC2" position="25"/>
+      <pin pad="PC3" position="26"/>
+      <pin pad="PC4" position="27"/>
+      <pin pad="PC5" position="28"/>
+    </pinout>
+    <pinout name="QFN28">
+      <pin pad="PD3" position="1"/>
+      <pin pad="PD4" position="2"/>
+      <pin pad="VCC" position="3"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB6" position="5"/>
+      <pin pad="PB7" position="6"/>
+      <pin pad="PD5" position="7"/>
+      <pin pad="PD6" position="8"/>
+      <pin pad="PD7" position="9"/>
+      <pin pad="PB0" position="10"/>
+      <pin pad="PB1" position="11"/>
+      <pin pad="PB2" position="12"/>
+      <pin pad="PB3" position="13"/>
+      <pin pad="PB4" position="14"/>
+      <pin pad="PB5" position="15"/>
+      <pin pad="AVCC" position="16"/>
+      <pin pad="PC7" position="17"/>
+      <pin pad="GND" position="18"/>
+      <pin pad="PC0" position="19"/>
+      <pin pad="PC1" position="20"/>
+      <pin pad="PC2" position="21"/>
+      <pin pad="PC3" position="22"/>
+      <pin pad="PC4" position="23"/>
+      <pin pad="PC5" position="24"/>
+      <pin pad="PC6" position="25"/>
+      <pin pad="PD0" position="26"/>
+      <pin pad="PD1" position="27"/>
+      <pin pad="PD2" position="28"/>
+    </pinout>
+    <pinout name="UFBGA">
+      <pin pad="PD2" position="A1"/>
+      <pin pad="PD3" position="B1"/>
+      <pin pad="GND" position="C1"/>
+      <pin pad="VCC" position="D1"/>
+      <pin pad="PB6" position="E1"/>
+      <pin pad="PB7" position="F1"/>
+      <pin pad="PD1" position="A2"/>
+      <pin pad="PD4" position="B2"/>
+      <pin pad="PA2" position="C2"/>
+      <pin pad="PA3" position="D2"/>
+      <pin pad="PD6" position="E2"/>
+      <pin pad="PD5" position="F2"/>
+      <pin pad="PC6" position="A3"/>
+      <pin pad="PD0" position="B3"/>
+      <pin pad="PB0" position="E3"/>
+      <pin pad="PD7" position="F3"/>
+      <pin pad="PC4" position="A4"/>
+      <pin pad="PC5" position="B4"/>
+      <pin pad="PB2" position="E4"/>
+      <pin pad="PB1" position="F4"/>
+      <pin pad="PC2" position="A5"/>
+      <pin pad="PC3" position="B5"/>
+      <pin pad="PA1" position="C5"/>
+      <pin pad="PC7" position="D5"/>
+      <pin pad="AVCC" position="E5"/>
+      <pin pad="PB3" position="F5"/>
+      <pin pad="PC1" position="A6"/>
+      <pin pad="PC0" position="B6"/>
+      <pin pad="GND" position="C6"/>
+      <pin pad="PA0" position="D6"/>
+      <pin pad="PB5" position="E6"/>
+      <pin pad="PB4" position="F6"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY9.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY9.xml
new file mode 100644
index 00000000..b1a04597
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/TINY/ATTINY9.xml
@@ -0,0 +1,360 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+  <variants>
+    <variant ordercode="ATtiny9-TSHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+    <variant ordercode="ATtiny9-MAHR" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="UDFN8" pinout="UDFN8"/>
+    <variant ordercode="ATtiny9-TS8R" speedmax="10000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5" package="SOT23-6" pinout="SOT23_6"/>
+  </variants>
+  <devices>
+    <device name="ATtiny9" architecture="AVR8L" family="tinyAVR">
+      <address-spaces>
+        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x0400">
+          <memory-segment start="0x0000" size="0x0400" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
+        </address-space>
+        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
+          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+        </address-space>
+        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="fuses" rw="RW" exec="0" name="FUSES"/>
+        </address-space>
+        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
+          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+        </address-space>
+        <address-space size="0x4400" start="0x0000" endianness="little" name="data" id="data">
+          <memory-segment type="io" size="0x40" start="0x0000" name="IO"/>
+          <memory-segment type="ram" size="0x20" start="0x0040" name="SRAM"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F00" name="MAPPED_NVM_LOCK_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F40" name="MAPPED_CONFIGURATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0002" start="0x3F80" name="MAPPED_CALIBRATION_BITS"/>
+          <memory-segment type="sysreg" size="0x0004" start="0x3FC0" name="MAPPED_DEVICE_ID_BITS"/>
+          <memory-segment type="flash" start="0x4000" name="MAPPED_FLASH" size="0x0400"/>
+        </address-space>
+      </address-spaces>
+      <peripherals>
+        <module name="AC">
+          <instance name="AC" caption="Analog Comparator">
+            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
+            <signals>
+              <signal group="AIN" index="0" pad="PB0" function="default"/>
+              <signal group="AIN" index="1" pad="PB1" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="CPU">
+          <instance name="CPU" caption="CPU Registers">
+            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
+          <parameters>
+        <param name="CORE_VERSION" value="AVR8L_0"/>
+      </parameters></instance>
+        </module>
+        <module name="PORT">
+          <instance name="PORTB" caption="I/O Port">
+            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
+            <signals>
+              <signal group="P" function="default" pad="PB0" index="0"/>
+              <signal group="P" function="default" pad="PB1" index="1"/>
+              <signal group="P" function="default" pad="PB2" index="2"/>
+              <signal group="P" function="default" pad="PB3" index="3"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="EXINT">
+          <instance name="EXINT" caption="External Interrupts">
+            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
+            <signals>
+              <signal group="PCINT" index="0" pad="PB0" function="default"/>
+              <signal group="PCINT" index="1" pad="PB1" function="default"/>
+              <signal group="PCINT" index="2" pad="PB2" function="default"/>
+              <signal group="PCINT" index="3" pad="PB3" function="default"/>
+              <signal group="INT" index="0" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="TC16">
+          <instance name="TC0" caption="Timer/Counter, 16-bit">
+            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
+            <signals>
+              <signal group="OCA" pad="PB0" function="default"/>
+              <signal group="OCB" pad="PB1" function="default"/>
+              <signal group="T" pad="PB2" function="default"/>
+            </signals>
+          </instance>
+        </module>
+        <module name="WDT">
+          <instance name="WDT" caption="Watchdog Timer">
+            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
+          </instance>
+        </module>
+        <module name="FUSE">
+          <instance name="FUSE" caption="Fuses">
+            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
+          </instance>
+        </module>
+        <module name="LOCKBIT">
+          <instance name="LOCKBIT" caption="Lockbits">
+            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
+          </instance>
+        </module>
+      </peripherals>
+
+
+      <interrupts>
+        <interrupt index="0" name="RESET" caption="External Reset, Power-on Reset and Watchdog Reset"/>
+        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
+        <interrupt index="2" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
+        <interrupt index="3" name="TIM0_CAPT" caption="Timer/Counter0 Input Capture"/>
+        <interrupt index="4" name="TIM0_OVF" caption="Timer/Counter0 Overflow"/>
+        <interrupt index="5" name="TIM0_COMPA" caption="Timer/Counter Compare Match A"/>
+        <interrupt index="6" name="TIM0_COMPB" caption="Timer/Counter Compare Match B"/>
+        <interrupt index="7" name="ANA_COMP" caption="Analog Comparator"/>
+        <interrupt index="8" name="WDT" caption="Watchdog Time-out"/>
+        <interrupt index="9" name="VLM" caption="Vcc Voltage Level Monitor"/>
+      </interrupts>
+      <interfaces>
+        <interface name="TPI" type="tpi"/>
+      </interfaces>
+      <property-groups>
+        <property-group name="SIGNATURES">
+          <property name="SIGNATURE0" value="0x1e"/>
+          <property name="SIGNATURE1" value="0x90"/>
+          <property name="SIGNATURE2" value="0x08"/>
+        </property-group>
+      </property-groups>
+    </device>
+  </devices>
+  <modules>
+    <module caption="Fuses" name="FUSE">
+      <register-group caption="Fuses" name="FUSE">
+        <register caption="" name="BYTE0" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Output external clock" mask="0x04" name="CKOUT"/>
+          <bitfield caption="Watch dog timer always on" mask="0x02" name="WDTON"/>
+          <bitfield caption="Disable external reset" mask="0x01" name="RSTDISBL"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Lockbits" name="LOCKBIT">
+      <register-group caption="Lockbits" name="LOCKBIT">
+        <register caption="" name="LOCKBIT" offset="0x00" size="1" initval="0xFF">
+          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ENUM_LB">
+        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
+        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
+        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="Analog Comparator" name="AC">
+      <register-group caption="Analog Comparator" name="AC">
+        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x1F" size="1">
+          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
+          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
+          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
+          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
+          <bitfield caption="Analog Comparator Input Capture  Enable" mask="0x04" name="ACIC"/>
+          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
+        </register>
+        <register caption="" name="DIDR0" offset="0x17" size="1">
+          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
+          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
+        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
+        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
+        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
+        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
+      </value-group>
+    </module>
+    <module caption="CPU Registers" name="CPU">
+      <register-group caption="CPU Registers" name="CPU">
+        <register caption="Configuration Change Protection" name="CCP" offset="0x3C" size="1" mask="0xFF"/>
+        <register caption="Stack Pointer " name="SP" offset="0x3D" size="2" mask="0xFFFF"/>
+        <register caption="Status Register" name="SREG" offset="0x3F" size="1">
+          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
+          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
+          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
+          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+        </register>
+        <register caption="Clock Main Settings Register" name="CLKMSR" offset="0x37" size="1">
+          <bitfield caption="Clock Main Select Bits" mask="0x03" name="CLKMS"/>
+        </register>
+        <register caption="Clock Prescale Register" name="CLKPSR" offset="0x36" size="1">
+          <bitfield caption="Clock Prescaler Select Bits" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
+        </register>
+        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x39" size="1" mask="0xFF"/>
+        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x3A" size="1">
+          <bitfield caption="Sleep Mode Select Bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
+          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
+        </register>
+        <register caption="Power Reduction Register" name="PRR" offset="0x35" size="1">
+          <bitfield caption="Power Reduction ADC" mask="0x02" name="PRADC"/>
+          <bitfield caption="Power Reduction Timer/Counter0" mask="0x01" name="PRTIM0"/>
+        </register>
+        <register caption="Vcc Level Monitoring Control and Status Register" name="VLMCSR" offset="0x34" size="1">
+          <bitfield caption="VLM Flag" mask="0x80" name="VLMF"/>
+          <bitfield caption="VLM Interrupt Enable" mask="0x40" name="VLMIE"/>
+          <bitfield caption="Trigger Level of Voltage Level Monitor bits" mask="0x07" name="VLM"/>
+        </register>
+        <register caption="Reset Flag Register" name="RSTFLR" offset="0x3B" size="1">
+          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+          <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+        </register>
+        <register caption="Non-Volatile Memory Control and Status Register" name="NVMCSR" offset="0x32" size="1">
+          <bitfield caption="Non-Volatile Memory Busy" mask="0x80" name="NVMBSY"/>
+        </register>
+        <register caption="Non-Volatile Memory Command" name="NVMCMD" offset="0x33" size="1" mask="0x3F"/>
+      </register-group>
+      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
+        <value caption="1" name="VAL_0x00" value="0x00"/>
+        <value caption="2" name="VAL_0x01" value="0x01"/>
+        <value caption="4" name="VAL_0x02" value="0x02"/>
+        <value caption="8" name="VAL_0x03" value="0x03"/>
+        <value caption="16" name="VAL_0x04" value="0x04"/>
+        <value caption="32" name="VAL_0x05" value="0x05"/>
+        <value caption="64" name="VAL_0x06" value="0x06"/>
+        <value caption="128" name="VAL_0x07" value="0x07"/>
+        <value caption="256" name="VAL_0x08" value="0x08"/>
+      </value-group>
+      <value-group caption="Sleep Mode" name="CPU_SLEEP_MODE_3BITS">
+        <value caption="Idle" name="IDLE" value="0x00"/>
+        <value caption="ADC Noise Reduction" name="ADC" value="0x01"/>
+        <value caption="Power Down" name="PDOWN" value="0x02"/>
+        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
+        <value caption="Standby" name="STDBY" value="0x04"/>
+        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
+        <value caption="Reserved" name="VAL_0x06" value="0x06"/>
+        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
+      </value-group>
+      
+    </module>
+    <module caption="I/O Port" name="PORT">
+      <register-group caption="I/O Port" name="PORTB">
+        <register caption="Port Control Register" name="PORTCR" offset="0x0C" size="1">
+          <bitfield caption="Break-Before-Make Mode Enable" mask="0x02" name="BBMB"/>
+        </register>
+        <register caption="Pull-up Enable Control Register" name="PUEB" offset="0x03" size="1" mask="0x0F"/>
+        <register caption="Data Direction Register, Port B" name="DDRB" offset="0x01" size="1" mask="0x0F"/>
+        <register caption="Port B Data register" name="PINB" offset="0x00" size="1" mask="0x0F"/>
+        <register caption="Input Pins, Port B" name="PORTB" offset="0x02" size="1" mask="0x0F"/>
+      </register-group>
+    </module>
+    <module caption="External Interrupts" name="EXINT">
+      <register-group caption="External Interrupts" name="EXINT">
+        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x15" size="1">
+          <bitfield caption="Interrupt Sense Control 0 Bit 1" mask="0x02" name="ISC01"/>
+          <bitfield caption="Interrupt Sense Control 0 Bit 0" mask="0x01" name="ISC00"/>
+        </register>
+        <register caption="External Interrupt Mask register" name="EIMSK" offset="0x13" size="1">
+          <bitfield caption="External Interrupt Request 0 Enable" mask="0x01" name="INT0"/>
+        </register>
+        <register caption="External Interrupt Flag register" name="EIFR" offset="0x14" size="1">
+          <bitfield caption="External Interrupt Flag 0" mask="0x01" name="INTF0"/>
+        </register>
+        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x12" size="1">
+          <bitfield caption="Pin Change Interrupt Enable 0" mask="0x01" name="PCIE0"/>
+        </register>
+        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x11" size="1">
+          <bitfield caption="Pin Change Interrupt Flag 0" mask="0x01" name="PCIF0"/>
+        </register>
+        <register caption="Pin Change Mask Register" name="PCMSK" offset="0x10" size="1">
+          <bitfield caption="Pin Change Enable Masks" mask="0x0F" name="PCINT"/>
+        </register>
+      </register-group>
+    </module>
+    <module caption="Timer/Counter, 16-bit" name="TC16">
+      <register-group caption="Timer/Counter, 16-bit" name="TC0">
+        <register caption="Timer/Counter 0 Control Register A" name="TCCR0A" offset="0x2E" size="1">
+          <bitfield caption="Compare Output Mode for Channel A bits" mask="0xC0" name="COM0A"/>
+          <bitfield caption="Compare Output Mode for Channel B bits" mask="0x30" name="COM0B"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register B" name="TCCR0B" offset="0x2D" size="1">
+          <bitfield caption="Input Capture Noise Canceler" mask="0x80" name="ICNC0"/>
+          <bitfield caption="Input Capture Edge Select" mask="0x40" name="ICES0"/>
+          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM0" lsb="2"/>
+          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
+        </register>
+        <register caption="Timer/Counter 0 Control Register C" name="TCCR0C" offset="0x2C" size="1">
+          <bitfield caption="Force Output Compare for Channel A" mask="0x80" name="FOC0A"/>
+          <bitfield caption="Force Output Compare for Channel B" mask="0x40" name="FOC0B"/>
+        </register>
+        <register caption="Timer/Counter0 " name="TCNT0" offset="0x28" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter 0 Output Compare Register A " name="OCR0A" offset="0x26" size="2" mask="0xFFFF"/>
+        <register caption="Timer/Counter0 Output Compare Register B " name="OCR0B" offset="0x24" size="2" mask="0xFFFF"/>
+        <register caption="Input Capture Register  Bytes" name="ICR0" offset="0x22" size="2" mask="0xFFFF"/>
+        <register caption="Timer Interrupt Mask Register 0" name="TIMSK0" offset="0x2B" size="1">
+          <bitfield caption="Input Capture Interrupt Enable" mask="0x20" name="ICIE0"/>
+          <bitfield caption="Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE0B"/>
+          <bitfield caption="Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE0A"/>
+          <bitfield caption="Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
+        </register>
+        <register caption="Overflow Interrupt Enable" name="TIFR0" offset="0x2A" size="1">
+          <bitfield caption="Input Capture Flag" mask="0x20" name="ICF0"/>
+          <bitfield caption="Timer Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
+          <bitfield caption="Timer Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
+          <bitfield caption="Timer Overflow Flag" mask="0x01" name="TOV0"/>
+        </register>
+        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x2F" size="1">
+          <bitfield caption="Timer Synchronization Mode" mask="0x80" name="TSM"/>
+          <bitfield caption="Prescaler Reset" mask="0x01" name="PSR"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="CLK_SEL_3BIT_EXT">
+        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
+        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
+        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
+        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
+        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
+        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
+        <value caption="Running, ExtClk Tn Falling Edge" name="VAL_0x06" value="0x06"/>
+        <value caption="Running, ExtClk Tn Rising Edge" name="VAL_0x07" value="0x07"/>
+      </value-group>
+    </module>
+    <module caption="Watchdog Timer" name="WDT">
+      <register-group caption="Watchdog Timer" name="WDT">
+        <register caption="Watchdog Timer Control and Status Register" name="WDTCSR" offset="0x31" size="1">
+          <bitfield caption="Watchdog Timer Interrupt Flag" mask="0x80" name="WDIF"/>
+          <bitfield caption="Watchdog Timer Interrupt Enable" mask="0x40" name="WDIE"/>
+          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
+          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
+        </register>
+      </register-group>
+      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
+        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
+        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
+        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
+        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
+        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
+        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
+        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
+        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
+        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
+        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
+      </value-group>
+    </module>
+  </modules>
+  <pinouts>
+    <pinout name="SOT23_6">
+      <pin pad="PB0" position="1"/>
+      <pin pad="GND" position="2"/>
+      <pin pad="PB1" position="3"/>
+      <pin pad="PB2" position="4"/>
+      <pin pad="VCC" position="5"/>
+      <pin pad="PB3" position="6"/>
+    </pinout>
+    <pinout name="UDFN8">
+      <pin pad="PB1" position="1"/>
+      <pin pad="GND" position="4"/>
+      <pin pad="PB0" position="5"/>
+      <pin pad="PB3" position="6"/>
+      <pin pad="VCC" position="7"/>
+      <pin pad="PB2" position="8"/>
+    </pinout>
+  </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml
new file mode 100644
index 00000000..cc9e354d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1.xml
@@ -0,0 +1,2800 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA128A1-AU" package="TQFP100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A1-CU" package="CBGA100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128A1" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x22000" endianness="little">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
+                    <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x000800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x002000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                    <memory-segment start="0x4000" size="0xFFBFFF" type="ram" rw="RW" exec="0" name="EXTERNAL_SRAM"
+                                    external="true"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="1" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x34" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076-revH">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                    </instance>
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="EBI" id="I3001">
+                    <instance name="EBI">
+                        <register-group address-space="data" offset="0x0440" name-in-module="EBI" name="EBI"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWID">
+                        <register-group address-space="data" offset="0x490" name-in-module="TWI" name="TWID"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                    <instance name="TWIF">
+                        <register-group address-space="data" offset="0x4B0" name-in-module="TWI" name="TWIF"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTH">
+                        <register-group address-space="data" offset="0x06E0" name-in-module="PORT" name="PORTH"/>
+                    </instance>
+                    <instance name="PORTJ">
+                        <register-group address-space="data" offset="0x0700" name-in-module="PORT" name="PORTJ"/>
+                    </instance>
+                    <instance name="PORTK">
+                        <register-group address-space="data" offset="0x0720" name-in-module="PORT" name="PORTK"/>
+                    </instance>
+                    <instance name="PORTQ">
+                        <register-group address-space="data" offset="0x07C0" name-in-module="PORT" name="PORTQ"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="TCF1">
+                        <register-group address-space="data" offset="0xB40" name-in-module="TC1" name="TCF1"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="75" module-instance="TWID" name-in-module="TWI"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="94" module-instance="PORTQ" name-in-module="PORT"/>
+                <interrupt-group index="96" module-instance="PORTH" name-in-module="PORT"/>
+                <interrupt-group index="98" module-instance="PORTJ" name-in-module="PORT"/>
+                <interrupt-group index="100" module-instance="PORTK" name-in-module="PORT"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="106" module-instance="TWIF" name-in-module="TWI"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="114" module-instance="TCF1" name-in-module="TC1"/>
+                <interrupt-group index="118" module-instance="SPIF" name-in-module="SPI"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="122" module-instance="USARTF1" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974C03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x4C"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="External Bus Interface" mask="0x08" name="EBI"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076-revH" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EBI" id="I3001" caption="External Bus Interface">
+            <register-group caption="EBI Chip Select Module" name="EBI_CS" size="4">
+                <register caption="Chip Select Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Address Size" mask="0x7C" name="ASIZE" values="EBI_CS_ASIZE"/>
+                    <bitfield caption="Memory Mode" mask="0x03" name="MODE" values="EBI_CS_MODE"/>
+                </register>
+                <register caption="Chip Select Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="SRAM Wait State Cycles" mask="0x07" name="SRWS" values="EBI_CS_SRWS"/>
+                    <bitfield caption="SDRAM Initialization Done" mask="0x80" name="SDINITDONE"/>
+                    <bitfield caption="SDRAM Self-refresh Enable" mask="0x04" name="SDSREN"/>
+                    <bitfield caption="SDRAM Mode" mask="0x03" name="SDMODE" values="EBI_CS_SDMODE"/>
+                </register>
+                <register caption="Base Address" name="BASEADDR" offset="0x02" size="2">
+                    <bitfield caption="Chip Select Base Address" mask="0xFFF0" name="BASEADDR"/>
+                </register>
+            </register-group>
+            <register-group caption="External Bus Interface" name="EBI" size="32">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDRAM Data Width Setting" mask="0xC0" name="SDDATAW" values="EBI_SDDATAW"/>
+                    <bitfield caption="SRAM LPC Mode" mask="0x30" name="LPCMODE" values="EBI_LPCMODE"/>
+                    <bitfield caption="SRAM Mode" mask="0x0C" name="SRMODE" values="EBI_SRMODE"/>
+                    <bitfield caption="Interface Mode" mask="0x03" name="IFMODE" values="EBI_IFMODE"/>
+                </register>
+                <register caption="SDRAM Control Register A" name="SDRAMCTRLA" offset="0x01" size="1">
+                    <bitfield caption="SDRAM CAS Latency Setting" mask="0x08" name="SDCAS"/>
+                    <bitfield caption="SDRAM ROW Bits Setting" mask="0x04" name="SDROW"/>
+                    <bitfield caption="SDRAM Column Bits Setting" mask="0x03" name="SDCOL" values="EBI_SDCOL"/>
+                </register>
+                <register caption="SDRAM Refresh Period" name="REFRESH" offset="0x04" size="2"/>
+                <register caption="SDRAM Initialization Delay" name="INITDLY" offset="0x06" size="2"/>
+                <register caption="SDRAM Control Register B" name="SDRAMCTRLB" offset="0x08" size="1">
+                    <bitfield caption="SDRAM Mode Register Delay" mask="0xC0" name="MRDLY" values="EBI_MRDLY"/>
+                    <bitfield caption="SDRAM Row Cycle Delay" mask="0x38" name="ROWCYCDLY" values="EBI_ROWCYCDLY"/>
+                    <bitfield caption="SDRAM Row-to-Precharge Delay" mask="0x07" name="RPDLY" values="EBI_RPDLY"/>
+                </register>
+                <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
+                    <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
+                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
+                </register>
+                <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 1" name="CS1" offset="0x14" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 2" name="CS2" offset="0x18" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 3" name="CS3" offset="0x1C" name-in-module="EBI_CS"/>
+            </register-group>
+            <value-group caption="Chip Select address size" name="EBI_CS_ASIZE">
+                <value caption="256 bytes" name="256B" value="0x00"/>
+                <value caption="512 bytes" name="512B" value="0x01"/>
+                <value caption="1K bytes" name="1KB" value="0x02"/>
+                <value caption="2K bytes" name="2KB" value="0x03"/>
+                <value caption="4K bytes" name="4KB" value="0x04"/>
+                <value caption="8K bytes" name="8KB" value="0x05"/>
+                <value caption="16K bytes" name="16KB" value="0x06"/>
+                <value caption="32K bytes" name="32KB" value="0x07"/>
+                <value caption="64K bytes" name="64KB" value="0x08"/>
+                <value caption="128K bytes" name="128KB" value="0x09"/>
+                <value caption="256K bytes" name="256KB" value="0x0A"/>
+                <value caption="512K bytes" name="512KB" value="0x0B"/>
+                <value caption="1M bytes" name="1MB" value="0x0C"/>
+                <value caption="2M bytes" name="2MB" value="0x0D"/>
+                <value caption="4M bytes" name="4MB" value="0x0E"/>
+                <value caption="8M bytes" name="8MB" value="0x0F"/>
+                <value caption="16M bytes" name="16M" value="0x10"/>
+            </value-group>
+            <value-group caption="SRAM Wait State Selection" name="EBI_CS_SRWS">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Chip Select address mode" name="EBI_CS_MODE">
+                <value caption="Chip Select Disabled" name="DISABLED" value="0x00"/>
+                <value caption="Chip Select in SRAM mode" name="SRAM" value="0x01"/>
+                <value caption="Chip Select in SRAM LPC mode" name="LPC" value="0x02"/>
+                <value caption="Chip Select in SDRAM mode" name="SDRAM" value="0x03"/>
+            </value-group>
+            <value-group caption="Chip Select SDRAM mode" name="EBI_CS_SDMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x00"/>
+                <value caption="Load Mode Register command mode" name="LOAD" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDDATAW">
+                <value caption="4-bit data bus" name="4BIT" value="0x00"/>
+                <value caption="8-bit data bus" name="8BIT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_LPCMODE">
+                <value caption="Data muxed with addr byte 0" name="ALE1" value="0x00"/>
+                <value caption="Data muxed with addr byte 0 and 1" name="ALE12" value="0x02"/>
+            </value-group>
+            <value-group caption="" name="EBI_SRMODE">
+                <value caption="Addr byte 0 muxed with 1" name="ALE1" value="0x00"/>
+                <value caption="Addr byte 0 muxed with 2" name="ALE2" value="0x01"/>
+                <value caption="Addr byte 0 muxed with 1 and 2" name="ALE12" value="0x02"/>
+                <value caption="No addr muxing" name="NOALE" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_IFMODE">
+                <value caption="EBI Disabled" name="DISABLED" value="0x00"/>
+                <value caption="3-port mode" name="3PORT" value="0x01"/>
+                <value caption="4-port mode" name="4PORT" value="0x02"/>
+                <value caption="2-port mode" name="2PORT" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDCOL">
+                <value caption="8 column bits" name="8BIT" value="0x00"/>
+                <value caption="9 column bits" name="9BIT" value="0x01"/>
+                <value caption="10 column bits" name="10BIT" value="0x02"/>
+                <value caption="11 column bits" name="11BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Load Mode to Active delay" name="EBI_MRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Row Cycle Delay" name="EBI_ROWCYCDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Precharge Delay" name="EBI_RPDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Write Recovery Delay" name="EBI_WRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Exit Self Refresh to Active Delay" name="EBI_ESRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Column Delay" name="EBI_ROWCOLDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml
new file mode 100644
index 00000000..eeb190ac
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A1U.xml
@@ -0,0 +1,3992 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128A1U-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-CU" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-C7U" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A1U-AN" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128A1U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
+                    <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x000800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x002000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                    <memory-segment start="0x4000" size="0xFFBFFF" type="ram" rw="RW" exec="0" name="EXTERNAL_SRAM"
+                                    external="true"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="1" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADCPOS" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADCPOS" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADCPOS" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADCPOS" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADCPOS" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADCPOS" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADCPOS" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADCPOS" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADCPOS" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADCPOS" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADCPOS" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADCPOS" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADCPOS" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADCPOS" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADCPOS" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADCPOS" group="ADC" index="15" pad="PB7"/>
+                            <signal function="GAINPOS" group="ADC" index="0" pad="PA0"/>
+                            <signal function="GAINPOS" group="ADC" index="1" pad="PA1"/>
+                            <signal function="GAINPOS" group="ADC" index="2" pad="PA2"/>
+                            <signal function="GAINPOS" group="ADC" index="3" pad="PA3"/>
+                            <signal function="GAINPOS" group="ADC" index="4" pad="PA4"/>
+                            <signal function="GAINPOS" group="ADC" index="5" pad="PA5"/>
+                            <signal function="GAINPOS" group="ADC" index="6" pad="PA6"/>
+                            <signal function="GAINPOS" group="ADC" index="7" pad="PA7"/>
+                            <signal function="GAINNEG" group="ADC" index="4" pad="PA4"/>
+                            <signal function="GAINNEG" group="ADC" index="5" pad="PA5"/>
+                            <signal function="GAINNEG" group="ADC" index="6" pad="PA6"/>
+                            <signal function="GAINNEG" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADCNEG" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADCNEG" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADCNEG" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADCNEG" group="ADC" index="3" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADCPOS" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADCPOS" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADCPOS" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADCPOS" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADCPOS" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADCPOS" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADCPOS" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADCPOS" group="ADC" index="7" pad="PB7"/>
+                            <signal function="GAINPOS" group="ADC" index="0" pad="PB0"/>
+                            <signal function="GAINPOS" group="ADC" index="1" pad="PB1"/>
+                            <signal function="GAINPOS" group="ADC" index="2" pad="PB2"/>
+                            <signal function="GAINPOS" group="ADC" index="3" pad="PB3"/>
+                            <signal function="GAINPOS" group="ADC" index="4" pad="PB4"/>
+                            <signal function="GAINPOS" group="ADC" index="5" pad="PB5"/>
+                            <signal function="GAINPOS" group="ADC" index="6" pad="PB6"/>
+                            <signal function="GAINPOS" group="ADC" index="7" pad="PB7"/>
+                            <signal function="ADCNEG" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADCNEG" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADCNEG" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADCNEG" group="ADC" index="7" pad="PB7"/>
+                            <signal function="GAINNEG" group="ADC" index="4" pad="PB4"/>
+                            <signal function="GAINNEG" group="ADC" index="5" pad="PB5"/>
+                            <signal function="GAINNEG" group="ADC" index="6" pad="PB6"/>
+                            <signal function="GAINNEG" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PA2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="ACPOS" group="AC" index="0" pad="PA0"/>
+                            <signal function="ACPOS" group="AC" index="1" pad="PA1"/>
+                            <signal function="ACPOS" group="AC" index="2" pad="PA2"/>
+                            <signal function="ACPOS" group="AC" index="3" pad="PA3"/>
+                            <signal function="ACPOS" group="AC" index="4" pad="PA4"/>
+                            <signal function="ACPOS" group="AC" index="5" pad="PA5"/>
+                            <signal function="ACPOS" group="AC" index="6" pad="PA6"/>
+                            <signal function="ACNEG" group="AC" index="0" pad="PA0"/>
+                            <signal function="ACNEG" group="AC" index="1" pad="PA1"/>
+                            <signal function="ACNEG" group="AC" index="3" pad="PA3"/>
+                            <signal function="ACNEG" group="AC" index="5" pad="PA5"/>
+                            <signal function="ACNEG" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="ACPOS" group="AC" index="0" pad="PB0"/>
+                            <signal function="ACPOS" group="AC" index="1" pad="PB1"/>
+                            <signal function="ACPOS" group="AC" index="2" pad="PB2"/>
+                            <signal function="ACPOS" group="AC" index="3" pad="PB3"/>
+                            <signal function="ACPOS" group="AC" index="4" pad="PB4"/>
+                            <signal function="ACPOS" group="AC" index="5" pad="PB5"/>
+                            <signal function="ACPOS" group="AC" index="6" pad="PB6"/>
+                            <signal function="ACNEG" group="AC" index="0" pad="PB0"/>
+                            <signal function="ACNEG" group="AC" index="1" pad="PB1"/>
+                            <signal function="ACNEG" group="AC" index="3" pad="PB3"/>
+                            <signal function="ACNEG" group="AC" index="5" pad="PB5"/>
+                            <signal function="ACNEG" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="EBI" id="I3001">
+                    <instance name="EBI">
+                        <register-group address-space="data" offset="0x0440" name-in-module="EBI" name="EBI"/>
+                        <signals>
+                            <signal function="EBIPORT0" group="PORT0" index="0" pad="PH0"/>
+                            <signal function="EBIPORT0" group="PORT0" index="1" pad="PH1"/>
+                            <signal function="EBIPORT0" group="PORT0" index="2" pad="PH2"/>
+                            <signal function="EBIPORT0" group="PORT0" index="3" pad="PH3"/>
+                            <signal function="EBIPORT0" group="PORT0" index="4" pad="PH4"/>
+                            <signal function="EBIPORT0" group="PORT0" index="5" pad="PH5"/>
+                            <signal function="EBIPORT0" group="PORT0" index="6" pad="PH6"/>
+                            <signal function="EBIPORT0" group="PORT0" index="7" pad="PH7"/>
+                            <signal function="EBIPORT1" group="PORT1" index="0" pad="PJ0"/>
+                            <signal function="EBIPORT1" group="PORT1" index="1" pad="PJ1"/>
+                            <signal function="EBIPORT1" group="PORT1" index="2" pad="PJ2"/>
+                            <signal function="EBIPORT1" group="PORT1" index="3" pad="PJ3"/>
+                            <signal function="EBIPORT1" group="PORT1" index="4" pad="PJ4"/>
+                            <signal function="EBIPORT1" group="PORT1" index="5" pad="PJ5"/>
+                            <signal function="EBIPORT1" group="PORT1" index="6" pad="PJ6"/>
+                            <signal function="EBIPORT1" group="PORT1" index="7" pad="PJ7"/>
+                            <signal function="EBIPORT2" group="PORT2" index="0" pad="PK0"/>
+                            <signal function="EBIPORT2" group="PORT2" index="1" pad="PK1"/>
+                            <signal function="EBIPORT2" group="PORT2" index="2" pad="PK2"/>
+                            <signal function="EBIPORT2" group="PORT2" index="3" pad="PK3"/>
+                            <signal function="EBIPORT2" group="PORT2" index="4" pad="PK4"/>
+                            <signal function="EBIPORT2" group="PORT2" index="5" pad="PK5"/>
+                            <signal function="EBIPORT2" group="PORT2" index="6" pad="PK6"/>
+                            <signal function="EBIPORT2" group="PORT2" index="7" pad="PK7"/>
+                            <signal function="EBIPORT3" group="PORT3" index="0" pad="PF0"/>
+                            <signal function="EBIPORT3" group="PORT3" index="1" pad="PF1"/>
+                            <signal function="EBIPORT3" group="PORT3" index="2" pad="PF2"/>
+                            <signal function="EBIPORT3" group="PORT3" index="3" pad="PF3"/>
+                            <signal function="EBIPORT3" group="PORT3" index="4" pad="PF4"/>
+                            <signal function="EBIPORT3" group="PORT3" index="5" pad="PF5"/>
+                            <signal function="EBIPORT3" group="PORT3" index="6" pad="PF6"/>
+                            <signal function="EBIPORT3" group="PORT3" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWIC" group="SDA" pad="PC0"/>
+                            <signal function="TWIC" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWID">
+                        <register-group address-space="data" offset="0x490" name-in-module="TWI" name="TWID"/>
+                        <signals>
+                            <signal function="TWID" group="SDA" pad="PD0"/>
+                            <signal function="TWID" group="SCL" pad="PD1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWIE" group="SDA" pad="PE0"/>
+                            <signal function="TWIE" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIF">
+                        <register-group address-space="data" offset="0x4B0" name-in-module="TWI" name="TWIF"/>
+                        <signals>
+                            <signal function="TWIF" group="SDA" pad="PF0"/>
+                            <signal function="TWIF" group="SCL" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTH">
+                        <register-group address-space="data" offset="0x06E0" name-in-module="PORT" name="PORTH"/>
+                        <signals>
+                            <signal function="PORTH" group="P" index="0" pad="PH0"/>
+                            <signal function="PORTH" group="P" index="1" pad="PH1"/>
+                            <signal function="PORTH" group="P" index="2" pad="PH2"/>
+                            <signal function="PORTH" group="P" index="3" pad="PH3"/>
+                            <signal function="PORTH" group="P" index="4" pad="PH4"/>
+                            <signal function="PORTH" group="P" index="5" pad="PH5"/>
+                            <signal function="PORTH" group="P" index="6" pad="PH6"/>
+                            <signal function="PORTH" group="P" index="7" pad="PH7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTJ">
+                        <register-group address-space="data" offset="0x0700" name-in-module="PORT" name="PORTJ"/>
+                        <signals>
+                            <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
+                            <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
+                            <signal function="PORTJ" group="P" index="2" pad="PJ2"/>
+                            <signal function="PORTJ" group="P" index="3" pad="PJ3"/>
+                            <signal function="PORTJ" group="P" index="4" pad="PJ4"/>
+                            <signal function="PORTJ" group="P" index="5" pad="PJ5"/>
+                            <signal function="PORTJ" group="P" index="6" pad="PJ6"/>
+                            <signal function="PORTJ" group="P" index="7" pad="PJ7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTK">
+                        <register-group address-space="data" offset="0x0720" name-in-module="PORT" name="PORTK"/>
+                        <signals>
+                            <signal function="PORTK" group="P" index="0" pad="PK0"/>
+                            <signal function="PORTK" group="P" index="1" pad="PK1"/>
+                            <signal function="PORTK" group="P" index="2" pad="PK2"/>
+                            <signal function="PORTK" group="P" index="3" pad="PK3"/>
+                            <signal function="PORTK" group="P" index="4" pad="PK4"/>
+                            <signal function="PORTK" group="P" index="5" pad="PK5"/>
+                            <signal function="PORTK" group="P" index="6" pad="PK6"/>
+                            <signal function="PORTK" group="P" index="7" pad="PK7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTQ">
+                        <register-group address-space="data" offset="0x07C0" name-in-module="PORT" name="PORTQ"/>
+                        <signals>
+                            <signal function="PORTQ" group="P" index="0" pad="PQ0"/>
+                            <signal function="PORTQ" group="P" index="1" pad="PQ1"/>
+                            <signal function="PORTQ" group="P" index="2" pad="PQ2"/>
+                            <signal function="PORTQ" group="P" index="3" pad="PQ3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal function="TCC" group="OC0A" pad="PC0"/>
+                            <signal function="TCC" group="OC0B" pad="PC1"/>
+                            <signal function="TCC" group="OC0C" pad="PC2"/>
+                            <signal function="TCC" group="OC0D" pad="PC3"/>
+                            <signal function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TCD" group="OC0A" pad="PD0"/>
+                            <signal function="TCD" group="OC0B" pad="PD1"/>
+                            <signal function="TCD" group="OC0C" pad="PD2"/>
+                            <signal function="TCD" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TCD" group="OC1A" pad="PD4"/>
+                            <signal function="TCD" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE0" group="OC0A" pad="PE0"/>
+                            <signal function="TCE0" group="OC0B" pad="PE1"/>
+                            <signal function="TCE0" group="OC0C" pad="PE2"/>
+                            <signal function="TCE0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TCE1" group="OC1A" pad="PE4"/>
+                            <signal function="TCE1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TCF0" group="OC0A" pad="PF0"/>
+                            <signal function="TCF0" group="OC0B" pad="PF1"/>
+                            <signal function="TCF0" group="OC0C" pad="PF2"/>
+                            <signal function="TCF0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF1">
+                        <register-group address-space="data" offset="0xB40" name-in-module="TC1" name="TCF1"/>
+                        <signals>
+                            <signal function="TCF1" group="OC1A" pad="PF4"/>
+                            <signal function="TCF1" group="OC1B" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TCC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TCC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TCC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TCC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TCC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TCC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TCC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TCC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TCD2" group="LOC2A" pad="PD0"/>
+                            <signal function="TCD2" group="LOC2B" pad="PD1"/>
+                            <signal function="TCD2" group="LOC2C" pad="PD2"/>
+                            <signal function="TCD2" group="LOC2D" pad="PD3"/>
+                            <signal function="TCD2" group="HOC2A" pad="PD4"/>
+                            <signal function="TCD2" group="HOC2B" pad="PD5"/>
+                            <signal function="TCD2" group="HOC2C" pad="PD6"/>
+                            <signal function="TCD2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TCE2" group="LOC2A" pad="PE0"/>
+                            <signal function="TCE2" group="LOC2B" pad="PE1"/>
+                            <signal function="TCE2" group="LOC2C" pad="PE2"/>
+                            <signal function="TCE2" group="LOC2D" pad="PE3"/>
+                            <signal function="TCE2" group="HOC2A" pad="PE4"/>
+                            <signal function="TCE2" group="HOC2B" pad="PE5"/>
+                            <signal function="TCE2" group="HOC2C" pad="PE6"/>
+                            <signal function="TCE2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TCF2" group="LOC2A" pad="PF0"/>
+                            <signal function="TCF2" group="LOC2B" pad="PF1"/>
+                            <signal function="TCF2" group="LOC2C" pad="PF2"/>
+                            <signal function="TCF2" group="LOC2D" pad="PF3"/>
+                            <signal function="TCF2" group="HOC2A" pad="PF4"/>
+                            <signal function="TCF2" group="HOC2B" pad="PF5"/>
+                            <signal function="TCF2" group="HOC2C" pad="PF6"/>
+                            <signal function="TCF2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEXC" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEXC" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEXC" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEXC" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEXC" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEXC" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEXC" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEXC" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                        <signals>
+                            <signal function="AWEXE" group="OC0ALS" pad="PE0"/>
+                            <signal function="AWEXE" group="OC0AHS" pad="PE1"/>
+                            <signal function="AWEXE" group="OC0BLS" pad="PE2"/>
+                            <signal function="AWEXE" group="OC0BHS" pad="PE3"/>
+                            <signal function="AWEXE" group="OC0CLS" pad="PE4"/>
+                            <signal function="AWEXE" group="OC0CHS" pad="PE5"/>
+                            <signal function="AWEXE" group="OC0DLS" pad="PE6"/>
+                            <signal function="AWEXE" group="OC0DHS" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PC1"/>
+                            <signal function="USART" group="RXD" pad="PC2"/>
+                            <signal function="USART" group="TXD" pad="PC3"/>
+                            <signal function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PC5"/>
+                            <signal function="USART" group="RXD" pad="PC6"/>
+                            <signal function="USART" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE5"/>
+                            <signal function="USART" group="RXD" pad="PE6"/>
+                            <signal function="USART" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal function="USARTF0" group="XCK" pad="PF1"/>
+                            <signal function="USARTF0" group="RXD" pad="PF2"/>
+                            <signal function="USARTF0" group="TXD" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                        <signals>
+                            <signal function="USARTF1" group="XCK" pad="PF5"/>
+                            <signal function="USARTF1" group="RXD" pad="PF6"/>
+                            <signal function="USARTF1" group="TXD" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal function="SPIC" group="SS" pad="PC4"/>
+                            <signal function="SPIC" group="MOSI" pad="PC5"/>
+                            <signal function="SPIC" group="MISO" pad="PC6"/>
+                            <signal function="SPIC" group="SCK" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPID" group="SS" pad="PD4"/>
+                            <signal function="SPID" group="MOSI" pad="PD5"/>
+                            <signal function="SPID" group="MISO" pad="PD6"/>
+                            <signal function="SPID" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                        <signals>
+                            <signal function="SPIE" group="SS" pad="PE4"/>
+                            <signal function="SPIE" group="MOSI" pad="PE5"/>
+                            <signal function="SPIE" group="MISO" pad="PE6"/>
+                            <signal function="SPIE" group="SCK" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                        <signals>
+                            <signal function="SPIF" group="SS" pad="PF4"/>
+                            <signal function="SPIF" group="MOSI" pad="PF5"/>
+                            <signal function="SPIF" group="MISO" pad="PF6"/>
+                            <signal function="SPIF" group="SCK" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="75" module-instance="TWID" name-in-module="TWI"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="94" module-instance="PORTQ" name-in-module="PORT"/>
+                <interrupt-group index="96" module-instance="PORTH" name-in-module="PORT"/>
+                <interrupt-group index="98" module-instance="PORTJ" name-in-module="PORT"/>
+                <interrupt-group index="100" module-instance="PORTK" name-in-module="PORT"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="106" module-instance="TWIF" name-in-module="TWI"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="114" module-instance="TCF1" name-in-module="TC1"/>
+                <interrupt-group index="118" module-instance="SPIF" name-in-module="SPI"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="122" module-instance="USARTF1" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974C03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x4C"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="External Bus Interface" mask="0x08" name="EBI"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="EBI Output register" name="EBIOUT" offset="0x05" size="1">
+                    <bitfield caption="EBI Chip Select Output" mask="0x03" name="EBICSOUT" values="PORTCFG_EBICSOUT"/>
+                    <bitfield caption="EBI Address Output" mask="0x0C" name="EBIADROUT" values="PORTCFG_EBIADROUT"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="EBI Address Output Port" name="PORTCFG_EBIADROUT">
+                <value caption="EBI port 3 address output on PORTF pins 0 to 7" name="PF" value="0x00"/>
+                <value caption="EBI port 3 address output on PORTE pins 0 to 7" name="PE" value="0x01"/>
+                <value caption="EBI port 3 address output on PORTF pins 4 to 7" name="PFH" value="0x02"/>
+                <value caption="EBI port 3 address output on PORTE pins 4 to 7" name="PEH" value="0x03"/>
+            </value-group>
+            <value-group caption="EBI Chip Select Output Port" name="PORTCFG_EBICSOUT">
+                <value caption="EBI chip select output to PORTH pin 4 to 7" name="PH" value="0x00"/>
+                <value caption="EBI chip select output to PORTL pin 4 to 7" name="PL" value="0x01"/>
+                <value caption="EBI chip select output to PORTF pin 4 to 7" name="PF" value="0x02"/>
+                <value caption="EBI chip select output to PORTE pin 4 to 7" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EBI" id="I3001" caption="External Bus Interface">
+            <register-group caption="EBI Chip Select Module" name="EBI_CS" size="4">
+                <register caption="Chip Select Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Address Size" mask="0x7C" name="ASIZE" values="EBI_CS_ASIZE"/>
+                    <bitfield caption="Legacy name: Address Space" mask="0x7C" name="ASPACE" values="EBI_CS_ASPACE"/>
+                    <bitfield caption="Memory Mode" mask="0x03" name="MODE" values="EBI_CS_MODE"/>
+                </register>
+                <register caption="Chip Select Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="SRAM Wait State Cycles" mask="0x07" name="SRWS" values="EBI_CS_SRWS"/>
+                    <bitfield caption="SDRAM Initialization Done" mask="0x80" name="SDINITDONE"/>
+                    <bitfield caption="SDRAM Self-refresh Enable" mask="0x04" name="SDSREN"/>
+                    <bitfield caption="SDRAM Mode" mask="0x03" name="SDMODE" values="EBI_CS_SDMODE"/>
+                </register>
+                <register caption="Base Address" name="BASEADDR" offset="0x02" size="2">
+                    <bitfield caption="Chip Select Base Address" mask="0xFFF0" name="BASEADDR"/>
+                </register>
+            </register-group>
+            <register-group caption="External Bus Interface" name="EBI" size="32">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDRAM Data Width Setting" mask="0xC0" name="SDDATAW" values="EBI_SDDATAW"/>
+                    <bitfield caption="SRAM LPC Mode" mask="0x30" name="LPCMODE" values="EBI_LPCMODE"/>
+                    <bitfield caption="SRAM Mode" mask="0x0C" name="SRMODE" values="EBI_SRMODE"/>
+                    <bitfield caption="Interface Mode" mask="0x03" name="IFMODE" values="EBI_IFMODE"/>
+                </register>
+                <register caption="SDRAM Control Register A" name="SDRAMCTRLA" offset="0x01" size="1">
+                    <bitfield caption="SDRAM CAS Latency Setting" mask="0x08" name="SDCAS"/>
+                    <bitfield caption="SDRAM ROW Bits Setting" mask="0x04" name="SDROW"/>
+                    <bitfield caption="SDRAM Column Bits Setting" mask="0x03" name="SDCOL" values="EBI_SDCOL"/>
+                </register>
+                <register caption="SDRAM Refresh Period" name="REFRESH" offset="0x04" size="2"/>
+                <register caption="SDRAM Initialization Delay" name="INITDLY" offset="0x06" size="2"/>
+                <register caption="SDRAM Control Register B" name="SDRAMCTRLB" offset="0x08" size="1">
+                    <bitfield caption="SDRAM Mode Register Delay" mask="0xC0" name="MRDLY" values="EBI_MRDLY"/>
+                    <bitfield caption="SDRAM Row Cycle Delay" mask="0x38" name="ROWCYCDLY" values="EBI_ROWCYCDLY"/>
+                    <bitfield caption="SDRAM Row-to-Precharge Delay" mask="0x07" name="RPDLY" values="EBI_RPDLY"/>
+                </register>
+                <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
+                    <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
+                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
+                </register>
+                <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 1" name="CS1" offset="0x14" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 2" name="CS2" offset="0x18" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 3" name="CS3" offset="0x1C" name-in-module="EBI_CS"/>
+            </register-group>
+            <value-group caption="Chip Select address size" name="EBI_CS_ASIZE">
+                <value caption="256 bytes" name="256B" value="0x00"/>
+                <value caption="512 bytes" name="512B" value="0x01"/>
+                <value caption="1K bytes" name="1KB" value="0x02"/>
+                <value caption="2K bytes" name="2KB" value="0x03"/>
+                <value caption="4K bytes" name="4KB" value="0x04"/>
+                <value caption="8K bytes" name="8KB" value="0x05"/>
+                <value caption="16K bytes" name="16KB" value="0x06"/>
+                <value caption="32K bytes" name="32KB" value="0x07"/>
+                <value caption="64K bytes" name="64KB" value="0x08"/>
+                <value caption="128K bytes" name="128KB" value="0x09"/>
+                <value caption="256K bytes" name="256KB" value="0x0A"/>
+                <value caption="512K bytes" name="512KB" value="0x0B"/>
+                <value caption="1M bytes" name="1MB" value="0x0C"/>
+                <value caption="2M bytes" name="2MB" value="0x0D"/>
+                <value caption="4M bytes" name="4MB" value="0x0E"/>
+                <value caption="8M bytes" name="8MB" value="0x0F"/>
+                <value caption="16M bytes" name="16M" value="0x10"/>
+            </value-group>
+            <value-group caption="Legacy: Chip Select address space" name="EBI_CS_ASPACE">
+                <value caption="256 bytes" name="256B" value="0x00"/>
+                <value caption="512 bytes" name="512B" value="0x01"/>
+                <value caption="1K bytes" name="1KB" value="0x02"/>
+                <value caption="2K bytes" name="2KB" value="0x03"/>
+                <value caption="4K bytes" name="4KB" value="0x04"/>
+                <value caption="8K bytes" name="8KB" value="0x05"/>
+                <value caption="16K bytes" name="16KB" value="0x06"/>
+                <value caption="32K bytes" name="32KB" value="0x07"/>
+                <value caption="64K bytes" name="64KB" value="0x08"/>
+                <value caption="128K bytes" name="128KB" value="0x09"/>
+                <value caption="256K bytes" name="256KB" value="0x0A"/>
+                <value caption="512K bytes" name="512KB" value="0x0B"/>
+                <value caption="1M bytes" name="1MB" value="0x0C"/>
+                <value caption="2M bytes" name="2MB" value="0x0D"/>
+                <value caption="4M bytes" name="4MB" value="0x0E"/>
+                <value caption="8M bytes" name="8MB" value="0x0F"/>
+                <value caption="16M bytes" name="16M" value="0x10"/>
+            </value-group>
+            <value-group caption="SRAM Wait State Selection" name="EBI_CS_SRWS">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Chip Select address mode" name="EBI_CS_MODE">
+                <value caption="Chip Select Disabled" name="DISABLED" value="0x00"/>
+                <value caption="Chip Select in SRAM mode" name="SRAM" value="0x01"/>
+                <value caption="Chip Select in SRAM LPC mode" name="LPC" value="0x02"/>
+                <value caption="Chip Select in SDRAM mode" name="SDRAM" value="0x03"/>
+            </value-group>
+            <value-group caption="Chip Select SDRAM mode" name="EBI_CS_SDMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x00"/>
+                <value caption="Load Mode Register command mode" name="LOAD" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDDATAW">
+                <value caption="4-bit data bus" name="4BIT" value="0x00"/>
+                <value caption="8-bit data bus" name="8BIT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_LPCMODE">
+                <value caption="Data muxed with addr byte 0" name="ALE1" value="0x00"/>
+                <value caption="Data muxed with addr byte 0 and 1" name="ALE12" value="0x02"/>
+            </value-group>
+            <value-group caption="" name="EBI_SRMODE">
+                <value caption="Addr byte 0 muxed with 1" name="ALE1" value="0x00"/>
+                <value caption="Addr byte 0 muxed with 2" name="ALE2" value="0x01"/>
+                <value caption="Addr byte 0 muxed with 1 and 2" name="ALE12" value="0x02"/>
+                <value caption="No addr muxing" name="NOALE" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_IFMODE">
+                <value caption="EBI Disabled" name="DISABLED" value="0x00"/>
+                <value caption="3-port mode" name="3PORT" value="0x01"/>
+                <value caption="4-port mode" name="4PORT" value="0x02"/>
+                <value caption="2-port mode" name="2PORT" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDCOL">
+                <value caption="8 column bits" name="8BIT" value="0x00"/>
+                <value caption="9 column bits" name="9BIT" value="0x01"/>
+                <value caption="10 column bits" name="10BIT" value="0x02"/>
+                <value caption="11 column bits" name="11BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Load Mode to Active delay" name="EBI_MRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Row Cycle Delay" name="EBI_ROWCYCDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Precharge Delay" name="EBI_RPDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Write Recovery Delay" name="EBI_WRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Exit Self Refresh to Active Delay" name="EBI_ESRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Column Delay" name="EBI_ROWCOLDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP100">
+            <pin pad="PA6" position="1"/>
+            <pin pad="PA7" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="AVCC" position="4"/>
+            <pin pad="PB0" position="5"/>
+            <pin pad="PB1" position="6"/>
+            <pin pad="PB2" position="7"/>
+            <pin pad="PB3" position="8"/>
+            <pin pad="PB4" position="9"/>
+            <pin pad="PB5" position="10"/>
+            <pin pad="PB6" position="11"/>
+            <pin pad="PB7" position="12"/>
+            <pin pad="GND" position="13"/>
+            <pin pad="VCC" position="14"/>
+            <pin pad="PC0" position="15"/>
+            <pin pad="PC1" position="16"/>
+            <pin pad="PC2" position="17"/>
+            <pin pad="PC3" position="18"/>
+            <pin pad="PC4" position="19"/>
+            <pin pad="PC5" position="20"/>
+            <pin pad="PC6" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="GND" position="23"/>
+            <pin pad="VCC" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="GND" position="33"/>
+            <pin pad="VCC" position="34"/>
+            <pin pad="PE0" position="35"/>
+            <pin pad="PE1" position="36"/>
+            <pin pad="PE2" position="37"/>
+            <pin pad="PE3" position="38"/>
+            <pin pad="PE4" position="39"/>
+            <pin pad="PE5" position="40"/>
+            <pin pad="PE6" position="41"/>
+            <pin pad="PE7" position="42"/>
+            <pin pad="GND" position="43"/>
+            <pin pad="VCC" position="44"/>
+            <pin pad="PF0" position="45"/>
+            <pin pad="PF1" position="46"/>
+            <pin pad="PF2" position="47"/>
+            <pin pad="PF3" position="48"/>
+            <pin pad="PF4" position="49"/>
+            <pin pad="PF5" position="50"/>
+            <pin pad="PF6" position="51"/>
+            <pin pad="PF7" position="52"/>
+            <pin pad="GND" position="53"/>
+            <pin pad="VCC" position="54"/>
+            <pin pad="PH0" position="55"/>
+            <pin pad="PH1" position="56"/>
+            <pin pad="PH2" position="57"/>
+            <pin pad="PH3" position="58"/>
+            <pin pad="PH4" position="59"/>
+            <pin pad="PH5" position="60"/>
+            <pin pad="PH6" position="61"/>
+            <pin pad="PH7" position="62"/>
+            <pin pad="GND" position="63"/>
+            <pin pad="VCC" position="64"/>
+            <pin pad="PJ0" position="65"/>
+            <pin pad="PJ1" position="66"/>
+            <pin pad="PJ2" position="67"/>
+            <pin pad="PJ3" position="68"/>
+            <pin pad="PJ4" position="69"/>
+            <pin pad="PJ5" position="70"/>
+            <pin pad="PJ6" position="71"/>
+            <pin pad="PJ7" position="72"/>
+            <pin pad="GND" position="73"/>
+            <pin pad="VCC" position="74"/>
+            <pin pad="PK0" position="75"/>
+            <pin pad="PK1" position="76"/>
+            <pin pad="PK2" position="77"/>
+            <pin pad="PK3" position="78"/>
+            <pin pad="PK4" position="79"/>
+            <pin pad="PK5" position="80"/>
+            <pin pad="PK6" position="81"/>
+            <pin pad="PK7" position="82"/>
+            <pin pad="VCC" position="83"/>
+            <pin pad="GND" position="84"/>
+            <pin pad="PQ0" position="85"/>
+            <pin pad="PQ1" position="86"/>
+            <pin pad="PQ2" position="87"/>
+            <pin pad="PQ3" position="88"/>
+            <pin pad="PDI" position="89"/>
+            <pin pad="RESET" position="90"/>
+            <pin pad="PR0" position="91"/>
+            <pin pad="PR1" position="92"/>
+            <pin pad="GND" position="93"/>
+            <pin pad="AVCC" position="94"/>
+            <pin pad="PA0" position="95"/>
+            <pin pad="PA1" position="96"/>
+            <pin pad="PA2" position="97"/>
+            <pin pad="PA3" position="98"/>
+            <pin pad="PA4" position="99"/>
+            <pin pad="PA5" position="100"/>
+        </pinout>
+        <pinout name="BGA100">
+            <pin pad="PK0" position="A1"/>
+            <pin pad="VCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PJ3" position="A4"/>
+            <pin pad="VCC" position="A5"/>
+            <pin pad="GND" position="A6"/>
+            <pin pad="PH1" position="A7"/>
+            <pin pad="GND" position="A8"/>
+            <pin pad="VCC" position="A9"/>
+            <pin pad="PF7" position="A10"/>
+            <pin pad="PK3" position="B1"/>
+            <pin pad="PK2" position="B2"/>
+            <pin pad="PK1" position="B3"/>
+            <pin pad="PJ4" position="B4"/>
+            <pin pad="PH7" position="B5"/>
+            <pin pad="PH4" position="B6"/>
+            <pin pad="PH2" position="B7"/>
+            <pin pad="PH0" position="B8"/>
+            <pin pad="PF6" position="B9"/>
+            <pin pad="PF5" position="B10"/>
+            <pin pad="VCC" position="C1"/>
+            <pin pad="PK5" position="C2"/>
+            <pin pad="PK4" position="C3"/>
+            <pin pad="PJ5" position="C4"/>
+            <pin pad="PJ0" position="C5"/>
+            <pin pad="PH5" position="C6"/>
+            <pin pad="PH3" position="C7"/>
+            <pin pad="PF2" position="C8"/>
+            <pin pad="PF3" position="C9"/>
+            <pin pad="VCC" position="C10"/>
+            <pin pad="GND" position="D1"/>
+            <pin pad="PK6" position="D2"/>
+            <pin pad="PK7" position="D3"/>
+            <pin pad="PJ6" position="D4"/>
+            <pin pad="PJ1" position="D5"/>
+            <pin pad="PH6" position="D6"/>
+            <pin pad="PF0" position="D7"/>
+            <pin pad="PF1" position="D8"/>
+            <pin pad="PF4" position="D9"/>
+            <pin pad="GND" position="D10"/>
+            <pin pad="PQ0" position="E1"/>
+            <pin pad="PQ1" position="E2"/>
+            <pin pad="PQ2" position="E3"/>
+            <pin pad="PJ7" position="E4"/>
+            <pin pad="PJ2" position="E5"/>
+            <pin pad="PE7" position="E6"/>
+            <pin pad="PE6" position="E7"/>
+            <pin pad="PE5" position="E8"/>
+            <pin pad="PE4" position="E9"/>
+            <pin pad="PE3" position="E10"/>
+            <pin pad="PR1" position="F1"/>
+            <pin pad="PR0" position="F2"/>
+            <pin pad="RESET" position="F3"/>
+            <pin pad="PDI_DATA" position="F4"/>
+            <pin pad="PQ3" position="F5"/>
+            <pin pad="PC2" position="F6"/>
+            <pin pad="PE2" position="F7"/>
+            <pin pad="PE1" position="F8"/>
+            <pin pad="PE0" position="F9"/>
+            <pin pad="VCC" position="F10"/>
+            <pin pad="GND" position="G1"/>
+            <pin pad="PA1" position="G2"/>
+            <pin pad="PA4" position="G3"/>
+            <pin pad="PB3" position="G4"/>
+            <pin pad="PB4" position="G5"/>
+            <pin pad="PC1" position="G6"/>
+            <pin pad="PC6" position="G7"/>
+            <pin pad="PD7" position="G8"/>
+            <pin pad="PD6" position="G9"/>
+            <pin pad="GND" position="G10"/>
+            <pin pad="AVCC" position="H1"/>
+            <pin pad="PA2" position="H2"/>
+            <pin pad="PA5" position="H3"/>
+            <pin pad="PB2" position="H4"/>
+            <pin pad="PB5" position="H5"/>
+            <pin pad="PC0" position="H6"/>
+            <pin pad="PC5" position="H7"/>
+            <pin pad="PD5" position="H8"/>
+            <pin pad="PD4" position="H9"/>
+            <pin pad="PD3" position="H10"/>
+            <pin pad="PA0" position="J1"/>
+            <pin pad="PA3" position="J2"/>
+            <pin pad="PB0" position="J3"/>
+            <pin pad="PB1" position="J4"/>
+            <pin pad="PB6" position="J5"/>
+            <pin pad="PC3" position="J6"/>
+            <pin pad="PC4" position="J7"/>
+            <pin pad="PC7" position="J8"/>
+            <pin pad="PD2" position="J9"/>
+            <pin pad="PD1" position="J10"/>
+            <pin pad="PA6" position="K1"/>
+            <pin pad="PA7" position="K2"/>
+            <pin pad="GND" position="K3"/>
+            <pin pad="AVCC" position="K4"/>
+            <pin pad="PB7" position="K5"/>
+            <pin pad="VCC " position="K6"/>
+            <pin pad="GND" position="K7"/>
+            <pin pad="VCC" position="K8"/>
+            <pin pad="GND" position="K9"/>
+            <pin pad="PD0" position="K10"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
new file mode 100644
index 00000000..bb3ffcf1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3.xml
@@ -0,0 +1,2594 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA128A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA128A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x22000" endianness="little">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml
new file mode 100644
index 00000000..1fa25c0d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A3U.xml
@@ -0,0 +1,3511 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128A3U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PE0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PE2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PD0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PD1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PD2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PD3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PE0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PE1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PE2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PE3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PE4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PE5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PE6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PE4"/>
+                            <signal function="TC1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PE0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PE1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PE2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PE3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PE4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PE5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PE6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PE1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PE2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PE3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PE5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PE6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE5"/>
+                            <signal function="USART" group="RXD" pad="PE6"/>
+                            <signal function="USART" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PF1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PF2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PF3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PF5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PF6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PE5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PE7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PE5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml
new file mode 100644
index 00000000..69dbd70b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128A4U.xml
@@ -0,0 +1,3374 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-MH" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128A4U-M7" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128A4U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x004000" endianness="little">
+                    <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x000800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x002000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                            <signal function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAA4U">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x46"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAA4U" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI_DATA" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
new file mode 100644
index 00000000..ce2c4590
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128B1.xml
@@ -0,0 +1,3330 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128B1-AU" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B1-CU" package="VFBGA100" pinout="BGA_100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B1-AN" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128B1" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAB">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="0" pad="PC0"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="1" pad="PC1"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="2" pad="PC2"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="3" pad="PC3"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="4" pad="PC4"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="5" pad="PC5"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="6" pad="PC6"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAB">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE6"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6080" version="XMEGAB">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAB">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAB">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PD7"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PD7"/>
+                            <signal field="RTCOUT" function="RTCOUTC" group="RTCOUT" pad="PD6"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAB">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000" version="XMEGAB">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAB">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAB">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAB">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD0"/>
+                            <signal function="USB" group="DP" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG">
+                        <register-group address-space="data" offset="0x06C0" name-in-module="PORT" name="PORTG"/>
+                        <signals>
+                            <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                            <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                            <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                            <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                            <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                            <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                            <signal function="PORTG" group="P" index="6" pad="PG6"/>
+                            <signal function="PORTG" group="P" index="7" pad="PG7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTM">
+                        <register-group address-space="data" offset="0x0760" name-in-module="PORT" name="PORTM"/>
+                        <signals>
+                            <signal function="PORTM" group="P" index="0" pad="PM0"/>
+                            <signal function="PORTM" group="P" index="1" pad="PM1"/>
+                            <signal function="PORTM" group="P" index="2" pad="PM2"/>
+                            <signal function="PORTM" group="P" index="3" pad="PM3"/>
+                            <signal function="PORTM" group="P" index="4" pad="PM4"/>
+                            <signal function="PORTM" group="P" index="5" pad="PM5"/>
+                            <signal function="PORTM" group="P" index="6" pad="PM6"/>
+                            <signal function="PORTM" group="P" index="7" pad="PM7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PE0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PE1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PE2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PE3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PE4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PE5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PE6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PE1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PE2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PE3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PE5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PE6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAB">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="LCD" id="I3003">
+                    <instance name="LCD">
+                        <register-group address-space="data" offset="0x0D00" name-in-module="LCD" name="LCD"/>
+                        <signals>
+                            <signal function="LCD_SEG" group="SEG" index="39" pad="PG0"/>
+                            <signal function="LCD_SEG" group="SEG" index="38" pad="PG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="37" pad="PG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="36" pad="PG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="35" pad="PG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="34" pad="PG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="33" pad="PG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="32" pad="PG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="31" pad="PM0"/>
+                            <signal function="LCD_SEG" group="SEG" index="30" pad="PM1"/>
+                            <signal function="LCD_SEG" group="SEG" index="29" pad="PM2"/>
+                            <signal function="LCD_SEG" group="SEG" index="28" pad="PM3"/>
+                            <signal function="LCD_SEG" group="SEG" index="27" pad="PM4"/>
+                            <signal function="LCD_SEG" group="SEG" index="26" pad="PM5"/>
+                            <signal function="LCD_SEG" group="SEG" index="25" pad="PM6"/>
+                            <signal function="LCD_SEG" group="SEG" index="24" pad="PM7"/>
+                            <signal function="LCD_SEG" group="SEG" index="23" pad="SEG23"/>
+                            <signal function="LCD_SEG" group="SEG" index="22" pad="SEG22"/>
+                            <signal function="LCD_SEG" group="SEG" index="21" pad="SEG21"/>
+                            <signal function="LCD_SEG" group="SEG" index="20" pad="SEG20"/>
+                            <signal function="LCD_SEG" group="SEG" index="19" pad="SEG19"/>
+                            <signal function="LCD_SEG" group="SEG" index="18" pad="SEG18"/>
+                            <signal function="LCD_SEG" group="SEG" index="17" pad="SEG17"/>
+                            <signal function="LCD_SEG" group="SEG" index="16" pad="SEG16"/>
+                            <signal function="LCD_SEG" group="SEG" index="15" pad="SEG15"/>
+                            <signal function="LCD_SEG" group="SEG" index="14" pad="SEG14"/>
+                            <signal function="LCD_SEG" group="SEG" index="13" pad="SEG13"/>
+                            <signal function="LCD_SEG" group="SEG" index="12" pad="SEG12"/>
+                            <signal function="LCD_SEG" group="SEG" index="11" pad="SEG11"/>
+                            <signal function="LCD_SEG" group="SEG" index="10" pad="SEG10"/>
+                            <signal function="LCD_SEG" group="SEG" index="9" pad="SEG9"/>
+                            <signal function="LCD_SEG" group="SEG" index="8" pad="SEG8"/>
+                            <signal function="LCD_SEG" group="SEG" index="7" pad="SEG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="6" pad="SEG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="5" pad="SEG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="4" pad="SEG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="3" pad="SEG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="2" pad="SEG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="1" pad="SEG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="0" pad="SEG0"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="1" pad="SEG1"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="0" pad="SEG0"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="1" pad="BIAS1"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="2" pad="BIAS2"/>
+                            <signal function="LCD_BIAS" group="VLCD" pad="VLCD"/>
+                            <signal function="LCD_BIAS" group="CAPL" pad="CAPL"/>
+                            <signal function="LCD_BIAS" group="CAPH" pad="CAPH"/>
+                            <signal function="LCD_COM" group="COM" index="0" pad="COM0"/>
+                            <signal function="LCD_COM" group="COM" index="1" pad="COM1"/>
+                            <signal function="LCD_COM" group="COM" index="2" pad="COM2"/>
+                            <signal function="LCD_COM" group="COM" index="3" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="0" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="1" pad="COM2"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="2" pad="COM1"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="3" pad="COM0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3600" version="XMEGAB">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="USB" name-in-module="USB"/>
+                <interrupt-group index="35" module-instance="LCD" name-in-module="LCD"/>
+                <interrupt-group index="36" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="37" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="39" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="41" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="44" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="48" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="50" module-instance="PORTG" name-in-module="PORT"/>
+                <interrupt-group index="52" module-instance="PORTM" name-in-module="PORT"/>
+                <interrupt-group index="54" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="58" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="58" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="69" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="75" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="77" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="80" module-instance="ADCA" name-in-module="ADC"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974D03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x4D"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAB" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAB" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="External Clock on port C0 - 6 CLK" name="EXTCLK_C0" value="0x01"/>
+                <value caption="External Clock on port C1 - 6 CLK" name="EXTCLK_C1" value="0x05"/>
+                <value caption="External Clock on port C2 - 6 CLK" name="EXTCLK_C2" value="0x09"/>
+                <value caption="External Clock on port C3 - 6 CLK" name="EXTCLK_C3" value="0x0D"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x11"/>
+                <value caption="External Clock on port C5 - 6 CLK" name="EXTCLK_C5" value="0x15"/>
+                <value caption="External Clock on port C6 - 6 CLK" name="EXTCLK_C6" value="0x19"/>
+                <value caption="External Clock on port C7 - 6 CLK" name="EXTCLK_C7" value="0x1D"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="PR" id="I6080" version="XMEGAB" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="6">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="LCD Module" mask="0x80" name="LCD"/>
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAB" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAB" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C" name="PC" value="0x01"/>
+                <value caption="System Clock Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0 Output on Port C" name="PC" value="0x01"/>
+                <value caption="Event Channel 0 Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAB" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" version="XMEGAB" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="CHEN"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="CHRST"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="48">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x04" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x01" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR01" value="0x00"/>
+                <value caption="Channel 0 &gt; channel 1" name="CH0RR1" value="0x01"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAB" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC B Channel" name="ADCB_CH0" value="0x24"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAB" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current limit" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAB" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAB" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="LCD" id="I3003" caption="LCD Controller">
+            <register-group caption="LCD Controller" name="LCD" size="36">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LCD Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="External Register Bias Generation" mask="0x40" name="XBIAS"/>
+                    <bitfield caption="Data Register Lock" mask="0x20" name="DATCLK"/>
+                    <bitfield caption="Common Bus Swap" mask="0x10" name="COMSWP"/>
+                    <bitfield caption="Segment Bus Swap" mask="0x08" name="SEGSWP"/>
+                    <bitfield caption="Clear Data Register" mask="0x04" name="CLRDT"/>
+                    <bitfield caption="Segments On" mask="0x02" name="SEGON"/>
+                    <bitfield caption="Blanking Display Mode" mask="0x01" name="BLANK"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="LCD Prescaler Select" mask="0x80" name="PRESC" values="LCD_PRESC"/>
+                    <bitfield caption="LCD Clock Divide" mask="0x70" name="CLKDIV" values="LCD_CLKDIV"/>
+                    <bitfield caption="Low Power Waveform" mask="0x08" name="LPWAV"/>
+                    <bitfield caption="Duty Select" mask="0x03" name="DUTY" values="LCD_DUTY"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="LCD Port Mask" mask="0x3F" name="PMSK"/>
+                </register>
+                <register caption="Interrupt Enable Register" name="INTCTRL" offset="0x03" size="1">
+                    <bitfield caption="eXtended Interrupt Mode Enable" mask="0xF8" name="XIME"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="FCINTLVL" values="LCD_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAG" offset="0x04" size="1">
+                    <bitfield caption="LCD Frame Completed Interrupt Flag" mask="0x01" name="FCIF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Blink Enable" mask="0x08" name="BLINKEN"/>
+                    <bitfield caption="LCD Blink Rate" mask="0x03" name="BLINKRATE" values="LCD_BLINKRATE"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x06" size="1">
+                    <bitfield caption="Blink Pixel Selection 1" mask="0xF0" name="BPS1"/>
+                    <bitfield caption="Blink Pixel Selection 0" mask="0x0F" name="BPS0"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x07" size="1">
+                    <bitfield caption="Fine Contrast" mask="0x3F" name="FCONT"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x08" size="1">
+                    <bitfield caption="Type of Digit" mask="0xC0" name="TDG" values="LCD_TDG"/>
+                    <bitfield caption="Start Segment" mask="0x3F" name="STSEG"/>
+                </register>
+                <register caption="Control Register H" name="CTRLH" offset="0x09" size="1">
+                    <bitfield caption="Decrement of Start Segment" mask="0x80" name="DEC"/>
+                    <bitfield caption="Display Code" mask="0x7F" name="DCODE"/>
+                </register>
+                <register caption="LCD Data Register 0" name="DATA0" offset="0x10" size="1"/>
+                <register caption="LCD Data Register 1" name="DATA1" offset="0x11" size="1"/>
+                <register caption="LCD Data Register 2" name="DATA2" offset="0x12" size="1"/>
+                <register caption="LCD Data Register 3" name="DATA3" offset="0x13" size="1"/>
+                <register caption="LCD Data Register 4" name="DATA4" offset="0x14" size="1"/>
+                <register caption="LCD Data Register 5" name="DATA5" offset="0x15" size="1"/>
+                <register caption="LCD Data Register 6" name="DATA6" offset="0x16" size="1"/>
+                <register caption="LCD Data Register 7" name="DATA7" offset="0x17" size="1"/>
+                <register caption="LCD Data Register 8" name="DATA8" offset="0x18" size="1"/>
+                <register caption="LCD Data Register 9" name="DATA9" offset="0x19" size="1"/>
+                <register caption="LCD Data Register 10" name="DATA10" offset="0x1A" size="1"/>
+                <register caption="LCD Data Register 11" name="DATA11" offset="0x1B" size="1"/>
+                <register caption="LCD Data Register 12" name="DATA12" offset="0x1C" size="1"/>
+                <register caption="LCD Data Register 13" name="DATA13" offset="0x1D" size="1"/>
+                <register caption="LCD Data Register 14" name="DATA14" offset="0x1E" size="1"/>
+                <register caption="LCD Data Register 15" name="DATA15" offset="0x1F" size="1"/>
+                <register caption="LCD Data Register 16" name="DATA16" offset="0x20" size="1"/>
+                <register caption="LCD Data Register 17" name="DATA17" offset="0x21" size="1"/>
+                <register caption="LCD Data Register 18" name="DATA18" offset="0x22" size="1"/>
+                <register caption="LCD Data Register 19" name="DATA19" offset="0x23" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="LCD_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Blink Rate" name="LCD_BLINKRATE">
+                <value caption="4Hz Blink Rate" name="4Hz" value="0x00"/>
+                <value caption="2Hz Blink Rate" name="2Hz" value="0x01"/>
+                <value caption="1Hz Blink Rate" name="1Hz" value="0x02"/>
+                <value caption="0.5Hz Blink Rate" name="0Hz5" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Clock Divide" name="LCD_CLKDIV">
+                <value caption="frame rate of 256 Hz" name="DivBy1" value="0x00"/>
+                <value caption="frame rate of 128 Hz" name="DivBy2" value="0x01"/>
+                <value caption="frame rate of 83.5 Hz" name="DivBy3" value="0x02"/>
+                <value caption="frame rate of 64 Hz" name="DivBy4" value="0x03"/>
+                <value caption="frame rate of 51.2 Hz" name="DivBy5" value="0x04"/>
+                <value caption="frame rate of 42.7 Hz" name="DivBy6" value="0x05"/>
+                <value caption="frame rate of 36.6 Hz" name="DivBy7" value="0x06"/>
+                <value caption="frame rate of 32 Hz" name="DivBy8" value="0x07"/>
+            </value-group>
+            <value-group caption="Duty Select" name="LCD_DUTY">
+                <value caption="Duty=1/4, Bias=1/3, COM0:3" name="1_4" value="0x00"/>
+                <value caption="Duty=Static, Bias=Static, COM0" name="Static" value="0x01"/>
+                <value caption="Duty=1/2, Bias=1/3, COM0:1" name="1_2" value="0x02"/>
+                <value caption="Duty=1/3, Bias=1/3, COM0:2" name="1_3" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Prescaler Select" name="LCD_PRESC">
+                <value caption="clk_lcd/8" name="8" value="0x00"/>
+                <value caption="clk_lcd/16" name="16" value="0x01"/>
+            </value-group>
+            <value-group caption="Type of Digit" name="LCD_TDG">
+                <value caption="7-segment with 3 COMs" name="7S_3C" value="0x00"/>
+                <value caption="7-segment with 4 COMs" name="7S_4C" value="0x01"/>
+                <value caption="14-segment with 4 COMs" name="14S_4C" value="0x02"/>
+                <value caption="16-segment with 3 COMs" name="16S_3C" value="0x03"/>
+            </value-group>
+            <interrupt-group name="LCD">
+                <interrupt index="0" name="INT" caption="LCD Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3600" version="XMEGAB" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_100">
+            <pin pad="GND" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="PC2" position="4"/>
+            <pin pad="PC3" position="5"/>
+            <pin pad="PC4" position="6"/>
+            <pin pad="PC5" position="7"/>
+            <pin pad="PC6" position="8"/>
+            <pin pad="PC7" position="9"/>
+            <pin pad="GND" position="10"/>
+            <pin pad="VCC" position="11"/>
+            <pin pad="PD0" position="12"/>
+            <pin pad="PD1" position="13"/>
+            <pin pad="PD2" position="14"/>
+            <pin pad="RESET" position="15"/>
+            <pin pad="PDI" position="16"/>
+            <pin pad="GND" position="17"/>
+            <pin pad="VCC" position="18"/>
+            <pin pad="PE0" position="19"/>
+            <pin pad="PE1" position="20"/>
+            <pin pad="PE2" position="21"/>
+            <pin pad="PE3" position="22"/>
+            <pin pad="PE4" position="23"/>
+            <pin pad="PE5" position="24"/>
+            <pin pad="PE6" position="25"/>
+            <pin pad="PE7" position="26"/>
+            <pin pad="GND" position="27"/>
+            <pin pad="VCC" position="28"/>
+            <pin pad="PG0" position="29"/>
+            <pin pad="PG1" position="30"/>
+            <pin pad="PG2" position="31"/>
+            <pin pad="PG3" position="32"/>
+            <pin pad="PG4" position="33"/>
+            <pin pad="PG5" position="34"/>
+            <pin pad="PG6" position="35"/>
+            <pin pad="PG7" position="36"/>
+            <pin pad="PM0" position="37"/>
+            <pin pad="PM1" position="38"/>
+            <pin pad="PM2" position="39"/>
+            <pin pad="PM3" position="40"/>
+            <pin pad="PM4" position="41"/>
+            <pin pad="PM5" position="42"/>
+            <pin pad="PM6" position="43"/>
+            <pin pad="PM7" position="44"/>
+            <pin pad="SEG23" position="45"/>
+            <pin pad="SEG22" position="46"/>
+            <pin pad="SEG21" position="47"/>
+            <pin pad="SEG20" position="48"/>
+            <pin pad="SEG19" position="49"/>
+            <pin pad="SEG18" position="50"/>
+            <pin pad="SEG17" position="51"/>
+            <pin pad="SEG16" position="52"/>
+            <pin pad="SEG15" position="53"/>
+            <pin pad="SEG14" position="54"/>
+            <pin pad="SEG13" position="55"/>
+            <pin pad="SEG12" position="56"/>
+            <pin pad="SEG11" position="57"/>
+            <pin pad="SEG10" position="58"/>
+            <pin pad="SEG9" position="59"/>
+            <pin pad="SEG8" position="60"/>
+            <pin pad="SEG7" position="61"/>
+            <pin pad="SEG6" position="62"/>
+            <pin pad="SEG5" position="63"/>
+            <pin pad="SEG4" position="64"/>
+            <pin pad="SEG3" position="65"/>
+            <pin pad="SEG2" position="66"/>
+            <pin pad="SEG1" position="67"/>
+            <pin pad="SEG0" position="68"/>
+            <pin pad="GND" position="69"/>
+            <pin pad="VCC" position="70"/>
+            <pin pad="BIAS1" position="71"/>
+            <pin pad="BIAS2" position="72"/>
+            <pin pad="VLCD" position="73"/>
+            <pin pad="CAPL" position="74"/>
+            <pin pad="CAPH" position="75"/>
+            <pin pad="COM0" position="76"/>
+            <pin pad="COM1" position="77"/>
+            <pin pad="COM2" position="78"/>
+            <pin pad="COM3" position="79"/>
+            <pin pad="PR0" position="80"/>
+            <pin pad="PR1" position="81"/>
+            <pin pad="PA0" position="82"/>
+            <pin pad="PA1" position="83"/>
+            <pin pad="PA2" position="84"/>
+            <pin pad="PA3" position="85"/>
+            <pin pad="PA4" position="86"/>
+            <pin pad="PA5" position="87"/>
+            <pin pad="PA6" position="88"/>
+            <pin pad="PA7" position="89"/>
+            <pin pad="AGND" position="90"/>
+            <pin pad="AVCC" position="91"/>
+            <pin pad="PB0" position="92"/>
+            <pin pad="PB1" position="93"/>
+            <pin pad="PB2" position="94"/>
+            <pin pad="PB3" position="95"/>
+            <pin pad="PB4" position="96"/>
+            <pin pad="PB5" position="97"/>
+            <pin pad="PB6" position="98"/>
+            <pin pad="PB7" position="99"/>
+            <pin pad="GND" position="100"/>
+        </pinout>
+        <pinout name="BGA_100">
+            <pin pad="PC0" position="A1"/>
+            <pin pad="VCC" position="A2"/>
+            <pin pad="PB6" position="A3"/>
+            <pin pad="PB2" position="A4"/>
+            <pin pad="AVCC" position="A5"/>
+            <pin pad="PA5" position="A6"/>
+            <pin pad="PA1" position="A7"/>
+            <pin pad="PR1" position="A8"/>
+            <pin pad="COM2" position="A9"/>
+            <pin pad="CAPH" position="A10"/>
+            <pin pad="PC3" position="B1"/>
+            <pin pad="GND" position="B2"/>
+            <pin pad="PB7" position="B3"/>
+            <pin pad="PB4" position="B4"/>
+            <pin pad="AGND" position="B5"/>
+            <pin pad="PA4" position="B6"/>
+            <pin pad="PA0" position="B7"/>
+            <pin pad="PR0" position="B8"/>
+            <pin pad="COM1" position="B9"/>
+            <pin pad="CAPL" position="B10"/>
+            <pin pad="PC5" position="C1"/>
+            <pin pad="PC4" position="C2"/>
+            <pin pad="PC1" position="C3"/>
+            <pin pad="PB5" position="C4"/>
+            <pin pad="PA7" position="C5"/>
+            <pin pad="PA3" position="C6"/>
+            <pin pad="COM3" position="C7"/>
+            <pin pad="COM0" position="C8"/>
+            <pin pad="BIAS2" position="C9"/>
+            <pin pad="BIAS1" position="C10"/>
+            <pin pad="VCC" position="D1"/>
+            <pin pad="GND" position="D2"/>
+            <pin pad="PD0" position="D3"/>
+            <pin pad="PC2" position="D4"/>
+            <pin pad="PB0" position="D5"/>
+            <pin pad="PA6" position="D6"/>
+            <pin pad="SEG0" position="D7"/>
+            <pin pad="VLCD" position="D8"/>
+            <pin pad="GND" position="D9"/>
+            <pin pad="VCC" position="D10"/>
+            <pin pad="PD2" position="E1"/>
+            <pin pad="RESET" position="E2"/>
+            <pin pad="PD1" position="E3"/>
+            <pin pad="PC6" position="E4"/>
+            <pin pad="PB1" position="E5"/>
+            <pin pad="PA2" position="E6"/>
+            <pin pad="SEG1" position="E7"/>
+            <pin pad="SEG4" position="E8"/>
+            <pin pad="SEG3" position="E9"/>
+            <pin pad="SEG2" position="E10"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="GND" position="F2"/>
+            <pin pad="PDI" position="F3"/>
+            <pin pad="PC7" position="F4"/>
+            <pin pad="PB3" position="F5"/>
+            <pin pad="PM2" position="F6"/>
+            <pin pad="SEG10" position="F7"/>
+            <pin pad="SEG7" position="F8"/>
+            <pin pad="SEG6" position="F9"/>
+            <pin pad="SEG5" position="F10"/>
+            <pin pad="PE2" position="G1"/>
+            <pin pad="PE1" position="G2"/>
+            <pin pad="PE3" position="G3"/>
+            <pin pad="PE0" position="G4"/>
+            <pin pad="PE4" position="G5"/>
+            <pin pad="SEG23" position="G6"/>
+            <pin pad="SEG15" position="G7"/>
+            <pin pad="SEG13" position="G8"/>
+            <pin pad="SEG9" position="G9"/>
+            <pin pad="SEG8" position="G10"/>
+            <pin pad="PE5" position="H1"/>
+            <pin pad="PE6" position="H2"/>
+            <pin pad="PG1" position="H3"/>
+            <pin pad="PG4" position="H4"/>
+            <pin pad="PG7" position="H5"/>
+            <pin pad="PM5" position="H6"/>
+            <pin pad="SEG21" position="H7"/>
+            <pin pad="SEG18" position="H8"/>
+            <pin pad="SEG12" position="H9"/>
+            <pin pad="SEG11" position="H10"/>
+            <pin pad="PE7" position="J1"/>
+            <pin pad="PG0" position="J2"/>
+            <pin pad="PG3" position="J3"/>
+            <pin pad="PG6" position="J4"/>
+            <pin pad="PM1" position="J5"/>
+            <pin pad="PM4" position="J6"/>
+            <pin pad="PM7" position="J7"/>
+            <pin pad="SEG20" position="J8"/>
+            <pin pad="SEG16" position="J9"/>
+            <pin pad="SEG14" position="J10"/>
+            <pin pad="GND" position="K1"/>
+            <pin pad="VCC" position="K2"/>
+            <pin pad="PG2" position="K3"/>
+            <pin pad="PG5" position="K4"/>
+            <pin pad="PM0" position="K5"/>
+            <pin pad="PM3" position="K6"/>
+            <pin pad="PM6" position="K7"/>
+            <pin pad="SEG22" position="K8"/>
+            <pin pad="SEG19" position="K9"/>
+            <pin pad="SEG17" position="K10"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
new file mode 100644
index 00000000..5261e48a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128B3.xml
@@ -0,0 +1,3129 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128B3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128B3-MCU" package="DRQFN64" pinout="DRQFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128B3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAB">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="0" pad="PC0"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="1" pad="PC1"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="2" pad="PC2"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="3" pad="PC3"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="4" pad="PC4"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="5" pad="PC5"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="6" pad="PC6"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAB">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6080" version="XMEGAB">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAB">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAB">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PD7"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PD7"/>
+                            <signal field="RTCOUT" function="RTCOUTC" group="RTCOUT" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAB">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000" version="XMEGAB">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAB">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAB">
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAB">
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD0"/>
+                            <signal function="USB" group="DP" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG">
+                        <register-group address-space="data" offset="0x06C0" name-in-module="PORT" name="PORTG"/>
+                        <signals>
+                            <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                            <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                            <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                            <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                            <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                            <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                            <signal function="PORTG" group="P" index="6" pad="PG6"/>
+                            <signal function="PORTG" group="P" index="7" pad="PG7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTM">
+                        <register-group address-space="data" offset="0x0760" name-in-module="PORT" name="PORTM"/>
+                        <signals>
+                            <signal function="PORTM" group="P" index="0" pad="PM0"/>
+                            <signal function="PORTM" group="P" index="1" pad="PM1"/>
+                            <signal function="PORTM" group="P" index="2" pad="PM2"/>
+                            <signal function="PORTM" group="P" index="3" pad="PM3"/>
+                            <signal function="PORTM" group="P" index="4" pad="PM4"/>
+                            <signal function="PORTM" group="P" index="5" pad="PM5"/>
+                            <signal function="PORTM" group="P" index="6" pad="PM6"/>
+                            <signal function="PORTM" group="P" index="7" pad="PM7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAB">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAB">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="LCD" id="I3003">
+                    <instance name="LCD">
+                        <register-group address-space="data" offset="0x0D00" name-in-module="LCD" name="LCD"/>
+                        <signals>
+                            <signal function="LCD_SEG" group="SEG" index="24" pad="PG0"/>
+                            <signal function="LCD_SEG" group="SEG" index="23" pad="PG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="22" pad="PG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="21" pad="PG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="20" pad="PG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="19" pad="PG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="18" pad="PG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="17" pad="PG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="16" pad="PM0"/>
+                            <signal function="LCD_SEG" group="SEG" index="15" pad="PM1"/>
+                            <signal function="LCD_SEG" group="SEG" index="14" pad="PM2"/>
+                            <signal function="LCD_SEG" group="SEG" index="13" pad="PM3"/>
+                            <signal function="LCD_SEG" group="SEG" index="12" pad="PM4"/>
+                            <signal function="LCD_SEG" group="SEG" index="11" pad="PM5"/>
+                            <signal function="LCD_SEG" group="SEG" index="10" pad="PM6"/>
+                            <signal function="LCD_SEG" group="SEG" index="9" pad="PM7"/>
+                            <signal function="LCD_SEG" group="SEG" index="8" pad="SEG8"/>
+                            <signal function="LCD_SEG" group="SEG" index="7" pad="SEG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="6" pad="SEG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="5" pad="SEG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="4" pad="SEG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="3" pad="SEG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="2" pad="SEG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="1" pad="SEG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="0" pad="SEG0"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="1" pad="SEG1"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="0" pad="SEG0"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="1" pad="BIAS1"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="2" pad="BIAS2"/>
+                            <signal function="LCD_BIAS" group="VLCD" pad="VLCD"/>
+                            <signal function="LCD_BIAS" group="CAPL" pad="CAPL"/>
+                            <signal function="LCD_BIAS" group="CAPH" pad="CAPH"/>
+                            <signal function="LCD_COM" group="COM" index="0" pad="COM0"/>
+                            <signal function="LCD_COM" group="COM" index="1" pad="COM1"/>
+                            <signal function="LCD_COM" group="COM" index="2" pad="COM2"/>
+                            <signal function="LCD_COM" group="COM" index="3" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="0" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="1" pad="COM2"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="2" pad="COM1"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="3" pad="COM0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3600" version="XMEGAB">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="USB" name-in-module="USB"/>
+                <interrupt-group index="35" module-instance="LCD" name-in-module="LCD"/>
+                <interrupt-group index="36" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="37" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="39" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="41" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="44" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="48" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="50" module-instance="PORTG" name-in-module="PORT"/>
+                <interrupt-group index="52" module-instance="PORTM" name-in-module="PORT"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974B03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x4B"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAB" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAB" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="External Clock on port C0 - 6 CLK" name="EXTCLK_C0" value="0x01"/>
+                <value caption="External Clock on port C1 - 6 CLK" name="EXTCLK_C1" value="0x05"/>
+                <value caption="External Clock on port C2 - 6 CLK" name="EXTCLK_C2" value="0x09"/>
+                <value caption="External Clock on port C3 - 6 CLK" name="EXTCLK_C3" value="0x0D"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x11"/>
+                <value caption="External Clock on port C5 - 6 CLK" name="EXTCLK_C5" value="0x15"/>
+                <value caption="External Clock on port C6 - 6 CLK" name="EXTCLK_C6" value="0x19"/>
+                <value caption="External Clock on port C7 - 6 CLK" name="EXTCLK_C7" value="0x1D"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="PR" id="I6080" version="XMEGAB" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="6">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="LCD Module" mask="0x80" name="LCD"/>
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAB" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAB" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C" name="PC" value="0x01"/>
+                <value caption="System Clock Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0 Output on Port C" name="PC" value="0x01"/>
+                <value caption="Event Channel 0 Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAB" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" version="XMEGAB" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="CHEN"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="CHRST"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="48">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x04" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x01" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR01" value="0x00"/>
+                <value caption="Channel 0 &gt; channel 1" name="CH0RR1" value="0x01"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAB" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC B Channel" name="ADCB_CH0" value="0x24"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAB" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current limit" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAB" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAB" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAB" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="LCD" id="I3003" caption="LCD Controller">
+            <register-group caption="LCD Controller" name="LCD" size="36">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LCD Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="External Register Bias Generation" mask="0x40" name="XBIAS"/>
+                    <bitfield caption="Data Register Lock" mask="0x20" name="DATCLK"/>
+                    <bitfield caption="Common Bus Swap" mask="0x10" name="COMSWP"/>
+                    <bitfield caption="Segment Bus Swap" mask="0x08" name="SEGSWP"/>
+                    <bitfield caption="Clear Data Register" mask="0x04" name="CLRDT"/>
+                    <bitfield caption="Segments On" mask="0x02" name="SEGON"/>
+                    <bitfield caption="Blanking Display Mode" mask="0x01" name="BLANK"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="LCD Prescaler Select" mask="0x80" name="PRESC" values="LCD_PRESC"/>
+                    <bitfield caption="LCD Clock Divide" mask="0x70" name="CLKDIV" values="LCD_CLKDIV"/>
+                    <bitfield caption="Low Power Waveform" mask="0x08" name="LPWAV"/>
+                    <bitfield caption="Duty Select" mask="0x03" name="DUTY" values="LCD_DUTY"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="LCD Port Mask" mask="0x3F" name="PMSK"/>
+                </register>
+                <register caption="Interrupt Enable Register" name="INTCTRL" offset="0x03" size="1">
+                    <bitfield caption="eXtended Interrupt Mode Enable" mask="0xF8" name="XIME"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="FCINTLVL" values="LCD_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAG" offset="0x04" size="1">
+                    <bitfield caption="LCD Frame Completed Interrupt Flag" mask="0x01" name="FCIF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Blink Enable" mask="0x08" name="BLINKEN"/>
+                    <bitfield caption="LCD Blink Rate" mask="0x03" name="BLINKRATE" values="LCD_BLINKRATE"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x06" size="1">
+                    <bitfield caption="Blink Pixel Selection 1" mask="0xF0" name="BPS1"/>
+                    <bitfield caption="Blink Pixel Selection 0" mask="0x0F" name="BPS0"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x07" size="1">
+                    <bitfield caption="Fine Contrast" mask="0x3F" name="FCONT"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x08" size="1">
+                    <bitfield caption="Type of Digit" mask="0xC0" name="TDG" values="LCD_TDG"/>
+                    <bitfield caption="Start Segment" mask="0x3F" name="STSEG"/>
+                </register>
+                <register caption="Control Register H" name="CTRLH" offset="0x09" size="1">
+                    <bitfield caption="Decrement of Start Segment" mask="0x80" name="DEC"/>
+                    <bitfield caption="Display Code" mask="0x7F" name="DCODE"/>
+                </register>
+                <register caption="LCD Data Register 0" name="DATA0" offset="0x10" size="1"/>
+                <register caption="LCD Data Register 1" name="DATA1" offset="0x11" size="1"/>
+                <register caption="LCD Data Register 2" name="DATA2" offset="0x12" size="1"/>
+                <register caption="LCD Data Register 3" name="DATA3" offset="0x13" size="1"/>
+                <register caption="LCD Data Register 4" name="DATA4" offset="0x14" size="1"/>
+                <register caption="LCD Data Register 5" name="DATA5" offset="0x15" size="1"/>
+                <register caption="LCD Data Register 6" name="DATA6" offset="0x16" size="1"/>
+                <register caption="LCD Data Register 7" name="DATA7" offset="0x17" size="1"/>
+                <register caption="LCD Data Register 8" name="DATA8" offset="0x18" size="1"/>
+                <register caption="LCD Data Register 9" name="DATA9" offset="0x19" size="1"/>
+                <register caption="LCD Data Register 10" name="DATA10" offset="0x1A" size="1"/>
+                <register caption="LCD Data Register 11" name="DATA11" offset="0x1B" size="1"/>
+                <register caption="LCD Data Register 12" name="DATA12" offset="0x1C" size="1"/>
+                <register caption="LCD Data Register 13" name="DATA13" offset="0x1D" size="1"/>
+                <register caption="LCD Data Register 14" name="DATA14" offset="0x1E" size="1"/>
+                <register caption="LCD Data Register 15" name="DATA15" offset="0x1F" size="1"/>
+                <register caption="LCD Data Register 16" name="DATA16" offset="0x20" size="1"/>
+                <register caption="LCD Data Register 17" name="DATA17" offset="0x21" size="1"/>
+                <register caption="LCD Data Register 18" name="DATA18" offset="0x22" size="1"/>
+                <register caption="LCD Data Register 19" name="DATA19" offset="0x23" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="LCD_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Blink Rate" name="LCD_BLINKRATE">
+                <value caption="4Hz Blink Rate" name="4Hz" value="0x00"/>
+                <value caption="2Hz Blink Rate" name="2Hz" value="0x01"/>
+                <value caption="1Hz Blink Rate" name="1Hz" value="0x02"/>
+                <value caption="0.5Hz Blink Rate" name="0Hz5" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Clock Divide" name="LCD_CLKDIV">
+                <value caption="frame rate of 256 Hz" name="DivBy1" value="0x00"/>
+                <value caption="frame rate of 128 Hz" name="DivBy2" value="0x01"/>
+                <value caption="frame rate of 83.5 Hz" name="DivBy3" value="0x02"/>
+                <value caption="frame rate of 64 Hz" name="DivBy4" value="0x03"/>
+                <value caption="frame rate of 51.2 Hz" name="DivBy5" value="0x04"/>
+                <value caption="frame rate of 42.7 Hz" name="DivBy6" value="0x05"/>
+                <value caption="frame rate of 36.6 Hz" name="DivBy7" value="0x06"/>
+                <value caption="frame rate of 32 Hz" name="DivBy8" value="0x07"/>
+            </value-group>
+            <value-group caption="Duty Select" name="LCD_DUTY">
+                <value caption="Duty=1/4, Bias=1/3, COM0:3" name="1_4" value="0x00"/>
+                <value caption="Duty=Static, Bias=Static, COM0" name="Static" value="0x01"/>
+                <value caption="Duty=1/2, Bias=1/3, COM0:1" name="1_2" value="0x02"/>
+                <value caption="Duty=1/3, Bias=1/3, COM0:2" name="1_3" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Prescaler Select" name="LCD_PRESC">
+                <value caption="clk_lcd/8" name="8" value="0x00"/>
+                <value caption="clk_lcd/16" name="16" value="0x01"/>
+            </value-group>
+            <value-group caption="Type of Digit" name="LCD_TDG">
+                <value caption="7-segment with 3 COMs" name="7S_3C" value="0x00"/>
+                <value caption="7-segment with 4 COMs" name="7S_4C" value="0x01"/>
+                <value caption="14-segment with 4 COMs" name="14S_4C" value="0x02"/>
+                <value caption="16-segment with 3 COMs" name="16S_3C" value="0x03"/>
+            </value-group>
+            <interrupt-group name="LCD">
+                <interrupt index="0" name="INT" caption="LCD Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3600" version="XMEGAB" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PC0" position="1"/>
+            <pin pad="PC1" position="2"/>
+            <pin pad="PC2" position="3"/>
+            <pin pad="PC3" position="4"/>
+            <pin pad="PC4" position="5"/>
+            <pin pad="PC5" position="6"/>
+            <pin pad="PC6" position="7"/>
+            <pin pad="PC7" position="8"/>
+            <pin pad="GND" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="PD0" position="11"/>
+            <pin pad="PD1" position="12"/>
+            <pin pad="RESET" position="13"/>
+            <pin pad="PDI" position="14"/>
+            <pin pad="GND" position="15"/>
+            <pin pad="VCC" position="16"/>
+            <pin pad="PG0" position="17"/>
+            <pin pad="PG1" position="18"/>
+            <pin pad="PG2" position="19"/>
+            <pin pad="PG3" position="20"/>
+            <pin pad="PG4" position="21"/>
+            <pin pad="PG5" position="22"/>
+            <pin pad="PG6" position="23"/>
+            <pin pad="PG7" position="24"/>
+            <pin pad="PM0" position="25"/>
+            <pin pad="PM1" position="26"/>
+            <pin pad="PM2" position="27"/>
+            <pin pad="PM3" position="28"/>
+            <pin pad="PM4" position="29"/>
+            <pin pad="PM5" position="30"/>
+            <pin pad="PM6" position="31"/>
+            <pin pad="PM7" position="32"/>
+            <pin pad="SEG8" position="33"/>
+            <pin pad="SEG7" position="34"/>
+            <pin pad="SEG6" position="35"/>
+            <pin pad="SEG5" position="36"/>
+            <pin pad="SEG4" position="37"/>
+            <pin pad="SEG3" position="38"/>
+            <pin pad="SEG2" position="39"/>
+            <pin pad="SEG1" position="40"/>
+            <pin pad="SEG0" position="41"/>
+            <pin pad="GND" position="42"/>
+            <pin pad="VCC" position="43"/>
+            <pin pad="BIAS1" position="44"/>
+            <pin pad="BIAS2" position="45"/>
+            <pin pad="VLCD" position="46"/>
+            <pin pad="CAPL" position="47"/>
+            <pin pad="CAPH" position="48"/>
+            <pin pad="COM0" position="49"/>
+            <pin pad="COM1" position="50"/>
+            <pin pad="COM2" position="51"/>
+            <pin pad="COM3" position="52"/>
+            <pin pad="PR0" position="53"/>
+            <pin pad="PR1" position="54"/>
+            <pin pad="AGND" position="55"/>
+            <pin pad="AVCC" position="56"/>
+            <pin pad="PB0" position="57"/>
+            <pin pad="PB1" position="58"/>
+            <pin pad="PB2" position="59"/>
+            <pin pad="PB3" position="60"/>
+            <pin pad="PB4" position="61"/>
+            <pin pad="PB5" position="62"/>
+            <pin pad="PB6" position="63"/>
+            <pin pad="PB7" position="64"/>
+        </pinout>
+        <pinout name="DRQFN_64">
+            <pin pad="PC0" position="A1"/>
+            <pin pad="PC1" position="B1"/>
+            <pin pad="PC2" position="A2"/>
+            <pin pad="PC3" position="B2"/>
+            <pin pad="PC4" position="A3"/>
+            <pin pad="PC5" position="B3"/>
+            <pin pad="PC6" position="A4"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="PC7" position="A5"/>
+            <pin pad="PD0" position="B5"/>
+            <pin pad="VCC" position="A6"/>
+            <pin pad="RESET" position="B6"/>
+            <pin pad="PD1" position="A7"/>
+            <pin pad="PDI" position="B7"/>
+            <pin pad="GND" position="A8"/>
+            <pin pad="PG0" position="A9"/>
+            <pin pad="VCC" position="B8"/>
+            <pin pad="PG2" position="A10"/>
+            <pin pad="PG1" position="B9"/>
+            <pin pad="PG3" position="A11"/>
+            <pin pad="PG4" position="B10"/>
+            <pin pad="PG5" position="A12"/>
+            <pin pad="PG6" position="B11"/>
+            <pin pad="PG7" position="A13"/>
+            <pin pad="PM0" position="B12"/>
+            <pin pad="PM1" position="A14"/>
+            <pin pad="PM2" position="B13"/>
+            <pin pad="PM3" position="A15"/>
+            <pin pad="PM5" position="B14"/>
+            <pin pad="PM4" position="A16"/>
+            <pin pad="PM7" position="B15"/>
+            <pin pad="PM6" position="A17"/>
+            <pin pad="SEG7" position="A18"/>
+            <pin pad="SEG8" position="B16"/>
+            <pin pad="SEG6" position="A19"/>
+            <pin pad="SEG5" position="B17"/>
+            <pin pad="SEG4" position="A20"/>
+            <pin pad="SEG3" position="B18"/>
+            <pin pad="SEG2" position="A21"/>
+            <pin pad="SEG1" position="B19"/>
+            <pin pad="SEG0" position="A22"/>
+            <pin pad="GND" position="B20"/>
+            <pin pad="VCC" position="A23"/>
+            <pin pad="BIAS1" position="B21"/>
+            <pin pad="BIAS2" position="A24"/>
+            <pin pad="VLCD" position="B22"/>
+            <pin pad="CAPL" position="A25"/>
+            <pin pad="CAPH" position="A26"/>
+            <pin pad="COM0" position="B23"/>
+            <pin pad="COM1" position="A27"/>
+            <pin pad="COM2" position="B24"/>
+            <pin pad="COM3" position="A28"/>
+            <pin pad="PR0" position="B25"/>
+            <pin pad="PR1" position="A29"/>
+            <pin pad="AGND" position="B26"/>
+            <pin pad="PB0" position="A30"/>
+            <pin pad="AVCC" position="B27"/>
+            <pin pad="PB1" position="A31"/>
+            <pin pad="PB2" position="B28"/>
+            <pin pad="PB3" position="A32"/>
+            <pin pad="PB4" position="B29"/>
+            <pin pad="PB5" position="A33"/>
+            <pin pad="PB7" position="B30"/>
+            <pin pad="PB6" position="A34"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml
new file mode 100644
index 00000000..456b43af
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128C3.xml
@@ -0,0 +1,2840 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x52"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml
new file mode 100644
index 00000000..07cf1610
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128D3.xml
@@ -0,0 +1,2614 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128D3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x22000" endianness="little">
+                    <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974803F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x48"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan(Legacy name)" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml
new file mode 100644
index 00000000..957decb1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA128D4.xml
@@ -0,0 +1,2617 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega128D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega128D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega128D4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x22000" endianness="little">
+                    <memory-segment start="0x00000" size="0x20000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x1E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x20000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x2000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAD">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAD4">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TCC" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TCC" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TCC" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TCC" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TCC" group="OC0A" pad="PD0"/>
+                            <signal function="TCC" group="OC0B" pad="PD1"/>
+                            <signal function="TCC" group="OC0C" pad="PD2"/>
+                            <signal function="TCC" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE" group="OC0A" pad="PE0"/>
+                            <signal function="TCE" group="OC0B" pad="PE1"/>
+                            <signal function="TCE" group="OC0C" pad="PE2"/>
+                            <signal function="TCE" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TCC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TCC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TCC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TCC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TCC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TCC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TCC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TCC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAD">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x47"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00820000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAD" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAD" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
new file mode 100644
index 00000000..1ed05c87
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4.xml
@@ -0,0 +1,2550 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA16A4-AU" package="TQFP44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA16A4-MU" package="VQFN44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega16A4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x5000" endianness="little">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x4000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="HIRESE" name-in-module="TC1"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0944103F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x41"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00803000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00804000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.7 V" name="2V7" value="0x03"/>
+                <value caption="3.0 V" name="3V0" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.5 V" name="3V5" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml
new file mode 100644
index 00000000..d6c9f56e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16A4U.xml
@@ -0,0 +1,3364 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega16A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-MH" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16A4U-M7" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega16A4U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x5000" endianness="little">
+                    <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
+                    <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                            <signal function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAA4U">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x41"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00803000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00804000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAA4U" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI_DATA" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml
new file mode 100644
index 00000000..64b8a884
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16C4.xml
@@ -0,0 +1,2825 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega16C4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16C4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega16C4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x5000" endianness="little">
+                    <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
+                    <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TCC" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TCC" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TCC" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TCC" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE" group="OC0A" pad="PE0"/>
+                            <signal function="TCE" group="OC0B" pad="PE1"/>
+                            <signal function="TCE" group="OC0C" pad="PE2"/>
+                            <signal function="TCE" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PC5"/>
+                            <signal function="USART" group="RXD" pad="PC6"/>
+                            <signal function="USART" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x43"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00803000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00804000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml
new file mode 100644
index 00000000..12c8a371
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16D4.xml
@@ -0,0 +1,2567 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega16D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega16D4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x5000" endianness="little">
+                    <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x3000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x4000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TCC" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TCC" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TCC" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TCC" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TCC" group="OC0A" pad="PD0"/>
+                            <signal function="TCC" group="OC0B" pad="PD1"/>
+                            <signal function="TCC" group="OC0C" pad="PD2"/>
+                            <signal function="TCC" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE" group="OC0A" pad="PE0"/>
+                            <signal function="TCE" group="OC0B" pad="PE1"/>
+                            <signal function="TCE" group="OC0C" pad="PE2"/>
+                            <signal function="TCE" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TCC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TCC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TCC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TCC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TCC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TCC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TCC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TCC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="TCC" group="XCK" pad="PD1"/>
+                            <signal function="TCC" group="RXD" pad="PD2"/>
+                            <signal function="TCC" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0944203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00803000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00804000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan(Legacy name)" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
new file mode 100644
index 00000000..443e5f8b
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA16E5.xml
@@ -0,0 +1,3365 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega16E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega16E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega16E5" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x5000" endianness="little">
+                    <memory-segment start="0x00000" size="0x4000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="128"/>
+                    <memory-segment start="0x03000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="128"/>
+                    <memory-segment start="0x04000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="128"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x2800" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0200" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x0800" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0200">
+                    <memory-segment start="0x00000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0007">
+                    <memory-segment start="0x0000" size="0x0007" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0080">
+                    <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="128"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0036">
+                    <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="128"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAE">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAE">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAE">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAE">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAE">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAE">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTR" group="CLKOUT" pad="PR0"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTR" group="EVOUT" pad="PR0"/>
+                            <signal field="RTCOUT" function="RTCOUTD" group="RTCOUT" pad="PD6"/>
+                            <signal field="RTCOUT" function="RTCOUTR" group="RTCOUT" pad="PR0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EDMA" id="I3002" version="XMEGAE">
+                    <instance name="EDMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="EDMA" name="EDMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAE">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I3620" version="XMEGAE">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAE">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PD0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PD1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PD2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PD3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PD7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFD" index="0" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PA2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFD" index="0" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAE">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal field="ACOUT" function="ACOUT_PA" group="ACOUT" index="1" pad="PA6"/>
+                            <signal field="ACOUT" function="ACOUT_PA" group="ACOUT" index="0" pad="PA7"/>
+                            <signal field="ACOUT" function="ACOUT_PC" group="ACOUT" index="1" pad="PC6"/>
+                            <signal field="ACOUT" function="ACOUT_PC" group="ACOUT" index="0" pad="PC7"/>
+                            <signal field="ACOUT" function="ACOUT_PD" group="ACOUT" index="1" pad="PD6"/>
+                            <signal field="ACOUT" function="ACOUT_PD" group="ACOUT" index="0" pad="PD7"/>
+                            <signal field="ACOUT" function="ACOUT_PR" group="ACOUT" index="1" pad="PR0"/>
+                            <signal field="ACOUT" function="ACOUT_PR" group="ACOUT" index="0" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093" version="XMEGAE">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="XCL" id="I3008">
+                    <instance name="XCL">
+                        <register-group address-space="data" offset="0x0460" name-in-module="XCL" name="XCL"/>
+                        <signals>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="1" pad="PC0"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="2" pad="PC1"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="0" pad="PC2"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="3" pad="PC3"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="1" pad="PC4"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="2" pad="PC5"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="0" pad="PC6"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="3" pad="PC7"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="1" pad="PD0"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="2" pad="PD1"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="0" pad="PD2"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="3" pad="PD3"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="1" pad="PD4"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="2" pad="PD5"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="0" pad="PD6"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="3" pad="PD7"/>
+                            <signal function="XCLOUT_LSB_PC" group="OUT" index="0" pad="PC0"/>
+                            <signal function="XCLOUT_MSB_PC" group="OUT" index="0" pad="PC4"/>
+                            <signal function="XCLOUT_LSB_PD" group="OUT" index="0" pad="PD0"/>
+                            <signal function="XCLOUT_LSB_PD" group="OUT" index="0" pad="PD4"/>
+                            <signal function="XCL_OCOUT" group="OC" index="0" pad="PD2"/>
+                            <signal function="XCL_OCOUT" group="OC" index="1" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAE">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_BRIDGE" group="SDA" pad="PD0"/>
+                            <signal function="TWI_BRIDGE" group="SCL" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAE">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I3007" version="XMEGAE">
+                    <instance name="TCC4">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC4" name="TCC4"/>
+                        <signals>
+                            <signal field="TC4A" function="TC4" group="OC4A" pad="PC0"/>
+                            <signal field="TC4B" function="TC4" group="OC4B" pad="PC1"/>
+                            <signal field="TC4C" function="TC4" group="OC4C" pad="PC2"/>
+                            <signal field="TC4D" function="TC4" group="OC4D" pad="PC3"/>
+                            <signal field="TC4A" function="TC4_ALT" group="OC4A" pad="PC4"/>
+                            <signal field="TC4B" function="TC4_ALT" group="OC4B" pad="PC5"/>
+                            <signal field="TC4C" function="TC4_ALT" group="OC4C" pad="PC6"/>
+                            <signal field="TC4D" function="TC4_ALT" group="OC4D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC5">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC5" name="TCC5"/>
+                        <signals>
+                            <signal function="TC5" group="OC5A" pad="PC4"/>
+                            <signal function="TC5" group="OC5B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD5">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC5" name="TCD5"/>
+                        <signals>
+                            <signal function="TC5" group="OC5A" pad="PD4"/>
+                            <signal function="TC5" group="OC5B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FAULT" id="I3620" version="XMEGAE">
+                    <instance name="FAULTC4">
+                        <register-group address-space="data" offset="0x880" name-in-module="FAULT" name="FAULTC4"/>
+                    </instance>
+                    <instance name="FAULTC5">
+                        <register-group address-space="data" offset="0x890" name-in-module="FAULT" name="FAULTC5"/>
+                    </instance>
+                </module>
+                <module name="WEX" id="I3007" version="XMEGAE">
+                    <instance name="WEXC">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="WEX" name="WEXC"/>
+                        <signals>
+                            <signal function="WEX" group="OC4ALS" pad="PC0"/>
+                            <signal function="WEX" group="OC4AHS" pad="PC1"/>
+                            <signal function="WEX" group="OC4BLS" pad="PC2"/>
+                            <signal function="WEX" group="OC4BHS" pad="PC3"/>
+                            <signal function="WEX" group="OC4CLS" pad="PC4"/>
+                            <signal function="WEX" group="OC4CHS" pad="PC5"/>
+                            <signal function="WEX" group="OC4DLS" pad="PC6"/>
+                            <signal function="WEX" group="OC4DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I3620" version="XMEGAE">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I4000" version="XMEGAE">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAE">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x08E0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PC4"/>
+                            <signal function="SPI" group="SCK" pad="PC5"/>
+                            <signal function="SPI" group="MISO" pad="PC6"/>
+                            <signal function="SPI" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I3620" version="XMEGAE">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3620" version="XMEGAE">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="3" module-instance="EDMA" name-in-module="EDMA"/>
+                <interrupt-group index="7" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="9" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="12" module-instance="TCC4" name-in-module="TC4"/>
+                <interrupt-group index="18" module-instance="TCC5" name-in-module="TC5"/>
+                <interrupt-group index="22" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="23" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="26" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="28" module-instance="XCL" name-in-module="XCL"/>
+                <interrupt-group index="30" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="31" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="34" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="35" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="TCD5" name-in-module="TC5"/>
+                <interrupt-group index="40" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x94"/>
+                    <property name="SIGNATURE2" value="0x45"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00803000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00804000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAE" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Interrupt Pin 7 Flag" mask="0x80" name="INT7IF"/>
+                    <bitfield caption="Interrupt Pin 6 Flag" mask="0x40" name="INT6IF"/>
+                    <bitfield caption="Interrupt Pin 5 Flag" mask="0x20" name="INT5IF"/>
+                    <bitfield caption="Interrupt Pin 4 Flag" mask="0x10" name="INT4IF"/>
+                    <bitfield caption="Interrupt Pin 3 Flag" mask="0x08" name="INT3IF"/>
+                    <bitfield caption="Interrupt Pin 2 Flag" mask="0x04" name="INT2IF"/>
+                    <bitfield caption="Interrupt Pin 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Interrupt Pin 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAE" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+                <value caption="Internal 8 MHz RC Oscillator" name="RC8M" value="0x05"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+                <value caption="Divide by 6" name="6" value="0x13"/>
+                <value caption="Divide by 10" name="10" value="0x15"/>
+                <value caption="Divide by 12" name="12" value="0x17"/>
+                <value caption="Divide by 24" name="24" value="0x19"/>
+                <value caption="Divide by 48" name="48" value="0x1B"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAE" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="XMEGA Custom Logic" mask="0x80" name="XCL"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="Enhanced DMA-Controller" mask="0x01" name="EDMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C WEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter5" mask="0x02" name="TC5"/>
+                    <bitfield caption="Port C Timer/Counter4" mask="0x01" name="TC4"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D Timer/Counter5" mask="0x02" name="TC5"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAE" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Internal 8 MHz RC Low Power Mode Enable" mask="0x40" name="RC8MLPM"/>
+                    <bitfield caption="Internal 8 MHz RC Oscillator Enable" mask="0x20" name="RC8MEN"/>
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Internal 8 MHz RC Oscillator Ready" mask="0x20" name="RC8MRDY"/>
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                </register>
+                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07"
+                          size="1">
+                    <bitfield caption="Calibration Bits" mask="0xFF" name="RC8MCAL"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x14"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 8 MHz RC Oscillator" name="RC8M" value="0x01"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAE" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="WEX Lock" name="WEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="WeX on T/C C4 Lock" mask="0x01" name="WEXCLOCK"/>
+                </register>
+                <register caption="FAULT Lock" name="FAULTLOCK" offset="0x0A" size="1">
+                    <bitfield caption="Fault on T/C C5 Lock" mask="0x02" name="FAULTC5LOCK"/>
+                    <bitfield caption="Fault on T/C C4 Lock" mask="0x01" name="FAULTC4LOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAE" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="8">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Clock Out Register" name="CLKOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="RTC Clock Output Enable" mask="0x60" name="RTCOUT" values="PORTCFG_RTCCLKOUT"/>
+                    <bitfield caption="Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                </register>
+                <register caption="Analog Comparator and Event Out Register" name="ACEVOUT" offset="0x06" size="1">
+                    <bitfield caption="Analog Comparator Output Port" mask="0xC0" name="ACOUT" values="PORTCFG_ACOUT"/>
+                    <bitfield caption="Event Channel Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="Asynchronous Event Enabled" mask="0x08" name="EVASYEN"/>
+                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL"
+                              values="PORTCFG_EVOUTSEL"/>
+                </register>
+                <register caption="Slew Rate Limit Control Register" name="SRLCTRL" offset="0x07" size="1">
+                    <bitfield caption="Slew Rate Limit Enable on PORTA" mask="0x01" name="SRLENRA"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTC" mask="0x04" name="SRLENRC"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTD" mask="0x08" name="SRLENRD"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTR" mask="0x80" name="SRLENRR"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="RTC Clock Output Port" name="PORTCFG_RTCCLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 6" name="PC6" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 6" name="PD6" value="0x02"/>
+                <value caption="System Clock Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Analog Comparator Output Port" name="PORTCFG_ACOUT">
+                <value caption="Analog Comparator Outputs on Port A, Pin 6-7" name="PA" value="0x00"/>
+                <value caption="Analog Comparator Outputs on Port C, Pin 6-7" name="PC" value="0x01"/>
+                <value caption="Analog Comparator Outputs on Port D, Pin 6-7" name="PD" value="0x02"/>
+                <value caption="Analog Comparator Outputs on Port R, Pin 0-1" name="PR" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel n Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel n Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel n Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="EDMA" id="I3002" version="XMEGAE" caption="Enhanced DMA Controller">
+            <register-group caption="Enhanced DMA Controller" name="EDMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Mode" mask="0x30" name="CHMODE" values="EDMA_CHMODE"/>
+                    <bitfield caption="Double Buffer Mode" mask="0x0C" name="DBUFMODE" values="EDMA_DBUFMODE"/>
+                    <bitfield caption="Priority Mode" mask="0x03" name="PRIMODE" values="EDMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Transaction Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Transaction Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Transaction Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNFIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNFIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNFIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNFIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Busy Flag" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Busy Flag" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Busy Flag" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Busy Flag" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Pending Flag" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Pending Flag" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Pending Flag" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Pending Flag" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="1"/>
+                <register-group caption="EDMA Channel 0" name="CH0" offset="0x10" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 1" name="CH1" offset="0x20" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 2" name="CH2" offset="0x30" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 3" name="CH3" offset="0x40" name-in-module="EDMA_CH"/>
+            </register-group>
+            <register-group caption="EDMA Channel" name="EDMA_CH" size="16">
+                <register caption="Channel Control A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel 2-bytes Burst Length" mask="0x01" name="BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Channel Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="EDMA_CH_INTLVL"/>
+                </register>
+                <register
+                        caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch."
+                        name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield
+                            caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
+                            mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
+                              mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
+                </register>
+                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL"
+                          offset="0x03" size="1">
+                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30"
+                              name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR"
+                              values="EDMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x04" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="EDMA_CH_TRIGSRC"/>
+                </register>
+                <register
+                        caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch."
+                        name="TRFCNT" offset="0x06" size="2"/>
+                <register
+                        caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch."
+                        name="ADDR" offset="0x08" size="2"/>
+                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR"
+                          offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Channel mode" name="EDMA_CHMODE">
+                <value caption="Channels 0, 1, 2 and 3 in peripheal conf." name="PER0123" value="0x00"/>
+                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0"
+                       value="0x01"/>
+                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2"
+                       value="0x02"/>
+                <value caption="Channels 0 and 2 in standard conf." name="STD02" value="0x03"/>
+            </value-group>
+            <value-group caption="Double buffer mode" name="EDMA_DBUFMODE">
+                <value caption="No double buffer enabled" name="DISABLE" value="0x00"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01"
+                       value="0x01"/>
+                <value caption="Double buffer enabled on peripheral channels 2/3 (if exist)" name="BUF23" value="0x02"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2"
+                       name="BUF0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="EDMA_PRIMODE">
+                <value caption="Round robin on all channels" name="RR0123" value="0x00"/>
+                <value caption="Ch0 &gt; round robin (Ch 1 ch2 Ch3)" name="RR123" value="0x01"/>
+                <value caption="Ch0 &gt; Ch 1 &gt; round robin (Ch2 Ch3)" name="RR23" value="0x02"/>
+                <value caption="Ch0 &gt; Ch1 &gt; Ch2 &gt; Ch3 " name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
+                         name="EDMA_CH_RELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of each block transfer" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of each burst transfer" name="BURST" value="0x02"/>
+                <value caption="Reload at end of each transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
+                         name="EDMA_CH_DIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. "
+                       name="MP1" value="0x04"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. "
+                       name="MP2" value="0x05"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. "
+                       name="MP3" value="0x06"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="EDMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="1-byte 'mask-match' (data: ADDRL, mask: ADDRH)" name="MP1" value="0x04"/>
+                <value caption="1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH)" name="MP2" value="0x05"/>
+                <value caption="2-byte 'match' (data1: ADDRL followed by data2: ADDRH)" name="MP3" value="0x06"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="EDMA_CH_TRIGSRC">
+                <value caption="Software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event CH0 as trigger (Standard Channels Only)" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event CH1 as trigger (Standard Channels Only)" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event CH2 as trigger (Standard Channels Only)" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA CH0 as trigger" name="ADCA_CH0" value="0x10"/>
+                <value caption="DACA CH0 as trigger" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA CH1 as trigger" name="DACA_CH1" value="0x16"/>
+                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF"
+                       value="0x40"/>
+                <value caption="TCC4 error as trigger (Standard Channels Only)" name="TCC4_ERR" value="0x41"/>
+                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA"
+                       value="0x42"/>
+                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB"
+                       value="0x43"/>
+                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC"
+                       value="0x44"/>
+                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD"
+                       value="0x45"/>
+                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF"
+                       value="0x46"/>
+                <value caption="TCC5 error as trigger (Standard Channels Only)" name="TCC5_ERR" value="0x47"/>
+                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA"
+                       value="0x48"/>
+                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB"
+                       value="0x49"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)"
+                       name="SPIC_RXC" value="0x4A"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)"
+                       name="SPIC_DRE" value="0x4B"/>
+                <value caption="USART C0 receive complete as trigger" name="USARTC0_RXC" value="0x4C"/>
+                <value caption="USART C0 data register empty as trigger" name="USARTC0_DRE" value="0x4D"/>
+                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF"
+                       value="0x66"/>
+                <value caption="TCD5 error as trigger (Standard Channels Only)" name="TCD5_ERR" value="0x67"/>
+                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA"
+                       value="0x68"/>
+                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB"
+                       value="0x69"/>
+                <value caption="USART D0 receive complete as trigger" name="USARTD0_RXC" value="0x6C"/>
+                <value caption="USART D0 data register empty as trigger" name="USARTD0_DRE" value="0x6D"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="EDMA_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="EDMA">
+                <interrupt index="0" name="CH0" caption="EDMA Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="EDMA Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="EDMA Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="EDMA Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAE" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="19">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Rotary Decoder Enable" mask="0x80" name="ROTARY"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+                <register caption="Digital Filter Control Register" name="DFCTRL" offset="0x12" size="1">
+                    <bitfield caption="Prescaler Filter" mask="0xF0" name="PRESCFILT" values="EVSYS_PRESCFILT"/>
+                    <bitfield caption="Prescaler Filter Select" mask="0x08" name="FILTSEL"/>
+                    <bitfield caption="Prescaler" mask="0x07" name="PRESC" values="EVSYS_PRESCALER"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="XCL BTC0 underflow" name="XCL_UNF0" value="0xB0"/>
+                <value caption="XCL BTC1 underflow" name="XCL_UNF1" value="0xB1"/>
+                <value caption="XCL BTC0 capture or compare" name="XCL_CC0" value="0xB2"/>
+                <value caption="XCL BTC1 capture or compare" name="XCL_CC1" value="0xB3"/>
+                <value caption="XCL PEC0 restart" name="XCL_PEC0" value="0xB4"/>
+                <value caption="XCL PEC1 restart" name="XCL_PEC1" value="0xB5"/>
+                <value caption="XCL LUT0 output" name="XCL_LUT0" value="0xB6"/>
+                <value caption="XCL LUT1 output" name="XCL_LUT1" value="0xB7"/>
+                <value caption="Timer/Counter C4 Overflow" name="TCC4_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C4 Error" name="TCC4_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C4 Compare or Capture A" name="TCC4_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C4 Compare or Capture B" name="TCC4_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C4 Compare or Capture C" name="TCC4_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C4 Compare or Capture D" name="TCC4_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C5 Overflow" name="TCC5_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C5 Error" name="TCC5_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C5 Compare or Capture A" name="TCC5_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C5 Compare or Capture B" name="TCC5_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D5 Overflow" name="TCD5_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D5 Error" name="TCD5_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D5 Compare or Capture A" name="TCD5_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D5 Compare or Capture B" name="TCD5_CCB" value="0xDD"/>
+            </value-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Prescaler Filter" name="EVSYS_PRESCFILT">
+                <value caption="Enable prescaler filter for either channel 0 or 4" name="CH04" value="0x01"/>
+                <value caption="Enable prescaler filter for either channel 1 or 5" name="CH15" value="0x02"/>
+                <value caption="Enable prescaler filter for either channel 2 or 6" name="CH26" value="0x04"/>
+                <value caption="Enable prescaler filter for either channel 3 or 7" name="CH37" value="0x08"/>
+            </value-group>
+            <value-group caption="Prescaler" name="EVSYS_PRESCALER">
+                <value caption="CLKPER, divide by 8" name="CLKPER_8" value="0x00"/>
+                <value caption="CLKPER, divide by 64" name="CLKPER_64" value="0x01"/>
+                <value caption="CLKPER, divide by 512" name="CLKPER_512" value="0x02"/>
+                <value caption="CLKPER, divide by 4096" name="CLKPER_4096" value="0x03"/>
+                <value caption="CLKPER, divide by 32768" name="CLKPER_32768" value="0x04"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I3620" version="XMEGAE" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAE" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="IF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX Setting Offset" mask="0xF0" name="INPUTOFFSET"/>
+                    <bitfield caption="Number of Channels Included in Scan" mask="0x0F" name="INPUTSCAN"/>
+                </register>
+                <register caption="Correction Control Register" name="CORRCTRL" offset="0x07" size="1">
+                    <bitfield caption="Correction Enable" mask="0x01" name="CORREN"/>
+                </register>
+                <register caption="Offset Correction Register 0" name="OFFSETCORR0" offset="0x08" size="1"/>
+                <register caption="Offset Correction Register 1" name="OFFSETCORR1" offset="0x09" size="1">
+                    <bitfield caption="Offset Correction Byte 1" mask="0x0F" name="OFFSETCORR"/>
+                </register>
+                <register caption="Gain Correction Register 0" name="GAINCORR0" offset="0x0A" size="1"/>
+                <register caption="Gain Correction Register 1" name="GAINCORR1" offset="0x0B" size="1">
+                    <bitfield caption="Gain Correction Byte 1" mask="0x0F" name="GAINCORR"/>
+                </register>
+                <register caption="Average Control Register" name="AVGCTRL" offset="0x0C" size="1">
+                    <bitfield caption="Right Shift" mask="0x70" name="RIGHTSHIFT"/>
+                    <bitfield caption="Averaged Number of Samples" mask="0x0F" name="SAMPNUM" values="ADC_SAMPNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Start Conversion" mask="0x04" name="START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="1"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="More than 12-bit (oversapling) right-adjusted result" name="MT12BIT" value="0x01"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT D" name="AREFD" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel conversion" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, gain with 4 LSB pins selection" name="DIFFWGAINL" value="0x02"/>
+                <value caption="Differential input, gain with 4 MSB pins selection" name="DIFFWGAINH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 Scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC Output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Averaged Number of Samples" name="ADC_SAMPNUM">
+                <value caption="1 Sample" name="1X" value="0x00"/>
+                <value caption="2 Samples" name="2X" value="0x01"/>
+                <value caption="4 Samples" name="4X" value="0x02"/>
+                <value caption="8 Samples" name="8X" value="0x03"/>
+                <value caption="16 Samples" name="16X" value="0x04"/>
+                <value caption="32 Samples" name="32X" value="0x05"/>
+                <value caption="64 Samples" name="64X" value="0x06"/>
+                <value caption="128 Samples" name="128X" value="0x07"/>
+                <value caption="256 Samples" name="256X" value="0x08"/>
+                <value caption="512 Samples" name="512X" value="0x09"/>
+                <value caption="1024 Samples" name="1024X" value="0x0A"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="ADC Channel Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTD" name="AREFD" value="0x03"/>
+                <value caption="Define for PortB kept for legacy reasons" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAE" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Invert Enable" mask="0x08" name="AC1INVEN"/>
+                    <bitfield caption="Analog Comparator 0 Output Invert Enable" mask="0x04" name="AC0INVEN"/>
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" version="XMEGAE" caption="Real-Time Clounter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Correction Enable" mask="0x08" name="CORREN"/>
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Calibration Register" name="CALIB" offset="0x06" size="1">
+                    <bitfield caption="Correction Sign" mask="0x80" name="SIGN"/>
+                    <bitfield caption="Error Value" mask="0x7F" name="ERROR"/>
+                </register>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="XCL" id="I3008" caption="XMEGA Custom Logic">
+            <register-group caption="XMEGA Custom Logic" name="XCL" size="16">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LUT0 Output Enable" mask="0xC0" name="LUT0OUTEN" values="XCL_LUT0OUTEN"/>
+                    <bitfield caption="Port Selection" mask="0x30" name="PORTSEL" values="XCL_PORTSEL"/>
+                    <bitfield caption="LUT Configuration" mask="0x07" name="LUTCONF" values="XCL_LUTCONF"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Input Selection 3" mask="0xC0" name="IN3SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 2" mask="0x30" name="IN2SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 1" mask="0x0C" name="IN1SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 0" mask="0x03" name="IN0SEL" values="XCL_INSEL"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Asynchronous Event Line Selection for LUT1" mask="0x80" name="EVASYSEL1"/>
+                    <bitfield caption="Asynchronous Event Line Selection for LUT0" mask="0x40" name="EVASYSEL0"/>
+                    <bitfield caption="Delay Selection" mask="0x30" name="DLYSEL" values="XCL_DLYSEL"/>
+                    <bitfield caption="Delay Configuration on LUT1" mask="0x0C" name="DLY1CONF" values="XCL_DLYCONF"/>
+                    <bitfield caption="Delay Configuration on LUT0" mask="0x03" name="DLY0CONF" values="XCL_DLYCONF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Truth Table of LUT1" mask="0xF0" name="TRUTH1"/>
+                    <bitfield caption="Truth Table of LUT0" mask="0x0F" name="TRUTH0"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Timer/Counter Command Selection" mask="0x80" name="CMDSEL" values="XCL_CMDSEL"/>
+                    <bitfield caption="Timer/Counter Selection" mask="0x70" name="TCSEL" values="XCL_TCSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="XCL_CLKSEL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Command Enable" mask="0xC0" name="CMDEN" values="XCL_CMDEN"/>
+                    <bitfield caption="Compare Channel 1 Output Value" mask="0x20" name="CMP1" values="XCL_CMPEN"/>
+                    <bitfield caption="Compare Channel 0 Output Value" mask="0x10" name="CMP0" values="XCL_CMPEN"/>
+                    <bitfield caption="Compare or Capture Channel 1 Enable" mask="0x08" name="CCEN1"/>
+                    <bitfield caption="Compare or Capture Channel 0 Enable" mask="0x04" name="CCEN0"/>
+                    <bitfield caption="Timer/Counter Mode" mask="0x03" name="MODE" values="XCL_TCMODE"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x06" size="1">
+                    <bitfield caption="Event Action Enable" mask="0x80" name="EVACTEN"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1"
+                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0"
+                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Source Selection" mask="0x07" name="EVSRC" values="XCL_EVSRC"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x07" size="1">
+                    <bitfield caption="Underflow 1 Interrupt Enable" mask="0x80" name="UNF1IE"/>
+                    <bitfield caption="Peripheral Counter 1 Interrupt Enable" mask="0x80" name="PEC1IE"/>
+                    <bitfield caption="Peripheral High Counter 2 Interrupt Enable" mask="0x80" name="PEC21IE"/>
+                    <bitfield caption="Underflow 0 Interrupt Enable" mask="0x40" name="UNF0IE"/>
+                    <bitfield caption="Peripheral Counter 0 Interrupt Enable" mask="0x40" name="PEC0IE"/>
+                    <bitfield caption="Compare Or Capture 1 Interrupt Enable" mask="0x20" name="CC1IE"/>
+                    <bitfield caption="Peripheral Low Counter 2 Interrupt Enable" mask="0x20" name="PEC20IE"/>
+                    <bitfield caption="Compare Or Capture 0 Interrupt Enable" mask="0x10" name="CC0IE"/>
+                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL"
+                              values="XCL_UNF_INTLVL"/>
+                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL"
+                              values="XCL_CC_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter 1 Underflow Interrupt Flag" mask="0x80" name="UNF1IF"/>
+                    <bitfield caption="Peripheral Counter 1 Interrupt Flag" mask="0x80" name="PEC1IF"/>
+                    <bitfield caption="Peripheral High Counter 2 Interrupt Flag" mask="0x80" name="PEC21IF"/>
+                    <bitfield caption="Timer/Counter 0 Underflow Interrupt Flag" mask="0x40" name="UNF0IF"/>
+                    <bitfield caption="Peripheral Counter 0 Interrupt Flag" mask="0x40" name="PEC0IF"/>
+                    <bitfield caption="Compare or Capture Channel 1 Interrupt Flag" mask="0x20" name="CC1IF"/>
+                    <bitfield caption="Peripheral Low Counter 2 Interrupt Flag" mask="0x20" name="PEC20IF"/>
+                    <bitfield caption="Compare or Capture Channel 0 Interrupt Flag" mask="0x10" name="CC0IF"/>
+                </register>
+                <register caption="Peripheral Lenght Control Register " name="PLC" offset="0x09" size="1">
+                    <bitfield caption="Peripheral Lenght Control Bits" mask="0xFF" name="PLC"/>
+                </register>
+                <register caption="Counter Register Low" name="CNTL" offset="0x0A" size="1">
+                    <bitfield caption="BTC0 Counter Byte" mask="0xFF" name="BCNTO"/>
+                    <bitfield caption="TC16 Counter Low Byte" mask="0xFF" name="CNTL"/>
+                    <bitfield caption="Peripheral Counter 0 Byte" mask="0xFF" name="PCNTO"/>
+                </register>
+                <register caption="Counter Register High" name="CNTH" offset="0x0B" size="1">
+                    <bitfield caption="BTC1 Counter Byte" mask="0xFF" name="BCNT1"/>
+                    <bitfield caption="TC16 Counter High Byte" mask="0xFF" name="CNTH"/>
+                    <bitfield caption="Peripheral Counter 1 Byte" mask="0xFF" name="PCNT1"/>
+                    <bitfield caption="Peripheral High Counter 2 Bits" mask="0xF0" name="PCNT21"/>
+                    <bitfield caption="Peripheral Low Counter 2 Bits" mask="0x0F" name="PCNT20"/>
+                </register>
+                <register caption="Compare Register Low" name="CMPL" offset="0x0C" size="1">
+                    <bitfield caption="TC16 Compare Low Byte" mask="0xFF" name="CMPL"/>
+                    <bitfield caption="BTC0 Compare Byte" mask="0xFF" name="BCMP0"/>
+                </register>
+                <register caption="Compare Register High" name="CMPH" offset="0x0D" size="1">
+                    <bitfield caption="TC16 Compare High Byte" mask="0xFF" name="CMPH"/>
+                    <bitfield caption="BTC1 Compare Byte" mask="0xFF" name="BCMP1"/>
+                </register>
+                <register caption="Period or Capture Register Low" name="PERCAPTL" offset="0x0E" size="1">
+                    <bitfield caption="TC16 Low Byte Period" mask="0xFF" name="PERL"/>
+                    <bitfield caption="TC16 Capture Value Low Byte" mask="0xFF" name="CAPTL"/>
+                    <bitfield caption="BTC0 Period" mask="0xFF" name="BPER0"/>
+                    <bitfield caption="BTC0 Capture Value Byte" mask="0xFF" name="BCAPT0"/>
+                </register>
+                <register caption="Period or Capture Register High" name="PERCAPTH" offset="0x0F" size="1">
+                    <bitfield caption="TC16 High Byte Period" mask="0xFF" name="PERH"/>
+                    <bitfield caption="TC16 Capture Value High Byte" mask="0xFF" name="CAPTH"/>
+                    <bitfield caption="BTC1 Period" mask="0xFF" name="BPER1"/>
+                    <bitfield caption="BTC1 Capture Value Byte" mask="0xFF" name="BCAPT1"/>
+                </register>
+            </register-group>
+            <value-group caption="LUT0 Output Enable" name="XCL_LUT0OUTEN">
+                <value caption="LUT0 output disabled" name="DISABLE" value="0x00"/>
+                <value caption="LUT0 Output to pin 0" name="PIN0" value="0x01"/>
+                <value caption="LUT0 Output to pin 4" name="PIN4" value="0x02"/>
+            </value-group>
+            <value-group caption="Port Selection" name="XCL_PORTSEL">
+                <value caption="Port C for LUT or USARTC0 for PEC" name="PC" value="0x00"/>
+                <value caption="Port D for LUT or USARTD0 for PEC" name="PD" value="0x01"/>
+            </value-group>
+            <value-group caption="LUT Configuration" name="XCL_LUTCONF">
+                <value caption="2-Input two LUT" name="2LUT2IN" value="0x00"/>
+                <value caption="Two LUT with duplicated input " name="2LUT1IN" value="0x01"/>
+                <value caption="Two LUT with one common input " name="2LUT3IN" value="0x02"/>
+                <value caption="3-Input LUT " name="1LUT3IN" value="0x03"/>
+                <value caption="One LUT Mux " name="MUX" value="0x04"/>
+                <value caption="One D-Latch LUT " name="DLATCH" value="0x05"/>
+                <value caption="One RS-Latch LUT " name="RSLATCH" value="0x06"/>
+                <value caption="One DFF LUT " name="DFF" value="0x07"/>
+            </value-group>
+            <value-group caption="Input Selection" name="XCL_INSEL">
+                <value caption="Event system selected as source" name="EVSYS" value="0x00"/>
+                <value caption="XCL selected as source" name="XCL" value="0x01"/>
+                <value caption="LSB port pin selected as source" name="PINL" value="0x02"/>
+                <value caption="MSB port pin selected as source" name="PINH" value="0x03"/>
+            </value-group>
+            <value-group caption="Delay Configuration on LUT" name="XCL_DLYCONF">
+                <value caption="Delay element disabled" name="DISABLE" value="0x00"/>
+                <value caption="Delay enabled on LUT input" name="IN" value="0x01"/>
+                <value caption="Delay enabled on LUT output" name="OUT" value="0x02"/>
+            </value-group>
+            <value-group caption="Delay Selection" name="XCL_DLYSEL">
+                <value caption="One cycle delay for each LUT1 and LUT0" name="DLY11" value="0x00"/>
+                <value caption="One cycle delay for LUT1 and two cycles for LUT0" name="DLY12" value="0x01"/>
+                <value caption="Two cycles delay for LUT1 and one cycle for LUT0" name="DLY21" value="0x02"/>
+                <value caption="Two cycle delays for each LUT1 and LUT0" name="DLY22" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection" name="XCL_CLKSEL">
+                <value caption="OFF" name="OFF" value="0x00"/>
+                <value caption="Prescaler clk" name="DIV1" value="0x01"/>
+                <value caption="Prescaler clk/2" name="DIV2" value="0x02"/>
+                <value caption="Prescaler clk/4" name="DIV4" value="0x03"/>
+                <value caption="Prescaler clk/8" name="DIV8" value="0x04"/>
+                <value caption="Prescaler clk/64" name="DIV64" value="0x05"/>
+                <value caption="Prescaler clk/256" name="DIV256" value="0x06"/>
+                <value caption="Prescaler clk/1024" name="DIV1024" value="0x07"/>
+                <value caption="Event channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command Selection" name="XCL_CMDSEL">
+                <value caption="None" name="NONE" value="0x00"/>
+                <value caption="Force restart" name="RESTART" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer/Counter Selection" name="XCL_TCSEL">
+                <value caption="16-bit timer/counter" name="TC16" value="0x00"/>
+                <value caption="One 8-bit timer/counter" name="BTC0" value="0x01"/>
+                <value caption="Two 8-bit timer/counters" name="BTC01" value="0x02"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1"
+                       value="0x03"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1"
+                       value="0x04"/>
+                <value caption="Two 8-bit peripheral counters" name="PEC01" value="0x05"/>
+                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2"
+                       value="0x06"/>
+            </value-group>
+            <value-group caption="Timer/Counter Mode" name="XCL_TCMODE">
+                <value caption="Normal mode with compare/period" name="NORMAL" value="0x00"/>
+                <value caption="Capture mode" name="CAPT" value="0x01"/>
+                <value caption="Single Slope PWM" name="PWM" value="0x02"/>
+                <value caption="One-shot PWM" name="1SHOT" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare Output Value Timer" name="XCL_CMPEN">
+                <value caption="Clear WG Output " name="CLEAR" value="0x00"/>
+                <value caption="Set WG Output " name="SET" value="0x01"/>
+            </value-group>
+            <value-group caption="Command Enable" name="XCL_CMDEN">
+                <value caption="Command Ignored" name="DISABLE" value="0x00"/>
+                <value caption="Command valid for timer/counter 0" name="CMD0" value="0x01"/>
+                <value caption="Command valid for timer/counter 1" name="CMD1" value="0x02"/>
+                <value caption="Command valid for both timer/counter 0 and 1" name="CMD01" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Event Source Selection" name="XCL_EVSRC">
+                <value caption="Event channel 0" name="EVCH0" value="0x00"/>
+                <value caption="Event channel 1" name="EVCH1" value="0x01"/>
+                <value caption="Event channel 2" name="EVCH2" value="0x02"/>
+                <value caption="Event channel 3" name="EVCH3" value="0x03"/>
+                <value caption="Event channel 4" name="EVCH4" value="0x04"/>
+                <value caption="Event channel 5" name="EVCH5" value="0x05"/>
+                <value caption="Event channel 6" name="EVCH6" value="0x06"/>
+                <value caption="Event channel 7" name="EVCH7" value="0x07"/>
+            </value-group>
+            <value-group caption="Timer/Counter Event Action Selection" name="XCL_EVACT">
+                <value caption="Input Capture" name="INPUT" value="0x00"/>
+                <value caption="Frequency Capture" name="FREQ" value="0x01"/>
+                <value caption="Pulse Width Capture" name="PW" value="0x02"/>
+                <value caption="Restart timer/counter" name="RESTART" value="0x03"/>
+            </value-group>
+            <value-group caption="Underflow Interrupt level" name="XCL_UNF_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare/Capture Interrupt level" name="XCL_CC_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="XCL">
+                <interrupt index="0" name="UNF" caption="Timer/Counter Underflow Interrupt"/>
+                <interrupt index="1" name="CC" caption="Timer/Counter Compare or Capture Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAE" caption="Two-Wire Interface">
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Bridge Enable" mask="0x80" name="BRIDGEEN"/>
+                    <bitfield caption="Slave Fast Mode Plus Enable" mask="0x40" name="SFMPEN"/>
+                    <bitfield caption="Slave SDA Hold Time Enable" mask="0x30" name="SSDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="FMPLUS Enable" mask="0x08" name="FMPEN"/>
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E"
+                                name-in-module="TWI_TIMEOUT"/>
+            </register-group>
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                    <bitfield caption="Ttimeout Enable" mask="0x10" name="TTOUTEN"/>
+                    <bitfield caption="Slave Extend Timeout Enable" mask="0x20" name="TSEXTEN"/>
+                    <bitfield caption="Master Extend Timeout Enable" mask="0x40" name="TMEXTEN"/>
+                    <bitfield caption="Timeout Interrupt Enable" mask="0x80" name="TOIE"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                    <bitfield caption="Ttimeout Enable" mask="0x10" name="TTOUTEN"/>
+                    <bitfield caption="Timeout Interrupt Enable" mask="0x80" name="TOIE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="" name="TWI_TIMEOUT" size="2">
+                <register caption="Timeout Status Register" name="TOS" offset="0x00" size="1">
+                    <bitfield caption="Master Ttimeout Interrupt Flag" mask="0x01" name="TTOUTMIF"/>
+                    <bitfield caption="Slave Extend Interrupt Flag" mask="0x02" name="TSEXTIF"/>
+                    <bitfield caption="Master Extend Interrupt Flag" mask="0x04" name="TMEXTIF"/>
+                    <bitfield caption="Slave Ttimeout Interrupt Flag" mask="0x10" name="TTOUTSIF"/>
+                </register>
+                <register caption="Timeout Configuration Register" name="TOCONF" offset="0x01" size="1">
+                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL"
+                              values="TWI_MASTER_TTIMEOUT"/>
+                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL"
+                              values="TWI_MASTER_TMSEXT"/>
+                    <bitfield caption="Slave Ttimeout Select" mask="0xE0" name="TTOUTSSEL" values="TWI_SLAVE_TTIMEOUT"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Timeout" name="TWI_MASTER_TTIMEOUT">
+                <value caption="25 Milliseconds" name="25MS" value="0x000"/>
+                <value caption="24 Milliseconds" name="24MS" value="0x001"/>
+                <value caption="23 Milliseconds" name="23MS" value="0x002"/>
+                <value caption="22 Milliseconds" name="22MS" value="0x003"/>
+                <value caption="26 Milliseconds" name="26MS" value="0x004"/>
+                <value caption="27 Milliseconds" name="27MS" value="0x005"/>
+                <value caption="28 Milliseconds" name="28MS" value="0x006"/>
+                <value caption="29 Milliseconds" name="29MS" value="0x007"/>
+            </value-group>
+            <value-group caption="Slave Ttimeout" name="TWI_SLAVE_TTIMEOUT">
+                <value caption="25 Milliseconds" name="25MS" value="0x000"/>
+                <value caption="24 Milliseconds" name="24MS" value="0x001"/>
+                <value caption="23 Milliseconds" name="23MS" value="0x002"/>
+                <value caption="22 Milliseconds" name="22MS" value="0x003"/>
+                <value caption="26 Milliseconds" name="26MS" value="0x004"/>
+                <value caption="27 Milliseconds" name="27MS" value="0x005"/>
+                <value caption="28 Milliseconds" name="28MS" value="0x006"/>
+                <value caption="29 Milliseconds" name="29MS" value="0x007"/>
+            </value-group>
+            <value-group caption="Master/Slave Extend Timeout" name="TWI_MASTER_TMSEXT">
+                <value caption="Tmext 10ms Tsext 25ms" name="10MS25MS" value="0x00"/>
+                <value caption="Tmext 9ms  Tsext 24ms" name="9MS24MS" value="0x01"/>
+                <value caption="Tmext 11ms Tsext 26ms" name="11MS26MS" value="0x02"/>
+                <value caption="Tmext 12ms Tsext 27ms" name="12MS27MS" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAE" caption="Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt Level" mask="0x03" name="INTLVL" values="PORT_INTLVL"/>
+                </register>
+                <register caption="Port Interrupt Mask" name="INTMASK" offset="0x0A" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Pin 7 Interrupt Flag" mask="0x80" name="INT7IF"/>
+                    <bitfield caption="Pin 6 Interrupt Flag" mask="0x40" name="INT6IF"/>
+                    <bitfield caption="Pin 5 Interrupt Flag" mask="0x20" name="INT5IF"/>
+                    <bitfield caption="Pin 4 Interrupt Flag" mask="0x10" name="INT4IF"/>
+                    <bitfield caption="Pin 3 Interrupt Flag" mask="0x08" name="INT3IF"/>
+                    <bitfield caption="Pin 2 Interrupt Flag" mask="0x04" name="INT2IF"/>
+                    <bitfield caption="Pin 1 Interrupt Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Pin 0 Interrupt Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="Usart0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare D" mask="0x08" name="TC4D"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare C" mask="0x04" name="TC4C"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare B" mask="0x02" name="TC4B"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare A" mask="0x01" name="TC4A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt Level" name="PORT_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Digital Input Buffer Forced Enable" name="FORCE_ENABLE" value="0x06"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT" caption="External Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I3007" version="XMEGAE" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 4" name="TC4" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Synchronization Enabled" mask="0x40" name="SYNCHEN"/>
+                    <bitfield caption="Start on Next Event" mask="0x20" name="EVSTART"/>
+                    <bitfield caption="Stop on Next Update" mask="0x10" name="UPSTOP"/>
+                    <bitfield caption="Clock Select" mask="0x0F" name="CLKSEL" values="TC45_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Byte Mode" mask="0xC0" name="BYTEM" values="TC45_BYTEM"/>
+                    <bitfield caption="Circular Buffer Enable" mask="0x30" name="CIRCEN" values="TC45_CIRCEN"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x07" name="WGMODE" values="TC45_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Channel D Output Polarity" mask="0x80" name="POLD"/>
+                    <bitfield caption="Channel C Output Polarity" mask="0x40" name="POLC"/>
+                    <bitfield caption="Channel B Output Polarity" mask="0x20" name="POLB"/>
+                    <bitfield caption="Channel A Output Polarity" mask="0x10" name="POLA"/>
+                    <bitfield caption="Channel D Compare Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Channel C Compare Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Channel B Compare Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Channel A Compare Output Value" mask="0x01" name="CMPA"/>
+                    <bitfield caption="High Channel D Compare Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Channel C Compare Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Channel B Compare Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Channel A Compare Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Channel D Compare Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Channel C Compare Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Channel B Compare Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Channel A Compare Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC45_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE"
+                              values="TC45_CCDMODE"/>
+                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE"
+                              values="TC45_CCCMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
+                              values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
+                              values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE"
+                              values="TC45_LCCDMODE"/>
+                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE"
+                              values="TC45_LCCCMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
+                              values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
+                              values="TC45_LCCAMODE"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE"
+                              values="TC45_HCCDMODE"/>
+                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE"
+                              values="TC45_HCCCMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
+                              values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
+                              values="TC45_HCCAMODE"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
+                              values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
+                              values="TC45_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC45_CCDINTLVL"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC45_CCCINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL"
+                              values="TC45_LCCDINTLVL"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL"
+                              values="TC45_LCCCINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
+                              values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
+                              values="TC45_LCCAINTLVL"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x09" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register H Clear" name="CTRLHCLR" offset="0x0A" size="1">
+                    <bitfield caption="Channel D Compare or Capture Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Channel C Compare or Capture Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low D Compare or Capture Buffer Valid" mask="0x10" name="LCCDBV"/>
+                    <bitfield caption="Channel Low C Compare or Capture Buffer Valid" mask="0x08" name="LCCCBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Control Register H Set" name="CTRLHSET" offset="0x0B" size="1">
+                    <bitfield caption="Channel D Compare or Capture Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Channel C Compare or Capture Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low D Compare or Capture Buffer Valid" mask="0x10" name="LCCDBV"/>
+                    <bitfield caption="Channel Low C Compare or Capture Buffer Valid" mask="0x08" name="LCCCBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Channel D Compare or Capture Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Trigger Restart Interrupt Flag" mask="0x04" name="TRGIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow/Underflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Flag" mask="0x80" name="LCCDIF"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Flag" mask="0x40" name="LCCCIF"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Flag" mask="0x20" name="LCCBIF"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Flag" mask="0x10" name="LCCAIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 5" name="TC5" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Synchronization Enabled" mask="0x40" name="SYNCHEN"/>
+                    <bitfield caption="Start on Next Event" mask="0x20" name="EVSTART"/>
+                    <bitfield caption="Stop on Next Update" mask="0x10" name="UPSTOP"/>
+                    <bitfield caption="Clock Select" mask="0x0F" name="CLKSEL" values="TC45_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Byte Mode" mask="0xC0" name="BYTEM" values="TC45_BYTEM"/>
+                    <bitfield caption="Circular Buffer Enable" mask="0x30" name="CIRCEN" values="TC45_CIRCEN"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x07" name="WGMODE" values="TC45_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Channel B Output Polarity" mask="0x20" name="POLB"/>
+                    <bitfield caption="Channel A Output Polarity" mask="0x10" name="POLA"/>
+                    <bitfield caption="Channel B Compare Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Channel A Compare Output Value" mask="0x01" name="CMPA"/>
+                    <bitfield caption="High Channel B Compare Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Channel A Compare Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Channel B Compare Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Channel A Compare Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC45_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
+                              values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
+                              values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
+                              values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
+                              values="TC45_LCCAMODE"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
+                              values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
+                              values="TC45_HCCAMODE"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
+                              values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
+                              values="TC45_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
+                              values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
+                              values="TC45_LCCAINTLVL"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x09" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x10" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register H Clear" name="CTRLHCLR" offset="0x0A" size="1">
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Control Register H Set" name="CTRLHSET" offset="0x0B" size="1">
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Channel B Compare or Capture Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Trigger Restart Interrupt Flag" mask="0x04" name="TRGIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow/Underflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Flag" mask="0x20" name="LCCBIF"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Flag" mask="0x10" name="LCCAIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC45_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC45_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter Operating in Byte Mode Only" name="BYTEMODE" value="0x01"/>
+            </value-group>
+            <value-group caption="Circular Enable Mode" name="TC45_CIRCEN">
+                <value caption="Circular Buffer Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Circular Buffer Enabled on PER/PERBUF" name="PER" value="0x01"/>
+                <value caption="Circular Buffer Enabled on CCA/CCABUF" name="CCA" value="0x02"/>
+                <value caption="Circular Buffer Enabled on All Buffered Registers" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC45_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Both" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC45_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Fault Mode 1 capture" name="FMODE1" value="0x01"/>
+                <value caption="Fault Mode 2 capture" name="FMODE2" value="0x02"/>
+                <value caption="Up/down count" name="UPDOWN" value="0x03"/>
+                <value caption="Quadrature decode" name="QDEC" value="0x04"/>
+                <value caption="Restart" name="RESTART" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PWF" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC45_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel A Mode" name="TC45_CCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel B Mode" name="TC45_CCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel C Mode" name="TC45_CCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel D Mode" name="TC45_CCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel A Mode" name="TC45_LCCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel B Mode" name="TC45_LCCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel C Mode" name="TC45_LCCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel D Mode" name="TC45_LCCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel A Mode" name="TC45_HCCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel B Mode" name="TC45_HCCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel C Mode" name="TC45_HCCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel D Mode" name="TC45_HCCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer Trigger Restart Interrupt Level" name="TC45_TRGINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC45_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC45_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel A Interrupt Level" name="TC45_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel B Interrupt Level" name="TC45_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel C Interrupt Level" name="TC45_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel D Interrupt Level" name="TC45_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel A Interrupt Level" name="TC45_LCCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel B Interrupt Level" name="TC45_LCCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel C Interrupt Level" name="TC45_LCCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel D Interrupt Level" name="TC45_LCCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC45_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC4">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Channel A Compare or Capture Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Channel B Compare or Capture Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Channel C Compare or Capture Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Channel D Compare or Capture Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC5">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Channel A Compare or Capture Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Channel B Compare or Capture Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FAULT" id="I3620" version="XMEGAE" caption="Fault Extension">
+            <register-group caption="Fault Extension" name="FAULT" size="8">
+                <register caption="Control A Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Ramp Mode Selection" mask="0xC0" name="RAMP" values="FAULT_RAMP"/>
+                    <bitfield caption="Fault on Debug Break Detection" mask="0x20" name="FDDBD"/>
+                    <bitfield caption="Port Control Mode" mask="0x10" name="PORTCTRL"/>
+                    <bitfield caption="Fuse State " mask="0x08" name="FUSE"/>
+                    <bitfield caption="Fault E Digital Filter Selection" mask="0x04" name="FILTERE"/>
+                    <bitfield caption="Fault E Input selection" mask="0x03" name="SRCE" values="FAULT_SRCE"/>
+                </register>
+                <register caption="Control B Register" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Fault A Software Mode" mask="0x80" name="SOFTA"/>
+                    <bitfield caption="Fault A Halt Action" mask="0x60" name="HALTA" values="FAULT_HALTA"/>
+                    <bitfield caption="Fault A Restart Action" mask="0x10" name="RESTARTA"/>
+                    <bitfield caption="Fault A Keep Action" mask="0x08" name="KEEPA"/>
+                    <bitfield caption="Fault A Source Selection" mask="0x03" name="SRCA" values="FAULT_SRCA"/>
+                </register>
+                <register caption="Control C Register" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Fault A Capture" mask="0x20" name="CAPTA"/>
+                    <bitfield caption="Fault A Digital Filter Selection" mask="0x04" name="FILTERA"/>
+                    <bitfield caption="Fault A Blanking" mask="0x02" name="BLANKA"/>
+                    <bitfield caption="Fault A Qualification" mask="0x01" name="QUALA"/>
+                </register>
+                <register caption="Control D Register" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Fault B Software Mode" mask="0x80" name="SOFTB"/>
+                    <bitfield caption="Fault B Halt Action" mask="0x60" name="HALTB" values="FAULT_HALTB"/>
+                    <bitfield caption="Fault B Restart Action" mask="0x10" name="RESTARTB"/>
+                    <bitfield caption="Fault B Keep Action" mask="0x08" name="KEEPB"/>
+                    <bitfield caption="Fault B Source Selection" mask="0x03" name="SRCB" values="FAULT_SRCB"/>
+                </register>
+                <register caption="Control E Register" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Fault B Capture" mask="0x20" name="CAPTB"/>
+                    <bitfield caption="Fault B Digital Filter Selection" mask="0x04" name="FILTERB"/>
+                    <bitfield caption="Fault B Blanking" mask="0x02" name="BLANKB"/>
+                    <bitfield caption="Fault B Qualification" mask="0x01" name="QUALB"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Fault B State" mask="0x80" name="STATEB"/>
+                    <bitfield caption="Fault A State" mask="0x40" name="STATEA"/>
+                    <bitfield caption="Fault E State" mask="0x20" name="STATEE"/>
+                    <bitfield caption="Channel Index Flag" mask="0x08" name="IDX"/>
+                    <bitfield caption="Fault B Flag" mask="0x04" name="FAULTBIN"/>
+                    <bitfield caption="Fault A Flag" mask="0x02" name="FAULTAIN"/>
+                    <bitfield caption="Fault E Flag" mask="0x01" name="FAULTEIN"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x06" size="1">
+                    <bitfield caption="State B Clear" mask="0x80" name="HALTBCLR"/>
+                    <bitfield caption="State A Clear" mask="0x40" name="HALTACLR"/>
+                    <bitfield caption="State E Clear" mask="0x20" name="STATEECLR"/>
+                    <bitfield caption="Fault B Flag" mask="0x04" name="FAULTB"/>
+                    <bitfield caption="Fault A Flag" mask="0x02" name="FAULTA"/>
+                    <bitfield caption="Fault E Flag" mask="0x01" name="FAULTE"/>
+                </register>
+                <register caption="Control Register G set" name="CTRLGSET" offset="0x07" size="1">
+                    <bitfield caption="Software Fault B" mask="0x80" name="FAULTBSW"/>
+                    <bitfield caption="Software Fault A" mask="0x40" name="FAULTASW"/>
+                    <bitfield caption="Software Fault E" mask="0x20" name="FAULTESW"/>
+                    <bitfield caption="Channel index Command" mask="0x18" name="IDXCMD" values="FAULT_IDXCMD"/>
+                </register>
+            </register-group>
+            <value-group caption="Ramp Mode Selection" name="FAULT_RAMP">
+                <value caption="Normal Mode" name="RAMP1" value="0x00"/>
+                <value caption="RAMP2 Mode" name="RAMP2" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault E Input Source Selection" name="FAULT_SRCE">
+                <value caption="Fault Protection Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Event Channel n+2" name="CHN2" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault A Halt Action Selection" name="FAULT_HALTA">
+                <value caption="Halt Action Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Hardware Halt Action" name="HW" value="0x01"/>
+                <value caption="Software Halt Action" name="SW" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault A Source Selection" name="FAULT_SRCA">
+                <value caption="Fault A Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Fault A linked to Fault B State from previous cycle" name="LINK" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault B Halt Action Selection" name="FAULT_HALTB">
+                <value caption="Halt Action Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Hardware Halt Action" name="HW" value="0x01"/>
+                <value caption="Software Halt Action" name="SW" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault B Source Selection" name="FAULT_SRCB">
+                <value caption="Fault B disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Fault B linked to Fault A State from previous cycle" name="LINK" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel index Command" name="FAULT_IDXCMD">
+                <value caption="Command Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Force Cycle B in Next Cycle" name="SET" value="0x01"/>
+                <value caption="Force Cycle A in Next Cycle" name="CLEAR" value="0x02"/>
+                <value caption="Hold Current Cycle Index in Next Cycle " name="HOLD" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="WEX" id="I3007" version="XMEGAE" caption="Waveform Extension">
+            <register-group caption="Waveform Extension" name="WEX" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Update Source Selection" mask="0x80" name="UPSEL"/>
+                    <bitfield caption="Output Matrix" mask="0x70" name="OTMX" values="WEX_OTMX"/>
+                    <bitfield caption="Dead-Time Insertion Generator 3 Enable" mask="0x08" name="DTI3EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 2 Enable" mask="0x04" name="DTI2EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 1 Enable" mask="0x02" name="DTI1EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 0 Enable" mask="0x01" name="DTI0EN"/>
+                </register>
+                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01"
+                          size="1"/>
+                <register caption="Dead-time Low Side Register" name="DTLS" offset="0x02" size="1"/>
+                <register caption="Dead-time High Side Register" name="DTHS" offset="0x03" size="1"/>
+                <register caption="Status Clear Register" name="STATUSCLR" offset="0x04" size="1">
+                    <bitfield caption="Swap Buffer Valid " mask="0x04" name="SWAPBUF"/>
+                    <bitfield caption="Pattern Generator Value Buffer Valid " mask="0x02" name="PGVBUFV"/>
+                    <bitfield caption="Pattern Generator Overwrite Buffer Valid" mask="0x01" name="PGOBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Swap Buffer Valid " mask="0x04" name="SWAPBUF"/>
+                    <bitfield caption="Pattern Generator Value Buffer Valid " mask="0x02" name="PGVBUFV"/>
+                    <bitfield caption="Pattern Generator Overwrite Buffer Valid " mask="0x01" name="PGOBUFV"/>
+                </register>
+                <register caption="Swap Register" name="SWAP" offset="0x06" size="1">
+                    <bitfield caption="Swap DTI output pair 3" mask="0x08" name="SWAP3"/>
+                    <bitfield caption="Swap DTI output pair 2" mask="0x04" name="SWAP2"/>
+                    <bitfield caption="Swap DTI output pair 1" mask="0x02" name="SWAP1"/>
+                    <bitfield caption="Swap DTI output pair 0" mask="0x01" name="SWAP0"/>
+                </register>
+                <register caption="Pattern Generation Override Register" name="PGO" offset="0x07" size="1"/>
+                <register caption="Pattern Generation Value Register" name="PGV" offset="0x08" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="SWAPBUF" offset="0x0A" size="1">
+                    <bitfield caption="Swap DTI output pair 3 " mask="0x08" name="SWAP3BUF"/>
+                    <bitfield caption="Swap DTI output pair 2" mask="0x04" name="SWAP2BUF"/>
+                    <bitfield caption="Swap DTI output pair 1 " mask="0x02" name="SWAP1BUF"/>
+                    <bitfield caption="Swap DTI output pair 0" mask="0x01" name="SWAP0BUF"/>
+                </register>
+                <register caption="Pattern Generation Overwrite Buffer Register" name="PGOBUF" offset="0x0B" size="1"/>
+                <register caption="Pattern Generation Value Buffer Register" name="PGVBUF" offset="0x0C" size="1"/>
+                <register caption="Output Override Disable Register " name="OUTOVDIS" offset="0x0F" size="1"/>
+            </register-group>
+            <value-group caption="Output Matrix Mode" name="WEX_OTMX">
+                <value caption="Default Output Matrix Mode" name="DEFAULT" value="0x00"/>
+                <value caption="First Output matrix Mode" name="FIRST" value="0x01"/>
+                <value caption="Second Output matrix Mode" name="SECOND" value="0x02"/>
+                <value caption="Third Output matrix Mode" name="THIRD" value="0x03"/>
+                <value caption="Fourth Output matrix Mode" name="FOURTH" value="0x04"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I3620" version="XMEGAE" caption="High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x0C" name="HRPLUS" values="HIRES_HRPLUS"/>
+                    <bitfield caption="High Resolution Mode" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Plus Mode" name="HIRES_HRPLUS">
+                <value caption="No Hi-Res Plus" name="NONE" value="0x00"/>
+                <value caption="Hi-Res Plus enabled on Timer 4" name="HRP4" value="0x01"/>
+                <value caption="Hi-Res Plus enabled on Timer 5" name="HRP5" value="0x02"/>
+                <value caption="Hi-Res Plus enabled on Timer 4 and 5" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Mode" name="HIRES_HREN">
+                <value caption="No Hi-Res" name="NONE" value="0x00"/>
+                <value caption="Hi-Res enabled on Timer 4" name="HRP4" value="0x01"/>
+                <value caption="Hi-Res enabled on Timer 5" name="HRP5" value="0x02"/>
+                <value caption="Hi-Res enabled on Timer 4 and 5" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I4000" version="XMEGAE" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Start Bit Interrupt Flag" mask="0x02" name="RXSIF"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                    <bitfield caption="Data Reception Flag" mask="0x01" name="DRIF"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x02" size="1">
+                    <bitfield caption="Receive Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="Data Reception Interrupt Enable" mask="0x40" name="DRIE"/>
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x03" size="1">
+                    <bitfield caption="One Wire Mode" mask="0x80" name="ONEWIRE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x40" name="SFDEN"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x04" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="DECTYPE" values="USART_DECTYPE"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="LUTACT" values="USART_LUTACT"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT"
+                              values="USART_PECACT"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Start Interrupt level" name="USART_RXSINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Encoding and Decoding Type" name="USART_DECTYPE">
+                <value caption="DATA Field Encoding" name="DATA" value="0x00"/>
+                <value caption="Start and Data Fields Encoding" name="SDATA" value="0x02"/>
+                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="XCL LUT Action" name="USART_LUTACT">
+                <value caption="Standard Frame Configuration" name="OFF" value="0x00"/>
+                <value caption="Receiver Decoding Enabled" name="RX" value="0x01"/>
+                <value caption="Transmitter Encoding Enabled" name="TX" value="0x02"/>
+                <value caption="Both Encoding and Decoding Enabled" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="XCL Peripheral Counter Action" name="USART_PECACT">
+                <value caption="Standard Mode" name="OFF" value="0x00"/>
+                <value caption="Variable Data Lenght in Reception" name="PEC0" value="0x01"/>
+                <value caption="Variable Data Lenght in Transmission" name="PEC1" value="0x02"/>
+                <value caption="Variable Data Lenght in both Reception and Transmission" name="PERC01" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAE" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface with Buffer Modes" name="SPI" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable SPI Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80"
+                              name="RXCIE"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40"
+                              name="TXCIE"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20"
+                              name="DREIE"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10"
+                              name="SSIE"/>
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag (In Standard Mode Only)." mask="0x80" name="IF"/>
+                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80"
+                              name="RXCIF"/>
+                    <bitfield caption="Write Collision Flag (In Standard Mode Only)." mask="0x40" name="WRCOL"/>
+                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40"
+                              name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20"
+                              name="DREIF"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10"
+                              name="SSIF"/>
+                    <bitfield caption="Buffer Overflow (In Buffer Modes Only)." mask="0x01" name="BUFOVF"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Buffer Modes" mask="0xC0" name="BUFMODE" values="SPI_BUFMODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x04" name="SSD"/>
+                </register>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)."
+                       name="0" value="0x00"/>
+                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)."
+                       name="1" value="0x01"/>
+                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)."
+                       name="2" value="0x02"/>
+                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)."
+                       name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4." name="DIV4" value="0x00"/>
+                <value caption="If CLK2X=1 CLKper/8, else (CLK2X=0) CLKper/16." name="DIV16" value="0x01"/>
+                <value caption="If CLK2X=1 CLKper/32, else (CLK2X=0) CLKper/64." name="DIV64" value="0x02"/>
+                <value caption="If CLK2X=1 CLKper/64, else (CLK2X=0) CLKper/128." name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Buffer Modes" name="SPI_BUFMODE">
+                <value caption="SPI Unbuffered Mode" name="OFF" value="0x00"/>
+                <value caption="Buffer Mode 1 (with dummy byte)" name="BUFMODE1" value="0x02"/>
+                <value caption="Buffer Mode 2 (no dummy byte)" name="BUFMODE2" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I3620" version="XMEGAE" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="7">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+                <register caption="Fault State" name="FUSEBYTE6" offset="0x06" size="1" initval="0xFF">
+                    <bitfield caption="Fault Dectection Action on TC5" mask="0x80" name="FDACT5"/>
+                    <bitfield caption="Fault Dectection Action on TC4" mask="0x40" name="FDACT4"/>
+                    <bitfield caption="Port Pin Value" mask="0x3F" name="VALUE"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3620" version="XMEGAE" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 8MHz Calibration Value" name="RCOSC8M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="Temperature corresponds to TEMPSENSE3/2" name="ROOMTEMP" offset="0x1E" size="1"/>
+                <register caption="Temperature corresponds to TEMPSENSE1/0" name="HOTTEMP" offset="0x1F" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ACA Current Calibration Byte" name="ACACURRCAL" offset="0x28" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 2" name="TEMPSENSE2" offset="0x2C" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 3" name="TEMPSENSE3" offset="0x2D" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_32">
+            <pin pad="GND" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA3" position="3"/>
+            <pin pad="PA2" position="4"/>
+            <pin pad="PA1" position="5"/>
+            <pin pad="PA0" position="6"/>
+            <pin pad="PDI" position="7"/>
+            <pin pad="RESET" position="8"/>
+            <pin pad="PC7" position="9"/>
+            <pin pad="PC6" position="10"/>
+            <pin pad="PC5" position="11"/>
+            <pin pad="PC4" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC2" position="14"/>
+            <pin pad="PC1" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="VCC" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="PR1" position="19"/>
+            <pin pad="PR0" position="20"/>
+            <pin pad="PD7" position="21"/>
+            <pin pad="PD6" position="22"/>
+            <pin pad="PD5" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD3" position="25"/>
+            <pin pad="PD2" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD0" position="28"/>
+            <pin pad="PA7" position="29"/>
+            <pin pad="PA6" position="30"/>
+            <pin pad="PA5" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
new file mode 100644
index 00000000..d8ccbfeb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3.xml
@@ -0,0 +1,2594 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA192A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega192A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x32000" endianness="little">
+                    <memory-segment start="0x0000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x800">
+                    <memory-segment start="0x0000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974403F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x44"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0082E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00830000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml
new file mode 100644
index 00000000..7bc058b0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192A3U.xml
@@ -0,0 +1,3511 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega192A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega192A3U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x32000" endianness="little">
+                    <memory-segment start="0x00000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x800">
+                    <memory-segment start="0x00000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PE0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PE2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PD0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PD1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PD2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PD3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PE0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PE1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PE2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PE3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PE4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PE5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PE6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PE4"/>
+                            <signal function="TC1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PE0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PE1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PE2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PE3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PE4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PE5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PE6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PE1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PE2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PE3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PE5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PE6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE5"/>
+                            <signal function="USART" group="RXD" pad="PE6"/>
+                            <signal function="USART" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PF1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PF2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PF3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PF5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PF6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PE5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PE7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PE5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974403F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x44"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0082E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00830000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
new file mode 100644
index 00000000..5bce4fb4
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192C3.xml
@@ -0,0 +1,2533 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA192C3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA192C3-MH" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega192C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x32000" endianness="little">
+                    <memory-segment start="0x00000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x4000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x51"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0082E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00830000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml
new file mode 100644
index 00000000..86c562a9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA192D3.xml
@@ -0,0 +1,2614 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega192D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega192D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega192D3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x32000" endianness="little">
+                    <memory-segment start="0x0000" size="0x30000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x2E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x30000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x800">
+                    <memory-segment start="0x0000" size="0x800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0974903F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x97"/>
+                    <property name="SIGNATURE2" value="0x49"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0082E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00830000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan(Legacy name)" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
new file mode 100644
index 00000000..6fc75e1d
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3.xml
@@ -0,0 +1,2595 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA256A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega256A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
+                    <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x00000" size="0x6000" endianness="little">
+                    <memory-segment start="0x00000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x01000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x02000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x00000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x00000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x00000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0984203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0083E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00840000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC"
+                caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
new file mode 100644
index 00000000..10b3e6b4
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3B.xml
@@ -0,0 +1,2600 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA256A3B-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA256A3B-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega256A3B" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
+                    <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x00000" size="0x6000" endianness="little">
+                    <memory-segment start="0x00000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x01000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x02000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x00000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x00000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x00000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC32" id="I6106">
+                    <instance name="RTC32">
+                        <register-group address-space="data" offset="0x0420" name-in-module="RTC32" name="RTC32"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="VBAT" id="I6107">
+                    <instance name="VBAT">
+                        <register-group address-space="data" offset="0x0F0" name-in-module="VBAT" name="VBAT"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC32" name-in-module="RTC32"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0984303F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x43"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0083E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00840000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC32" id="I6106" caption="32-bit Real-Time Counter">
+            <register-group caption="32-bit Real-Time Counter" name="RTC32" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="RTC enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Synchronization Control/Status Register" name="SYNCCTRL" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x10" name="SYNCCNT"/>
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC32_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC32_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Count Register" name="CNT" offset="0x04" size="4"/>
+                <register caption="Period Register" name="PER" offset="0x08" size="4"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="4"/>
+            </register-group>
+            <value-group caption="Compare Interrupt level" name="RTC32_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC32_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC32">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="VBAT" id="I6107" caption="Battery Backup Module">
+            <register-group caption="Battery Backup Module" name="VBAT" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="32-kHz Crystal Oscillator High Power Mode" mask="0x20" name="HIGHESR"/>
+                    <bitfield caption="32-kHz Crystal Oscillator Output Selection" mask="0x10" name="XOSCSEL"/>
+                    <bitfield caption="Crystal Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Crystal Oscillator Failure Detection Monitor Enable" mask="0x04"
+                              name="XOSCFDEN"/>
+                    <bitfield caption="Access Enable" mask="0x02" name="ACCEN"/>
+                    <bitfield caption="Reset" mask="0x01" name="RESET"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Battery backup Power" mask="0x80" name="BBPWR"/>
+                    <bitfield caption="Crystal Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Crystal Oscillator Failure" mask="0x04" name="XOSCFAIL"/>
+                    <bitfield caption="Battery Backup Brown-Out Reset Flag" mask="0x02" name="BBBORF"/>
+                    <bitfield caption="Battery Backup Power-On Reset Flag" mask="0x01" name="BBPORF"/>
+                </register>
+                <register caption="Backup Register 0" name="BACKUP0" offset="0x02" size="1"/>
+                <register caption="Backup Register 1" name="BACKUP1" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml
new file mode 100644
index 00000000..36f161cb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3BU.xml
@@ -0,0 +1,3448 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega256A3BU-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3BU-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega256A3BU" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
+                    <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="TOSC2"/>
+                            <signal function="TOSC" group="TOSC1" pad="TOSC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="VBAT" id="I6107">
+                    <instance name="VBAT">
+                        <register-group address-space="data" offset="0x0F0" name-in-module="VBAT" name="VBAT"/>
+                        <signals>
+                            <signal function="VBAT" group="VBAT" pad="VBAT"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC32" id="I6106">
+                    <instance name="RTC32">
+                        <register-group address-space="data" offset="0x0420" name-in-module="RTC32" name="RTC32"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PD0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PD1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PD2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PD3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PE4"/>
+                            <signal function="TC1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PF1"/>
+                            <signal function="USART" group="RXD" pad="PF2"/>
+                            <signal function="USART" group="TXD" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC32" name-in-module="RTC32"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0984303F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x43"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0083E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00840000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="VBAT" id="I6107" caption="Battery Backup Module">
+            <register-group caption="Battery Backup Module" name="VBAT" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="32-kHz Crystal Oscillator High Power Mode" mask="0x20" name="HIGHESR"/>
+                    <bitfield caption="32-kHz Crystal Oscillator Output Selection" mask="0x10" name="XOSCSEL"/>
+                    <bitfield caption="Crystal Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Crystal Oscillator Failure Detection Monitor Enable" mask="0x04"
+                              name="XOSCFDEN"/>
+                    <bitfield caption="Access Enable" mask="0x02" name="ACCEN"/>
+                    <bitfield caption="Reset" mask="0x01" name="RESET"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Battery backup Power" mask="0x80" name="BBPWR"/>
+                    <bitfield caption="Crystal Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Crystal Oscillator Failure" mask="0x04" name="XOSCFAIL"/>
+                    <bitfield caption="Battery Backup Brown-Out Reset Flag" mask="0x02" name="BBBORF"/>
+                    <bitfield caption="Battery Backup Power-On Reset Flag" mask="0x01" name="BBPORF"/>
+                </register>
+                <register caption="Backup Register 0" name="BACKUP0" offset="0x02" size="1"/>
+                <register caption="Backup Register 1" name="BACKUP1" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC32" id="I6106" caption="32-bit Real-Time Counter">
+            <register-group caption="32-bit Real-Time Counter" name="RTC32" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="RTC enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Synchronization Control/Status Register" name="SYNCCTRL" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x10" name="SYNCCNT"/>
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC32_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC32_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Count Register" name="CNT" offset="0x04" size="4"/>
+                <register caption="Period Register" name="PER" offset="0x08" size="4"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="4"/>
+            </register-group>
+            <value-group caption="Compare Interrupt level" name="RTC32_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC32_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC32">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="TOSC2" position="42"/>
+            <pin pad="TOSC1" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="VBAT" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml
new file mode 100644
index 00000000..a57749c1
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256A3U.xml
@@ -0,0 +1,3511 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega256A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega256A3U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
+                    <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PE0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PE2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PD0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PD1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PD2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PD3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PE0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PE1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PE2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PE3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PE4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PE5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PE6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PE4"/>
+                            <signal function="TC1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PE0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PE1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PE2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PE3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PE4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PE5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PE6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PE1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PE2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PE3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PE5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PE6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE5"/>
+                            <signal function="USART" group="RXD" pad="PE6"/>
+                            <signal function="USART" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PF1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PF2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PF3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PF5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PF6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PE5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PE7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PE5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0984203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0083E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00840000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml
new file mode 100644
index 00000000..9719d121
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256C3.xml
@@ -0,0 +1,2840 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega256C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega256C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x42000" endianness="little">
+                    <memory-segment start="0x00000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x46"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0083E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00840000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml
new file mode 100644
index 00000000..da0cd204
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA256D3.xml
@@ -0,0 +1,2611 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega256D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega256D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega256D3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x42000" endianness="little">
+                    <memory-segment start="0x0000" size="0x40000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x3E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x40000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x6000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x4000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x1000">
+                    <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0984403F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x44"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0083E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00840000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan(Legacy name)" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
new file mode 100644
index 00000000..3bc2fcca
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4.xml
@@ -0,0 +1,2551 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA32A4-AU" package="TQFP44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA32A4-MU" package="VQFN44" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32A4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="HIRESE" name-in-module="TC1"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0954103F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x41"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.7 V" name="2V7" value="0x03"/>
+                <value caption="3.0 V" name="3V0" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.5 V" name="3V5" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml
new file mode 100644
index 00000000..962787af
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32A4U.xml
@@ -0,0 +1,3365 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega32A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-MH" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32A4U-M7" package="VQFN44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32A4U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x9000" endianness="little">
+                    <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
+                    <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                            <signal function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAA4U">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x41"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAA4U" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI_DATA" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml
new file mode 100644
index 00000000..a9089030
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32C3.xml
@@ -0,0 +1,2840 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega32C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
+                    <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x49"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml
new file mode 100644
index 00000000..b8e7c2b9
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32C4.xml
@@ -0,0 +1,2827 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega32C4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32C4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32C4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x9000" endianness="little">
+                    <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
+                    <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TCC" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TCC" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TCC" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TCC" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE" group="OC0A" pad="PE0"/>
+                            <signal function="TCE" group="OC0B" pad="PE1"/>
+                            <signal function="TCE" group="OC0C" pad="PE2"/>
+                            <signal function="TCE" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PC5"/>
+                            <signal function="USART" group="RXD" pad="PC6"/>
+                            <signal function="USART" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x44"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml
new file mode 100644
index 00000000..014e0cbb
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32D3.xml
@@ -0,0 +1,2613 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega32D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32D3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0954A03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x4A"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml
new file mode 100644
index 00000000..1063121e
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32D4.xml
@@ -0,0 +1,2567 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega32D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32D4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x9000" endianness="little">
+                    <memory-segment start="0x0000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x7000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x8000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0400">
+                    <memory-segment start="0x0000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TCC" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TCC" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TCC" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TCC" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TCC" group="OC0A" pad="PD0"/>
+                            <signal function="TCC" group="OC0B" pad="PD1"/>
+                            <signal function="TCC" group="OC0C" pad="PD2"/>
+                            <signal function="TCC" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE" group="OC0A" pad="PE0"/>
+                            <signal function="TCE" group="OC0B" pad="PE1"/>
+                            <signal function="TCE" group="OC0C" pad="PE2"/>
+                            <signal function="TCE" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TCC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TCC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TCC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TCC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TCC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TCC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TCC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TCC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0954203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan(Legacy name)" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
new file mode 100644
index 00000000..8c9eb37a
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA32E5.xml
@@ -0,0 +1,3365 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega32E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega32E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega32E5" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x9000" endianness="little">
+                    <memory-segment start="0x00000" size="0x8000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="128"/>
+                    <memory-segment start="0x07000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="128"/>
+                    <memory-segment start="0x08000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="128"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0400" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0400">
+                    <memory-segment start="0x00000" size="0x0400" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0007">
+                    <memory-segment start="0x0000" size="0x0007" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0080">
+                    <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="128"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0036">
+                    <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="128"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAE">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAE">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAE">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAE">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAE">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAE">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTR" group="CLKOUT" pad="PR0"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTR" group="EVOUT" pad="PR0"/>
+                            <signal field="RTCOUT" function="RTCOUTD" group="RTCOUT" pad="PD6"/>
+                            <signal field="RTCOUT" function="RTCOUTR" group="RTCOUT" pad="PR0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EDMA" id="I3002" version="XMEGAE">
+                    <instance name="EDMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="EDMA" name="EDMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAE">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I3620" version="XMEGAE">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAE">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PD0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PD1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PD2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PD3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PD7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFD" index="0" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PA2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFD" index="0" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAE">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal field="ACOUT" function="ACOUT_PA" group="ACOUT" index="1" pad="PA6"/>
+                            <signal field="ACOUT" function="ACOUT_PA" group="ACOUT" index="0" pad="PA7"/>
+                            <signal field="ACOUT" function="ACOUT_PC" group="ACOUT" index="1" pad="PC6"/>
+                            <signal field="ACOUT" function="ACOUT_PC" group="ACOUT" index="0" pad="PC7"/>
+                            <signal field="ACOUT" function="ACOUT_PD" group="ACOUT" index="1" pad="PD6"/>
+                            <signal field="ACOUT" function="ACOUT_PD" group="ACOUT" index="0" pad="PD7"/>
+                            <signal field="ACOUT" function="ACOUT_PR" group="ACOUT" index="1" pad="PR0"/>
+                            <signal field="ACOUT" function="ACOUT_PR" group="ACOUT" index="0" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093" version="XMEGAE">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="XCL" id="I3008">
+                    <instance name="XCL">
+                        <register-group address-space="data" offset="0x0460" name-in-module="XCL" name="XCL"/>
+                        <signals>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="1" pad="PC0"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="2" pad="PC1"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="0" pad="PC2"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="3" pad="PC3"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="1" pad="PC4"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="2" pad="PC5"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="0" pad="PC6"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="3" pad="PC7"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="1" pad="PD0"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="2" pad="PD1"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="0" pad="PD2"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="3" pad="PD3"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="1" pad="PD4"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="2" pad="PD5"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="0" pad="PD6"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="3" pad="PD7"/>
+                            <signal function="XCLOUT_LSB_PC" group="OUT" index="0" pad="PC0"/>
+                            <signal function="XCLOUT_MSB_PC" group="OUT" index="0" pad="PC4"/>
+                            <signal function="XCLOUT_LSB_PD" group="OUT" index="0" pad="PD0"/>
+                            <signal function="XCLOUT_LSB_PD" group="OUT" index="0" pad="PD4"/>
+                            <signal function="XCL_OCOUT" group="OC" index="0" pad="PD2"/>
+                            <signal function="XCL_OCOUT" group="OC" index="1" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAE">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_BRIDGE" group="SDA" pad="PD0"/>
+                            <signal function="TWI_BRIDGE" group="SCL" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAE">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I3007" version="XMEGAE">
+                    <instance name="TCC4">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC4" name="TCC4"/>
+                        <signals>
+                            <signal field="TC4A" function="TC4" group="OC4A" pad="PC0"/>
+                            <signal field="TC4B" function="TC4" group="OC4B" pad="PC1"/>
+                            <signal field="TC4C" function="TC4" group="OC4C" pad="PC2"/>
+                            <signal field="TC4D" function="TC4" group="OC4D" pad="PC3"/>
+                            <signal field="TC4A" function="TC4_ALT" group="OC4A" pad="PC4"/>
+                            <signal field="TC4B" function="TC4_ALT" group="OC4B" pad="PC5"/>
+                            <signal field="TC4C" function="TC4_ALT" group="OC4C" pad="PC6"/>
+                            <signal field="TC4D" function="TC4_ALT" group="OC4D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC5">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC5" name="TCC5"/>
+                        <signals>
+                            <signal function="TC5" group="OC5A" pad="PC4"/>
+                            <signal function="TC5" group="OC5B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD5">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC5" name="TCD5"/>
+                        <signals>
+                            <signal function="TC5" group="OC5A" pad="PD4"/>
+                            <signal function="TC5" group="OC5B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FAULT" id="I3620" version="XMEGAE">
+                    <instance name="FAULTC4">
+                        <register-group address-space="data" offset="0x880" name-in-module="FAULT" name="FAULTC4"/>
+                    </instance>
+                    <instance name="FAULTC5">
+                        <register-group address-space="data" offset="0x890" name-in-module="FAULT" name="FAULTC5"/>
+                    </instance>
+                </module>
+                <module name="WEX" id="I3007" version="XMEGAE">
+                    <instance name="WEXC">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="WEX" name="WEXC"/>
+                        <signals>
+                            <signal function="WEX" group="OC4ALS" pad="PC0"/>
+                            <signal function="WEX" group="OC4AHS" pad="PC1"/>
+                            <signal function="WEX" group="OC4BLS" pad="PC2"/>
+                            <signal function="WEX" group="OC4BHS" pad="PC3"/>
+                            <signal function="WEX" group="OC4CLS" pad="PC4"/>
+                            <signal function="WEX" group="OC4CHS" pad="PC5"/>
+                            <signal function="WEX" group="OC4DLS" pad="PC6"/>
+                            <signal function="WEX" group="OC4DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I3620" version="XMEGAE">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I4000" version="XMEGAE">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAE">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x08E0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PC4"/>
+                            <signal function="SPI" group="SCK" pad="PC5"/>
+                            <signal function="SPI" group="MISO" pad="PC6"/>
+                            <signal function="SPI" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I3620" version="XMEGAE">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3620" version="XMEGAE">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="3" module-instance="EDMA" name-in-module="EDMA"/>
+                <interrupt-group index="7" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="9" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="12" module-instance="TCC4" name-in-module="TC4"/>
+                <interrupt-group index="18" module-instance="TCC5" name-in-module="TC5"/>
+                <interrupt-group index="22" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="23" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="26" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="28" module-instance="XCL" name-in-module="XCL"/>
+                <interrupt-group index="30" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="31" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="34" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="35" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="TCD5" name-in-module="TC5"/>
+                <interrupt-group index="40" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x95"/>
+                    <property name="SIGNATURE2" value="0x4C"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00807000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00808000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAE" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Interrupt Pin 7 Flag" mask="0x80" name="INT7IF"/>
+                    <bitfield caption="Interrupt Pin 6 Flag" mask="0x40" name="INT6IF"/>
+                    <bitfield caption="Interrupt Pin 5 Flag" mask="0x20" name="INT5IF"/>
+                    <bitfield caption="Interrupt Pin 4 Flag" mask="0x10" name="INT4IF"/>
+                    <bitfield caption="Interrupt Pin 3 Flag" mask="0x08" name="INT3IF"/>
+                    <bitfield caption="Interrupt Pin 2 Flag" mask="0x04" name="INT2IF"/>
+                    <bitfield caption="Interrupt Pin 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Interrupt Pin 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAE" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+                <value caption="Internal 8 MHz RC Oscillator" name="RC8M" value="0x05"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+                <value caption="Divide by 6" name="6" value="0x13"/>
+                <value caption="Divide by 10" name="10" value="0x15"/>
+                <value caption="Divide by 12" name="12" value="0x17"/>
+                <value caption="Divide by 24" name="24" value="0x19"/>
+                <value caption="Divide by 48" name="48" value="0x1B"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAE" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="XMEGA Custom Logic" mask="0x80" name="XCL"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="Enhanced DMA-Controller" mask="0x01" name="EDMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C WEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter5" mask="0x02" name="TC5"/>
+                    <bitfield caption="Port C Timer/Counter4" mask="0x01" name="TC4"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D Timer/Counter5" mask="0x02" name="TC5"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAE" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Internal 8 MHz RC Low Power Mode Enable" mask="0x40" name="RC8MLPM"/>
+                    <bitfield caption="Internal 8 MHz RC Oscillator Enable" mask="0x20" name="RC8MEN"/>
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Internal 8 MHz RC Oscillator Ready" mask="0x20" name="RC8MRDY"/>
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                </register>
+                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07"
+                          size="1">
+                    <bitfield caption="Calibration Bits" mask="0xFF" name="RC8MCAL"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x14"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 8 MHz RC Oscillator" name="RC8M" value="0x01"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAE" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="WEX Lock" name="WEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="WeX on T/C C4 Lock" mask="0x01" name="WEXCLOCK"/>
+                </register>
+                <register caption="FAULT Lock" name="FAULTLOCK" offset="0x0A" size="1">
+                    <bitfield caption="Fault on T/C C5 Lock" mask="0x02" name="FAULTC5LOCK"/>
+                    <bitfield caption="Fault on T/C C4 Lock" mask="0x01" name="FAULTC4LOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAE" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="8">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Clock Out Register" name="CLKOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="RTC Clock Output Enable" mask="0x60" name="RTCOUT" values="PORTCFG_RTCCLKOUT"/>
+                    <bitfield caption="Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                </register>
+                <register caption="Analog Comparator and Event Out Register" name="ACEVOUT" offset="0x06" size="1">
+                    <bitfield caption="Analog Comparator Output Port" mask="0xC0" name="ACOUT" values="PORTCFG_ACOUT"/>
+                    <bitfield caption="Event Channel Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="Asynchronous Event Enabled" mask="0x08" name="EVASYEN"/>
+                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL"
+                              values="PORTCFG_EVOUTSEL"/>
+                </register>
+                <register caption="Slew Rate Limit Control Register" name="SRLCTRL" offset="0x07" size="1">
+                    <bitfield caption="Slew Rate Limit Enable on PORTA" mask="0x01" name="SRLENRA"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTC" mask="0x04" name="SRLENRC"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTD" mask="0x08" name="SRLENRD"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTR" mask="0x80" name="SRLENRR"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="RTC Clock Output Port" name="PORTCFG_RTCCLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 6" name="PC6" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 6" name="PD6" value="0x02"/>
+                <value caption="System Clock Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Analog Comparator Output Port" name="PORTCFG_ACOUT">
+                <value caption="Analog Comparator Outputs on Port A, Pin 6-7" name="PA" value="0x00"/>
+                <value caption="Analog Comparator Outputs on Port C, Pin 6-7" name="PC" value="0x01"/>
+                <value caption="Analog Comparator Outputs on Port D, Pin 6-7" name="PD" value="0x02"/>
+                <value caption="Analog Comparator Outputs on Port R, Pin 0-1" name="PR" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel n Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel n Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel n Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="EDMA" id="I3002" version="XMEGAE" caption="Enhanced DMA Controller">
+            <register-group caption="Enhanced DMA Controller" name="EDMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Mode" mask="0x30" name="CHMODE" values="EDMA_CHMODE"/>
+                    <bitfield caption="Double Buffer Mode" mask="0x0C" name="DBUFMODE" values="EDMA_DBUFMODE"/>
+                    <bitfield caption="Priority Mode" mask="0x03" name="PRIMODE" values="EDMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Transaction Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Transaction Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Transaction Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNFIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNFIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNFIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNFIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Busy Flag" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Busy Flag" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Busy Flag" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Busy Flag" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Pending Flag" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Pending Flag" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Pending Flag" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Pending Flag" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="1"/>
+                <register-group caption="EDMA Channel 0" name="CH0" offset="0x10" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 1" name="CH1" offset="0x20" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 2" name="CH2" offset="0x30" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 3" name="CH3" offset="0x40" name-in-module="EDMA_CH"/>
+            </register-group>
+            <register-group caption="EDMA Channel" name="EDMA_CH" size="16">
+                <register caption="Channel Control A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel 2-bytes Burst Length" mask="0x01" name="BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Channel Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="EDMA_CH_INTLVL"/>
+                </register>
+                <register
+                        caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch."
+                        name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield
+                            caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
+                            mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
+                              mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
+                </register>
+                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL"
+                          offset="0x03" size="1">
+                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30"
+                              name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR"
+                              values="EDMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x04" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="EDMA_CH_TRIGSRC"/>
+                </register>
+                <register
+                        caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch."
+                        name="TRFCNT" offset="0x06" size="2"/>
+                <register
+                        caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch."
+                        name="ADDR" offset="0x08" size="2"/>
+                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR"
+                          offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Channel mode" name="EDMA_CHMODE">
+                <value caption="Channels 0, 1, 2 and 3 in peripheal conf." name="PER0123" value="0x00"/>
+                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0"
+                       value="0x01"/>
+                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2"
+                       value="0x02"/>
+                <value caption="Channels 0 and 2 in standard conf." name="STD02" value="0x03"/>
+            </value-group>
+            <value-group caption="Double buffer mode" name="EDMA_DBUFMODE">
+                <value caption="No double buffer enabled" name="DISABLE" value="0x00"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01"
+                       value="0x01"/>
+                <value caption="Double buffer enabled on peripheral channels 2/3 (if exist)" name="BUF23" value="0x02"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2"
+                       name="BUF0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="EDMA_PRIMODE">
+                <value caption="Round robin on all channels" name="RR0123" value="0x00"/>
+                <value caption="Ch0 &gt; round robin (Ch 1 ch2 Ch3)" name="RR123" value="0x01"/>
+                <value caption="Ch0 &gt; Ch 1 &gt; round robin (Ch2 Ch3)" name="RR23" value="0x02"/>
+                <value caption="Ch0 &gt; Ch1 &gt; Ch2 &gt; Ch3 " name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
+                         name="EDMA_CH_RELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of each block transfer" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of each burst transfer" name="BURST" value="0x02"/>
+                <value caption="Reload at end of each transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
+                         name="EDMA_CH_DIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. "
+                       name="MP1" value="0x04"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. "
+                       name="MP2" value="0x05"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. "
+                       name="MP3" value="0x06"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="EDMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="1-byte 'mask-match' (data: ADDRL, mask: ADDRH)" name="MP1" value="0x04"/>
+                <value caption="1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH)" name="MP2" value="0x05"/>
+                <value caption="2-byte 'match' (data1: ADDRL followed by data2: ADDRH)" name="MP3" value="0x06"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="EDMA_CH_TRIGSRC">
+                <value caption="Software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event CH0 as trigger (Standard Channels Only)" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event CH1 as trigger (Standard Channels Only)" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event CH2 as trigger (Standard Channels Only)" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA CH0 as trigger" name="ADCA_CH0" value="0x10"/>
+                <value caption="DACA CH0 as trigger" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA CH1 as trigger" name="DACA_CH1" value="0x16"/>
+                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF"
+                       value="0x40"/>
+                <value caption="TCC4 error as trigger (Standard Channels Only)" name="TCC4_ERR" value="0x41"/>
+                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA"
+                       value="0x42"/>
+                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB"
+                       value="0x43"/>
+                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC"
+                       value="0x44"/>
+                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD"
+                       value="0x45"/>
+                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF"
+                       value="0x46"/>
+                <value caption="TCC5 error as trigger (Standard Channels Only)" name="TCC5_ERR" value="0x47"/>
+                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA"
+                       value="0x48"/>
+                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB"
+                       value="0x49"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)"
+                       name="SPIC_RXC" value="0x4A"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)"
+                       name="SPIC_DRE" value="0x4B"/>
+                <value caption="USART C0 receive complete as trigger" name="USARTC0_RXC" value="0x4C"/>
+                <value caption="USART C0 data register empty as trigger" name="USARTC0_DRE" value="0x4D"/>
+                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF"
+                       value="0x66"/>
+                <value caption="TCD5 error as trigger (Standard Channels Only)" name="TCD5_ERR" value="0x67"/>
+                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA"
+                       value="0x68"/>
+                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB"
+                       value="0x69"/>
+                <value caption="USART D0 receive complete as trigger" name="USARTD0_RXC" value="0x6C"/>
+                <value caption="USART D0 data register empty as trigger" name="USARTD0_DRE" value="0x6D"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="EDMA_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="EDMA">
+                <interrupt index="0" name="CH0" caption="EDMA Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="EDMA Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="EDMA Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="EDMA Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAE" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="19">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Rotary Decoder Enable" mask="0x80" name="ROTARY"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+                <register caption="Digital Filter Control Register" name="DFCTRL" offset="0x12" size="1">
+                    <bitfield caption="Prescaler Filter" mask="0xF0" name="PRESCFILT" values="EVSYS_PRESCFILT"/>
+                    <bitfield caption="Prescaler Filter Select" mask="0x08" name="FILTSEL"/>
+                    <bitfield caption="Prescaler" mask="0x07" name="PRESC" values="EVSYS_PRESCALER"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="XCL BTC0 underflow" name="XCL_UNF0" value="0xB0"/>
+                <value caption="XCL BTC1 underflow" name="XCL_UNF1" value="0xB1"/>
+                <value caption="XCL BTC0 capture or compare" name="XCL_CC0" value="0xB2"/>
+                <value caption="XCL BTC1 capture or compare" name="XCL_CC1" value="0xB3"/>
+                <value caption="XCL PEC0 restart" name="XCL_PEC0" value="0xB4"/>
+                <value caption="XCL PEC1 restart" name="XCL_PEC1" value="0xB5"/>
+                <value caption="XCL LUT0 output" name="XCL_LUT0" value="0xB6"/>
+                <value caption="XCL LUT1 output" name="XCL_LUT1" value="0xB7"/>
+                <value caption="Timer/Counter C4 Overflow" name="TCC4_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C4 Error" name="TCC4_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C4 Compare or Capture A" name="TCC4_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C4 Compare or Capture B" name="TCC4_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C4 Compare or Capture C" name="TCC4_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C4 Compare or Capture D" name="TCC4_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C5 Overflow" name="TCC5_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C5 Error" name="TCC5_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C5 Compare or Capture A" name="TCC5_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C5 Compare or Capture B" name="TCC5_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D5 Overflow" name="TCD5_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D5 Error" name="TCD5_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D5 Compare or Capture A" name="TCD5_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D5 Compare or Capture B" name="TCD5_CCB" value="0xDD"/>
+            </value-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Prescaler Filter" name="EVSYS_PRESCFILT">
+                <value caption="Enable prescaler filter for either channel 0 or 4" name="CH04" value="0x01"/>
+                <value caption="Enable prescaler filter for either channel 1 or 5" name="CH15" value="0x02"/>
+                <value caption="Enable prescaler filter for either channel 2 or 6" name="CH26" value="0x04"/>
+                <value caption="Enable prescaler filter for either channel 3 or 7" name="CH37" value="0x08"/>
+            </value-group>
+            <value-group caption="Prescaler" name="EVSYS_PRESCALER">
+                <value caption="CLKPER, divide by 8" name="CLKPER_8" value="0x00"/>
+                <value caption="CLKPER, divide by 64" name="CLKPER_64" value="0x01"/>
+                <value caption="CLKPER, divide by 512" name="CLKPER_512" value="0x02"/>
+                <value caption="CLKPER, divide by 4096" name="CLKPER_4096" value="0x03"/>
+                <value caption="CLKPER, divide by 32768" name="CLKPER_32768" value="0x04"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I3620" version="XMEGAE" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAE" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="IF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX Setting Offset" mask="0xF0" name="INPUTOFFSET"/>
+                    <bitfield caption="Number of Channels Included in Scan" mask="0x0F" name="INPUTSCAN"/>
+                </register>
+                <register caption="Correction Control Register" name="CORRCTRL" offset="0x07" size="1">
+                    <bitfield caption="Correction Enable" mask="0x01" name="CORREN"/>
+                </register>
+                <register caption="Offset Correction Register 0" name="OFFSETCORR0" offset="0x08" size="1"/>
+                <register caption="Offset Correction Register 1" name="OFFSETCORR1" offset="0x09" size="1">
+                    <bitfield caption="Offset Correction Byte 1" mask="0x0F" name="OFFSETCORR"/>
+                </register>
+                <register caption="Gain Correction Register 0" name="GAINCORR0" offset="0x0A" size="1"/>
+                <register caption="Gain Correction Register 1" name="GAINCORR1" offset="0x0B" size="1">
+                    <bitfield caption="Gain Correction Byte 1" mask="0x0F" name="GAINCORR"/>
+                </register>
+                <register caption="Average Control Register" name="AVGCTRL" offset="0x0C" size="1">
+                    <bitfield caption="Right Shift" mask="0x70" name="RIGHTSHIFT"/>
+                    <bitfield caption="Averaged Number of Samples" mask="0x0F" name="SAMPNUM" values="ADC_SAMPNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Start Conversion" mask="0x04" name="START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="1"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="More than 12-bit (oversapling) right-adjusted result" name="MT12BIT" value="0x01"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT D" name="AREFD" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel conversion" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, gain with 4 LSB pins selection" name="DIFFWGAINL" value="0x02"/>
+                <value caption="Differential input, gain with 4 MSB pins selection" name="DIFFWGAINH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 Scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC Output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Averaged Number of Samples" name="ADC_SAMPNUM">
+                <value caption="1 Sample" name="1X" value="0x00"/>
+                <value caption="2 Samples" name="2X" value="0x01"/>
+                <value caption="4 Samples" name="4X" value="0x02"/>
+                <value caption="8 Samples" name="8X" value="0x03"/>
+                <value caption="16 Samples" name="16X" value="0x04"/>
+                <value caption="32 Samples" name="32X" value="0x05"/>
+                <value caption="64 Samples" name="64X" value="0x06"/>
+                <value caption="128 Samples" name="128X" value="0x07"/>
+                <value caption="256 Samples" name="256X" value="0x08"/>
+                <value caption="512 Samples" name="512X" value="0x09"/>
+                <value caption="1024 Samples" name="1024X" value="0x0A"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="ADC Channel Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTD" name="AREFD" value="0x03"/>
+                <value caption="Define for PortB kept for legacy reasons" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAE" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Invert Enable" mask="0x08" name="AC1INVEN"/>
+                    <bitfield caption="Analog Comparator 0 Output Invert Enable" mask="0x04" name="AC0INVEN"/>
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" version="XMEGAE" caption="Real-Time Clounter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Correction Enable" mask="0x08" name="CORREN"/>
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Calibration Register" name="CALIB" offset="0x06" size="1">
+                    <bitfield caption="Correction Sign" mask="0x80" name="SIGN"/>
+                    <bitfield caption="Error Value" mask="0x7F" name="ERROR"/>
+                </register>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="XCL" id="I3008" caption="XMEGA Custom Logic">
+            <register-group caption="XMEGA Custom Logic" name="XCL" size="16">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LUT0 Output Enable" mask="0xC0" name="LUT0OUTEN" values="XCL_LUT0OUTEN"/>
+                    <bitfield caption="Port Selection" mask="0x30" name="PORTSEL" values="XCL_PORTSEL"/>
+                    <bitfield caption="LUT Configuration" mask="0x07" name="LUTCONF" values="XCL_LUTCONF"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Input Selection 3" mask="0xC0" name="IN3SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 2" mask="0x30" name="IN2SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 1" mask="0x0C" name="IN1SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 0" mask="0x03" name="IN0SEL" values="XCL_INSEL"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Asynchronous Event Line Selection for LUT1" mask="0x80" name="EVASYSEL1"/>
+                    <bitfield caption="Asynchronous Event Line Selection for LUT0" mask="0x40" name="EVASYSEL0"/>
+                    <bitfield caption="Delay Selection" mask="0x30" name="DLYSEL" values="XCL_DLYSEL"/>
+                    <bitfield caption="Delay Configuration on LUT1" mask="0x0C" name="DLY1CONF" values="XCL_DLYCONF"/>
+                    <bitfield caption="Delay Configuration on LUT0" mask="0x03" name="DLY0CONF" values="XCL_DLYCONF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Truth Table of LUT1" mask="0xF0" name="TRUTH1"/>
+                    <bitfield caption="Truth Table of LUT0" mask="0x0F" name="TRUTH0"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Timer/Counter Command Selection" mask="0x80" name="CMDSEL" values="XCL_CMDSEL"/>
+                    <bitfield caption="Timer/Counter Selection" mask="0x70" name="TCSEL" values="XCL_TCSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="XCL_CLKSEL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Command Enable" mask="0xC0" name="CMDEN" values="XCL_CMDEN"/>
+                    <bitfield caption="Compare Channel 1 Output Value" mask="0x20" name="CMP1" values="XCL_CMPEN"/>
+                    <bitfield caption="Compare Channel 0 Output Value" mask="0x10" name="CMP0" values="XCL_CMPEN"/>
+                    <bitfield caption="Compare or Capture Channel 1 Enable" mask="0x08" name="CCEN1"/>
+                    <bitfield caption="Compare or Capture Channel 0 Enable" mask="0x04" name="CCEN0"/>
+                    <bitfield caption="Timer/Counter Mode" mask="0x03" name="MODE" values="XCL_TCMODE"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x06" size="1">
+                    <bitfield caption="Event Action Enable" mask="0x80" name="EVACTEN"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1"
+                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0"
+                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Source Selection" mask="0x07" name="EVSRC" values="XCL_EVSRC"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x07" size="1">
+                    <bitfield caption="Underflow 1 Interrupt Enable" mask="0x80" name="UNF1IE"/>
+                    <bitfield caption="Peripheral Counter 1 Interrupt Enable" mask="0x80" name="PEC1IE"/>
+                    <bitfield caption="Peripheral High Counter 2 Interrupt Enable" mask="0x80" name="PEC21IE"/>
+                    <bitfield caption="Underflow 0 Interrupt Enable" mask="0x40" name="UNF0IE"/>
+                    <bitfield caption="Peripheral Counter 0 Interrupt Enable" mask="0x40" name="PEC0IE"/>
+                    <bitfield caption="Compare Or Capture 1 Interrupt Enable" mask="0x20" name="CC1IE"/>
+                    <bitfield caption="Peripheral Low Counter 2 Interrupt Enable" mask="0x20" name="PEC20IE"/>
+                    <bitfield caption="Compare Or Capture 0 Interrupt Enable" mask="0x10" name="CC0IE"/>
+                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL"
+                              values="XCL_UNF_INTLVL"/>
+                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL"
+                              values="XCL_CC_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter 1 Underflow Interrupt Flag" mask="0x80" name="UNF1IF"/>
+                    <bitfield caption="Peripheral Counter 1 Interrupt Flag" mask="0x80" name="PEC1IF"/>
+                    <bitfield caption="Peripheral High Counter 2 Interrupt Flag" mask="0x80" name="PEC21IF"/>
+                    <bitfield caption="Timer/Counter 0 Underflow Interrupt Flag" mask="0x40" name="UNF0IF"/>
+                    <bitfield caption="Peripheral Counter 0 Interrupt Flag" mask="0x40" name="PEC0IF"/>
+                    <bitfield caption="Compare or Capture Channel 1 Interrupt Flag" mask="0x20" name="CC1IF"/>
+                    <bitfield caption="Peripheral Low Counter 2 Interrupt Flag" mask="0x20" name="PEC20IF"/>
+                    <bitfield caption="Compare or Capture Channel 0 Interrupt Flag" mask="0x10" name="CC0IF"/>
+                </register>
+                <register caption="Peripheral Lenght Control Register " name="PLC" offset="0x09" size="1">
+                    <bitfield caption="Peripheral Lenght Control Bits" mask="0xFF" name="PLC"/>
+                </register>
+                <register caption="Counter Register Low" name="CNTL" offset="0x0A" size="1">
+                    <bitfield caption="BTC0 Counter Byte" mask="0xFF" name="BCNTO"/>
+                    <bitfield caption="TC16 Counter Low Byte" mask="0xFF" name="CNTL"/>
+                    <bitfield caption="Peripheral Counter 0 Byte" mask="0xFF" name="PCNTO"/>
+                </register>
+                <register caption="Counter Register High" name="CNTH" offset="0x0B" size="1">
+                    <bitfield caption="BTC1 Counter Byte" mask="0xFF" name="BCNT1"/>
+                    <bitfield caption="TC16 Counter High Byte" mask="0xFF" name="CNTH"/>
+                    <bitfield caption="Peripheral Counter 1 Byte" mask="0xFF" name="PCNT1"/>
+                    <bitfield caption="Peripheral High Counter 2 Bits" mask="0xF0" name="PCNT21"/>
+                    <bitfield caption="Peripheral Low Counter 2 Bits" mask="0x0F" name="PCNT20"/>
+                </register>
+                <register caption="Compare Register Low" name="CMPL" offset="0x0C" size="1">
+                    <bitfield caption="TC16 Compare Low Byte" mask="0xFF" name="CMPL"/>
+                    <bitfield caption="BTC0 Compare Byte" mask="0xFF" name="BCMP0"/>
+                </register>
+                <register caption="Compare Register High" name="CMPH" offset="0x0D" size="1">
+                    <bitfield caption="TC16 Compare High Byte" mask="0xFF" name="CMPH"/>
+                    <bitfield caption="BTC1 Compare Byte" mask="0xFF" name="BCMP1"/>
+                </register>
+                <register caption="Period or Capture Register Low" name="PERCAPTL" offset="0x0E" size="1">
+                    <bitfield caption="TC16 Low Byte Period" mask="0xFF" name="PERL"/>
+                    <bitfield caption="TC16 Capture Value Low Byte" mask="0xFF" name="CAPTL"/>
+                    <bitfield caption="BTC0 Period" mask="0xFF" name="BPER0"/>
+                    <bitfield caption="BTC0 Capture Value Byte" mask="0xFF" name="BCAPT0"/>
+                </register>
+                <register caption="Period or Capture Register High" name="PERCAPTH" offset="0x0F" size="1">
+                    <bitfield caption="TC16 High Byte Period" mask="0xFF" name="PERH"/>
+                    <bitfield caption="TC16 Capture Value High Byte" mask="0xFF" name="CAPTH"/>
+                    <bitfield caption="BTC1 Period" mask="0xFF" name="BPER1"/>
+                    <bitfield caption="BTC1 Capture Value Byte" mask="0xFF" name="BCAPT1"/>
+                </register>
+            </register-group>
+            <value-group caption="LUT0 Output Enable" name="XCL_LUT0OUTEN">
+                <value caption="LUT0 output disabled" name="DISABLE" value="0x00"/>
+                <value caption="LUT0 Output to pin 0" name="PIN0" value="0x01"/>
+                <value caption="LUT0 Output to pin 4" name="PIN4" value="0x02"/>
+            </value-group>
+            <value-group caption="Port Selection" name="XCL_PORTSEL">
+                <value caption="Port C for LUT or USARTC0 for PEC" name="PC" value="0x00"/>
+                <value caption="Port D for LUT or USARTD0 for PEC" name="PD" value="0x01"/>
+            </value-group>
+            <value-group caption="LUT Configuration" name="XCL_LUTCONF">
+                <value caption="2-Input two LUT" name="2LUT2IN" value="0x00"/>
+                <value caption="Two LUT with duplicated input " name="2LUT1IN" value="0x01"/>
+                <value caption="Two LUT with one common input " name="2LUT3IN" value="0x02"/>
+                <value caption="3-Input LUT " name="1LUT3IN" value="0x03"/>
+                <value caption="One LUT Mux " name="MUX" value="0x04"/>
+                <value caption="One D-Latch LUT " name="DLATCH" value="0x05"/>
+                <value caption="One RS-Latch LUT " name="RSLATCH" value="0x06"/>
+                <value caption="One DFF LUT " name="DFF" value="0x07"/>
+            </value-group>
+            <value-group caption="Input Selection" name="XCL_INSEL">
+                <value caption="Event system selected as source" name="EVSYS" value="0x00"/>
+                <value caption="XCL selected as source" name="XCL" value="0x01"/>
+                <value caption="LSB port pin selected as source" name="PINL" value="0x02"/>
+                <value caption="MSB port pin selected as source" name="PINH" value="0x03"/>
+            </value-group>
+            <value-group caption="Delay Configuration on LUT" name="XCL_DLYCONF">
+                <value caption="Delay element disabled" name="DISABLE" value="0x00"/>
+                <value caption="Delay enabled on LUT input" name="IN" value="0x01"/>
+                <value caption="Delay enabled on LUT output" name="OUT" value="0x02"/>
+            </value-group>
+            <value-group caption="Delay Selection" name="XCL_DLYSEL">
+                <value caption="One cycle delay for each LUT1 and LUT0" name="DLY11" value="0x00"/>
+                <value caption="One cycle delay for LUT1 and two cycles for LUT0" name="DLY12" value="0x01"/>
+                <value caption="Two cycles delay for LUT1 and one cycle for LUT0" name="DLY21" value="0x02"/>
+                <value caption="Two cycle delays for each LUT1 and LUT0" name="DLY22" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection" name="XCL_CLKSEL">
+                <value caption="OFF" name="OFF" value="0x00"/>
+                <value caption="Prescaler clk" name="DIV1" value="0x01"/>
+                <value caption="Prescaler clk/2" name="DIV2" value="0x02"/>
+                <value caption="Prescaler clk/4" name="DIV4" value="0x03"/>
+                <value caption="Prescaler clk/8" name="DIV8" value="0x04"/>
+                <value caption="Prescaler clk/64" name="DIV64" value="0x05"/>
+                <value caption="Prescaler clk/256" name="DIV256" value="0x06"/>
+                <value caption="Prescaler clk/1024" name="DIV1024" value="0x07"/>
+                <value caption="Event channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command Selection" name="XCL_CMDSEL">
+                <value caption="None" name="NONE" value="0x00"/>
+                <value caption="Force restart" name="RESTART" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer/Counter Selection" name="XCL_TCSEL">
+                <value caption="16-bit timer/counter" name="TC16" value="0x00"/>
+                <value caption="One 8-bit timer/counter" name="BTC0" value="0x01"/>
+                <value caption="Two 8-bit timer/counters" name="BTC01" value="0x02"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1"
+                       value="0x03"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1"
+                       value="0x04"/>
+                <value caption="Two 8-bit peripheral counters" name="PEC01" value="0x05"/>
+                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2"
+                       value="0x06"/>
+            </value-group>
+            <value-group caption="Timer/Counter Mode" name="XCL_TCMODE">
+                <value caption="Normal mode with compare/period" name="NORMAL" value="0x00"/>
+                <value caption="Capture mode" name="CAPT" value="0x01"/>
+                <value caption="Single Slope PWM" name="PWM" value="0x02"/>
+                <value caption="One-shot PWM" name="1SHOT" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare Output Value Timer" name="XCL_CMPEN">
+                <value caption="Clear WG Output " name="CLEAR" value="0x00"/>
+                <value caption="Set WG Output " name="SET" value="0x01"/>
+            </value-group>
+            <value-group caption="Command Enable" name="XCL_CMDEN">
+                <value caption="Command Ignored" name="DISABLE" value="0x00"/>
+                <value caption="Command valid for timer/counter 0" name="CMD0" value="0x01"/>
+                <value caption="Command valid for timer/counter 1" name="CMD1" value="0x02"/>
+                <value caption="Command valid for both timer/counter 0 and 1" name="CMD01" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Event Source Selection" name="XCL_EVSRC">
+                <value caption="Event channel 0" name="EVCH0" value="0x00"/>
+                <value caption="Event channel 1" name="EVCH1" value="0x01"/>
+                <value caption="Event channel 2" name="EVCH2" value="0x02"/>
+                <value caption="Event channel 3" name="EVCH3" value="0x03"/>
+                <value caption="Event channel 4" name="EVCH4" value="0x04"/>
+                <value caption="Event channel 5" name="EVCH5" value="0x05"/>
+                <value caption="Event channel 6" name="EVCH6" value="0x06"/>
+                <value caption="Event channel 7" name="EVCH7" value="0x07"/>
+            </value-group>
+            <value-group caption="Timer/Counter Event Action Selection" name="XCL_EVACT">
+                <value caption="Input Capture" name="INPUT" value="0x00"/>
+                <value caption="Frequency Capture" name="FREQ" value="0x01"/>
+                <value caption="Pulse Width Capture" name="PW" value="0x02"/>
+                <value caption="Restart timer/counter" name="RESTART" value="0x03"/>
+            </value-group>
+            <value-group caption="Underflow Interrupt level" name="XCL_UNF_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare/Capture Interrupt level" name="XCL_CC_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="XCL">
+                <interrupt index="0" name="UNF" caption="Timer/Counter Underflow Interrupt"/>
+                <interrupt index="1" name="CC" caption="Timer/Counter Compare or Capture Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAE" caption="Two-Wire Interface">
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Bridge Enable" mask="0x80" name="BRIDGEEN"/>
+                    <bitfield caption="Slave Fast Mode Plus Enable" mask="0x40" name="SFMPEN"/>
+                    <bitfield caption="Slave SDA Hold Time Enable" mask="0x30" name="SSDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="FMPLUS Enable" mask="0x08" name="FMPEN"/>
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E"
+                                name-in-module="TWI_TIMEOUT"/>
+            </register-group>
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                    <bitfield caption="Ttimeout Enable" mask="0x10" name="TTOUTEN"/>
+                    <bitfield caption="Slave Extend Timeout Enable" mask="0x20" name="TSEXTEN"/>
+                    <bitfield caption="Master Extend Timeout Enable" mask="0x40" name="TMEXTEN"/>
+                    <bitfield caption="Timeout Interrupt Enable" mask="0x80" name="TOIE"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                    <bitfield caption="Ttimeout Enable" mask="0x10" name="TTOUTEN"/>
+                    <bitfield caption="Timeout Interrupt Enable" mask="0x80" name="TOIE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="" name="TWI_TIMEOUT" size="2">
+                <register caption="Timeout Status Register" name="TOS" offset="0x00" size="1">
+                    <bitfield caption="Master Ttimeout Interrupt Flag" mask="0x01" name="TTOUTMIF"/>
+                    <bitfield caption="Slave Extend Interrupt Flag" mask="0x02" name="TSEXTIF"/>
+                    <bitfield caption="Master Extend Interrupt Flag" mask="0x04" name="TMEXTIF"/>
+                    <bitfield caption="Slave Ttimeout Interrupt Flag" mask="0x10" name="TTOUTSIF"/>
+                </register>
+                <register caption="Timeout Configuration Register" name="TOCONF" offset="0x01" size="1">
+                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL"
+                              values="TWI_MASTER_TTIMEOUT"/>
+                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL"
+                              values="TWI_MASTER_TMSEXT"/>
+                    <bitfield caption="Slave Ttimeout Select" mask="0xE0" name="TTOUTSSEL" values="TWI_SLAVE_TTIMEOUT"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Timeout" name="TWI_MASTER_TTIMEOUT">
+                <value caption="25 Milliseconds" name="25MS" value="0x000"/>
+                <value caption="24 Milliseconds" name="24MS" value="0x001"/>
+                <value caption="23 Milliseconds" name="23MS" value="0x002"/>
+                <value caption="22 Milliseconds" name="22MS" value="0x003"/>
+                <value caption="26 Milliseconds" name="26MS" value="0x004"/>
+                <value caption="27 Milliseconds" name="27MS" value="0x005"/>
+                <value caption="28 Milliseconds" name="28MS" value="0x006"/>
+                <value caption="29 Milliseconds" name="29MS" value="0x007"/>
+            </value-group>
+            <value-group caption="Slave Ttimeout" name="TWI_SLAVE_TTIMEOUT">
+                <value caption="25 Milliseconds" name="25MS" value="0x000"/>
+                <value caption="24 Milliseconds" name="24MS" value="0x001"/>
+                <value caption="23 Milliseconds" name="23MS" value="0x002"/>
+                <value caption="22 Milliseconds" name="22MS" value="0x003"/>
+                <value caption="26 Milliseconds" name="26MS" value="0x004"/>
+                <value caption="27 Milliseconds" name="27MS" value="0x005"/>
+                <value caption="28 Milliseconds" name="28MS" value="0x006"/>
+                <value caption="29 Milliseconds" name="29MS" value="0x007"/>
+            </value-group>
+            <value-group caption="Master/Slave Extend Timeout" name="TWI_MASTER_TMSEXT">
+                <value caption="Tmext 10ms Tsext 25ms" name="10MS25MS" value="0x00"/>
+                <value caption="Tmext 9ms  Tsext 24ms" name="9MS24MS" value="0x01"/>
+                <value caption="Tmext 11ms Tsext 26ms" name="11MS26MS" value="0x02"/>
+                <value caption="Tmext 12ms Tsext 27ms" name="12MS27MS" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAE" caption="Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt Level" mask="0x03" name="INTLVL" values="PORT_INTLVL"/>
+                </register>
+                <register caption="Port Interrupt Mask" name="INTMASK" offset="0x0A" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Pin 7 Interrupt Flag" mask="0x80" name="INT7IF"/>
+                    <bitfield caption="Pin 6 Interrupt Flag" mask="0x40" name="INT6IF"/>
+                    <bitfield caption="Pin 5 Interrupt Flag" mask="0x20" name="INT5IF"/>
+                    <bitfield caption="Pin 4 Interrupt Flag" mask="0x10" name="INT4IF"/>
+                    <bitfield caption="Pin 3 Interrupt Flag" mask="0x08" name="INT3IF"/>
+                    <bitfield caption="Pin 2 Interrupt Flag" mask="0x04" name="INT2IF"/>
+                    <bitfield caption="Pin 1 Interrupt Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Pin 0 Interrupt Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="Usart0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare D" mask="0x08" name="TC4D"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare C" mask="0x04" name="TC4C"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare B" mask="0x02" name="TC4B"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare A" mask="0x01" name="TC4A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt Level" name="PORT_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Digital Input Buffer Forced Enable" name="FORCE_ENABLE" value="0x06"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT" caption="External Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I3007" version="XMEGAE" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 4" name="TC4" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Synchronization Enabled" mask="0x40" name="SYNCHEN"/>
+                    <bitfield caption="Start on Next Event" mask="0x20" name="EVSTART"/>
+                    <bitfield caption="Stop on Next Update" mask="0x10" name="UPSTOP"/>
+                    <bitfield caption="Clock Select" mask="0x0F" name="CLKSEL" values="TC45_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Byte Mode" mask="0xC0" name="BYTEM" values="TC45_BYTEM"/>
+                    <bitfield caption="Circular Buffer Enable" mask="0x30" name="CIRCEN" values="TC45_CIRCEN"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x07" name="WGMODE" values="TC45_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Channel D Output Polarity" mask="0x80" name="POLD"/>
+                    <bitfield caption="Channel C Output Polarity" mask="0x40" name="POLC"/>
+                    <bitfield caption="Channel B Output Polarity" mask="0x20" name="POLB"/>
+                    <bitfield caption="Channel A Output Polarity" mask="0x10" name="POLA"/>
+                    <bitfield caption="Channel D Compare Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Channel C Compare Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Channel B Compare Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Channel A Compare Output Value" mask="0x01" name="CMPA"/>
+                    <bitfield caption="High Channel D Compare Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Channel C Compare Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Channel B Compare Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Channel A Compare Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Channel D Compare Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Channel C Compare Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Channel B Compare Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Channel A Compare Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC45_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE"
+                              values="TC45_CCDMODE"/>
+                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE"
+                              values="TC45_CCCMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
+                              values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
+                              values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE"
+                              values="TC45_LCCDMODE"/>
+                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE"
+                              values="TC45_LCCCMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
+                              values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
+                              values="TC45_LCCAMODE"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE"
+                              values="TC45_HCCDMODE"/>
+                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE"
+                              values="TC45_HCCCMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
+                              values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
+                              values="TC45_HCCAMODE"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
+                              values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
+                              values="TC45_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC45_CCDINTLVL"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC45_CCCINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL"
+                              values="TC45_LCCDINTLVL"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL"
+                              values="TC45_LCCCINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
+                              values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
+                              values="TC45_LCCAINTLVL"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x09" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register H Clear" name="CTRLHCLR" offset="0x0A" size="1">
+                    <bitfield caption="Channel D Compare or Capture Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Channel C Compare or Capture Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low D Compare or Capture Buffer Valid" mask="0x10" name="LCCDBV"/>
+                    <bitfield caption="Channel Low C Compare or Capture Buffer Valid" mask="0x08" name="LCCCBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Control Register H Set" name="CTRLHSET" offset="0x0B" size="1">
+                    <bitfield caption="Channel D Compare or Capture Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Channel C Compare or Capture Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low D Compare or Capture Buffer Valid" mask="0x10" name="LCCDBV"/>
+                    <bitfield caption="Channel Low C Compare or Capture Buffer Valid" mask="0x08" name="LCCCBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Channel D Compare or Capture Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Trigger Restart Interrupt Flag" mask="0x04" name="TRGIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow/Underflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Flag" mask="0x80" name="LCCDIF"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Flag" mask="0x40" name="LCCCIF"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Flag" mask="0x20" name="LCCBIF"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Flag" mask="0x10" name="LCCAIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 5" name="TC5" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Synchronization Enabled" mask="0x40" name="SYNCHEN"/>
+                    <bitfield caption="Start on Next Event" mask="0x20" name="EVSTART"/>
+                    <bitfield caption="Stop on Next Update" mask="0x10" name="UPSTOP"/>
+                    <bitfield caption="Clock Select" mask="0x0F" name="CLKSEL" values="TC45_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Byte Mode" mask="0xC0" name="BYTEM" values="TC45_BYTEM"/>
+                    <bitfield caption="Circular Buffer Enable" mask="0x30" name="CIRCEN" values="TC45_CIRCEN"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x07" name="WGMODE" values="TC45_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Channel B Output Polarity" mask="0x20" name="POLB"/>
+                    <bitfield caption="Channel A Output Polarity" mask="0x10" name="POLA"/>
+                    <bitfield caption="Channel B Compare Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Channel A Compare Output Value" mask="0x01" name="CMPA"/>
+                    <bitfield caption="High Channel B Compare Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Channel A Compare Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Channel B Compare Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Channel A Compare Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC45_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
+                              values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
+                              values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
+                              values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
+                              values="TC45_LCCAMODE"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
+                              values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
+                              values="TC45_HCCAMODE"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
+                              values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
+                              values="TC45_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
+                              values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
+                              values="TC45_LCCAINTLVL"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x09" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x10" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register H Clear" name="CTRLHCLR" offset="0x0A" size="1">
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Control Register H Set" name="CTRLHSET" offset="0x0B" size="1">
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Channel B Compare or Capture Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Trigger Restart Interrupt Flag" mask="0x04" name="TRGIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow/Underflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Flag" mask="0x20" name="LCCBIF"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Flag" mask="0x10" name="LCCAIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC45_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC45_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter Operating in Byte Mode Only" name="BYTEMODE" value="0x01"/>
+            </value-group>
+            <value-group caption="Circular Enable Mode" name="TC45_CIRCEN">
+                <value caption="Circular Buffer Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Circular Buffer Enabled on PER/PERBUF" name="PER" value="0x01"/>
+                <value caption="Circular Buffer Enabled on CCA/CCABUF" name="CCA" value="0x02"/>
+                <value caption="Circular Buffer Enabled on All Buffered Registers" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC45_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Both" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC45_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Fault Mode 1 capture" name="FMODE1" value="0x01"/>
+                <value caption="Fault Mode 2 capture" name="FMODE2" value="0x02"/>
+                <value caption="Up/down count" name="UPDOWN" value="0x03"/>
+                <value caption="Quadrature decode" name="QDEC" value="0x04"/>
+                <value caption="Restart" name="RESTART" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PWF" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC45_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel A Mode" name="TC45_CCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel B Mode" name="TC45_CCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel C Mode" name="TC45_CCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel D Mode" name="TC45_CCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel A Mode" name="TC45_LCCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel B Mode" name="TC45_LCCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel C Mode" name="TC45_LCCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel D Mode" name="TC45_LCCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel A Mode" name="TC45_HCCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel B Mode" name="TC45_HCCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel C Mode" name="TC45_HCCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel D Mode" name="TC45_HCCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer Trigger Restart Interrupt Level" name="TC45_TRGINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC45_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC45_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel A Interrupt Level" name="TC45_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel B Interrupt Level" name="TC45_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel C Interrupt Level" name="TC45_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel D Interrupt Level" name="TC45_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel A Interrupt Level" name="TC45_LCCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel B Interrupt Level" name="TC45_LCCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel C Interrupt Level" name="TC45_LCCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel D Interrupt Level" name="TC45_LCCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC45_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC4">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Channel A Compare or Capture Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Channel B Compare or Capture Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Channel C Compare or Capture Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Channel D Compare or Capture Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC5">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Channel A Compare or Capture Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Channel B Compare or Capture Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FAULT" id="I3620" version="XMEGAE" caption="Fault Extension">
+            <register-group caption="Fault Extension" name="FAULT" size="8">
+                <register caption="Control A Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Ramp Mode Selection" mask="0xC0" name="RAMP" values="FAULT_RAMP"/>
+                    <bitfield caption="Fault on Debug Break Detection" mask="0x20" name="FDDBD"/>
+                    <bitfield caption="Port Control Mode" mask="0x10" name="PORTCTRL"/>
+                    <bitfield caption="Fuse State " mask="0x08" name="FUSE"/>
+                    <bitfield caption="Fault E Digital Filter Selection" mask="0x04" name="FILTERE"/>
+                    <bitfield caption="Fault E Input selection" mask="0x03" name="SRCE" values="FAULT_SRCE"/>
+                </register>
+                <register caption="Control B Register" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Fault A Software Mode" mask="0x80" name="SOFTA"/>
+                    <bitfield caption="Fault A Halt Action" mask="0x60" name="HALTA" values="FAULT_HALTA"/>
+                    <bitfield caption="Fault A Restart Action" mask="0x10" name="RESTARTA"/>
+                    <bitfield caption="Fault A Keep Action" mask="0x08" name="KEEPA"/>
+                    <bitfield caption="Fault A Source Selection" mask="0x03" name="SRCA" values="FAULT_SRCA"/>
+                </register>
+                <register caption="Control C Register" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Fault A Capture" mask="0x20" name="CAPTA"/>
+                    <bitfield caption="Fault A Digital Filter Selection" mask="0x04" name="FILTERA"/>
+                    <bitfield caption="Fault A Blanking" mask="0x02" name="BLANKA"/>
+                    <bitfield caption="Fault A Qualification" mask="0x01" name="QUALA"/>
+                </register>
+                <register caption="Control D Register" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Fault B Software Mode" mask="0x80" name="SOFTB"/>
+                    <bitfield caption="Fault B Halt Action" mask="0x60" name="HALTB" values="FAULT_HALTB"/>
+                    <bitfield caption="Fault B Restart Action" mask="0x10" name="RESTARTB"/>
+                    <bitfield caption="Fault B Keep Action" mask="0x08" name="KEEPB"/>
+                    <bitfield caption="Fault B Source Selection" mask="0x03" name="SRCB" values="FAULT_SRCB"/>
+                </register>
+                <register caption="Control E Register" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Fault B Capture" mask="0x20" name="CAPTB"/>
+                    <bitfield caption="Fault B Digital Filter Selection" mask="0x04" name="FILTERB"/>
+                    <bitfield caption="Fault B Blanking" mask="0x02" name="BLANKB"/>
+                    <bitfield caption="Fault B Qualification" mask="0x01" name="QUALB"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Fault B State" mask="0x80" name="STATEB"/>
+                    <bitfield caption="Fault A State" mask="0x40" name="STATEA"/>
+                    <bitfield caption="Fault E State" mask="0x20" name="STATEE"/>
+                    <bitfield caption="Channel Index Flag" mask="0x08" name="IDX"/>
+                    <bitfield caption="Fault B Flag" mask="0x04" name="FAULTBIN"/>
+                    <bitfield caption="Fault A Flag" mask="0x02" name="FAULTAIN"/>
+                    <bitfield caption="Fault E Flag" mask="0x01" name="FAULTEIN"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x06" size="1">
+                    <bitfield caption="State B Clear" mask="0x80" name="HALTBCLR"/>
+                    <bitfield caption="State A Clear" mask="0x40" name="HALTACLR"/>
+                    <bitfield caption="State E Clear" mask="0x20" name="STATEECLR"/>
+                    <bitfield caption="Fault B Flag" mask="0x04" name="FAULTB"/>
+                    <bitfield caption="Fault A Flag" mask="0x02" name="FAULTA"/>
+                    <bitfield caption="Fault E Flag" mask="0x01" name="FAULTE"/>
+                </register>
+                <register caption="Control Register G set" name="CTRLGSET" offset="0x07" size="1">
+                    <bitfield caption="Software Fault B" mask="0x80" name="FAULTBSW"/>
+                    <bitfield caption="Software Fault A" mask="0x40" name="FAULTASW"/>
+                    <bitfield caption="Software Fault E" mask="0x20" name="FAULTESW"/>
+                    <bitfield caption="Channel index Command" mask="0x18" name="IDXCMD" values="FAULT_IDXCMD"/>
+                </register>
+            </register-group>
+            <value-group caption="Ramp Mode Selection" name="FAULT_RAMP">
+                <value caption="Normal Mode" name="RAMP1" value="0x00"/>
+                <value caption="RAMP2 Mode" name="RAMP2" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault E Input Source Selection" name="FAULT_SRCE">
+                <value caption="Fault Protection Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Event Channel n+2" name="CHN2" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault A Halt Action Selection" name="FAULT_HALTA">
+                <value caption="Halt Action Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Hardware Halt Action" name="HW" value="0x01"/>
+                <value caption="Software Halt Action" name="SW" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault A Source Selection" name="FAULT_SRCA">
+                <value caption="Fault A Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Fault A linked to Fault B State from previous cycle" name="LINK" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault B Halt Action Selection" name="FAULT_HALTB">
+                <value caption="Halt Action Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Hardware Halt Action" name="HW" value="0x01"/>
+                <value caption="Software Halt Action" name="SW" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault B Source Selection" name="FAULT_SRCB">
+                <value caption="Fault B disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Fault B linked to Fault A State from previous cycle" name="LINK" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel index Command" name="FAULT_IDXCMD">
+                <value caption="Command Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Force Cycle B in Next Cycle" name="SET" value="0x01"/>
+                <value caption="Force Cycle A in Next Cycle" name="CLEAR" value="0x02"/>
+                <value caption="Hold Current Cycle Index in Next Cycle " name="HOLD" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="WEX" id="I3007" version="XMEGAE" caption="Waveform Extension">
+            <register-group caption="Waveform Extension" name="WEX" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Update Source Selection" mask="0x80" name="UPSEL"/>
+                    <bitfield caption="Output Matrix" mask="0x70" name="OTMX" values="WEX_OTMX"/>
+                    <bitfield caption="Dead-Time Insertion Generator 3 Enable" mask="0x08" name="DTI3EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 2 Enable" mask="0x04" name="DTI2EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 1 Enable" mask="0x02" name="DTI1EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 0 Enable" mask="0x01" name="DTI0EN"/>
+                </register>
+                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01"
+                          size="1"/>
+                <register caption="Dead-time Low Side Register" name="DTLS" offset="0x02" size="1"/>
+                <register caption="Dead-time High Side Register" name="DTHS" offset="0x03" size="1"/>
+                <register caption="Status Clear Register" name="STATUSCLR" offset="0x04" size="1">
+                    <bitfield caption="Swap Buffer Valid " mask="0x04" name="SWAPBUF"/>
+                    <bitfield caption="Pattern Generator Value Buffer Valid " mask="0x02" name="PGVBUFV"/>
+                    <bitfield caption="Pattern Generator Overwrite Buffer Valid" mask="0x01" name="PGOBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Swap Buffer Valid " mask="0x04" name="SWAPBUF"/>
+                    <bitfield caption="Pattern Generator Value Buffer Valid " mask="0x02" name="PGVBUFV"/>
+                    <bitfield caption="Pattern Generator Overwrite Buffer Valid " mask="0x01" name="PGOBUFV"/>
+                </register>
+                <register caption="Swap Register" name="SWAP" offset="0x06" size="1">
+                    <bitfield caption="Swap DTI output pair 3" mask="0x08" name="SWAP3"/>
+                    <bitfield caption="Swap DTI output pair 2" mask="0x04" name="SWAP2"/>
+                    <bitfield caption="Swap DTI output pair 1" mask="0x02" name="SWAP1"/>
+                    <bitfield caption="Swap DTI output pair 0" mask="0x01" name="SWAP0"/>
+                </register>
+                <register caption="Pattern Generation Override Register" name="PGO" offset="0x07" size="1"/>
+                <register caption="Pattern Generation Value Register" name="PGV" offset="0x08" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="SWAPBUF" offset="0x0A" size="1">
+                    <bitfield caption="Swap DTI output pair 3 " mask="0x08" name="SWAP3BUF"/>
+                    <bitfield caption="Swap DTI output pair 2" mask="0x04" name="SWAP2BUF"/>
+                    <bitfield caption="Swap DTI output pair 1 " mask="0x02" name="SWAP1BUF"/>
+                    <bitfield caption="Swap DTI output pair 0" mask="0x01" name="SWAP0BUF"/>
+                </register>
+                <register caption="Pattern Generation Overwrite Buffer Register" name="PGOBUF" offset="0x0B" size="1"/>
+                <register caption="Pattern Generation Value Buffer Register" name="PGVBUF" offset="0x0C" size="1"/>
+                <register caption="Output Override Disable Register " name="OUTOVDIS" offset="0x0F" size="1"/>
+            </register-group>
+            <value-group caption="Output Matrix Mode" name="WEX_OTMX">
+                <value caption="Default Output Matrix Mode" name="DEFAULT" value="0x00"/>
+                <value caption="First Output matrix Mode" name="FIRST" value="0x01"/>
+                <value caption="Second Output matrix Mode" name="SECOND" value="0x02"/>
+                <value caption="Third Output matrix Mode" name="THIRD" value="0x03"/>
+                <value caption="Fourth Output matrix Mode" name="FOURTH" value="0x04"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I3620" version="XMEGAE" caption="High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x0C" name="HRPLUS" values="HIRES_HRPLUS"/>
+                    <bitfield caption="High Resolution Mode" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Plus Mode" name="HIRES_HRPLUS">
+                <value caption="No Hi-Res Plus" name="NONE" value="0x00"/>
+                <value caption="Hi-Res Plus enabled on Timer 4" name="HRP4" value="0x01"/>
+                <value caption="Hi-Res Plus enabled on Timer 5" name="HRP5" value="0x02"/>
+                <value caption="Hi-Res Plus enabled on Timer 4 and 5" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Mode" name="HIRES_HREN">
+                <value caption="No Hi-Res" name="NONE" value="0x00"/>
+                <value caption="Hi-Res enabled on Timer 4" name="HRP4" value="0x01"/>
+                <value caption="Hi-Res enabled on Timer 5" name="HRP5" value="0x02"/>
+                <value caption="Hi-Res enabled on Timer 4 and 5" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I4000" version="XMEGAE" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Start Bit Interrupt Flag" mask="0x02" name="RXSIF"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                    <bitfield caption="Data Reception Flag" mask="0x01" name="DRIF"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x02" size="1">
+                    <bitfield caption="Receive Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="Data Reception Interrupt Enable" mask="0x40" name="DRIE"/>
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x03" size="1">
+                    <bitfield caption="One Wire Mode" mask="0x80" name="ONEWIRE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x40" name="SFDEN"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x04" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="DECTYPE" values="USART_DECTYPE"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="LUTACT" values="USART_LUTACT"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT"
+                              values="USART_PECACT"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Start Interrupt level" name="USART_RXSINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Encoding and Decoding Type" name="USART_DECTYPE">
+                <value caption="DATA Field Encoding" name="DATA" value="0x00"/>
+                <value caption="Start and Data Fields Encoding" name="SDATA" value="0x02"/>
+                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="XCL LUT Action" name="USART_LUTACT">
+                <value caption="Standard Frame Configuration" name="OFF" value="0x00"/>
+                <value caption="Receiver Decoding Enabled" name="RX" value="0x01"/>
+                <value caption="Transmitter Encoding Enabled" name="TX" value="0x02"/>
+                <value caption="Both Encoding and Decoding Enabled" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="XCL Peripheral Counter Action" name="USART_PECACT">
+                <value caption="Standard Mode" name="OFF" value="0x00"/>
+                <value caption="Variable Data Lenght in Reception" name="PEC0" value="0x01"/>
+                <value caption="Variable Data Lenght in Transmission" name="PEC1" value="0x02"/>
+                <value caption="Variable Data Lenght in both Reception and Transmission" name="PERC01" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAE" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface with Buffer Modes" name="SPI" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable SPI Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80"
+                              name="RXCIE"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40"
+                              name="TXCIE"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20"
+                              name="DREIE"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10"
+                              name="SSIE"/>
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag (In Standard Mode Only)." mask="0x80" name="IF"/>
+                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80"
+                              name="RXCIF"/>
+                    <bitfield caption="Write Collision Flag (In Standard Mode Only)." mask="0x40" name="WRCOL"/>
+                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40"
+                              name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20"
+                              name="DREIF"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10"
+                              name="SSIF"/>
+                    <bitfield caption="Buffer Overflow (In Buffer Modes Only)." mask="0x01" name="BUFOVF"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Buffer Modes" mask="0xC0" name="BUFMODE" values="SPI_BUFMODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x04" name="SSD"/>
+                </register>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)."
+                       name="0" value="0x00"/>
+                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)."
+                       name="1" value="0x01"/>
+                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)."
+                       name="2" value="0x02"/>
+                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)."
+                       name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4." name="DIV4" value="0x00"/>
+                <value caption="If CLK2X=1 CLKper/8, else (CLK2X=0) CLKper/16." name="DIV16" value="0x01"/>
+                <value caption="If CLK2X=1 CLKper/32, else (CLK2X=0) CLKper/64." name="DIV64" value="0x02"/>
+                <value caption="If CLK2X=1 CLKper/64, else (CLK2X=0) CLKper/128." name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Buffer Modes" name="SPI_BUFMODE">
+                <value caption="SPI Unbuffered Mode" name="OFF" value="0x00"/>
+                <value caption="Buffer Mode 1 (with dummy byte)" name="BUFMODE1" value="0x02"/>
+                <value caption="Buffer Mode 2 (no dummy byte)" name="BUFMODE2" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I3620" version="XMEGAE" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="7">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+                <register caption="Fault State" name="FUSEBYTE6" offset="0x06" size="1" initval="0xFF">
+                    <bitfield caption="Fault Dectection Action on TC5" mask="0x80" name="FDACT5"/>
+                    <bitfield caption="Fault Dectection Action on TC4" mask="0x40" name="FDACT4"/>
+                    <bitfield caption="Port Pin Value" mask="0x3F" name="VALUE"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3620" version="XMEGAE" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 8MHz Calibration Value" name="RCOSC8M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="Temperature corresponds to TEMPSENSE3/2" name="ROOMTEMP" offset="0x1E" size="1"/>
+                <register caption="Temperature corresponds to TEMPSENSE1/0" name="HOTTEMP" offset="0x1F" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ACA Current Calibration Byte" name="ACACURRCAL" offset="0x28" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 2" name="TEMPSENSE2" offset="0x2C" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 3" name="TEMPSENSE3" offset="0x2D" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_32">
+            <pin pad="GND" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA3" position="3"/>
+            <pin pad="PA2" position="4"/>
+            <pin pad="PA1" position="5"/>
+            <pin pad="PA0" position="6"/>
+            <pin pad="PDI" position="7"/>
+            <pin pad="RESET" position="8"/>
+            <pin pad="PC7" position="9"/>
+            <pin pad="PC6" position="10"/>
+            <pin pad="PC5" position="11"/>
+            <pin pad="PC4" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC2" position="14"/>
+            <pin pad="PC1" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="VCC" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="PR1" position="19"/>
+            <pin pad="PR0" position="20"/>
+            <pin pad="PD7" position="21"/>
+            <pin pad="PD6" position="22"/>
+            <pin pad="PD5" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD3" position="25"/>
+            <pin pad="PD2" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD0" position="28"/>
+            <pin pad="PA7" position="29"/>
+            <pin pad="PA6" position="30"/>
+            <pin pad="PA5" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml
new file mode 100644
index 00000000..08663053
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA384C3.xml
@@ -0,0 +1,3074 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega384C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega384C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x62000" endianness="little">
+                    <memory-segment start="0x00000" size="0x60000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x5E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x60000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0xA000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x8000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000" version="XMEGAC">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAB">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x45"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0085E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00860000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" version="XMEGAC" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="48">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x04" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x01" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR01" value="0x00"/>
+                <value caption="Channel 0 &gt; channel 1" name="CH01" value="0x01"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAB" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current limit" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml
new file mode 100644
index 00000000..99f609db
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA384D3.xml
@@ -0,0 +1,2673 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega384D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega384D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega384D3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x62000" endianness="little">
+                    <memory-segment start="0x00000" size="0x60000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x5E000" size="0x2000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="512"/>
+                    <memory-segment start="0x60000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="512"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0xA000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x1000" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x8000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x1000">
+                    <memory-segment start="0x00000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0200">
+                    <memory-segment start="0x0000" size="0x0200" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="512"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="512"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAB">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PF1"/>
+                            <signal function="USART" group="RXD" pad="PF2"/>
+                            <signal function="USART" group="TXD" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x98"/>
+                    <property name="SIGNATURE2" value="0x47"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0085E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00860000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAB" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current limit" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml
new file mode 100644
index 00000000..295ed089
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1.xml
@@ -0,0 +1,2800 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA64A1-AU" package="TQFP100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A1-CU" package="CBGA100" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64A1" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x11000" endianness="little">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
+                    <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x000800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x001000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                    <memory-segment start="0x3000" size="0xFFCFFF" type="ram" rw="RW" exec="0" name="EXTERNAL_SRAM"
+                                    external="true"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076-revH">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                    </instance>
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="EBI" id="I3001">
+                    <instance name="EBI">
+                        <register-group address-space="data" offset="0x0440" name-in-module="EBI" name="EBI"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWID">
+                        <register-group address-space="data" offset="0x490" name-in-module="TWI" name="TWID"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                    <instance name="TWIF">
+                        <register-group address-space="data" offset="0x4B0" name-in-module="TWI" name="TWIF"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTH">
+                        <register-group address-space="data" offset="0x06E0" name-in-module="PORT" name="PORTH"/>
+                    </instance>
+                    <instance name="PORTJ">
+                        <register-group address-space="data" offset="0x0700" name-in-module="PORT" name="PORTJ"/>
+                    </instance>
+                    <instance name="PORTK">
+                        <register-group address-space="data" offset="0x0720" name-in-module="PORT" name="PORTK"/>
+                    </instance>
+                    <instance name="PORTQ">
+                        <register-group address-space="data" offset="0x07C0" name-in-module="PORT" name="PORTQ"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="TCF1">
+                        <register-group address-space="data" offset="0xB40" name-in-module="TC1" name="TCF1"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="75" module-instance="TWID" name-in-module="TWI"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="94" module-instance="PORTQ" name-in-module="PORT"/>
+                <interrupt-group index="96" module-instance="PORTH" name-in-module="PORT"/>
+                <interrupt-group index="98" module-instance="PORTJ" name-in-module="PORT"/>
+                <interrupt-group index="100" module-instance="PORTK" name-in-module="PORT"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="106" module-instance="TWIF" name-in-module="TWI"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="114" module-instance="TCF1" name-in-module="TC1"/>
+                <interrupt-group index="118" module-instance="SPIF" name-in-module="SPI"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="122" module-instance="USARTF1" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0964E03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x4E"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0081F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="External Bus Interface" mask="0x08" name="EBI"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076-revH" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EBI" id="I3001" caption="External Bus Interface">
+            <register-group caption="EBI Chip Select Module" name="EBI_CS" size="4">
+                <register caption="Chip Select Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Address Size" mask="0x7C" name="ASIZE" values="EBI_CS_ASIZE"/>
+                    <bitfield caption="Memory Mode" mask="0x03" name="MODE" values="EBI_CS_MODE"/>
+                </register>
+                <register caption="Chip Select Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="SRAM Wait State Cycles" mask="0x07" name="SRWS" values="EBI_CS_SRWS"/>
+                    <bitfield caption="SDRAM Initialization Done" mask="0x80" name="SDINITDONE"/>
+                    <bitfield caption="SDRAM Self-refresh Enable" mask="0x04" name="SDSREN"/>
+                    <bitfield caption="SDRAM Mode" mask="0x03" name="SDMODE" values="EBI_CS_SDMODE"/>
+                </register>
+                <register caption="Base Address" name="BASEADDR" offset="0x02" size="2">
+                    <bitfield caption="Chip Select Base Address" mask="0xFFF0" name="BASEADDR"/>
+                </register>
+            </register-group>
+            <register-group caption="External Bus Interface" name="EBI" size="32">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDRAM Data Width Setting" mask="0xC0" name="SDDATAW" values="EBI_SDDATAW"/>
+                    <bitfield caption="SRAM LPC Mode" mask="0x30" name="LPCMODE" values="EBI_LPCMODE"/>
+                    <bitfield caption="SRAM Mode" mask="0x0C" name="SRMODE" values="EBI_SRMODE"/>
+                    <bitfield caption="Interface Mode" mask="0x03" name="IFMODE" values="EBI_IFMODE"/>
+                </register>
+                <register caption="SDRAM Control Register A" name="SDRAMCTRLA" offset="0x01" size="1">
+                    <bitfield caption="SDRAM CAS Latency Setting" mask="0x08" name="SDCAS"/>
+                    <bitfield caption="SDRAM ROW Bits Setting" mask="0x04" name="SDROW"/>
+                    <bitfield caption="SDRAM Column Bits Setting" mask="0x03" name="SDCOL" values="EBI_SDCOL"/>
+                </register>
+                <register caption="SDRAM Refresh Period" name="REFRESH" offset="0x04" size="2"/>
+                <register caption="SDRAM Initialization Delay" name="INITDLY" offset="0x06" size="2"/>
+                <register caption="SDRAM Control Register B" name="SDRAMCTRLB" offset="0x08" size="1">
+                    <bitfield caption="SDRAM Mode Register Delay" mask="0xC0" name="MRDLY" values="EBI_MRDLY"/>
+                    <bitfield caption="SDRAM Row Cycle Delay" mask="0x38" name="ROWCYCDLY" values="EBI_ROWCYCDLY"/>
+                    <bitfield caption="SDRAM Row-to-Precharge Delay" mask="0x07" name="RPDLY" values="EBI_RPDLY"/>
+                </register>
+                <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
+                    <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
+                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
+                </register>
+                <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 1" name="CS1" offset="0x14" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 2" name="CS2" offset="0x18" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 3" name="CS3" offset="0x1C" name-in-module="EBI_CS"/>
+            </register-group>
+            <value-group caption="Chip Select address size" name="EBI_CS_ASIZE">
+                <value caption="256 bytes" name="256B" value="0x00"/>
+                <value caption="512 bytes" name="512B" value="0x01"/>
+                <value caption="1K bytes" name="1KB" value="0x02"/>
+                <value caption="2K bytes" name="2KB" value="0x03"/>
+                <value caption="4K bytes" name="4KB" value="0x04"/>
+                <value caption="8K bytes" name="8KB" value="0x05"/>
+                <value caption="16K bytes" name="16KB" value="0x06"/>
+                <value caption="32K bytes" name="32KB" value="0x07"/>
+                <value caption="64K bytes" name="64KB" value="0x08"/>
+                <value caption="128K bytes" name="128KB" value="0x09"/>
+                <value caption="256K bytes" name="256KB" value="0x0A"/>
+                <value caption="512K bytes" name="512KB" value="0x0B"/>
+                <value caption="1M bytes" name="1MB" value="0x0C"/>
+                <value caption="2M bytes" name="2MB" value="0x0D"/>
+                <value caption="4M bytes" name="4MB" value="0x0E"/>
+                <value caption="8M bytes" name="8MB" value="0x0F"/>
+                <value caption="16M bytes" name="16M" value="0x10"/>
+            </value-group>
+            <value-group caption="SRAM Wait State Selection" name="EBI_CS_SRWS">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Chip Select address mode" name="EBI_CS_MODE">
+                <value caption="Chip Select Disabled" name="DISABLED" value="0x00"/>
+                <value caption="Chip Select in SRAM mode" name="SRAM" value="0x01"/>
+                <value caption="Chip Select in SRAM LPC mode" name="LPC" value="0x02"/>
+                <value caption="Chip Select in SDRAM mode" name="SDRAM" value="0x03"/>
+            </value-group>
+            <value-group caption="Chip Select SDRAM mode" name="EBI_CS_SDMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x00"/>
+                <value caption="Load Mode Register command mode" name="LOAD" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDDATAW">
+                <value caption="4-bit data bus" name="4BIT" value="0x00"/>
+                <value caption="8-bit data bus" name="8BIT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_LPCMODE">
+                <value caption="Data muxed with addr byte 0" name="ALE1" value="0x00"/>
+                <value caption="Data muxed with addr byte 0 and 1" name="ALE12" value="0x02"/>
+            </value-group>
+            <value-group caption="" name="EBI_SRMODE">
+                <value caption="Addr byte 0 muxed with 1" name="ALE1" value="0x00"/>
+                <value caption="Addr byte 0 muxed with 2" name="ALE2" value="0x01"/>
+                <value caption="Addr byte 0 muxed with 1 and 2" name="ALE12" value="0x02"/>
+                <value caption="No addr muxing" name="NOALE" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_IFMODE">
+                <value caption="EBI Disabled" name="DISABLED" value="0x00"/>
+                <value caption="3-port mode" name="3PORT" value="0x01"/>
+                <value caption="4-port mode" name="4PORT" value="0x02"/>
+                <value caption="2-port mode" name="2PORT" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDCOL">
+                <value caption="8 column bits" name="8BIT" value="0x00"/>
+                <value caption="9 column bits" name="9BIT" value="0x01"/>
+                <value caption="10 column bits" name="10BIT" value="0x02"/>
+                <value caption="11 column bits" name="11BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Load Mode to Active delay" name="EBI_MRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Row Cycle Delay" name="EBI_ROWCYCDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Precharge Delay" name="EBI_RPDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Write Recovery Delay" name="EBI_WRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Exit Self Refresh to Active Delay" name="EBI_ESRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Column Delay" name="EBI_ROWCOLDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml
new file mode 100644
index 00000000..7c41c672
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A1U.xml
@@ -0,0 +1,3992 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64A1U-AU" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-CU" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-C7U" package="BGA100" pinout="BGA100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A1U-AN" package="TQFP100" pinout="TQFP100" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64A1U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x1000000" endianness="little">
+                    <memory-segment start="0x0000" size="0x001000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x000800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x001000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                    <memory-segment start="0x3000" size="0xFFCFFF" type="ram" rw="RW" exec="0" name="EXTERNAL_SRAM"
+                                    external="true"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADCPOS" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADCPOS" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADCPOS" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADCPOS" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADCPOS" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADCPOS" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADCPOS" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADCPOS" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADCPOS" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADCPOS" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADCPOS" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADCPOS" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADCPOS" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADCPOS" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADCPOS" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADCPOS" group="ADC" index="15" pad="PB7"/>
+                            <signal function="GAINPOS" group="ADC" index="0" pad="PA0"/>
+                            <signal function="GAINPOS" group="ADC" index="1" pad="PA1"/>
+                            <signal function="GAINPOS" group="ADC" index="2" pad="PA2"/>
+                            <signal function="GAINPOS" group="ADC" index="3" pad="PA3"/>
+                            <signal function="GAINPOS" group="ADC" index="4" pad="PA4"/>
+                            <signal function="GAINPOS" group="ADC" index="5" pad="PA5"/>
+                            <signal function="GAINPOS" group="ADC" index="6" pad="PA6"/>
+                            <signal function="GAINPOS" group="ADC" index="7" pad="PA7"/>
+                            <signal function="GAINNEG" group="ADC" index="4" pad="PA4"/>
+                            <signal function="GAINNEG" group="ADC" index="5" pad="PA5"/>
+                            <signal function="GAINNEG" group="ADC" index="6" pad="PA6"/>
+                            <signal function="GAINNEG" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADCNEG" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADCNEG" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADCNEG" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADCNEG" group="ADC" index="3" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADCPOS" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADCPOS" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADCPOS" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADCPOS" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADCPOS" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADCPOS" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADCPOS" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADCPOS" group="ADC" index="7" pad="PB7"/>
+                            <signal function="GAINPOS" group="ADC" index="0" pad="PB0"/>
+                            <signal function="GAINPOS" group="ADC" index="1" pad="PB1"/>
+                            <signal function="GAINPOS" group="ADC" index="2" pad="PB2"/>
+                            <signal function="GAINPOS" group="ADC" index="3" pad="PB3"/>
+                            <signal function="GAINPOS" group="ADC" index="4" pad="PB4"/>
+                            <signal function="GAINPOS" group="ADC" index="5" pad="PB5"/>
+                            <signal function="GAINPOS" group="ADC" index="6" pad="PB6"/>
+                            <signal function="GAINPOS" group="ADC" index="7" pad="PB7"/>
+                            <signal function="ADCNEG" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADCNEG" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADCNEG" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADCNEG" group="ADC" index="7" pad="PB7"/>
+                            <signal function="GAINNEG" group="ADC" index="4" pad="PB4"/>
+                            <signal function="GAINNEG" group="ADC" index="5" pad="PB5"/>
+                            <signal function="GAINNEG" group="ADC" index="6" pad="PB6"/>
+                            <signal function="GAINNEG" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PA2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="ACPOS" group="AC" index="0" pad="PA0"/>
+                            <signal function="ACPOS" group="AC" index="1" pad="PA1"/>
+                            <signal function="ACPOS" group="AC" index="2" pad="PA2"/>
+                            <signal function="ACPOS" group="AC" index="3" pad="PA3"/>
+                            <signal function="ACPOS" group="AC" index="4" pad="PA4"/>
+                            <signal function="ACPOS" group="AC" index="5" pad="PA5"/>
+                            <signal function="ACPOS" group="AC" index="6" pad="PA6"/>
+                            <signal function="ACNEG" group="AC" index="0" pad="PA0"/>
+                            <signal function="ACNEG" group="AC" index="1" pad="PA1"/>
+                            <signal function="ACNEG" group="AC" index="3" pad="PA3"/>
+                            <signal function="ACNEG" group="AC" index="5" pad="PA5"/>
+                            <signal function="ACNEG" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="ACPOS" group="AC" index="0" pad="PB0"/>
+                            <signal function="ACPOS" group="AC" index="1" pad="PB1"/>
+                            <signal function="ACPOS" group="AC" index="2" pad="PB2"/>
+                            <signal function="ACPOS" group="AC" index="3" pad="PB3"/>
+                            <signal function="ACPOS" group="AC" index="4" pad="PB4"/>
+                            <signal function="ACPOS" group="AC" index="5" pad="PB5"/>
+                            <signal function="ACPOS" group="AC" index="6" pad="PB6"/>
+                            <signal function="ACNEG" group="AC" index="0" pad="PB0"/>
+                            <signal function="ACNEG" group="AC" index="1" pad="PB1"/>
+                            <signal function="ACNEG" group="AC" index="3" pad="PB3"/>
+                            <signal function="ACNEG" group="AC" index="5" pad="PB5"/>
+                            <signal function="ACNEG" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="EBI" id="I3001">
+                    <instance name="EBI">
+                        <register-group address-space="data" offset="0x0440" name-in-module="EBI" name="EBI"/>
+                        <signals>
+                            <signal function="EBIPORT0" group="PORT0" index="0" pad="PH0"/>
+                            <signal function="EBIPORT0" group="PORT0" index="1" pad="PH1"/>
+                            <signal function="EBIPORT0" group="PORT0" index="2" pad="PH2"/>
+                            <signal function="EBIPORT0" group="PORT0" index="3" pad="PH3"/>
+                            <signal function="EBIPORT0" group="PORT0" index="4" pad="PH4"/>
+                            <signal function="EBIPORT0" group="PORT0" index="5" pad="PH5"/>
+                            <signal function="EBIPORT0" group="PORT0" index="6" pad="PH6"/>
+                            <signal function="EBIPORT0" group="PORT0" index="7" pad="PH7"/>
+                            <signal function="EBIPORT1" group="PORT1" index="0" pad="PJ0"/>
+                            <signal function="EBIPORT1" group="PORT1" index="1" pad="PJ1"/>
+                            <signal function="EBIPORT1" group="PORT1" index="2" pad="PJ2"/>
+                            <signal function="EBIPORT1" group="PORT1" index="3" pad="PJ3"/>
+                            <signal function="EBIPORT1" group="PORT1" index="4" pad="PJ4"/>
+                            <signal function="EBIPORT1" group="PORT1" index="5" pad="PJ5"/>
+                            <signal function="EBIPORT1" group="PORT1" index="6" pad="PJ6"/>
+                            <signal function="EBIPORT1" group="PORT1" index="7" pad="PJ7"/>
+                            <signal function="EBIPORT2" group="PORT2" index="0" pad="PK0"/>
+                            <signal function="EBIPORT2" group="PORT2" index="1" pad="PK1"/>
+                            <signal function="EBIPORT2" group="PORT2" index="2" pad="PK2"/>
+                            <signal function="EBIPORT2" group="PORT2" index="3" pad="PK3"/>
+                            <signal function="EBIPORT2" group="PORT2" index="4" pad="PK4"/>
+                            <signal function="EBIPORT2" group="PORT2" index="5" pad="PK5"/>
+                            <signal function="EBIPORT2" group="PORT2" index="6" pad="PK6"/>
+                            <signal function="EBIPORT2" group="PORT2" index="7" pad="PK7"/>
+                            <signal function="EBIPORT3" group="PORT3" index="0" pad="PF0"/>
+                            <signal function="EBIPORT3" group="PORT3" index="1" pad="PF1"/>
+                            <signal function="EBIPORT3" group="PORT3" index="2" pad="PF2"/>
+                            <signal function="EBIPORT3" group="PORT3" index="3" pad="PF3"/>
+                            <signal function="EBIPORT3" group="PORT3" index="4" pad="PF4"/>
+                            <signal function="EBIPORT3" group="PORT3" index="5" pad="PF5"/>
+                            <signal function="EBIPORT3" group="PORT3" index="6" pad="PF6"/>
+                            <signal function="EBIPORT3" group="PORT3" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWIC" group="SDA" pad="PC0"/>
+                            <signal function="TWIC" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWID">
+                        <register-group address-space="data" offset="0x490" name-in-module="TWI" name="TWID"/>
+                        <signals>
+                            <signal function="TWID" group="SDA" pad="PD0"/>
+                            <signal function="TWID" group="SCL" pad="PD1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWIE" group="SDA" pad="PE0"/>
+                            <signal function="TWIE" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIF">
+                        <register-group address-space="data" offset="0x4B0" name-in-module="TWI" name="TWIF"/>
+                        <signals>
+                            <signal function="TWIF" group="SDA" pad="PF0"/>
+                            <signal function="TWIF" group="SCL" pad="PF1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTH">
+                        <register-group address-space="data" offset="0x06E0" name-in-module="PORT" name="PORTH"/>
+                        <signals>
+                            <signal function="PORTH" group="P" index="0" pad="PH0"/>
+                            <signal function="PORTH" group="P" index="1" pad="PH1"/>
+                            <signal function="PORTH" group="P" index="2" pad="PH2"/>
+                            <signal function="PORTH" group="P" index="3" pad="PH3"/>
+                            <signal function="PORTH" group="P" index="4" pad="PH4"/>
+                            <signal function="PORTH" group="P" index="5" pad="PH5"/>
+                            <signal function="PORTH" group="P" index="6" pad="PH6"/>
+                            <signal function="PORTH" group="P" index="7" pad="PH7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTJ">
+                        <register-group address-space="data" offset="0x0700" name-in-module="PORT" name="PORTJ"/>
+                        <signals>
+                            <signal function="PORTJ" group="P" index="0" pad="PJ0"/>
+                            <signal function="PORTJ" group="P" index="1" pad="PJ1"/>
+                            <signal function="PORTJ" group="P" index="2" pad="PJ2"/>
+                            <signal function="PORTJ" group="P" index="3" pad="PJ3"/>
+                            <signal function="PORTJ" group="P" index="4" pad="PJ4"/>
+                            <signal function="PORTJ" group="P" index="5" pad="PJ5"/>
+                            <signal function="PORTJ" group="P" index="6" pad="PJ6"/>
+                            <signal function="PORTJ" group="P" index="7" pad="PJ7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTK">
+                        <register-group address-space="data" offset="0x0720" name-in-module="PORT" name="PORTK"/>
+                        <signals>
+                            <signal function="PORTK" group="P" index="0" pad="PK0"/>
+                            <signal function="PORTK" group="P" index="1" pad="PK1"/>
+                            <signal function="PORTK" group="P" index="2" pad="PK2"/>
+                            <signal function="PORTK" group="P" index="3" pad="PK3"/>
+                            <signal function="PORTK" group="P" index="4" pad="PK4"/>
+                            <signal function="PORTK" group="P" index="5" pad="PK5"/>
+                            <signal function="PORTK" group="P" index="6" pad="PK6"/>
+                            <signal function="PORTK" group="P" index="7" pad="PK7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTQ">
+                        <register-group address-space="data" offset="0x07C0" name-in-module="PORT" name="PORTQ"/>
+                        <signals>
+                            <signal function="PORTQ" group="P" index="0" pad="PQ0"/>
+                            <signal function="PORTQ" group="P" index="1" pad="PQ1"/>
+                            <signal function="PORTQ" group="P" index="2" pad="PQ2"/>
+                            <signal function="PORTQ" group="P" index="3" pad="PQ3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal function="TCC" group="OC0A" pad="PC0"/>
+                            <signal function="TCC" group="OC0B" pad="PC1"/>
+                            <signal function="TCC" group="OC0C" pad="PC2"/>
+                            <signal function="TCC" group="OC0D" pad="PC3"/>
+                            <signal function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TCD" group="OC0A" pad="PD0"/>
+                            <signal function="TCD" group="OC0B" pad="PD1"/>
+                            <signal function="TCD" group="OC0C" pad="PD2"/>
+                            <signal function="TCD" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TCD" group="OC1A" pad="PD4"/>
+                            <signal function="TCD" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE0" group="OC0A" pad="PE0"/>
+                            <signal function="TCE0" group="OC0B" pad="PE1"/>
+                            <signal function="TCE0" group="OC0C" pad="PE2"/>
+                            <signal function="TCE0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TCE1" group="OC1A" pad="PE4"/>
+                            <signal function="TCE1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TCF0" group="OC0A" pad="PF0"/>
+                            <signal function="TCF0" group="OC0B" pad="PF1"/>
+                            <signal function="TCF0" group="OC0C" pad="PF2"/>
+                            <signal function="TCF0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF1">
+                        <register-group address-space="data" offset="0xB40" name-in-module="TC1" name="TCF1"/>
+                        <signals>
+                            <signal function="TCF1" group="OC1A" pad="PF4"/>
+                            <signal function="TCF1" group="OC1B" pad="PF5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TCC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TCC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TCC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TCC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TCC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TCC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TCC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TCC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TCD2" group="LOC2A" pad="PD0"/>
+                            <signal function="TCD2" group="LOC2B" pad="PD1"/>
+                            <signal function="TCD2" group="LOC2C" pad="PD2"/>
+                            <signal function="TCD2" group="LOC2D" pad="PD3"/>
+                            <signal function="TCD2" group="HOC2A" pad="PD4"/>
+                            <signal function="TCD2" group="HOC2B" pad="PD5"/>
+                            <signal function="TCD2" group="HOC2C" pad="PD6"/>
+                            <signal function="TCD2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TCE2" group="LOC2A" pad="PE0"/>
+                            <signal function="TCE2" group="LOC2B" pad="PE1"/>
+                            <signal function="TCE2" group="LOC2C" pad="PE2"/>
+                            <signal function="TCE2" group="LOC2D" pad="PE3"/>
+                            <signal function="TCE2" group="HOC2A" pad="PE4"/>
+                            <signal function="TCE2" group="HOC2B" pad="PE5"/>
+                            <signal function="TCE2" group="HOC2C" pad="PE6"/>
+                            <signal function="TCE2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TCF2" group="LOC2A" pad="PF0"/>
+                            <signal function="TCF2" group="LOC2B" pad="PF1"/>
+                            <signal function="TCF2" group="LOC2C" pad="PF2"/>
+                            <signal function="TCF2" group="LOC2D" pad="PF3"/>
+                            <signal function="TCF2" group="HOC2A" pad="PF4"/>
+                            <signal function="TCF2" group="HOC2B" pad="PF5"/>
+                            <signal function="TCF2" group="HOC2C" pad="PF6"/>
+                            <signal function="TCF2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEXC" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEXC" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEXC" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEXC" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEXC" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEXC" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEXC" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEXC" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                        <signals>
+                            <signal function="AWEXE" group="OC0ALS" pad="PE0"/>
+                            <signal function="AWEXE" group="OC0AHS" pad="PE1"/>
+                            <signal function="AWEXE" group="OC0BLS" pad="PE2"/>
+                            <signal function="AWEXE" group="OC0BHS" pad="PE3"/>
+                            <signal function="AWEXE" group="OC0CLS" pad="PE4"/>
+                            <signal function="AWEXE" group="OC0CHS" pad="PE5"/>
+                            <signal function="AWEXE" group="OC0DLS" pad="PE6"/>
+                            <signal function="AWEXE" group="OC0DHS" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PC1"/>
+                            <signal function="USART" group="RXD" pad="PC2"/>
+                            <signal function="USART" group="TXD" pad="PC3"/>
+                            <signal function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PC5"/>
+                            <signal function="USART" group="RXD" pad="PC6"/>
+                            <signal function="USART" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE5"/>
+                            <signal function="USART" group="RXD" pad="PE6"/>
+                            <signal function="USART" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal function="USARTF0" group="XCK" pad="PF1"/>
+                            <signal function="USARTF0" group="RXD" pad="PF2"/>
+                            <signal function="USARTF0" group="TXD" pad="PF3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                        <signals>
+                            <signal function="USARTF1" group="XCK" pad="PF5"/>
+                            <signal function="USARTF1" group="RXD" pad="PF6"/>
+                            <signal function="USARTF1" group="TXD" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal function="SPIC" group="SS" pad="PC4"/>
+                            <signal function="SPIC" group="MOSI" pad="PC5"/>
+                            <signal function="SPIC" group="MISO" pad="PC6"/>
+                            <signal function="SPIC" group="SCK" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPID" group="SS" pad="PD4"/>
+                            <signal function="SPID" group="MOSI" pad="PD5"/>
+                            <signal function="SPID" group="MISO" pad="PD6"/>
+                            <signal function="SPID" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                        <signals>
+                            <signal function="SPIE" group="SS" pad="PE4"/>
+                            <signal function="SPIE" group="MOSI" pad="PE5"/>
+                            <signal function="SPIE" group="MISO" pad="PE6"/>
+                            <signal function="SPIE" group="SCK" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                        <signals>
+                            <signal function="SPIF" group="SS" pad="PF4"/>
+                            <signal function="SPIF" group="MOSI" pad="PF5"/>
+                            <signal function="SPIF" group="MISO" pad="PF6"/>
+                            <signal function="SPIF" group="SCK" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="75" module-instance="TWID" name-in-module="TWI"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="94" module-instance="PORTQ" name-in-module="PORT"/>
+                <interrupt-group index="96" module-instance="PORTH" name-in-module="PORT"/>
+                <interrupt-group index="98" module-instance="PORTJ" name-in-module="PORT"/>
+                <interrupt-group index="100" module-instance="PORTK" name-in-module="PORT"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="106" module-instance="TWIF" name-in-module="TWI"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="114" module-instance="TCF1" name-in-module="TC1"/>
+                <interrupt-group index="118" module-instance="SPIF" name-in-module="SPI"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="122" module-instance="USARTF1" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0964E03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x4E"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="External Bus Interface" mask="0x08" name="EBI"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="EBI Output register" name="EBIOUT" offset="0x05" size="1">
+                    <bitfield caption="EBI Chip Select Output" mask="0x03" name="EBICSOUT" values="PORTCFG_EBICSOUT"/>
+                    <bitfield caption="EBI Address Output" mask="0x0C" name="EBIADROUT" values="PORTCFG_EBIADROUT"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="EBI Address Output Port" name="PORTCFG_EBIADROUT">
+                <value caption="EBI port 3 address output on PORTF pins 0 to 7" name="PF" value="0x00"/>
+                <value caption="EBI port 3 address output on PORTE pins 0 to 7" name="PE" value="0x01"/>
+                <value caption="EBI port 3 address output on PORTF pins 4 to 7" name="PFH" value="0x02"/>
+                <value caption="EBI port 3 address output on PORTE pins 4 to 7" name="PEH" value="0x03"/>
+            </value-group>
+            <value-group caption="EBI Chip Select Output Port" name="PORTCFG_EBICSOUT">
+                <value caption="EBI chip select output to PORTH pin 4 to 7" name="PH" value="0x00"/>
+                <value caption="EBI chip select output to PORTL pin 4 to 7" name="PL" value="0x01"/>
+                <value caption="EBI chip select output to PORTF pin 4 to 7" name="PF" value="0x02"/>
+                <value caption="EBI chip select output to PORTE pin 4 to 7" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EBI" id="I3001" caption="External Bus Interface">
+            <register-group caption="EBI Chip Select Module" name="EBI_CS" size="4">
+                <register caption="Chip Select Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Address Size" mask="0x7C" name="ASIZE" values="EBI_CS_ASIZE"/>
+                    <bitfield caption="Legacy name: Address Space" mask="0x7C" name="ASPACE" values="EBI_CS_ASPACE"/>
+                    <bitfield caption="Memory Mode" mask="0x03" name="MODE" values="EBI_CS_MODE"/>
+                </register>
+                <register caption="Chip Select Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="SRAM Wait State Cycles" mask="0x07" name="SRWS" values="EBI_CS_SRWS"/>
+                    <bitfield caption="SDRAM Initialization Done" mask="0x80" name="SDINITDONE"/>
+                    <bitfield caption="SDRAM Self-refresh Enable" mask="0x04" name="SDSREN"/>
+                    <bitfield caption="SDRAM Mode" mask="0x03" name="SDMODE" values="EBI_CS_SDMODE"/>
+                </register>
+                <register caption="Base Address" name="BASEADDR" offset="0x02" size="2">
+                    <bitfield caption="Chip Select Base Address" mask="0xFFF0" name="BASEADDR"/>
+                </register>
+            </register-group>
+            <register-group caption="External Bus Interface" name="EBI" size="32">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDRAM Data Width Setting" mask="0xC0" name="SDDATAW" values="EBI_SDDATAW"/>
+                    <bitfield caption="SRAM LPC Mode" mask="0x30" name="LPCMODE" values="EBI_LPCMODE"/>
+                    <bitfield caption="SRAM Mode" mask="0x0C" name="SRMODE" values="EBI_SRMODE"/>
+                    <bitfield caption="Interface Mode" mask="0x03" name="IFMODE" values="EBI_IFMODE"/>
+                </register>
+                <register caption="SDRAM Control Register A" name="SDRAMCTRLA" offset="0x01" size="1">
+                    <bitfield caption="SDRAM CAS Latency Setting" mask="0x08" name="SDCAS"/>
+                    <bitfield caption="SDRAM ROW Bits Setting" mask="0x04" name="SDROW"/>
+                    <bitfield caption="SDRAM Column Bits Setting" mask="0x03" name="SDCOL" values="EBI_SDCOL"/>
+                </register>
+                <register caption="SDRAM Refresh Period" name="REFRESH" offset="0x04" size="2"/>
+                <register caption="SDRAM Initialization Delay" name="INITDLY" offset="0x06" size="2"/>
+                <register caption="SDRAM Control Register B" name="SDRAMCTRLB" offset="0x08" size="1">
+                    <bitfield caption="SDRAM Mode Register Delay" mask="0xC0" name="MRDLY" values="EBI_MRDLY"/>
+                    <bitfield caption="SDRAM Row Cycle Delay" mask="0x38" name="ROWCYCDLY" values="EBI_ROWCYCDLY"/>
+                    <bitfield caption="SDRAM Row-to-Precharge Delay" mask="0x07" name="RPDLY" values="EBI_RPDLY"/>
+                </register>
+                <register caption="SDRAM Control Register C" name="SDRAMCTRLC" offset="0x09" size="1">
+                    <bitfield caption="SDRAM Write Recovery Delay" mask="0xC0" name="WRDLY" values="EBI_WRDLY"/>
+                    <bitfield caption="SDRAM Exit-Self-refresh-to-Active Delay" mask="0x38" name="ESRDLY"
+                              values="EBI_ESRDLY"/>
+                    <bitfield caption="SDRAM Row-to-Column Delay" mask="0x07" name="ROWCOLDLY" values="EBI_ROWCOLDLY"/>
+                </register>
+                <register-group caption="Chip Select 0" name="CS0" offset="0x10" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 1" name="CS1" offset="0x14" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 2" name="CS2" offset="0x18" name-in-module="EBI_CS"/>
+                <register-group caption="Chip Select 3" name="CS3" offset="0x1C" name-in-module="EBI_CS"/>
+            </register-group>
+            <value-group caption="Chip Select address size" name="EBI_CS_ASIZE">
+                <value caption="256 bytes" name="256B" value="0x00"/>
+                <value caption="512 bytes" name="512B" value="0x01"/>
+                <value caption="1K bytes" name="1KB" value="0x02"/>
+                <value caption="2K bytes" name="2KB" value="0x03"/>
+                <value caption="4K bytes" name="4KB" value="0x04"/>
+                <value caption="8K bytes" name="8KB" value="0x05"/>
+                <value caption="16K bytes" name="16KB" value="0x06"/>
+                <value caption="32K bytes" name="32KB" value="0x07"/>
+                <value caption="64K bytes" name="64KB" value="0x08"/>
+                <value caption="128K bytes" name="128KB" value="0x09"/>
+                <value caption="256K bytes" name="256KB" value="0x0A"/>
+                <value caption="512K bytes" name="512KB" value="0x0B"/>
+                <value caption="1M bytes" name="1MB" value="0x0C"/>
+                <value caption="2M bytes" name="2MB" value="0x0D"/>
+                <value caption="4M bytes" name="4MB" value="0x0E"/>
+                <value caption="8M bytes" name="8MB" value="0x0F"/>
+                <value caption="16M bytes" name="16M" value="0x10"/>
+            </value-group>
+            <value-group caption="Legacy: Chip Select address space" name="EBI_CS_ASPACE">
+                <value caption="256 bytes" name="256B" value="0x00"/>
+                <value caption="512 bytes" name="512B" value="0x01"/>
+                <value caption="1K bytes" name="1KB" value="0x02"/>
+                <value caption="2K bytes" name="2KB" value="0x03"/>
+                <value caption="4K bytes" name="4KB" value="0x04"/>
+                <value caption="8K bytes" name="8KB" value="0x05"/>
+                <value caption="16K bytes" name="16KB" value="0x06"/>
+                <value caption="32K bytes" name="32KB" value="0x07"/>
+                <value caption="64K bytes" name="64KB" value="0x08"/>
+                <value caption="128K bytes" name="128KB" value="0x09"/>
+                <value caption="256K bytes" name="256KB" value="0x0A"/>
+                <value caption="512K bytes" name="512KB" value="0x0B"/>
+                <value caption="1M bytes" name="1MB" value="0x0C"/>
+                <value caption="2M bytes" name="2MB" value="0x0D"/>
+                <value caption="4M bytes" name="4MB" value="0x0E"/>
+                <value caption="8M bytes" name="8MB" value="0x0F"/>
+                <value caption="16M bytes" name="16M" value="0x10"/>
+            </value-group>
+            <value-group caption="SRAM Wait State Selection" name="EBI_CS_SRWS">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Chip Select address mode" name="EBI_CS_MODE">
+                <value caption="Chip Select Disabled" name="DISABLED" value="0x00"/>
+                <value caption="Chip Select in SRAM mode" name="SRAM" value="0x01"/>
+                <value caption="Chip Select in SRAM LPC mode" name="LPC" value="0x02"/>
+                <value caption="Chip Select in SDRAM mode" name="SDRAM" value="0x03"/>
+            </value-group>
+            <value-group caption="Chip Select SDRAM mode" name="EBI_CS_SDMODE">
+                <value caption="Normal mode" name="NORMAL" value="0x00"/>
+                <value caption="Load Mode Register command mode" name="LOAD" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDDATAW">
+                <value caption="4-bit data bus" name="4BIT" value="0x00"/>
+                <value caption="8-bit data bus" name="8BIT" value="0x01"/>
+            </value-group>
+            <value-group caption="" name="EBI_LPCMODE">
+                <value caption="Data muxed with addr byte 0" name="ALE1" value="0x00"/>
+                <value caption="Data muxed with addr byte 0 and 1" name="ALE12" value="0x02"/>
+            </value-group>
+            <value-group caption="" name="EBI_SRMODE">
+                <value caption="Addr byte 0 muxed with 1" name="ALE1" value="0x00"/>
+                <value caption="Addr byte 0 muxed with 2" name="ALE2" value="0x01"/>
+                <value caption="Addr byte 0 muxed with 1 and 2" name="ALE12" value="0x02"/>
+                <value caption="No addr muxing" name="NOALE" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_IFMODE">
+                <value caption="EBI Disabled" name="DISABLED" value="0x00"/>
+                <value caption="3-port mode" name="3PORT" value="0x01"/>
+                <value caption="4-port mode" name="4PORT" value="0x02"/>
+                <value caption="2-port mode" name="2PORT" value="0x03"/>
+            </value-group>
+            <value-group caption="" name="EBI_SDCOL">
+                <value caption="8 column bits" name="8BIT" value="0x00"/>
+                <value caption="9 column bits" name="9BIT" value="0x01"/>
+                <value caption="10 column bits" name="10BIT" value="0x02"/>
+                <value caption="11 column bits" name="11BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Load Mode to Active delay" name="EBI_MRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Row Cycle Delay" name="EBI_ROWCYCDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Precharge Delay" name="EBI_RPDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Write Recovery Delay" name="EBI_WRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+            </value-group>
+            <value-group caption="SDRAM Exit Self Refresh to Active Delay" name="EBI_ESRDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="SDRAM Row to Column Delay" name="EBI_ROWCOLDLY">
+                <value caption="0 cycles" name="0CLK" value="0x00"/>
+                <value caption="1 cycle" name="1CLK" value="0x01"/>
+                <value caption="2 cycles" name="2CLK" value="0x02"/>
+                <value caption="3 cycles" name="3CLK" value="0x03"/>
+                <value caption="4 cycles" name="4CLK" value="0x04"/>
+                <value caption="5 cycles" name="5CLK" value="0x05"/>
+                <value caption="6 cycles" name="6CLK" value="0x06"/>
+                <value caption="7 cycles" name="7CLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="TQFP100">
+            <pin pad="PA6" position="1"/>
+            <pin pad="PA7" position="2"/>
+            <pin pad="GND" position="3"/>
+            <pin pad="AVCC" position="4"/>
+            <pin pad="PB0" position="5"/>
+            <pin pad="PB1" position="6"/>
+            <pin pad="PB2" position="7"/>
+            <pin pad="PB3" position="8"/>
+            <pin pad="PB4" position="9"/>
+            <pin pad="PB5" position="10"/>
+            <pin pad="PB6" position="11"/>
+            <pin pad="PB7" position="12"/>
+            <pin pad="GND" position="13"/>
+            <pin pad="VCC" position="14"/>
+            <pin pad="PC0" position="15"/>
+            <pin pad="PC1" position="16"/>
+            <pin pad="PC2" position="17"/>
+            <pin pad="PC3" position="18"/>
+            <pin pad="PC4" position="19"/>
+            <pin pad="PC5" position="20"/>
+            <pin pad="PC6" position="21"/>
+            <pin pad="PC7" position="22"/>
+            <pin pad="GND" position="23"/>
+            <pin pad="VCC" position="24"/>
+            <pin pad="PD0" position="25"/>
+            <pin pad="PD1" position="26"/>
+            <pin pad="PD2" position="27"/>
+            <pin pad="PD3" position="28"/>
+            <pin pad="PD4" position="29"/>
+            <pin pad="PD5" position="30"/>
+            <pin pad="PD6" position="31"/>
+            <pin pad="PD7" position="32"/>
+            <pin pad="GND" position="33"/>
+            <pin pad="VCC" position="34"/>
+            <pin pad="PE0" position="35"/>
+            <pin pad="PE1" position="36"/>
+            <pin pad="PE2" position="37"/>
+            <pin pad="PE3" position="38"/>
+            <pin pad="PE4" position="39"/>
+            <pin pad="PE5" position="40"/>
+            <pin pad="PE6" position="41"/>
+            <pin pad="PE7" position="42"/>
+            <pin pad="GND" position="43"/>
+            <pin pad="VCC" position="44"/>
+            <pin pad="PF0" position="45"/>
+            <pin pad="PF1" position="46"/>
+            <pin pad="PF2" position="47"/>
+            <pin pad="PF3" position="48"/>
+            <pin pad="PF4" position="49"/>
+            <pin pad="PF5" position="50"/>
+            <pin pad="PF6" position="51"/>
+            <pin pad="PF7" position="52"/>
+            <pin pad="GND" position="53"/>
+            <pin pad="VCC" position="54"/>
+            <pin pad="PH0" position="55"/>
+            <pin pad="PH1" position="56"/>
+            <pin pad="PH2" position="57"/>
+            <pin pad="PH3" position="58"/>
+            <pin pad="PH4" position="59"/>
+            <pin pad="PH5" position="60"/>
+            <pin pad="PH6" position="61"/>
+            <pin pad="PH7" position="62"/>
+            <pin pad="GND" position="63"/>
+            <pin pad="VCC" position="64"/>
+            <pin pad="PJ0" position="65"/>
+            <pin pad="PJ1" position="66"/>
+            <pin pad="PJ2" position="67"/>
+            <pin pad="PJ3" position="68"/>
+            <pin pad="PJ4" position="69"/>
+            <pin pad="PJ5" position="70"/>
+            <pin pad="PJ6" position="71"/>
+            <pin pad="PJ7" position="72"/>
+            <pin pad="GND" position="73"/>
+            <pin pad="VCC" position="74"/>
+            <pin pad="PK0" position="75"/>
+            <pin pad="PK1" position="76"/>
+            <pin pad="PK2" position="77"/>
+            <pin pad="PK3" position="78"/>
+            <pin pad="PK4" position="79"/>
+            <pin pad="PK5" position="80"/>
+            <pin pad="PK6" position="81"/>
+            <pin pad="PK7" position="82"/>
+            <pin pad="VCC" position="83"/>
+            <pin pad="GND" position="84"/>
+            <pin pad="PQ0" position="85"/>
+            <pin pad="PQ1" position="86"/>
+            <pin pad="PQ2" position="87"/>
+            <pin pad="PQ3" position="88"/>
+            <pin pad="PDI" position="89"/>
+            <pin pad="RESET" position="90"/>
+            <pin pad="PR0" position="91"/>
+            <pin pad="PR1" position="92"/>
+            <pin pad="GND" position="93"/>
+            <pin pad="AVCC" position="94"/>
+            <pin pad="PA0" position="95"/>
+            <pin pad="PA1" position="96"/>
+            <pin pad="PA2" position="97"/>
+            <pin pad="PA3" position="98"/>
+            <pin pad="PA4" position="99"/>
+            <pin pad="PA5" position="100"/>
+        </pinout>
+        <pinout name="BGA100">
+            <pin pad="PK0" position="A1"/>
+            <pin pad="VCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PJ3" position="A4"/>
+            <pin pad="VCC" position="A5"/>
+            <pin pad="GND" position="A6"/>
+            <pin pad="PH1" position="A7"/>
+            <pin pad="GND" position="A8"/>
+            <pin pad="VCC" position="A9"/>
+            <pin pad="PF7" position="A10"/>
+            <pin pad="PK3" position="B1"/>
+            <pin pad="PK2" position="B2"/>
+            <pin pad="PK1" position="B3"/>
+            <pin pad="PJ4" position="B4"/>
+            <pin pad="PH7" position="B5"/>
+            <pin pad="PH4" position="B6"/>
+            <pin pad="PH2" position="B7"/>
+            <pin pad="PH0" position="B8"/>
+            <pin pad="PF6" position="B9"/>
+            <pin pad="PF5" position="B10"/>
+            <pin pad="VCC" position="C1"/>
+            <pin pad="PK5" position="C2"/>
+            <pin pad="PK4" position="C3"/>
+            <pin pad="PJ5" position="C4"/>
+            <pin pad="PJ0" position="C5"/>
+            <pin pad="PH5" position="C6"/>
+            <pin pad="PH3" position="C7"/>
+            <pin pad="PF2" position="C8"/>
+            <pin pad="PF3" position="C9"/>
+            <pin pad="VCC" position="C10"/>
+            <pin pad="GND" position="D1"/>
+            <pin pad="PK6" position="D2"/>
+            <pin pad="PK7" position="D3"/>
+            <pin pad="PJ6" position="D4"/>
+            <pin pad="PJ1" position="D5"/>
+            <pin pad="PH6" position="D6"/>
+            <pin pad="PF0" position="D7"/>
+            <pin pad="PF1" position="D8"/>
+            <pin pad="PF4" position="D9"/>
+            <pin pad="GND" position="D10"/>
+            <pin pad="PQ0" position="E1"/>
+            <pin pad="PQ1" position="E2"/>
+            <pin pad="PQ2" position="E3"/>
+            <pin pad="PJ7" position="E4"/>
+            <pin pad="PJ2" position="E5"/>
+            <pin pad="PE7" position="E6"/>
+            <pin pad="PE6" position="E7"/>
+            <pin pad="PE5" position="E8"/>
+            <pin pad="PE4" position="E9"/>
+            <pin pad="PE3" position="E10"/>
+            <pin pad="PR1" position="F1"/>
+            <pin pad="PR0" position="F2"/>
+            <pin pad="RESET" position="F3"/>
+            <pin pad="PDI_DATA" position="F4"/>
+            <pin pad="PQ3" position="F5"/>
+            <pin pad="PC2" position="F6"/>
+            <pin pad="PE2" position="F7"/>
+            <pin pad="PE1" position="F8"/>
+            <pin pad="PE0" position="F9"/>
+            <pin pad="VCC" position="F10"/>
+            <pin pad="GND" position="G1"/>
+            <pin pad="PA1" position="G2"/>
+            <pin pad="PA4" position="G3"/>
+            <pin pad="PB3" position="G4"/>
+            <pin pad="PB4" position="G5"/>
+            <pin pad="PC1" position="G6"/>
+            <pin pad="PC6" position="G7"/>
+            <pin pad="PD7" position="G8"/>
+            <pin pad="PD6" position="G9"/>
+            <pin pad="GND" position="G10"/>
+            <pin pad="AVCC" position="H1"/>
+            <pin pad="PA2" position="H2"/>
+            <pin pad="PA5" position="H3"/>
+            <pin pad="PB2" position="H4"/>
+            <pin pad="PB5" position="H5"/>
+            <pin pad="PC0" position="H6"/>
+            <pin pad="PC5" position="H7"/>
+            <pin pad="PD5" position="H8"/>
+            <pin pad="PD4" position="H9"/>
+            <pin pad="PD3" position="H10"/>
+            <pin pad="PA0" position="J1"/>
+            <pin pad="PA3" position="J2"/>
+            <pin pad="PB0" position="J3"/>
+            <pin pad="PB1" position="J4"/>
+            <pin pad="PB6" position="J5"/>
+            <pin pad="PC3" position="J6"/>
+            <pin pad="PC4" position="J7"/>
+            <pin pad="PC7" position="J8"/>
+            <pin pad="PD2" position="J9"/>
+            <pin pad="PD1" position="J10"/>
+            <pin pad="PA6" position="K1"/>
+            <pin pad="PA7" position="K2"/>
+            <pin pad="GND" position="K3"/>
+            <pin pad="AVCC" position="K4"/>
+            <pin pad="PB7" position="K5"/>
+            <pin pad="VCC " position="K6"/>
+            <pin pad="GND" position="K7"/>
+            <pin pad="VCC" position="K8"/>
+            <pin pad="GND" position="K9"/>
+            <pin pad="PD0" position="K10"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
new file mode 100644
index 00000000..0cc33f9f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3.xml
@@ -0,0 +1,2594 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATXMEGA64A3-AU" package="TQFP64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+        <variant ordercode="ATXMEGA64A3-MU" package="QFN64" speedmax="32000000" tempmax="0" tempmin="0" vccmax="3.6"
+                 vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64A3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x11000" endianness="little">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6064">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                    </instance>
+                    <instance name="USARTF1">
+                        <register-group address-space="data" offset="0xBB0" name-in-module="USART" name="USARTF1"/>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                    <instance name="SPIF">
+                        <register-group address-space="data" offset="0xBC0" name-in-module="SPI" name="SPIF"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+            </peripherals>
+
+
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0964203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="RTC Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="RTC Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1kHz from 32kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1kHz from internal 32kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32kHz from 32kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA Calibration Byte 0" name="DACAOFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA Calibration Byte 1" name="DACAGAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB Calibration Byte 0" name="DACBOFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB Calibration Byte 1" name="DACBGAINCAL" offset="0x33" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.9 V" name="1V9" value="0x06"/>
+                <value caption="2.1 V" name="2V1" value="0x05"/>
+                <value caption="2.4 V" name="2V4" value="0x04"/>
+                <value caption="2.6 V" name="2V6" value="0x03"/>
+                <value caption="2.9 V" name="2V9" value="0x02"/>
+                <value caption="3.2 V" name="3V2" value="0x01"/>
+                <value caption="3.4 V" name="3V4" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6064" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAINFAC" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="Positive Input Select" mask="0x78" name="MUXPOS" values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="Internal Input Select" mask="0x78" name="MUXINT" values="ADC_CH_MUXINT"/>
+                    <bitfield caption="Negative Input Select" mask="0x03" name="MUXNEG" values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x03"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x03"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x30" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6V" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Timing Control" name="TIMCTRL" offset="0x04" size="1">
+                    <bitfield caption="Conversion Intercal" mask="0x70" name="CONINTVAL" values="DAC_CONINTVAL"/>
+                    <bitfield caption="Refresh Timing Control" mask="0x0F" name="REFRESH" values="DAC_REFRESH"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel A only)" name="SINGLE" value="0x00"/>
+                <value caption="Dual channel operation (S/H on both channels)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion interval" name="DAC_CONINTVAL">
+                <value caption="1 CLK / 2 CLK in S/H mode" name="1CLK" value="0x00"/>
+                <value caption="2 CLK / 3 CLK in S/H mode" name="2CLK" value="0x01"/>
+                <value caption="4 CLK / 6 CLK in S/H mode" name="4CLK" value="0x02"/>
+                <value caption="8 CLK / 12 CLK in S/H mode" name="8CLK" value="0x03"/>
+                <value caption="16 CLK / 24 CLK in S/H mode" name="16CLK" value="0x04"/>
+                <value caption="32 CLK / 48 CLK in S/H mode" name="32CLK" value="0x05"/>
+                <value caption="64 CLK / 96 CLK in S/H mode" name="64CLK" value="0x06"/>
+                <value caption="128 CLK / 192 CLK in S/H mode" name="128CLK" value="0x07"/>
+            </value-group>
+            <value-group caption="Refresh rate" name="DAC_REFRESH">
+                <value caption="16 CLK" name="16CLK" value="0x00"/>
+                <value caption="32 CLK" name="32CLK" value="0x01"/>
+                <value caption="64 CLK" name="64CLK" value="0x02"/>
+                <value caption="128 CLK" name="128CLK" value="0x03"/>
+                <value caption="256 CLK" name="256CLK" value="0x04"/>
+                <value caption="512 CLK" name="512CLK" value="0x05"/>
+                <value caption="1024 CLK" name="1024CLK" value="0x06"/>
+                <value caption="2048 CLK" name="2048CLK" value="0x07"/>
+                <value caption="4096 CLK" name="4096CLK" value="0x08"/>
+                <value caption="8192 CLK" name="8192CLK" value="0x09"/>
+                <value caption="16384 CLK" name="16384CLK" value="0x0A"/>
+                <value caption="32768 CLK" name="32768CLK" value="0x0B"/>
+                <value caption="65536 CLK" name="65536CLK" value="0x0C"/>
+                <value caption="Auto refresh OFF" name="OFF" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+    </modules>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml
new file mode 100644
index 00000000..16284139
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A3U.xml
@@ -0,0 +1,3511 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64A3U-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A3U-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64A3U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTE_ALT" group="CLKOUT" pad="PE4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTE" group="EVOUT" pad="PE7"/>
+                            <signal field="CLKEVPIN" function="EVOUTE_ALT" group="EVOUT" pad="PE4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PE0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PE1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PE2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PD0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PD1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PD2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PD3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PE0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PE1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PE2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PE3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PE4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PE5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PE6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE1">
+                        <register-group address-space="data" offset="0xA40" name-in-module="TC1" name="TCE1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PE4"/>
+                            <signal function="TC1" group="OC1B" pad="PE5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PE0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PE1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PE2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PE3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PE4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PE5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PE6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                    <instance name="HIRESF">
+                        <register-group address-space="data" offset="0xB90" name-in-module="HIRES" name="HIRESF"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PE1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PE2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PE3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PE5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PE6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE1">
+                        <register-group address-space="data" offset="0xAB0" name-in-module="USART" name="USARTE1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE5"/>
+                            <signal function="USART" group="RXD" pad="PE6"/>
+                            <signal function="USART" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTF0">
+                        <register-group address-space="data" offset="0xBA0" name-in-module="USART" name="USARTF0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PF1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PF2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PF3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PF5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PF6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PE5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PE7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PE4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PE5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PE6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="39" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="53" module-instance="TCE1" name-in-module="TC1"/>
+                <interrupt-group index="57" module-instance="SPIE" name-in-module="SPI"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="61" module-instance="USARTE1" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="119" module-instance="USARTF0" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0964203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x42"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml
new file mode 100644
index 00000000..e9e84f00
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64A4U.xml
@@ -0,0 +1,3374 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64A4U-AU" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-MH" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-AN" package="TQFP44" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64A4U-M7" package="VQFN44PW" pinout="QFP_QFN_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64A4U" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAAU">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAAU">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal field="TOSCSEL" function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal field="TOSCSEL" function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAAU">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAAU">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTC_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUTC_ALT" group="EVOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAAU">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6099" version="XMEGAAU">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACB">
+                        <register-group address-space="data" offset="0x0320" name-in-module="DAC" name="DACB"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PB2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAAU">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAIN" pad="PC0"/>
+                            <signal function="TWI_EXT" group="SCLIN" pad="PC1"/>
+                            <signal function="TWI_EXT" group="SDAOUT" pad="PC2"/>
+                            <signal function="TWI_EXT" group="SCLOUT" pad="PC3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAAU">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                            <signal function="TC0_ALT" group="OC0A" pad="PD4"/>
+                            <signal function="TC0_ALT" group="OC0B" pad="PD5"/>
+                            <signal function="TC0_ALT" group="OC0C" pad="PD6"/>
+                            <signal function="TC0_ALT" group="OC0D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD1">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC1" name="TCD1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PD4"/>
+                            <signal function="TC1" group="OC1B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAAU">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="HIRESD">
+                        <register-group address-space="data" offset="0x990" name-in-module="HIRES" name="HIRESD"/>
+                    </instance>
+                    <instance name="HIRESE">
+                        <register-group address-space="data" offset="0xA90" name-in-module="HIRES" name="HIRESE"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTC1">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="USART" name="USARTC1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD1">
+                        <register-group address-space="data" offset="0x9B0" name-in-module="USART" name="USARTD1"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD5"/>
+                            <signal function="USART" group="RXD" pad="PD6"/>
+                            <signal function="USART" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PD5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PD7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PD4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PD5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PD6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAA4U">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAA4U">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAAU">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="28" module-instance="USARTC1" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="83" module-instance="TCD1" name-in-module="TC1"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="91" module-instance="USARTD1" name-in-module="USART"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x46"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="16">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+                <register caption="General Purpose IO Register 4" name="GPIOR4" offset="0x04" size="1"/>
+                <register caption="General Purpose IO Register 5" name="GPIOR5" offset="0x05" size="1"/>
+                <register caption="General Purpose IO Register 6" name="GPIOR6" offset="0x06" size="1"/>
+                <register caption="General Purpose IO Register 7" name="GPIOR7" offset="0x07" size="1"/>
+                <register caption="General Purpose IO Register 8" name="GPIOR8" offset="0x08" size="1"/>
+                <register caption="General Purpose IO Register 9" name="GPIOR9" offset="0x09" size="1"/>
+                <register caption="General Purpose IO Register 10" name="GPIORA" offset="0x0A" size="1"/>
+                <register caption="General Purpose IO Register 11" name="GPIORB" offset="0x0B" size="1"/>
+                <register caption="General Purpose IO Register 12" name="GPIORC" offset="0x0C" size="1"/>
+                <register caption="General Purpose IO Register 13" name="GPIORD" offset="0x0D" size="1"/>
+                <register caption="General Purpose IO Register 14" name="GPIORE" offset="0x0E" size="1"/>
+                <register caption="General Purpose IO Register 15" name="GPIORF" offset="0x0F" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAAU" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAAU" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port D USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port D Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port E AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port E Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port F USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port F AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port F Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAAU" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C F0 Lock" mask="0x08" name="AWEXFLOCK"/>
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C D0 Lock" mask="0x02" name="AWEXDLOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAAU" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Source Address 2" name="SRCADDR2" offset="0x0A" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+                <register caption="Channel Destination Address 2" name="DESTADDR2" offset="0x0E" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x0C" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x03" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Block Transfer Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Block Transfer Busy" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Block Transfer Busy" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Block Transfer Pending" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Block Transfer Pending" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16/24-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 2" name="CH2" offset="0x30" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 3" name="CH3" offset="0x40" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCA Channel 1" name="ADCA_CH1" value="0x11"/>
+                <value caption="ADCA Channel 2" name="ADCA_CH2" value="0x12"/>
+                <value caption="ADCA Channel 3" name="ADCA_CH3" value="0x13"/>
+                <value caption="ADCA Channel 0,1,2,3 combined" name="ADCA_CH4" value="0x14"/>
+                <value caption="DACA Channel 0" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA Channel 1" name="DACA_CH1" value="0x16"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="ADCB Channel 1" name="ADCB_CH1" value="0x21"/>
+                <value caption="ADCB Channel 2" name="ADCB_CH2" value="0x22"/>
+                <value caption="ADCB Channel 3" name="ADCB_CH3" value="0x23"/>
+                <value caption="ADCB Channel 0,1,2,3 combined" name="ADCB_CH4" value="0x24"/>
+                <value caption="DACB Channel 0" name="DACB_CH0" value="0x25"/>
+                <value caption="DACB Channel 1" name="DACB_CH1" value="0x26"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="USART C1 Receive Complete" name="USARTC1_RXC" value="0x4E"/>
+                <value caption="USART C1 Data Register Empty" name="USARTC1_DRE" value="0x4F"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0x60"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0x61"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0x62"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0x63"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0x64"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0x65"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0x66"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0x67"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0x68"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0x69"/>
+                <value caption="SPI D Transfer Complete" name="SPID" value="0x6A"/>
+                <value caption="USART D0 Receive Complete" name="USARTD0_RXC" value="0x6B"/>
+                <value caption="USART D0 Data Register Empty" name="USARTD0_DRE" value="0x6C"/>
+                <value caption="USART D1 Receive Complete" name="USARTD1_RXC" value="0x6E"/>
+                <value caption="USART D1 Data Register Empty" name="USARTD1_DRE" value="0x6F"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0x86"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0x87"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0x88"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0x89"/>
+                <value caption="SPI E Transfer Complete" name="SPIE" value="0x8A"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+                <value caption="USART E1 Receive Complete" name="USARTE1_RXC" value="0x8E"/>
+                <value caption="USART E1 Data Register Empty" name="USARTE1_DRE" value="0x8F"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xA0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xA1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xA2"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xA3"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xA4"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xA5"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xA6"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xA7"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xA8"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xA9"/>
+                <value caption="SPI F Transfer Complete" name="SPIF" value="0xAA"/>
+                <value caption="USART F0 Receive Complete" name="USARTF0_RXC" value="0xAB"/>
+                <value caption="USART F0 Data Register Empty" name="USARTF0_DRE" value="0xAC"/>
+                <value caption="USART F1 Receive Complete" name="USARTF1_RXC" value="0xAE"/>
+                <value caption="USART F1 Data Register Empty" name="USARTF1_DRE" value="0xAF"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+                <value caption="Double buffering enabled on channel 2/3" name="CH23" value="0x02"/>
+                <value caption="Double buffering enabled on ch. 0/1 and ch. 2/3" name="CH01CH23" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR0123" value="0x00"/>
+                <value caption="Channel 0 &gt; Round Robin on channel 1/2/3" name="CH0RR123" value="0x01"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; Round Robin on channel 2/3" name="CH01RR23" value="0x02"/>
+                <value caption="Channel 0 &gt; channel 1 &gt; channel 2 &gt; channel 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAAU" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC A Channel 1" name="ADCA_CH1" value="0x21"/>
+                <value caption="ADC A Channel 2" name="ADCA_CH2" value="0x22"/>
+                <value caption="ADC A Channel 3" name="ADCA_CH3" value="0x23"/>
+                <value caption="ADC B Channel 0" name="ADCB_CH0" value="0x24"/>
+                <value caption="ADC B Channel 1" name="ADCB_CH1" value="0x25"/>
+                <value caption="ADC B Channel 2" name="ADCB_CH2" value="0x26"/>
+                <value caption="ADC B Channel 3" name="ADCB_CH3" value="0x27"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter D1 Overflow" name="TCD1_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D1 Error" name="TCD1_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D1 Compare or Capture A" name="TCD1_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D1 Compare or Capture B" name="TCD1_CCB" value="0xDD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter E1 Overflow" name="TCE1_OVF" value="0xE8"/>
+                <value caption="Timer/Counter E1 Error" name="TCE1_ERR" value="0xE9"/>
+                <value caption="Timer/Counter E1 Compare or Capture A" name="TCE1_CCA" value="0xEC"/>
+                <value caption="Timer/Counter E1 Compare or Capture B" name="TCE1_CCB" value="0xED"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+                <value caption="Timer/Counter F1 Overflow" name="TCF1_OVF" value="0xF8"/>
+                <value caption="Timer/Counter F1 Error" name="TCF1_ERR" value="0xF9"/>
+                <value caption="Timer/Counter F1 Compare or Capture A" name="TCF1_CCA" value="0xFC"/>
+                <value caption="Timer/Counter F1 Compare or Capture B" name="TCF1_CCB" value="0xFD"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6099" version="XMEGAAU" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="DMA Selection" mask="0xC0" name="DMASEL" values="ADC_DMASEL"/>
+                    <bitfield caption="Channel 3 Start Conversion" mask="0x20" name="CH3START"/>
+                    <bitfield caption="Channel 2 Start Conversion" mask="0x10" name="CH2START"/>
+                    <bitfield caption="Channel 1 Start Conversion" mask="0x08" name="CH1START"/>
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="Flush Pipeline" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Gain Stage Impedance Mode" mask="0x80" name="IMPMODE"/>
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Channel Sweep Selection" mask="0xC0" name="SWEEP" values="ADC_SWEEP"/>
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 3 Interrupt Flag" mask="0x08" name="CH3IF"/>
+                    <bitfield caption="Channel 2 Interrupt Flag" mask="0x04" name="CH2IF"/>
+                    <bitfield caption="Channel 1 Interrupt Flag" mask="0x02" name="CH1IF"/>
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Channel 1 Result" name="CH1RES" offset="0x12" size="2"/>
+                <register caption="Channel 2 Result" name="CH2RES" offset="0x14" size="2"/>
+                <register caption="Channel 3 Result" name="CH3RES" offset="0x16" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 1" name="CH1" offset="0x28" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 2" name="CH2" offset="0x30" name-in-module="ADC_CH"/>
+                <register-group caption="ADC Channel 3" name="CH3" offset="0x38" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Current Limitation Mode" name="ADC_CURRLIMIT">
+                <value caption="No limit" name="NO" value="0x00"/>
+                <value caption="Low current limit, max. sampling rate 1.5MSPS" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, max. sampling rate 1MSPS" name="MED" value="0x02"/>
+                <value caption="High current limit, max. sampling rate 0.5MSPS" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Channel sweep selection" name="ADC_SWEEP">
+                <value caption="ADC Channel 0" name="0" value="0x00"/>
+                <value caption="ADC Channel 0,1" name="01" value="0x01"/>
+                <value caption="ADC Channel 0,1,2" name="012" value="0x02"/>
+                <value caption="ADC Channel 0,1,2,3" name="0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0,1,2,3" name="0123" value="0x00"/>
+                <value caption="Event Channel 1,2,3,4" name="1234" value="0x01"/>
+                <value caption="Event Channel 2,3,4,5" name="2345" value="0x02"/>
+                <value caption="Event Channel 3,4,5,6" name="3456" value="0x03"/>
+                <value caption="Event Channel 4,5,6,7" name="4567" value="0x04"/>
+                <value caption="Event Channel 5,6,7" name="567" value="0x05"/>
+                <value caption="Event Channel 6,7" name="67" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="First two events trigger channel 0,1" name="CH01" value="0x02"/>
+                <value caption="First three events trigger channel 0,1,2" name="CH012" value="0x03"/>
+                <value caption="Events trigger channel 0,1,2,3" name="CH0123" value="0x04"/>
+                <value caption="First event triggers sweep" name="SWEEP" value="0x05"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="DMA request selection" name="ADC_DMASEL">
+                <value caption="Combined DMA request OFF" name="OFF" value="0x00"/>
+                <value caption="ADC Channel 0 or 1" name="CH01" value="0x01"/>
+                <value caption="ADC Channel 0 or 1 or 2" name="CH012" value="0x02"/>
+                <value caption="ADC Channel 0 or 1 or 2 or 3" name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+                <interrupt index="1" name="CH1" caption="Interrupt 1"/>
+                <interrupt index="2" name="CH2" caption="Interrupt 2"/>
+                <interrupt index="3" name="CH3" caption="Interrupt 3"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTB" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAAU" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURRENT"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="AC1 Current Source Output Enable" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="AC0 Current Source Output Enable" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAAU" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFE">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAA4U" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAAU" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACB0 Calibration Byte 0" name="DACB0OFFCAL" offset="0x32" size="1"/>
+                <register caption="DACB0 Calibration Byte 1" name="DACB0GAINCAL" offset="0x33" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+                <register caption="DACB1 Calibration Byte 0" name="DACB1OFFCAL" offset="0x36" size="1"/>
+                <register caption="DACB1 Calibration Byte 1" name="DACB1GAINCAL" offset="0x37" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI_DATA" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
new file mode 100644
index 00000000..3d0ef105
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64B1.xml
@@ -0,0 +1,3328 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64B1-AU" package="TQFP100" pinout="QFP_100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64B1-CU" package="VFBGA100" pinout="BGA_100" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64B1" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAB">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="0" pad="PC0"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="1" pad="PC1"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="2" pad="PC2"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="3" pad="PC3"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="4" pad="PC4"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="5" pad="PC5"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="6" pad="PC6"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAB">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE6"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6080" version="XMEGAB">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAB">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAB">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PD7"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PD7"/>
+                            <signal field="RTCOUT" function="RTCOUTC" group="RTCOUT" pad="PD6"/>
+                            <signal field="CLKOUT" function="CLKOUTE" group="CLKOUT" pad="PE7"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAB">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000" version="XMEGAB">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAB">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAB">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB7"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB8"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAB">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD0"/>
+                            <signal function="USB" group="DP" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG">
+                        <register-group address-space="data" offset="0x06C0" name-in-module="PORT" name="PORTG"/>
+                        <signals>
+                            <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                            <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                            <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                            <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                            <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                            <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                            <signal function="PORTG" group="P" index="6" pad="PG6"/>
+                            <signal function="PORTG" group="P" index="7" pad="PG7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTM">
+                        <register-group address-space="data" offset="0x0760" name-in-module="PORT" name="PORTM"/>
+                        <signals>
+                            <signal function="PORTM" group="P" index="0" pad="PM0"/>
+                            <signal function="PORTM" group="P" index="1" pad="PM1"/>
+                            <signal function="PORTM" group="P" index="2" pad="PM2"/>
+                            <signal function="PORTM" group="P" index="3" pad="PM3"/>
+                            <signal function="PORTM" group="P" index="4" pad="PM4"/>
+                            <signal function="PORTM" group="P" index="5" pad="PM5"/>
+                            <signal function="PORTM" group="P" index="6" pad="PM6"/>
+                            <signal function="PORTM" group="P" index="7" pad="PM7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAB">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PE0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PE1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PE2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PE3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PE4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PE5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PE6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PE1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PE2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PE3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PE5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PE6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PE7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAB">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="LCD" id="I3003">
+                    <instance name="LCD">
+                        <register-group address-space="data" offset="0x0D00" name-in-module="LCD" name="LCD"/>
+                        <signals>
+                            <signal function="LCD_SEG" group="SEG" index="39" pad="PG0"/>
+                            <signal function="LCD_SEG" group="SEG" index="38" pad="PG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="37" pad="PG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="36" pad="PG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="35" pad="PG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="34" pad="PG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="33" pad="PG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="32" pad="PG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="31" pad="PM0"/>
+                            <signal function="LCD_SEG" group="SEG" index="30" pad="PM1"/>
+                            <signal function="LCD_SEG" group="SEG" index="29" pad="PM2"/>
+                            <signal function="LCD_SEG" group="SEG" index="28" pad="PM3"/>
+                            <signal function="LCD_SEG" group="SEG" index="27" pad="PM4"/>
+                            <signal function="LCD_SEG" group="SEG" index="26" pad="PM5"/>
+                            <signal function="LCD_SEG" group="SEG" index="25" pad="PM6"/>
+                            <signal function="LCD_SEG" group="SEG" index="24" pad="PM7"/>
+                            <signal function="LCD_SEG" group="SEG" index="23" pad="SEG23"/>
+                            <signal function="LCD_SEG" group="SEG" index="22" pad="SEG22"/>
+                            <signal function="LCD_SEG" group="SEG" index="21" pad="SEG21"/>
+                            <signal function="LCD_SEG" group="SEG" index="20" pad="SEG20"/>
+                            <signal function="LCD_SEG" group="SEG" index="19" pad="SEG19"/>
+                            <signal function="LCD_SEG" group="SEG" index="18" pad="SEG18"/>
+                            <signal function="LCD_SEG" group="SEG" index="17" pad="SEG17"/>
+                            <signal function="LCD_SEG" group="SEG" index="16" pad="SEG16"/>
+                            <signal function="LCD_SEG" group="SEG" index="15" pad="SEG15"/>
+                            <signal function="LCD_SEG" group="SEG" index="14" pad="SEG14"/>
+                            <signal function="LCD_SEG" group="SEG" index="13" pad="SEG13"/>
+                            <signal function="LCD_SEG" group="SEG" index="12" pad="SEG12"/>
+                            <signal function="LCD_SEG" group="SEG" index="11" pad="SEG11"/>
+                            <signal function="LCD_SEG" group="SEG" index="10" pad="SEG10"/>
+                            <signal function="LCD_SEG" group="SEG" index="9" pad="SEG9"/>
+                            <signal function="LCD_SEG" group="SEG" index="8" pad="SEG8"/>
+                            <signal function="LCD_SEG" group="SEG" index="7" pad="SEG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="6" pad="SEG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="5" pad="SEG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="4" pad="SEG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="3" pad="SEG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="2" pad="SEG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="1" pad="SEG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="0" pad="SEG0"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="1" pad="SEG1"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="0" pad="SEG0"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="1" pad="BIAS1"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="2" pad="BIAS2"/>
+                            <signal function="LCD_BIAS" group="VLCD" pad="VLCD"/>
+                            <signal function="LCD_BIAS" group="CAPL" pad="CAPL"/>
+                            <signal function="LCD_BIAS" group="CAPH" pad="CAPH"/>
+                            <signal function="LCD_COM" group="COM" index="0" pad="COM0"/>
+                            <signal function="LCD_COM" group="COM" index="1" pad="COM1"/>
+                            <signal function="LCD_COM" group="COM" index="2" pad="COM2"/>
+                            <signal function="LCD_COM" group="COM" index="3" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="0" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="1" pad="COM2"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="2" pad="COM1"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="3" pad="COM0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3600" version="XMEGAB">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="USB" name-in-module="USB"/>
+                <interrupt-group index="35" module-instance="LCD" name-in-module="LCD"/>
+                <interrupt-group index="36" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="37" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="39" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="41" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="44" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="48" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="50" module-instance="PORTG" name-in-module="PORT"/>
+                <interrupt-group index="52" module-instance="PORTM" name-in-module="PORT"/>
+                <interrupt-group index="54" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="58" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="58" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="69" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="75" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="77" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="80" module-instance="ADCA" name-in-module="ADC"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0965203F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x52"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAB" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAB" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="External Clock on port C0 - 6 CLK" name="EXTCLK_C0" value="0x01"/>
+                <value caption="External Clock on port C1 - 6 CLK" name="EXTCLK_C1" value="0x05"/>
+                <value caption="External Clock on port C2 - 6 CLK" name="EXTCLK_C2" value="0x09"/>
+                <value caption="External Clock on port C3 - 6 CLK" name="EXTCLK_C3" value="0x0D"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x11"/>
+                <value caption="External Clock on port C5 - 6 CLK" name="EXTCLK_C5" value="0x15"/>
+                <value caption="External Clock on port C6 - 6 CLK" name="EXTCLK_C6" value="0x19"/>
+                <value caption="External Clock on port C7 - 6 CLK" name="EXTCLK_C7" value="0x1D"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="PR" id="I6080" version="XMEGAB" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="6">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="LCD Module" mask="0x80" name="LCD"/>
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAB" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAB" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C" name="PC" value="0x01"/>
+                <value caption="System Clock Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0 Output on Port C" name="PC" value="0x01"/>
+                <value caption="Event Channel 0 Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAB" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" version="XMEGAB" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="CHEN"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="CHRST"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="48">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x04" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x01" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR01" value="0x00"/>
+                <value caption="Channel 0 &gt; channel 1" name="CH0RR1" value="0x01"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAB" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC B Channel" name="ADCB_CH0" value="0x24"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAB" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current limit" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAB" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAB" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAB" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="LCD" id="I3003" caption="LCD Controller">
+            <register-group caption="LCD Controller" name="LCD" size="36">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LCD Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="External Register Bias Generation" mask="0x40" name="XBIAS"/>
+                    <bitfield caption="Data Register Lock" mask="0x20" name="DATCLK"/>
+                    <bitfield caption="Common Bus Swap" mask="0x10" name="COMSWP"/>
+                    <bitfield caption="Segment Bus Swap" mask="0x08" name="SEGSWP"/>
+                    <bitfield caption="Clear Data Register" mask="0x04" name="CLRDT"/>
+                    <bitfield caption="Segments On" mask="0x02" name="SEGON"/>
+                    <bitfield caption="Blanking Display Mode" mask="0x01" name="BLANK"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="LCD Prescaler Select" mask="0x80" name="PRESC" values="LCD_PRESC"/>
+                    <bitfield caption="LCD Clock Divide" mask="0x70" name="CLKDIV" values="LCD_CLKDIV"/>
+                    <bitfield caption="Low Power Waveform" mask="0x08" name="LPWAV"/>
+                    <bitfield caption="Duty Select" mask="0x03" name="DUTY" values="LCD_DUTY"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="LCD Port Mask" mask="0x3F" name="PMSK"/>
+                </register>
+                <register caption="Interrupt Enable Register" name="INTCTRL" offset="0x03" size="1">
+                    <bitfield caption="eXtended Interrupt Mode Enable" mask="0xF8" name="XIME"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="FCINTLVL" values="LCD_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAG" offset="0x04" size="1">
+                    <bitfield caption="LCD Frame Completed Interrupt Flag" mask="0x01" name="FCIF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Blink Enable" mask="0x08" name="BLINKEN"/>
+                    <bitfield caption="LCD Blink Rate" mask="0x03" name="BLINKRATE" values="LCD_BLINKRATE"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x06" size="1">
+                    <bitfield caption="Blink Pixel Selection 1" mask="0xF0" name="BPS1"/>
+                    <bitfield caption="Blink Pixel Selection 0" mask="0x0F" name="BPS0"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x07" size="1">
+                    <bitfield caption="Fine Contrast" mask="0x3F" name="FCONT"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x08" size="1">
+                    <bitfield caption="Type of Digit" mask="0xC0" name="TDG" values="LCD_TDG"/>
+                    <bitfield caption="Start Segment" mask="0x3F" name="STSEG"/>
+                </register>
+                <register caption="Control Register H" name="CTRLH" offset="0x09" size="1">
+                    <bitfield caption="Decrement of Start Segment" mask="0x80" name="DEC"/>
+                    <bitfield caption="Display Code" mask="0x7F" name="DCODE"/>
+                </register>
+                <register caption="LCD Data Register 0" name="DATA0" offset="0x10" size="1"/>
+                <register caption="LCD Data Register 1" name="DATA1" offset="0x11" size="1"/>
+                <register caption="LCD Data Register 2" name="DATA2" offset="0x12" size="1"/>
+                <register caption="LCD Data Register 3" name="DATA3" offset="0x13" size="1"/>
+                <register caption="LCD Data Register 4" name="DATA4" offset="0x14" size="1"/>
+                <register caption="LCD Data Register 5" name="DATA5" offset="0x15" size="1"/>
+                <register caption="LCD Data Register 6" name="DATA6" offset="0x16" size="1"/>
+                <register caption="LCD Data Register 7" name="DATA7" offset="0x17" size="1"/>
+                <register caption="LCD Data Register 8" name="DATA8" offset="0x18" size="1"/>
+                <register caption="LCD Data Register 9" name="DATA9" offset="0x19" size="1"/>
+                <register caption="LCD Data Register 10" name="DATA10" offset="0x1A" size="1"/>
+                <register caption="LCD Data Register 11" name="DATA11" offset="0x1B" size="1"/>
+                <register caption="LCD Data Register 12" name="DATA12" offset="0x1C" size="1"/>
+                <register caption="LCD Data Register 13" name="DATA13" offset="0x1D" size="1"/>
+                <register caption="LCD Data Register 14" name="DATA14" offset="0x1E" size="1"/>
+                <register caption="LCD Data Register 15" name="DATA15" offset="0x1F" size="1"/>
+                <register caption="LCD Data Register 16" name="DATA16" offset="0x20" size="1"/>
+                <register caption="LCD Data Register 17" name="DATA17" offset="0x21" size="1"/>
+                <register caption="LCD Data Register 18" name="DATA18" offset="0x22" size="1"/>
+                <register caption="LCD Data Register 19" name="DATA19" offset="0x23" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="LCD_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Blink Rate" name="LCD_BLINKRATE">
+                <value caption="4Hz Blink Rate" name="4Hz" value="0x00"/>
+                <value caption="2Hz Blink Rate" name="2Hz" value="0x01"/>
+                <value caption="1Hz Blink Rate" name="1Hz" value="0x02"/>
+                <value caption="0.5Hz Blink Rate" name="0Hz5" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Clock Divide" name="LCD_CLKDIV">
+                <value caption="frame rate of 256 Hz" name="DivBy1" value="0x00"/>
+                <value caption="frame rate of 128 Hz" name="DivBy2" value="0x01"/>
+                <value caption="frame rate of 83.5 Hz" name="DivBy3" value="0x02"/>
+                <value caption="frame rate of 64 Hz" name="DivBy4" value="0x03"/>
+                <value caption="frame rate of 51.2 Hz" name="DivBy5" value="0x04"/>
+                <value caption="frame rate of 42.7 Hz" name="DivBy6" value="0x05"/>
+                <value caption="frame rate of 36.6 Hz" name="DivBy7" value="0x06"/>
+                <value caption="frame rate of 32 Hz" name="DivBy8" value="0x07"/>
+            </value-group>
+            <value-group caption="Duty Select" name="LCD_DUTY">
+                <value caption="Duty=1/4, Bias=1/3, COM0:3" name="1_4" value="0x00"/>
+                <value caption="Duty=Static, Bias=Static, COM0" name="Static" value="0x01"/>
+                <value caption="Duty=1/2, Bias=1/3, COM0:1" name="1_2" value="0x02"/>
+                <value caption="Duty=1/3, Bias=1/3, COM0:2" name="1_3" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Prescaler Select" name="LCD_PRESC">
+                <value caption="clk_lcd/8" name="8" value="0x00"/>
+                <value caption="clk_lcd/16" name="16" value="0x01"/>
+            </value-group>
+            <value-group caption="Type of Digit" name="LCD_TDG">
+                <value caption="7-segment with 3 COMs" name="7S_3C" value="0x00"/>
+                <value caption="7-segment with 4 COMs" name="7S_4C" value="0x01"/>
+                <value caption="14-segment with 4 COMs" name="14S_4C" value="0x02"/>
+                <value caption="16-segment with 3 COMs" name="16S_3C" value="0x03"/>
+            </value-group>
+            <interrupt-group name="LCD">
+                <interrupt index="0" name="INT" caption="LCD Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3600" version="XMEGAB" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_100">
+            <pin pad="GND" position="1"/>
+            <pin pad="PC0" position="2"/>
+            <pin pad="PC1" position="3"/>
+            <pin pad="PC2" position="4"/>
+            <pin pad="PC3" position="5"/>
+            <pin pad="PC4" position="6"/>
+            <pin pad="PC5" position="7"/>
+            <pin pad="PC6" position="8"/>
+            <pin pad="PC7" position="9"/>
+            <pin pad="GND" position="10"/>
+            <pin pad="VCC" position="11"/>
+            <pin pad="PD0" position="12"/>
+            <pin pad="PD1" position="13"/>
+            <pin pad="PD2" position="14"/>
+            <pin pad="RESET" position="15"/>
+            <pin pad="PDI" position="16"/>
+            <pin pad="GND" position="17"/>
+            <pin pad="VCC" position="18"/>
+            <pin pad="PE0" position="19"/>
+            <pin pad="PE1" position="20"/>
+            <pin pad="PE2" position="21"/>
+            <pin pad="PE3" position="22"/>
+            <pin pad="PE4" position="23"/>
+            <pin pad="PE5" position="24"/>
+            <pin pad="PE6" position="25"/>
+            <pin pad="PE7" position="26"/>
+            <pin pad="GND" position="27"/>
+            <pin pad="VCC" position="28"/>
+            <pin pad="PG0" position="29"/>
+            <pin pad="PG1" position="30"/>
+            <pin pad="PG2" position="31"/>
+            <pin pad="PG3" position="32"/>
+            <pin pad="PG4" position="33"/>
+            <pin pad="PG5" position="34"/>
+            <pin pad="PG6" position="35"/>
+            <pin pad="PG7" position="36"/>
+            <pin pad="PM0" position="37"/>
+            <pin pad="PM1" position="38"/>
+            <pin pad="PM2" position="39"/>
+            <pin pad="PM3" position="40"/>
+            <pin pad="PM4" position="41"/>
+            <pin pad="PM5" position="42"/>
+            <pin pad="PM6" position="43"/>
+            <pin pad="PM7" position="44"/>
+            <pin pad="SEG23" position="45"/>
+            <pin pad="SEG22" position="46"/>
+            <pin pad="SEG21" position="47"/>
+            <pin pad="SEG20" position="48"/>
+            <pin pad="SEG19" position="49"/>
+            <pin pad="SEG18" position="50"/>
+            <pin pad="SEG17" position="51"/>
+            <pin pad="SEG16" position="52"/>
+            <pin pad="SEG15" position="53"/>
+            <pin pad="SEG14" position="54"/>
+            <pin pad="SEG13" position="55"/>
+            <pin pad="SEG12" position="56"/>
+            <pin pad="SEG11" position="57"/>
+            <pin pad="SEG10" position="58"/>
+            <pin pad="SEG9" position="59"/>
+            <pin pad="SEG8" position="60"/>
+            <pin pad="SEG7" position="61"/>
+            <pin pad="SEG6" position="62"/>
+            <pin pad="SEG5" position="63"/>
+            <pin pad="SEG4" position="64"/>
+            <pin pad="SEG3" position="65"/>
+            <pin pad="SEG2" position="66"/>
+            <pin pad="SEG1" position="67"/>
+            <pin pad="SEG0" position="68"/>
+            <pin pad="GND" position="69"/>
+            <pin pad="VCC" position="70"/>
+            <pin pad="BIAS1" position="71"/>
+            <pin pad="BIAS2" position="72"/>
+            <pin pad="VLCD" position="73"/>
+            <pin pad="CAPL" position="74"/>
+            <pin pad="CAPH" position="75"/>
+            <pin pad="COM0" position="76"/>
+            <pin pad="COM1" position="77"/>
+            <pin pad="COM2" position="78"/>
+            <pin pad="COM3" position="79"/>
+            <pin pad="PR0" position="80"/>
+            <pin pad="PR1" position="81"/>
+            <pin pad="PA0" position="82"/>
+            <pin pad="PA1" position="83"/>
+            <pin pad="PA2" position="84"/>
+            <pin pad="PA3" position="85"/>
+            <pin pad="PA4" position="86"/>
+            <pin pad="PA5" position="87"/>
+            <pin pad="PA6" position="88"/>
+            <pin pad="PA7" position="89"/>
+            <pin pad="AGND" position="90"/>
+            <pin pad="AVCC" position="91"/>
+            <pin pad="PB0" position="92"/>
+            <pin pad="PB1" position="93"/>
+            <pin pad="PB2" position="94"/>
+            <pin pad="PB3" position="95"/>
+            <pin pad="PB4" position="96"/>
+            <pin pad="PB5" position="97"/>
+            <pin pad="PB6" position="98"/>
+            <pin pad="PB7" position="99"/>
+            <pin pad="GND" position="100"/>
+        </pinout>
+        <pinout name="BGA_100">
+            <pin pad="PC0" position="A1"/>
+            <pin pad="VCC" position="A2"/>
+            <pin pad="PB6" position="A3"/>
+            <pin pad="PB2" position="A4"/>
+            <pin pad="AVCC" position="A5"/>
+            <pin pad="PA5" position="A6"/>
+            <pin pad="PA1" position="A7"/>
+            <pin pad="PR1" position="A8"/>
+            <pin pad="COM2" position="A9"/>
+            <pin pad="CAPH" position="A10"/>
+            <pin pad="PC3" position="B1"/>
+            <pin pad="GND" position="B2"/>
+            <pin pad="PB7" position="B3"/>
+            <pin pad="PB4" position="B4"/>
+            <pin pad="AGND" position="B5"/>
+            <pin pad="PA4" position="B6"/>
+            <pin pad="PA0" position="B7"/>
+            <pin pad="PR0" position="B8"/>
+            <pin pad="COM1" position="B9"/>
+            <pin pad="CAPL" position="B10"/>
+            <pin pad="PC5" position="C1"/>
+            <pin pad="PC4" position="C2"/>
+            <pin pad="PC1" position="C3"/>
+            <pin pad="PB5" position="C4"/>
+            <pin pad="PA7" position="C5"/>
+            <pin pad="PA3" position="C6"/>
+            <pin pad="COM3" position="C7"/>
+            <pin pad="COM0" position="C8"/>
+            <pin pad="BIAS2" position="C9"/>
+            <pin pad="BIAS1" position="C10"/>
+            <pin pad="VCC" position="D1"/>
+            <pin pad="GND" position="D2"/>
+            <pin pad="PD0" position="D3"/>
+            <pin pad="PC2" position="D4"/>
+            <pin pad="PB0" position="D5"/>
+            <pin pad="PA6" position="D6"/>
+            <pin pad="SEG0" position="D7"/>
+            <pin pad="VLCD" position="D8"/>
+            <pin pad="GND" position="D9"/>
+            <pin pad="VCC" position="D10"/>
+            <pin pad="PD2" position="E1"/>
+            <pin pad="RESET" position="E2"/>
+            <pin pad="PD1" position="E3"/>
+            <pin pad="PC6" position="E4"/>
+            <pin pad="PB1" position="E5"/>
+            <pin pad="PA2" position="E6"/>
+            <pin pad="SEG1" position="E7"/>
+            <pin pad="SEG4" position="E8"/>
+            <pin pad="SEG3" position="E9"/>
+            <pin pad="SEG2" position="E10"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="GND" position="F2"/>
+            <pin pad="PDI" position="F3"/>
+            <pin pad="PC7" position="F4"/>
+            <pin pad="PB3" position="F5"/>
+            <pin pad="PM2" position="F6"/>
+            <pin pad="SEG10" position="F7"/>
+            <pin pad="SEG7" position="F8"/>
+            <pin pad="SEG6" position="F9"/>
+            <pin pad="SEG5" position="F10"/>
+            <pin pad="PE2" position="G1"/>
+            <pin pad="PE1" position="G2"/>
+            <pin pad="PE3" position="G3"/>
+            <pin pad="PE0" position="G4"/>
+            <pin pad="PE4" position="G5"/>
+            <pin pad="SEG23" position="G6"/>
+            <pin pad="SEG15" position="G7"/>
+            <pin pad="SEG13" position="G8"/>
+            <pin pad="SEG9" position="G9"/>
+            <pin pad="SEG8" position="G10"/>
+            <pin pad="PE5" position="H1"/>
+            <pin pad="PE6" position="H2"/>
+            <pin pad="PG1" position="H3"/>
+            <pin pad="PG4" position="H4"/>
+            <pin pad="PG7" position="H5"/>
+            <pin pad="PM5" position="H6"/>
+            <pin pad="SEG21" position="H7"/>
+            <pin pad="SEG18" position="H8"/>
+            <pin pad="SEG12" position="H9"/>
+            <pin pad="SEG11" position="H10"/>
+            <pin pad="PE7" position="J1"/>
+            <pin pad="PG0" position="J2"/>
+            <pin pad="PG3" position="J3"/>
+            <pin pad="PG6" position="J4"/>
+            <pin pad="PM1" position="J5"/>
+            <pin pad="PM4" position="J6"/>
+            <pin pad="PM7" position="J7"/>
+            <pin pad="SEG20" position="J8"/>
+            <pin pad="SEG16" position="J9"/>
+            <pin pad="SEG14" position="J10"/>
+            <pin pad="GND" position="K1"/>
+            <pin pad="VCC" position="K2"/>
+            <pin pad="PG2" position="K3"/>
+            <pin pad="PG5" position="K4"/>
+            <pin pad="PM0" position="K5"/>
+            <pin pad="PM3" position="K6"/>
+            <pin pad="PM6" position="K7"/>
+            <pin pad="SEG22" position="K8"/>
+            <pin pad="SEG19" position="K9"/>
+            <pin pad="SEG17" position="K10"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
new file mode 100644
index 00000000..b593fdc0
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64B3.xml
@@ -0,0 +1,3127 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64B3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64B3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64B3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAB">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="0" pad="PC0"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="1" pad="PC1"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="2" pad="PC2"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="3" pad="PC3"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="4" pad="PC4"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="5" pad="PC5"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="6" pad="PC6"/>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAB">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6080" version="XMEGAB">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAB">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAB">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTC" group="CLKOUT" pad="PD7"/>
+                            <signal field="EVOUT" function="EVOUTC" group="EVOUT" pad="PD7"/>
+                            <signal field="RTCOUT" function="RTCOUTC" group="RTCOUT" pad="PD6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AES" id="I6096">
+                    <instance name="AES">
+                        <register-group address-space="data" offset="0x0C0" name-in-module="AES" name="AES"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAB">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="DMA" id="I3000" version="XMEGAB">
+                    <instance name="DMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="DMA" name="DMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAB">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAB">
+                    <instance name="ADCB">
+                        <register-group address-space="data" offset="0x0240" name-in-module="ADC" name="ADCB"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PB7"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAB">
+                    <instance name="ACB">
+                        <register-group address-space="data" offset="0x0390" name-in-module="AC" name="ACB"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PB0"/>
+                            <signal function="AC" group="AC" index="1" pad="PB1"/>
+                            <signal function="AC" group="AC" index="2" pad="PB2"/>
+                            <signal function="AC" group="AC" index="3" pad="PB3"/>
+                            <signal function="AC" group="AC" index="4" pad="PB4"/>
+                            <signal function="AC" group="AC" index="5" pad="PB5"/>
+                            <signal function="AC" group="AC" index="6" pad="PB6"/>
+                            <signal function="AC" group="AC" index="7" pad="PB7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PB6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PB7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD0"/>
+                            <signal function="USB" group="DP" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTG">
+                        <register-group address-space="data" offset="0x06C0" name-in-module="PORT" name="PORTG"/>
+                        <signals>
+                            <signal function="PORTG" group="P" index="0" pad="PG0"/>
+                            <signal function="PORTG" group="P" index="1" pad="PG1"/>
+                            <signal function="PORTG" group="P" index="2" pad="PG2"/>
+                            <signal function="PORTG" group="P" index="3" pad="PG3"/>
+                            <signal function="PORTG" group="P" index="4" pad="PG4"/>
+                            <signal function="PORTG" group="P" index="5" pad="PG5"/>
+                            <signal function="PORTG" group="P" index="6" pad="PG6"/>
+                            <signal function="PORTG" group="P" index="7" pad="PG7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTM">
+                        <register-group address-space="data" offset="0x0760" name-in-module="PORT" name="PORTM"/>
+                        <signals>
+                            <signal function="PORTM" group="P" index="0" pad="PM0"/>
+                            <signal function="PORTM" group="P" index="1" pad="PM1"/>
+                            <signal function="PORTM" group="P" index="2" pad="PM2"/>
+                            <signal function="PORTM" group="P" index="3" pad="PM3"/>
+                            <signal function="PORTM" group="P" index="4" pad="PM4"/>
+                            <signal function="PORTM" group="P" index="5" pad="PM5"/>
+                            <signal function="PORTM" group="P" index="6" pad="PM6"/>
+                            <signal function="PORTM" group="P" index="7" pad="PM7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAB">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAB">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="LCD" id="I3003">
+                    <instance name="LCD">
+                        <register-group address-space="data" offset="0x0D00" name-in-module="LCD" name="LCD"/>
+                        <signals>
+                            <signal function="LCD_SEG" group="SEG" index="24" pad="PG0"/>
+                            <signal function="LCD_SEG" group="SEG" index="23" pad="PG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="22" pad="PG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="21" pad="PG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="20" pad="PG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="19" pad="PG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="18" pad="PG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="17" pad="PG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="16" pad="PM0"/>
+                            <signal function="LCD_SEG" group="SEG" index="15" pad="PM1"/>
+                            <signal function="LCD_SEG" group="SEG" index="14" pad="PM2"/>
+                            <signal function="LCD_SEG" group="SEG" index="13" pad="PM3"/>
+                            <signal function="LCD_SEG" group="SEG" index="12" pad="PM4"/>
+                            <signal function="LCD_SEG" group="SEG" index="11" pad="PM5"/>
+                            <signal function="LCD_SEG" group="SEG" index="10" pad="PM6"/>
+                            <signal function="LCD_SEG" group="SEG" index="9" pad="PM7"/>
+                            <signal function="LCD_SEG" group="SEG" index="8" pad="SEG8"/>
+                            <signal function="LCD_SEG" group="SEG" index="7" pad="SEG7"/>
+                            <signal function="LCD_SEG" group="SEG" index="6" pad="SEG6"/>
+                            <signal function="LCD_SEG" group="SEG" index="5" pad="SEG5"/>
+                            <signal function="LCD_SEG" group="SEG" index="4" pad="SEG4"/>
+                            <signal function="LCD_SEG" group="SEG" index="3" pad="SEG3"/>
+                            <signal function="LCD_SEG" group="SEG" index="2" pad="SEG2"/>
+                            <signal function="LCD_SEG" group="SEG" index="1" pad="SEG1"/>
+                            <signal function="LCD_SEG" group="SEG" index="0" pad="SEG0"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="1" pad="SEG1"/>
+                            <signal function="LCD_BLINK" group="BLINK" index="0" pad="SEG0"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="1" pad="BIAS1"/>
+                            <signal function="LCD_BIAS" group="BIAS" index="2" pad="BIAS2"/>
+                            <signal function="LCD_BIAS" group="VLCD" pad="VLCD"/>
+                            <signal function="LCD_BIAS" group="CAPL" pad="CAPL"/>
+                            <signal function="LCD_BIAS" group="CAPH" pad="CAPH"/>
+                            <signal function="LCD_COM" group="COM" index="0" pad="COM0"/>
+                            <signal function="LCD_COM" group="COM" index="1" pad="COM1"/>
+                            <signal function="LCD_COM" group="COM" index="2" pad="COM2"/>
+                            <signal function="LCD_COM" group="COM" index="3" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="0" pad="COM3"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="1" pad="COM2"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="2" pad="COM1"/>
+                            <signal function="LCD_COM_SWP" group="COM" index="3" pad="COM0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAAU">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAAU">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3600" version="XMEGAB">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="6" module-instance="DMA" name-in-module="DMA"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="31" module-instance="USB" name-in-module="USB"/>
+                <interrupt-group index="35" module-instance="LCD" name-in-module="LCD"/>
+                <interrupt-group index="36" module-instance="AES" name-in-module="AES"/>
+                <interrupt-group index="37" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="39" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="41" module-instance="ACB" name-in-module="AC"/>
+                <interrupt-group index="44" module-instance="ADCB" name-in-module="ADC"/>
+                <interrupt-group index="48" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="50" module-instance="PORTG" name-in-module="PORT"/>
+                <interrupt-group index="52" module-instance="PORTM" name-in-module="PORT"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+                <interface type="xmegajtag" name="JTAG"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0965103F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x51"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAB" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAB" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="External Clock on port C0 - 6 CLK" name="EXTCLK_C0" value="0x01"/>
+                <value caption="External Clock on port C1 - 6 CLK" name="EXTCLK_C1" value="0x05"/>
+                <value caption="External Clock on port C2 - 6 CLK" name="EXTCLK_C2" value="0x09"/>
+                <value caption="External Clock on port C3 - 6 CLK" name="EXTCLK_C3" value="0x0D"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x11"/>
+                <value caption="External Clock on port C5 - 6 CLK" name="EXTCLK_C5" value="0x15"/>
+                <value caption="External Clock on port C6 - 6 CLK" name="EXTCLK_C6" value="0x19"/>
+                <value caption="External Clock on port C7 - 6 CLK" name="EXTCLK_C7" value="0x1D"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="PR" id="I6080" version="XMEGAB" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="6">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="LCD Module" mask="0x80" name="LCD"/>
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port B" name="PRPB" offset="0x02" size="1">
+                    <bitfield caption="Port B ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port B Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAB" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port B" mask="0x0C" name="STARTUPDLYB"/>
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAB" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x04" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C" name="PC" value="0x01"/>
+                <value caption="System Clock Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0 Output on Port C" name="PC" value="0x01"/>
+                <value caption="Event Channel 0 Output on Port E" name="PE" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="AES" id="I6096" caption="AES Module">
+            <register-group caption="AES Module" name="AES" size="5">
+                <register caption="AES Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Start/Run" mask="0x80" name="START"/>
+                    <bitfield caption="Auto Start Trigger" mask="0x40" name="AUTO"/>
+                    <bitfield caption="AES Software Reset" mask="0x20" name="RESET"/>
+                    <bitfield caption="Decryption / Direction" mask="0x10" name="DECRYPT"/>
+                    <bitfield caption="State XOR Load Enable" mask="0x04" name="XOR"/>
+                </register>
+                <register caption="AES Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="AES Error" mask="0x80" name="ERROR"/>
+                    <bitfield caption="State Ready Interrupt Flag" mask="0x01" name="SRIF"/>
+                </register>
+                <register caption="AES State Register" name="STATE" offset="0x02" size="1"/>
+                <register caption="AES Key Register" name="KEY" offset="0x03" size="1"/>
+                <register caption="AES Interrupt Control Register" name="INTCTRL" offset="0x04" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="AES_INTLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt level" name="AES_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="AES">
+                <interrupt index="0" name="INT" caption="AES Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAB" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+            </value-group>
+        </module>
+        <module name="DMA" id="I3000" version="XMEGAB" caption="DMA Controller">
+            <register-group caption="DMA Channel" name="DMA_CH" size="16">
+                <register caption="Channel Control" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="CHEN"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="CHRST"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel Transfer Mode" mask="0x03" name="BURSTLEN" values="DMA_CH_BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Block Transfer Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Transfer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="DMA_CH_ERRINTLVL"/>
+                    <bitfield caption="Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="DMA_CH_TRNINTLVL"/>
+                </register>
+                <register caption="Address Control" name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield caption="Channel Source Address Reload" mask="0xC0" name="SRCRELOAD"
+                              values="DMA_CH_SRCRELOAD"/>
+                    <bitfield caption="Channel Source Address Mode" mask="0x30" name="SRCDIR" values="DMA_CH_SRCDIR"/>
+                    <bitfield caption="Channel Destination Address Reload" mask="0x0C" name="DESTRELOAD"
+                              values="DMA_CH_DESTRELOAD"/>
+                    <bitfield caption="Channel Destination Address Mode" mask="0x03" name="DESTDIR"
+                              values="DMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x03" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="DMA_CH_TRIGSRC"/>
+                </register>
+                <register caption="Channel Block Transfer Count" name="TRFCNT" offset="0x04" size="2"/>
+                <register caption="Channel Repeat Count" name="REPCNT" offset="0x06" size="1"/>
+                <register caption="Channel Source Address 0" name="SRCADDR0" offset="0x08" size="1"/>
+                <register caption="Channel Source Address 1" name="SRCADDR1" offset="0x09" size="1"/>
+                <register caption="Channel Destination Address 0" name="DESTADDR0" offset="0x0C" size="1"/>
+                <register caption="Channel Destination Address 1" name="DESTADDR1" offset="0x0D" size="1"/>
+            </register-group>
+            <register-group caption="DMA Controller" name="DMA" size="48">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Double Buffering Mode" mask="0x04" name="DBUFMODE" values="DMA_DBUFMODE"/>
+                    <bitfield caption="Channel Priority Mode" mask="0x01" name="PRIMODE" values="DMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Block Transfer Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 1 Block Transfer Busy" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Block Transfer Busy" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 1 Block Transfer Pending" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Block Transfer Pending" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="2"/>
+                <register-group caption="DMA Channel 0" name="CH0" offset="0x10" name-in-module="DMA_CH"/>
+                <register-group caption="DMA Channel 1" name="CH1" offset="0x20" name-in-module="DMA_CH"/>
+            </register-group>
+            <value-group caption="Burst mode" name="DMA_CH_BURSTLEN">
+                <value caption="1-byte burst mode" name="1BYTE" value="0x00"/>
+                <value caption="2-byte burst mode" name="2BYTE" value="0x01"/>
+                <value caption="4-byte burst mode" name="4BYTE" value="0x02"/>
+                <value caption="8-byte burst mode" name="8BYTE" value="0x03"/>
+            </value-group>
+            <value-group caption="Source address reload mode" name="DMA_CH_SRCRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Source addressing mode" name="DMA_CH_SRCDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Destination address reload mode" name="DMA_CH_DESTRELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of block" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of burst" name="BURST" value="0x02"/>
+                <value caption="Reload at end of transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="DMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="Decrement" name="DEC" value="0x02"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="DMA_CH_TRIGSRC">
+                <value caption="Off software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event System Channel 0" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event System Channel 1" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event System Channel 2" name="EVSYS_CH2" value="0x03"/>
+                <value caption="AES" name="AES" value="0x04"/>
+                <value caption="ADCA Channel 0" name="ADCA_CH0" value="0x10"/>
+                <value caption="ADCB Channel 0" name="ADCB_CH0" value="0x20"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0x40"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0x41"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0x42"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0x43"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0x44"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0x45"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0x46"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0x47"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0x48"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0x49"/>
+                <value caption="SPI C Transfer Complete" name="SPIC" value="0x4A"/>
+                <value caption="USART C0 Receive Complete" name="USARTC0_RXC" value="0x4B"/>
+                <value caption="USART C0 Data Register Empty" name="USARTC0_DRE" value="0x4C"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0x80"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0x81"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0x82"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0x83"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0x84"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0x85"/>
+                <value caption="USART E0 Receive Complete" name="USARTE0_RXC" value="0x8B"/>
+                <value caption="USART E0 Data Register Empty" name="USARTE0_DRE" value="0x8C"/>
+            </value-group>
+            <value-group caption="Double buffering mode" name="DMA_DBUFMODE">
+                <value caption="Double buffering disabled" name="DISABLED" value="0x00"/>
+                <value caption="Double buffering enabled on channel 0/1" name="CH01" value="0x01"/>
+            </value-group>
+            <value-group caption="Priority mode" name="DMA_PRIMODE">
+                <value caption="Round Robin" name="RR01" value="0x00"/>
+                <value caption="Channel 0 &gt; channel 1" name="CH0RR1" value="0x01"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_ERRINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="DMA_CH_TRNINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="DMA">
+                <interrupt index="0" name="CH0" caption="Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="Channel 1 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAB" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="Analog Comparator B Channel 0" name="ACB_CH0" value="0x13"/>
+                <value caption="Analog Comparator B Channel 1" name="ACB_CH1" value="0x14"/>
+                <value caption="Analog Comparator B Window" name="ACB_WIN" value="0x15"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="ADC B Channel" name="ADCB_CH0" value="0x24"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAB" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current limit" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAB" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAB" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAB" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="LCD" id="I3003" caption="LCD Controller">
+            <register-group caption="LCD Controller" name="LCD" size="36">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LCD Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="External Register Bias Generation" mask="0x40" name="XBIAS"/>
+                    <bitfield caption="Data Register Lock" mask="0x20" name="DATCLK"/>
+                    <bitfield caption="Common Bus Swap" mask="0x10" name="COMSWP"/>
+                    <bitfield caption="Segment Bus Swap" mask="0x08" name="SEGSWP"/>
+                    <bitfield caption="Clear Data Register" mask="0x04" name="CLRDT"/>
+                    <bitfield caption="Segments On" mask="0x02" name="SEGON"/>
+                    <bitfield caption="Blanking Display Mode" mask="0x01" name="BLANK"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="LCD Prescaler Select" mask="0x80" name="PRESC" values="LCD_PRESC"/>
+                    <bitfield caption="LCD Clock Divide" mask="0x70" name="CLKDIV" values="LCD_CLKDIV"/>
+                    <bitfield caption="Low Power Waveform" mask="0x08" name="LPWAV"/>
+                    <bitfield caption="Duty Select" mask="0x03" name="DUTY" values="LCD_DUTY"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="LCD Port Mask" mask="0x3F" name="PMSK"/>
+                </register>
+                <register caption="Interrupt Enable Register" name="INTCTRL" offset="0x03" size="1">
+                    <bitfield caption="eXtended Interrupt Mode Enable" mask="0xF8" name="XIME"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="FCINTLVL" values="LCD_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAG" offset="0x04" size="1">
+                    <bitfield caption="LCD Frame Completed Interrupt Flag" mask="0x01" name="FCIF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Blink Enable" mask="0x08" name="BLINKEN"/>
+                    <bitfield caption="LCD Blink Rate" mask="0x03" name="BLINKRATE" values="LCD_BLINKRATE"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x06" size="1">
+                    <bitfield caption="Blink Pixel Selection 1" mask="0xF0" name="BPS1"/>
+                    <bitfield caption="Blink Pixel Selection 0" mask="0x0F" name="BPS0"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x07" size="1">
+                    <bitfield caption="Fine Contrast" mask="0x3F" name="FCONT"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x08" size="1">
+                    <bitfield caption="Type of Digit" mask="0xC0" name="TDG" values="LCD_TDG"/>
+                    <bitfield caption="Start Segment" mask="0x3F" name="STSEG"/>
+                </register>
+                <register caption="Control Register H" name="CTRLH" offset="0x09" size="1">
+                    <bitfield caption="Decrement of Start Segment" mask="0x80" name="DEC"/>
+                    <bitfield caption="Display Code" mask="0x7F" name="DCODE"/>
+                </register>
+                <register caption="LCD Data Register 0" name="DATA0" offset="0x10" size="1"/>
+                <register caption="LCD Data Register 1" name="DATA1" offset="0x11" size="1"/>
+                <register caption="LCD Data Register 2" name="DATA2" offset="0x12" size="1"/>
+                <register caption="LCD Data Register 3" name="DATA3" offset="0x13" size="1"/>
+                <register caption="LCD Data Register 4" name="DATA4" offset="0x14" size="1"/>
+                <register caption="LCD Data Register 5" name="DATA5" offset="0x15" size="1"/>
+                <register caption="LCD Data Register 6" name="DATA6" offset="0x16" size="1"/>
+                <register caption="LCD Data Register 7" name="DATA7" offset="0x17" size="1"/>
+                <register caption="LCD Data Register 8" name="DATA8" offset="0x18" size="1"/>
+                <register caption="LCD Data Register 9" name="DATA9" offset="0x19" size="1"/>
+                <register caption="LCD Data Register 10" name="DATA10" offset="0x1A" size="1"/>
+                <register caption="LCD Data Register 11" name="DATA11" offset="0x1B" size="1"/>
+                <register caption="LCD Data Register 12" name="DATA12" offset="0x1C" size="1"/>
+                <register caption="LCD Data Register 13" name="DATA13" offset="0x1D" size="1"/>
+                <register caption="LCD Data Register 14" name="DATA14" offset="0x1E" size="1"/>
+                <register caption="LCD Data Register 15" name="DATA15" offset="0x1F" size="1"/>
+                <register caption="LCD Data Register 16" name="DATA16" offset="0x20" size="1"/>
+                <register caption="LCD Data Register 17" name="DATA17" offset="0x21" size="1"/>
+                <register caption="LCD Data Register 18" name="DATA18" offset="0x22" size="1"/>
+                <register caption="LCD Data Register 19" name="DATA19" offset="0x23" size="1"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="LCD_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Blink Rate" name="LCD_BLINKRATE">
+                <value caption="4Hz Blink Rate" name="4Hz" value="0x00"/>
+                <value caption="2Hz Blink Rate" name="2Hz" value="0x01"/>
+                <value caption="1Hz Blink Rate" name="1Hz" value="0x02"/>
+                <value caption="0.5Hz Blink Rate" name="0Hz5" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Clock Divide" name="LCD_CLKDIV">
+                <value caption="frame rate of 256 Hz" name="DivBy1" value="0x00"/>
+                <value caption="frame rate of 128 Hz" name="DivBy2" value="0x01"/>
+                <value caption="frame rate of 83.5 Hz" name="DivBy3" value="0x02"/>
+                <value caption="frame rate of 64 Hz" name="DivBy4" value="0x03"/>
+                <value caption="frame rate of 51.2 Hz" name="DivBy5" value="0x04"/>
+                <value caption="frame rate of 42.7 Hz" name="DivBy6" value="0x05"/>
+                <value caption="frame rate of 36.6 Hz" name="DivBy7" value="0x06"/>
+                <value caption="frame rate of 32 Hz" name="DivBy8" value="0x07"/>
+            </value-group>
+            <value-group caption="Duty Select" name="LCD_DUTY">
+                <value caption="Duty=1/4, Bias=1/3, COM0:3" name="1_4" value="0x00"/>
+                <value caption="Duty=Static, Bias=Static, COM0" name="Static" value="0x01"/>
+                <value caption="Duty=1/2, Bias=1/3, COM0:1" name="1_2" value="0x02"/>
+                <value caption="Duty=1/3, Bias=1/3, COM0:2" name="1_3" value="0x03"/>
+            </value-group>
+            <value-group caption="LCD Prescaler Select" name="LCD_PRESC">
+                <value caption="clk_lcd/8" name="8" value="0x00"/>
+                <value caption="clk_lcd/16" name="16" value="0x01"/>
+            </value-group>
+            <value-group caption="Type of Digit" name="LCD_TDG">
+                <value caption="7-segment with 3 COMs" name="7S_3C" value="0x00"/>
+                <value caption="7-segment with 4 COMs" name="7S_4C" value="0x01"/>
+                <value caption="14-segment with 4 COMs" name="14S_4C" value="0x02"/>
+                <value caption="16-segment with 3 COMs" name="16S_3C" value="0x03"/>
+            </value-group>
+            <interrupt-group name="LCD">
+                <interrupt index="0" name="INT" caption="LCD Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="JTAG User ID" name="FUSEBYTE0" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="JTAG User ID" mask="0xFF" name="JTAGUSERID"/>
+                </register>
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                    <bitfield caption="JTAG Interface Enable" mask="0x01" name="JTAGEN"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAAU" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3600" version="XMEGAB" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="72">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PC0" position="1"/>
+            <pin pad="PC1" position="2"/>
+            <pin pad="PC2" position="3"/>
+            <pin pad="PC3" position="4"/>
+            <pin pad="PC4" position="5"/>
+            <pin pad="PC5" position="6"/>
+            <pin pad="PC6" position="7"/>
+            <pin pad="PC7" position="8"/>
+            <pin pad="GND" position="9"/>
+            <pin pad="VCC" position="10"/>
+            <pin pad="PD0" position="11"/>
+            <pin pad="PD1" position="12"/>
+            <pin pad="RESET" position="13"/>
+            <pin pad="PDI" position="14"/>
+            <pin pad="GND" position="15"/>
+            <pin pad="VCC" position="16"/>
+            <pin pad="PG0" position="17"/>
+            <pin pad="PG1" position="18"/>
+            <pin pad="PG2" position="19"/>
+            <pin pad="PG3" position="20"/>
+            <pin pad="PG4" position="21"/>
+            <pin pad="PG5" position="22"/>
+            <pin pad="PG6" position="23"/>
+            <pin pad="PG7" position="24"/>
+            <pin pad="PM0" position="25"/>
+            <pin pad="PM1" position="26"/>
+            <pin pad="PM2" position="27"/>
+            <pin pad="PM3" position="28"/>
+            <pin pad="PM4" position="29"/>
+            <pin pad="PM5" position="30"/>
+            <pin pad="PM6" position="31"/>
+            <pin pad="PM7" position="32"/>
+            <pin pad="SEG8" position="33"/>
+            <pin pad="SEG7" position="34"/>
+            <pin pad="SEG6" position="35"/>
+            <pin pad="SEG5" position="36"/>
+            <pin pad="SEG4" position="37"/>
+            <pin pad="SEG3" position="38"/>
+            <pin pad="SEG2" position="39"/>
+            <pin pad="SEG1" position="40"/>
+            <pin pad="SEG0" position="41"/>
+            <pin pad="GND" position="42"/>
+            <pin pad="VCC" position="43"/>
+            <pin pad="BIAS1" position="44"/>
+            <pin pad="BIAS2" position="45"/>
+            <pin pad="VLCD" position="46"/>
+            <pin pad="CAPL" position="47"/>
+            <pin pad="CAPH" position="48"/>
+            <pin pad="COM0" position="49"/>
+            <pin pad="COM1" position="50"/>
+            <pin pad="COM2" position="51"/>
+            <pin pad="COM3" position="52"/>
+            <pin pad="PR0" position="53"/>
+            <pin pad="PR1" position="54"/>
+            <pin pad="AGND" position="55"/>
+            <pin pad="AVCC" position="56"/>
+            <pin pad="PB0" position="57"/>
+            <pin pad="PB1" position="58"/>
+            <pin pad="PB2" position="59"/>
+            <pin pad="PB3" position="60"/>
+            <pin pad="PB4" position="61"/>
+            <pin pad="PB5" position="62"/>
+            <pin pad="PB6" position="63"/>
+            <pin pad="PB7" position="64"/>
+        </pinout>
+        <pinout name="DRQFN_64">
+            <pin pad="PC0" position="A1"/>
+            <pin pad="PC1" position="B1"/>
+            <pin pad="PC2" position="A2"/>
+            <pin pad="PC3" position="B2"/>
+            <pin pad="PC4" position="A3"/>
+            <pin pad="PC5" position="B3"/>
+            <pin pad="PC6" position="A4"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="PC7" position="A5"/>
+            <pin pad="PD0" position="B5"/>
+            <pin pad="VCC" position="A6"/>
+            <pin pad="RESET" position="B6"/>
+            <pin pad="PD1" position="A7"/>
+            <pin pad="PDI" position="B7"/>
+            <pin pad="GND" position="A8"/>
+            <pin pad="PG0" position="A9"/>
+            <pin pad="VCC" position="B8"/>
+            <pin pad="PG2" position="A10"/>
+            <pin pad="PG1" position="B9"/>
+            <pin pad="PG3" position="A11"/>
+            <pin pad="PG4" position="B10"/>
+            <pin pad="PG5" position="A12"/>
+            <pin pad="PG6" position="B11"/>
+            <pin pad="PG7" position="A13"/>
+            <pin pad="PM0" position="B12"/>
+            <pin pad="PM1" position="A14"/>
+            <pin pad="PM2" position="B13"/>
+            <pin pad="PM3" position="A15"/>
+            <pin pad="PM5" position="B14"/>
+            <pin pad="PM4" position="A16"/>
+            <pin pad="PM7" position="B15"/>
+            <pin pad="PM6" position="A17"/>
+            <pin pad="SEG7" position="A18"/>
+            <pin pad="SEG8" position="B16"/>
+            <pin pad="SEG6" position="A19"/>
+            <pin pad="SEG5" position="B17"/>
+            <pin pad="SEG4" position="A20"/>
+            <pin pad="SEG3" position="B18"/>
+            <pin pad="SEG2" position="A21"/>
+            <pin pad="SEG1" position="B19"/>
+            <pin pad="SEG0" position="A22"/>
+            <pin pad="GND" position="B20"/>
+            <pin pad="VCC" position="A23"/>
+            <pin pad="BIAS1" position="B21"/>
+            <pin pad="BIAS2" position="A24"/>
+            <pin pad="VLCD" position="B22"/>
+            <pin pad="CAPL" position="A25"/>
+            <pin pad="CAPH" position="A26"/>
+            <pin pad="COM0" position="B23"/>
+            <pin pad="COM1" position="A27"/>
+            <pin pad="COM2" position="B24"/>
+            <pin pad="COM3" position="A28"/>
+            <pin pad="PR0" position="B25"/>
+            <pin pad="PR1" position="A29"/>
+            <pin pad="AGND" position="B26"/>
+            <pin pad="PB0" position="A30"/>
+            <pin pad="AVCC" position="B27"/>
+            <pin pad="PB1" position="A31"/>
+            <pin pad="PB2" position="B28"/>
+            <pin pad="PB3" position="A32"/>
+            <pin pad="PB4" position="B29"/>
+            <pin pad="PB5" position="A33"/>
+            <pin pad="PB7" position="B30"/>
+            <pin pad="PB6" position="A34"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml
new file mode 100644
index 00000000..b0313605
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64C3.xml
@@ -0,0 +1,2841 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64C3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64C3-M7" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64C3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0E000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAC">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAC">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAAU">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAC">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USB" id="I3005" version="XMEGAAU">
+                    <instance name="USB">
+                        <register-group address-space="data" offset="0x4C0" name-in-module="USB" name="USB"/>
+                        <signals>
+                            <signal function="USB" group="DN" pad="PD6"/>
+                            <signal function="USB" group="DP" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3610" version="XMEGAC">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+                <interrupt-group index="125" module-instance="USB" name-in-module="USB"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x49"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080E000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAC" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+                <register caption="USB Control Register" name="USBCTRL" offset="0x04" size="1">
+                    <bitfield caption="Prescaler Division Factor" mask="0x38" name="USBPSDIV" values="CLK_USBPSDIV"/>
+                    <bitfield caption="Clock Source" mask="0x06" name="USBSRC" values="CLK_USBSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="USBSEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+            <value-group caption="USB Prescaler Division Factor" name="CLK_USBPSDIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x02"/>
+                <value caption="Divide by 8" name="8" value="0x03"/>
+                <value caption="Divide by 16" name="16" value="0x04"/>
+                <value caption="Divide by 32" name="32" value="0x05"/>
+            </value-group>
+            <value-group caption="USB Clock Source" name="CLK_USBSRC">
+                <value caption="PLL" name="PLL" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+            </value-group>
+        </module>
+
+        <module name="PR" id="I6073" version="XMEGAC" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="USB" mask="0x40" name="USB"/>
+                    <bitfield caption="AES" mask="0x10" name="AES"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="DMA-Controller" mask="0x01" name="DMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART1" mask="0x20" name="USART1"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C AWEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+
+
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAAU" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+                <value caption="USB Start of Frame" name="USBSOF" value="0x02"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAC" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="USB Setup, SOF, CRC error and UNF/OVF" name="USB" value="0x0A"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (if INPUTMODE = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (if INPUTMODE = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (if INPUTMODE = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (if INPUTMODE = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (if INPUTMODE = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (if INPUTMODE = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (if INPUTMODE = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (if INPUTMODE = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (if INPUTMODE = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (if INPUTMODE = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (if INPUTMODE = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (if INPUTMODE = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain (INPUTMODE = 0)" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain (INPUTMODE = 1)" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain (INPUTMODE = 2)" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain (INPUTMODE = 3)" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USB" id="I3005" version="XMEGAAU" caption="USB">
+            <register-group caption="USB Endpoint" name="USB_EP" size="8">
+                <register caption="Endpoint Status" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Endpoint Stall Flag" mask="0x80" name="STALLF"/>
+                    <bitfield caption="CRC Error Flag" mask="0x80" name="CRC"/>
+                    <bitfield caption="Underflow Enpoint FLag" mask="0x40" name="UNF"/>
+                    <bitfield caption="Overflow Enpoint Flag for Output Endpoints" mask="0x40" name="OVF"/>
+                    <bitfield caption="Transaction Complete 0 Flag" mask="0x20" name="TRNCOMPL0"/>
+                    <bitfield caption="Transaction Complete 1 Flag" mask="0x10" name="TRNCOMPL1"/>
+                    <bitfield caption="SETUP Transaction Complete Flag" mask="0x10" name="SETUP"/>
+                    <bitfield caption="Bank Select" mask="0x08" name="BANK"/>
+                    <bitfield caption="Data Buffer 1 Not Acknowledge" mask="0x04" name="BUSNACK1"/>
+                    <bitfield caption="Data Buffer 0 Not Acknowledge" mask="0x02" name="BUSNACK0"/>
+                    <bitfield caption="Data Toggle" mask="0x01" name="TOGGLE"/>
+                </register>
+                <register caption="Endpoint Control" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Endpoint Type" mask="0xC0" name="TYPE" values="USB_EP_TYPE"/>
+                    <bitfield caption="Multi Packet Transfer Enable" mask="0x20" name="MULTIPKT"/>
+                    <bitfield caption="Ping-Pong Enable" mask="0x10" name="PINGPONG"/>
+                    <bitfield caption="Interrupt Disable" mask="0x08" name="INTDSBL"/>
+                    <bitfield caption="Data Stall" mask="0x04" name="STALL"/>
+                    <bitfield caption="Data Buffer Size" mask="0x07" name="BUFSIZE" values="USB_EP_BUFSIZE"/>
+                </register>
+                <register caption="USB Endpoint Counter" name="CNT" offset="0x02" size="2">
+                    <bitfield caption="Zero Length Packet" mask="0x8000" name="ZLP"/>
+                </register>
+                <register caption="Data Pointer" name="DATAPTR" offset="0x04" size="2"/>
+                <register caption="Auxiliary Data" name="AUXDATA" offset="0x06" size="2"/>
+            </register-group>
+            <register-group caption="Universal Serial Bus" name="USB" size="60">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="USB Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Speed Select" mask="0x40" name="SPEED"/>
+                    <bitfield caption="USB FIFO Enable" mask="0x20" name="FIFOEN"/>
+                    <bitfield caption="Store Frame Number Enable" mask="0x10" name="STFRNUM"/>
+                    <bitfield caption="Maximum Endpoint Addresses" mask="0x0F" name="MAXEP"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Pull during Reset" mask="0x10" name="PULLRST"/>
+                    <bitfield caption="Remote Wake-up" mask="0x04" name="RWAKEUP"/>
+                    <bitfield caption="Global NACK" mask="0x02" name="GNACK"/>
+                    <bitfield caption="Attach" mask="0x01" name="ATTACH"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Upstream Resume" mask="0x08" name="URESUME"/>
+                    <bitfield caption="Resume" mask="0x04" name="RESUME"/>
+                    <bitfield caption="Bus Suspended" mask="0x02" name="SUSPEND"/>
+                    <bitfield caption="Bus Reset" mask="0x01" name="BUSRST"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1">
+                    <bitfield caption="Device Address" mask="0x7F" name="ADDR"/>
+                </register>
+                <register caption="FIFO Write Pointer Register" name="FIFOWP" offset="0x04" size="1">
+                    <bitfield caption="FIFO Write Pointer" mask="0x1F" name="FIFOWP"/>
+                </register>
+                <register caption="FIFO Read Pointer Register" name="FIFORP" offset="0x05" size="1">
+                    <bitfield caption="FIFO Read Pointer" mask="0x1F" name="FIFORP"/>
+                </register>
+                <register caption="Endpoint Configuration Table Pointer" name="EPPTR" offset="0x06" size="2"/>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x08" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Enable" mask="0x80" name="SOFIE"/>
+                    <bitfield caption="Bus Event Interrupt Enable" mask="0x40" name="BUSEVIE"/>
+                    <bitfield caption="Bus Error Interrupt Enable" mask="0x20" name="BUSERRIE"/>
+                    <bitfield caption="STALL Interrupt Enable" mask="0x10" name="STALLIE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="USB_INTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x09" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Enable" mask="0x02" name="TRNIE"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Enable" mask="0x01" name="SETUPIE"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register A" name="INTFLAGSACLR" offset="0x0A" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register A" name="INTFLAGSASET" offset="0x0B" size="1">
+                    <bitfield caption="Start Of Frame Interrupt Flag" mask="0x80" name="SOFIF"/>
+                    <bitfield caption="Suspend Interrupt Flag" mask="0x40" name="SUSPENDIF"/>
+                    <bitfield caption="Resume Interrupt Flag" mask="0x20" name="RESUMEIF"/>
+                    <bitfield caption="Reset Interrupt Flag" mask="0x10" name="RSTIF"/>
+                    <bitfield caption="Isochronous CRC Error Interrupt Flag" mask="0x08" name="CRCIF"/>
+                    <bitfield caption="Underflow Interrupt Flag" mask="0x04" name="UNFIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x02" name="OVFIF"/>
+                    <bitfield caption="STALL Interrupt Flag" mask="0x01" name="STALLIF"/>
+                </register>
+                <register caption="Clear Interrupt Flag Register B" name="INTFLAGSBCLR" offset="0x0C" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Set Interrupt Flag Register B" name="INTFLAGSBSET" offset="0x0D" size="1">
+                    <bitfield caption="Transaction Complete Interrupt Flag" mask="0x02" name="TRNIF"/>
+                    <bitfield caption="SETUP Transaction Complete Interrupt Flag" mask="0x01" name="SETUPIF"/>
+                </register>
+                <register caption="Calibration Byte 0" name="CAL0" offset="0x3A" size="1"/>
+                <register caption="Calibration Byte 1" name="CAL1" offset="0x3B" size="1"/>
+            </register-group>
+            <register-group caption="USB Endpoint Table" name="USB_EP_TABLE" size="274">
+                <register caption="Frame Number Low Byte" name="FRAMENUML" offset="0x110" size="1"/>
+                <register caption="Frame Number High Byte" name="FRAMENUMH" offset="0x111" size="1"/>
+                <register-group caption="Endpoint 0" name="EP0OUT" offset="0x00" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 0" name="EP0IN" offset="0x08" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1OUT" offset="0x10" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 1" name="EP1IN" offset="0x18" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2OUT" offset="0x20" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 2" name="EP2IN" offset="0x28" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3OUT" offset="0x30" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 3" name="EP3IN" offset="0x38" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4OUT" offset="0x40" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 4" name="EP4IN" offset="0x48" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5OUT" offset="0x50" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 5" name="EP5IN" offset="0x58" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6OUT" offset="0x60" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 6" name="EP6IN" offset="0x68" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7OUT" offset="0x70" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 7" name="EP7IN" offset="0x78" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8OUT" offset="0x80" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 8" name="EP8IN" offset="0x88" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9OUT" offset="0x90" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 9" name="EP9IN" offset="0x98" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10OUT" offset="0xA0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 10" name="EP10IN" offset="0xA8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11OUT" offset="0xB0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 11" name="EP11IN" offset="0xB8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12OUT" offset="0xC0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 12" name="EP12IN" offset="0xC8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13OUT" offset="0xD0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 13" name="EP13IN" offset="0xD8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14OUT" offset="0xE0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 14" name="EP14IN" offset="0xE8" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15OUT" offset="0xF0" name-in-module="USB_EP"/>
+                <register-group caption="Endpoint 15" name="EP15IN" offset="0xF8" name-in-module="USB_EP"/>
+            </register-group>
+            <value-group caption="Interrupt level" name="USB_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Type" name="USB_EP_TYPE">
+                <value caption="Endpoint Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Control" name="CONTROL" value="0x01"/>
+                <value caption="Bulk/Interrupt" name="BULK" value="0x02"/>
+                <value caption="Isochronous" name="ISOCHRONOUS" value="0x03"/>
+            </value-group>
+            <value-group caption="USB Endpoint Buffersize" name="USB_EP_BUFSIZE">
+                <value caption="8 bytes buffer size" name="8" value="0x00"/>
+                <value caption="16 bytes buffer size" name="16" value="0x01"/>
+                <value caption="32 bytes buffer size" name="32" value="0x02"/>
+                <value caption="64 bytes buffer size" name="64" value="0x03"/>
+                <value caption="128 bytes buffer size" name="128" value="0x04"/>
+                <value caption="256 bytes buffer size" name="256" value="0x05"/>
+                <value caption="512 bytes buffer size" name="512" value="0x06"/>
+                <value caption="1023 bytes buffer size" name="1023" value="0x07"/>
+            </value-group>
+            <interrupt-group name="USB">
+                <interrupt index="0" name="BUSEVENT"
+                           caption="SOF, suspend, resume, reset bus event interrupts, crc, underflow, overflow and stall error interrupts"/>
+                <interrupt index="1" name="TRNCOMPL" caption="Transaction complete interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x04" name="HRPLUS"/>
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3610" version="XMEGAC" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="USB Calibration Byte 0" name="USBCAL0" offset="0x1A" size="1"/>
+                <register caption="USB Calibration Byte 1" name="USBCAL1" offset="0x1B" size="1"/>
+                <register caption="USB RCOSC Calibration Value B" name="USBRCOSC" offset="0x1C" size="1"/>
+                <register caption="USB RCOSC Calibration Value A" name="USBRCOSCA" offset="0x1D" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml
new file mode 100644
index 00000000..972fa1fc
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64D3.xml
@@ -0,0 +1,2614 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64D3-AU" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-MH" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-AN" package="TQFP64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D3-MN" package="QFN64" pinout="QFP_QFN_64" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64D3" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x0000" size="0x11000" endianness="little">
+                    <memory-segment start="0x0000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x0000" size="0x0800">
+                    <memory-segment start="0x0000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0034">
+                    <memory-segment start="0x0000" size="0x0034" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAD">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="1" pad="PA6"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PB4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PB5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PB6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PB7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAD">
+                    <instance name="PORT_CFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                            <signal function="PORTB" group="P" index="4" pad="PB4"/>
+                            <signal function="PORTB" group="P" index="5" pad="PB5"/>
+                            <signal function="PORTB" group="P" index="6" pad="PB6"/>
+                            <signal function="PORTB" group="P" index="7" pad="PB7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                            <signal function="PORTE" group="P" index="4" pad="PE4"/>
+                            <signal function="PORTE" group="P" index="5" pad="PE5"/>
+                            <signal function="PORTE" group="P" index="6" pad="PE6"/>
+                            <signal function="PORTE" group="P" index="7" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTF">
+                        <register-group address-space="data" offset="0x06A0" name-in-module="PORT" name="PORTF"/>
+                        <signals>
+                            <signal function="PORTF" group="P" index="0" pad="PF0"/>
+                            <signal function="PORTF" group="P" index="1" pad="PF1"/>
+                            <signal function="PORTF" group="P" index="2" pad="PF2"/>
+                            <signal function="PORTF" group="P" index="3" pad="PF3"/>
+                            <signal function="PORTF" group="P" index="4" pad="PF4"/>
+                            <signal function="PORTF" group="P" index="5" pad="PF5"/>
+                            <signal function="PORTF" group="P" index="6" pad="PF6"/>
+                            <signal function="PORTF" group="P" index="7" pad="PF7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TC0" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TC0" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TC0" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TC0" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TC0_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TC0_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TC0_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TC0_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TC1" group="OC1A" pad="PC4"/>
+                            <signal function="TC1" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PD0"/>
+                            <signal function="TC0" group="OC0B" pad="PD1"/>
+                            <signal function="TC0" group="OC0C" pad="PD2"/>
+                            <signal function="TC0" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PE0"/>
+                            <signal function="TC0" group="OC0B" pad="PE1"/>
+                            <signal function="TC0" group="OC0C" pad="PE2"/>
+                            <signal function="TC0" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="AWEXE">
+                        <register-group address-space="data" offset="0xA80" name-in-module="AWEX" name="AWEXE"/>
+                    </instance>
+                    <instance name="TCF0">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC0" name="TCF0"/>
+                        <signals>
+                            <signal function="TC0" group="OC0A" pad="PF0"/>
+                            <signal function="TC0" group="OC0B" pad="PF1"/>
+                            <signal function="TC0" group="OC0C" pad="PF2"/>
+                            <signal function="TC0" group="OC0D" pad="PF3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE2">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC2" name="TCE2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PE0"/>
+                            <signal function="TC2" group="LOC2B" pad="PE1"/>
+                            <signal function="TC2" group="LOC2C" pad="PE2"/>
+                            <signal function="TC2" group="LOC2D" pad="PE3"/>
+                            <signal function="TC2" group="HOC2A" pad="PE4"/>
+                            <signal function="TC2" group="HOC2B" pad="PE5"/>
+                            <signal function="TC2" group="HOC2C" pad="PE6"/>
+                            <signal function="TC2" group="HOC2D" pad="PE7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCF2">
+                        <register-group address-space="data" offset="0xB00" name-in-module="TC2" name="TCF2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PF0"/>
+                            <signal function="TC2" group="LOC2B" pad="PF1"/>
+                            <signal function="TC2" group="LOC2C" pad="PF2"/>
+                            <signal function="TC2" group="LOC2D" pad="PF3"/>
+                            <signal function="TC2" group="HOC2A" pad="PF4"/>
+                            <signal function="TC2" group="HOC2B" pad="PF5"/>
+                            <signal function="TC2" group="HOC2C" pad="PF6"/>
+                            <signal function="TC2" group="HOC2D" pad="PF7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTE0">
+                        <register-group address-space="data" offset="0xAA0" name-in-module="USART" name="USARTE0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PE1"/>
+                            <signal function="USART" group="RXD" pad="PE2"/>
+                            <signal function="USART" group="TXD" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPIE">
+                        <register-group address-space="data" offset="0xAC0" name-in-module="SPI" name="SPIE"/>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="47" module-instance="TCE2" name-in-module="TC2"/>
+                <interrupt-group index="58" module-instance="USARTE0" name-in-module="USART"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+                <interrupt-group index="104" module-instance="PORTF" name-in-module="PORT"/>
+                <interrupt-group index="108" module-instance="TCF0" name-in-module="TC0"/>
+                <interrupt-group index="108" module-instance="TCF2" name-in-module="TC2"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="JTAGID" value="0x0964A03F"/>
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x4A"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="External Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03"
+                          size="1">
+                    <bitfield caption="Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control REgister" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32MHz Calibration Reference" mask="0x02" name="RC32MCREF"/>
+                    <bitfield caption="2MHz Calibration Reference" mask="0x01" name="RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="External Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration bits [6:0]" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration bits [12:7]" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="JTAG User ID" name="JTAGUID" offset="0x04" size="1"/>
+                <register caption="MCU Control" name="MCUCR" offset="0x06" size="1">
+                    <bitfield caption="JTAG Disable" mask="0x01" name="JTAGD"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C E0 Lock" mask="0x04" name="AWEXELOCK"/>
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAD" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="63">
+                <register caption="RCOSC 2MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ADCB Calibration Byte 0" name="ADCBCAL0" offset="0x24" size="1"/>
+                <register caption="ADCB Calibration Byte 1" name="ADCBCAL1" offset="0x25" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase and Write Flash page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Generate Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption="Generate Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Generate Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="32.768kHz Timer Oscillator Pin Selection" name="TOSCSEL">
+                <value caption="TOSC1/2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1/2 shared with XTAL" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="INSAMPLEDMODE" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINOUSLY" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="High-speed Mode" mask="0x08" name="HSMODE"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan(Legacy name)" mask="0x0F" name="SCANNUM"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="COUNT"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="SDA_HOLD_TIME"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="SDA hold time" name="SDA_HOLD_TIME">
+                <value caption="SDA hold time off" value="0x00" name="OFF"/>
+                <value caption="Typical 50ns hold time" value="0x01" name="50NS"/>
+                <value caption="Typical 300ns hold time" value="0x2" name="300NS"/>
+                <value caption="Typical 400ns hold time" value="0x03" name="400NS"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" caption="Port Configuration" version="XMEGAD">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="5">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP1MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP0MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP3MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP2MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                </register>
+            </register-group>
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register (available for PORTC to PORTF only)" name="REMAP" offset="0x0E"
+                          size="1">
+                    <bitfield caption="SPI Remap" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0 Remap" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port 0 Mapping" name="PORTCFG_VP0MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 1 Mapping" name="PORTCFG_VP1MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 2 Mapping" name="PORTCFG_VP2MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port 3 Mapping" name="PORTCFG_VP3MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="USART" id="I6090" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                    <bitfield caption="SPI Master Mode, Data Order" mask="0x04" name="UDORD"/>
+                    <bitfield caption="SPI Master Mode, Clock Phase" mask="0x02" name="UCPHA"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x0" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_64">
+            <pin pad="PA3" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA5" position="3"/>
+            <pin pad="PA6" position="4"/>
+            <pin pad="PA7" position="5"/>
+            <pin pad="PB0" position="6"/>
+            <pin pad="PB1" position="7"/>
+            <pin pad="PB2" position="8"/>
+            <pin pad="PB3" position="9"/>
+            <pin pad="PB4" position="10"/>
+            <pin pad="PB5" position="11"/>
+            <pin pad="PB6" position="12"/>
+            <pin pad="PB7" position="13"/>
+            <pin pad="GND" position="14"/>
+            <pin pad="VCC" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="PC1" position="17"/>
+            <pin pad="PC2" position="18"/>
+            <pin pad="PC3" position="19"/>
+            <pin pad="PC4" position="20"/>
+            <pin pad="PC5" position="21"/>
+            <pin pad="PC6" position="22"/>
+            <pin pad="PC7" position="23"/>
+            <pin pad="GND" position="24"/>
+            <pin pad="VCC" position="25"/>
+            <pin pad="PD0" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD2" position="28"/>
+            <pin pad="PD3" position="29"/>
+            <pin pad="PD4" position="30"/>
+            <pin pad="PD5" position="31"/>
+            <pin pad="PD6" position="32"/>
+            <pin pad="PD7" position="33"/>
+            <pin pad="GND" position="34"/>
+            <pin pad="VCC" position="35"/>
+            <pin pad="PE0" position="36"/>
+            <pin pad="PE1" position="37"/>
+            <pin pad="PE2" position="38"/>
+            <pin pad="PE3" position="39"/>
+            <pin pad="PE4" position="40"/>
+            <pin pad="PE5" position="41"/>
+            <pin pad="PE6" position="42"/>
+            <pin pad="PE7" position="43"/>
+            <pin pad="GND" position="44"/>
+            <pin pad="VCC" position="45"/>
+            <pin pad="PF0" position="46"/>
+            <pin pad="PF1" position="47"/>
+            <pin pad="PF2" position="48"/>
+            <pin pad="PF3" position="49"/>
+            <pin pad="PF4" position="50"/>
+            <pin pad="PF5" position="51"/>
+            <pin pad="GND" position="52"/>
+            <pin pad="VCC" position="53"/>
+            <pin pad="PF6" position="54"/>
+            <pin pad="PF7" position="55"/>
+            <pin pad="PDI" position="56"/>
+            <pin pad="RESET" position="57"/>
+            <pin pad="PR0" position="58"/>
+            <pin pad="PR1" position="59"/>
+            <pin pad="GND" position="60"/>
+            <pin pad="AVCC" position="61"/>
+            <pin pad="PA0" position="62"/>
+            <pin pad="PA1" position="63"/>
+            <pin pad="PA2" position="64"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml
new file mode 100644
index 00000000..0459c1df
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA64D4.xml
@@ -0,0 +1,2607 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega64D4-AU" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-MH" package="VQFN44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-CU" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-AN" package="TQFP44" pinout="QFN_QFP_44" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega64D4-M7" package="VFBGA49" pinout="BGA_49" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega64D4" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x11000" endianness="little">
+                    <memory-segment start="0x00000" size="0x10000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x0F000" size="0x1000" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="256"/>
+                    <memory-segment start="0x10000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="256"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x3000" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0800" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x1000" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0800">
+                    <memory-segment start="0x00000" size="0x0800" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0006">
+                    <memory-segment start="0x0000" size="0x0006" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0100">
+                    <memory-segment start="0x0000" size="0x0100" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="256"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0040">
+                    <memory-segment start="0x0000" size="0x0040" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="256"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAAU">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3X"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAD">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAD">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAD">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                            <signal function="TOSC_ALT" group="TOSC2" pad="PE2"/>
+                            <signal function="TOSC_ALT" group="TOSC1" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                    <instance name="DFLLRC2M">
+                        <register-group address-space="data" offset="0x0068" name-in-module="DFLL" name="DFLLRC2M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAD">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAD">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUT" group="CLKOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="CLKOUT_ALT" group="CLKOUT" pad="PC4"/>
+                            <signal field="EVOUT" function="EVOUT" group="EVOUT" pad="PC7"/>
+                            <signal field="CLKEVPIN" function="EVOUT_ALT" group="EVOUT" pad="PC4"/>
+                            <signal function="RTCOUTC" group="RTCOUT" pad="PC6"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAD">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAD">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I6076" version="XMEGAAU">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAD4">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PB0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PB1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PB2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PB3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFB" index="0" pad="PB0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAD">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal function="ACOUT" group="ACOUT" index="0" pad="PA7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAAU">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                        </signals>
+                    </instance>
+                    <instance name="TWIE">
+                        <register-group address-space="data" offset="0x4A0" name-in-module="TWI" name="TWIE"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PE0"/>
+                            <signal function="TWI" group="SCL" pad="PE1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAAU">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTB">
+                        <register-group address-space="data" offset="0x0620" name-in-module="PORT" name="PORTB"/>
+                        <signals>
+                            <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                            <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                            <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                            <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTE">
+                        <register-group address-space="data" offset="0x0680" name-in-module="PORT" name="PORTE"/>
+                        <signals>
+                            <signal function="PORTE" group="P" index="0" pad="PE0"/>
+                            <signal function="PORTE" group="P" index="1" pad="PE1"/>
+                            <signal function="PORTE" group="P" index="2" pad="PE2"/>
+                            <signal function="PORTE" group="P" index="3" pad="PE3"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I6090" version="XMEGAD">
+                    <instance name="TCC0">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC0" name="TCC0"/>
+                        <signals>
+                            <signal field="TC0A" function="TCC" group="OC0A" pad="PC0"/>
+                            <signal field="TC0B" function="TCC" group="OC0B" pad="PC1"/>
+                            <signal field="TC0C" function="TCC" group="OC0C" pad="PC2"/>
+                            <signal field="TC0D" function="TCC" group="OC0D" pad="PC3"/>
+                            <signal field="TC0A" function="TCC_ALT" group="OC0A" pad="PC4"/>
+                            <signal field="TC0B" function="TCC_ALT" group="OC0B" pad="PC5"/>
+                            <signal field="TC0C" function="TCC_ALT" group="OC0C" pad="PC6"/>
+                            <signal field="TC0D" function="TCC_ALT" group="OC0D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC1">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC1" name="TCC1"/>
+                        <signals>
+                            <signal function="TCC" group="OC1A" pad="PC4"/>
+                            <signal function="TCC" group="OC1B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD0">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC0" name="TCD0"/>
+                        <signals>
+                            <signal function="TCC" group="OC0A" pad="PD0"/>
+                            <signal function="TCC" group="OC0B" pad="PD1"/>
+                            <signal function="TCC" group="OC0C" pad="PD2"/>
+                            <signal function="TCC" group="OC0D" pad="PD3"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCE0">
+                        <register-group address-space="data" offset="0xA00" name-in-module="TC0" name="TCE0"/>
+                        <signals>
+                            <signal function="TCE" group="OC0A" pad="PE0"/>
+                            <signal function="TCE" group="OC0B" pad="PE1"/>
+                            <signal function="TCE" group="OC0C" pad="PE2"/>
+                            <signal function="TCE" group="OC0D" pad="PE3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC2" id="I6090" version="XMEGAD">
+                    <instance name="TCC2">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC2" name="TCC2"/>
+                        <signals>
+                            <signal function="TCC2" group="LOC2A" pad="PC0"/>
+                            <signal function="TCC2" group="LOC2B" pad="PC1"/>
+                            <signal function="TCC2" group="LOC2C" pad="PC2"/>
+                            <signal function="TCC2" group="LOC2D" pad="PC3"/>
+                            <signal function="TCC2" group="HOC2A" pad="PC4"/>
+                            <signal function="TCC2" group="HOC2B" pad="PC5"/>
+                            <signal function="TCC2" group="HOC2C" pad="PC6"/>
+                            <signal function="TCC2" group="HOC2D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD2">
+                        <register-group address-space="data" offset="0x900" name-in-module="TC2" name="TCD2"/>
+                        <signals>
+                            <signal function="TC2" group="LOC2A" pad="PD0"/>
+                            <signal function="TC2" group="LOC2B" pad="PD1"/>
+                            <signal function="TC2" group="LOC2C" pad="PD2"/>
+                            <signal function="TC2" group="LOC2D" pad="PD3"/>
+                            <signal function="TC2" group="HOC2A" pad="PD4"/>
+                            <signal function="TC2" group="HOC2B" pad="PD5"/>
+                            <signal function="TC2" group="HOC2C" pad="PD6"/>
+                            <signal function="TC2" group="HOC2D" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AWEX" id="I6090" version="XMEGAAU">
+                    <instance name="AWEXC">
+                        <register-group address-space="data" offset="0x880" name-in-module="AWEX" name="AWEXC"/>
+                        <signals>
+                            <signal function="AWEX" group="OC0ALS" pad="PC0"/>
+                            <signal function="AWEX" group="OC0AHS" pad="PC1"/>
+                            <signal function="AWEX" group="OC0BLS" pad="PC2"/>
+                            <signal function="AWEX" group="OC0BHS" pad="PC3"/>
+                            <signal function="AWEX" group="OC0CLS" pad="PC4"/>
+                            <signal function="AWEX" group="OC0CHS" pad="PC5"/>
+                            <signal function="AWEX" group="OC0DLS" pad="PC6"/>
+                            <signal function="AWEX" group="OC0DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I6090" version="XMEGAAU">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x890" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I6090" version="XMEGAAU">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9A0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal function="USART" group="XCK" pad="PD1"/>
+                            <signal function="USART" group="RXD" pad="PD2"/>
+                            <signal function="USART" group="TXD" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAAU">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal field="SPI" function="SPI" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI" group="MOSI" pad="PC5"/>
+                            <signal field="SPI" function="SPI" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI" group="SCK" pad="PC7"/>
+                            <signal field="SPI" function="SPI_ALT" group="SS" pad="PC4"/>
+                            <signal field="SPI" function="SPI_ALT" group="SCK" pad="PC5"/>
+                            <signal field="SPI" function="SPI_ALT" group="MISO" pad="PC6"/>
+                            <signal field="SPI" function="SPI_ALT" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="SPID">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="SPI" name="SPID"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PD4"/>
+                            <signal function="SPI" group="MOSI" pad="PD5"/>
+                            <signal function="SPI" group="MISO" pad="PD6"/>
+                            <signal function="SPI" group="SCK" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAD">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I6570" version="XMEGAD">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                </module>
+                <module name="LOCKBIT" id="I6570" version="XMEGAD">
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I6570" version="XMEGAD">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="4" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="12" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="14" module-instance="TCC0" name-in-module="TC0"/>
+                <interrupt-group index="14" module-instance="TCC2" name-in-module="TC2"/>
+                <interrupt-group index="20" module-instance="TCC1" name-in-module="TC1"/>
+                <interrupt-group index="24" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="25" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="32" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="34" module-instance="PORTB" name-in-module="PORT"/>
+                <interrupt-group index="43" module-instance="PORTE" name-in-module="PORT"/>
+                <interrupt-group index="45" module-instance="TWIE" name-in-module="TWI"/>
+                <interrupt-group index="47" module-instance="TCE0" name-in-module="TC0"/>
+                <interrupt-group index="64" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="66" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="68" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="71" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="77" module-instance="TCD0" name-in-module="TC0"/>
+                <interrupt-group index="77" module-instance="TCD2" name-in-module="TC2"/>
+                <interrupt-group index="87" module-instance="SPID" name-in-module="SPI"/>
+                <interrupt-group index="88" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x96"/>
+                    <property name="SIGNATURE2" value="0x47"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x0080F000"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00810000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAAU" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAD" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from 32.768 kHz internal oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from 32.768 kHz internal oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAD" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C HIRES" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter1" mask="0x02" name="TC1"/>
+                    <bitfield caption="Port C Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port D Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port E" name="PRPE" offset="0x05" size="1">
+                    <bitfield caption="Port E Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port E USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port E Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+                <register caption="Power Reduction Port F" name="PRPF" offset="0x06" size="1">
+                    <bitfield caption="Port F USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port F Timer/Counter0" mask="0x01" name="TC0"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAD" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="7">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x0F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                    <bitfield caption="2 MHz DFLL Calibration Reference" mask="0x01" name="RC2MCREF"
+                              values="OSC_RC2MCREF"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="2 MHz DFLL Calibration Reference" name="OSC_RC2MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAD" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="AWEX Lock" name="AWEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="AWeX on T/C C0 Lock" mask="0x01" name="AWEXCLOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAD" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="7">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Virtual Port Control Register A" name="VPCTRLA" offset="0x02" size="1">
+                    <bitfield caption="Virtual Port 1 Mapping" mask="0xF0" name="VP1MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 0 Mapping" mask="0x0F" name="VP0MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Virtual Port Control Register B" name="VPCTRLB" offset="0x03" size="1">
+                    <bitfield caption="Virtual Port 3 Mapping" mask="0xF0" name="VP3MAP" values="PORTCFG_VP13MAP"/>
+                    <bitfield caption="Virtual Port 2 Mapping" mask="0x0F" name="VP2MAP" values="PORTCFG_VP02MAP"/>
+                </register>
+                <register caption="Clock and Event Out Register" name="CLKEVOUT" offset="0x04" size="1">
+                    <bitfield caption="Peripheral Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                    <bitfield caption="Peripheral Clock Output Select" mask="0x0C" name="CLKOUTSEL"
+                              values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Event Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="RTC Clock Output" mask="0x40" name="RTCOUT"/>
+                    <bitfield caption="Peripheral Clock and Event Output pin Select" mask="0x80" name="CLKEVPIN"/>
+                </register>
+                <register caption="Event Output Select" name="EVOUTSEL" offset="0x06" size="1">
+                    <bitfield caption="Event Output Select" mask="0x07" name="EVOUTSEL" values="PORTCFG_EVOUTSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP02MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="Virtual Port Mapping" name="PORTCFG_VP13MAP">
+                <value caption="Mapped To PORTA" name="PORTA" value="0x00"/>
+                <value caption="Mapped To PORTB" name="PORTB" value="0x01"/>
+                <value caption="Mapped To PORTC" name="PORTC" value="0x02"/>
+                <value caption="Mapped To PORTD" name="PORTD" value="0x03"/>
+                <value caption="Mapped To PORTE" name="PORTE" value="0x04"/>
+                <value caption="Mapped To PORTF" name="PORTF" value="0x05"/>
+                <value caption="Mapped To PORTG" name="PORTG" value="0x06"/>
+                <value caption="Mapped To PORTH" name="PORTH" value="0x07"/>
+                <value caption="Mapped To PORTJ" name="PORTJ" value="0x08"/>
+                <value caption="Mapped To PORTK" name="PORTK" value="0x09"/>
+                <value caption="Mapped To PORTL" name="PORTL" value="0x0A"/>
+                <value caption="Mapped To PORTM" name="PORTM" value="0x0B"/>
+                <value caption="Mapped To PORTN" name="PORTN" value="0x0C"/>
+                <value caption="Mapped To PORTP" name="PORTP" value="0x0D"/>
+                <value caption="Mapped To PORTQ" name="PORTQ" value="0x0E"/>
+                <value caption="Mapped To PORTR" name="PORTR" value="0x0F"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel 7 Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel 7 Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel 7 Output on Port E pin 7" name="PE7" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAD" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+            </value-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAD" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="18">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+            </register-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port B, Pin0" name="PORTB_PIN0" value="0x58"/>
+                <value caption="Port B, Pin1" name="PORTB_PIN1" value="0x59"/>
+                <value caption="Port B, Pin2" name="PORTB_PIN2" value="0x5A"/>
+                <value caption="Port B, Pin3" name="PORTB_PIN3" value="0x5B"/>
+                <value caption="Port B, Pin4" name="PORTB_PIN4" value="0x5C"/>
+                <value caption="Port B, Pin5" name="PORTB_PIN5" value="0x5D"/>
+                <value caption="Port B, Pin6" name="PORTB_PIN6" value="0x5E"/>
+                <value caption="Port B, Pin7" name="PORTB_PIN7" value="0x5F"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Port E, Pin0" name="PORTE_PIN0" value="0x70"/>
+                <value caption="Port E, Pin1" name="PORTE_PIN1" value="0x71"/>
+                <value caption="Port E, Pin2" name="PORTE_PIN2" value="0x72"/>
+                <value caption="Port E, Pin3" name="PORTE_PIN3" value="0x73"/>
+                <value caption="Port E, Pin4" name="PORTE_PIN4" value="0x74"/>
+                <value caption="Port E, Pin5" name="PORTE_PIN5" value="0x75"/>
+                <value caption="Port E, Pin6" name="PORTE_PIN6" value="0x76"/>
+                <value caption="Port E, Pin7" name="PORTE_PIN7" value="0x77"/>
+                <value caption="Port F, Pin0" name="PORTF_PIN0" value="0x78"/>
+                <value caption="Port F, Pin1" name="PORTF_PIN1" value="0x79"/>
+                <value caption="Port F, Pin2" name="PORTF_PIN2" value="0x7A"/>
+                <value caption="Port F, Pin3" name="PORTF_PIN3" value="0x7B"/>
+                <value caption="Port F, Pin4" name="PORTF_PIN4" value="0x7C"/>
+                <value caption="Port F, Pin5" name="PORTF_PIN5" value="0x7D"/>
+                <value caption="Port F, Pin6" name="PORTF_PIN6" value="0x7E"/>
+                <value caption="Port F, Pin7" name="PORTF_PIN7" value="0x7F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="Timer/Counter C0 Overflow" name="TCC0_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C0 Error" name="TCC0_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C0 Compare or Capture A" name="TCC0_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C0 Compare or Capture B" name="TCC0_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C0 Compare or Capture C" name="TCC0_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C0 Compare or Capture D" name="TCC0_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C1 Overflow" name="TCC1_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C1 Error" name="TCC1_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C1 Compare or Capture A" name="TCC1_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C1 Compare or Capture B" name="TCC1_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D0 Overflow" name="TCD0_OVF" value="0xD0"/>
+                <value caption="Timer/Counter D0 Error" name="TCD0_ERR" value="0xD1"/>
+                <value caption="Timer/Counter D0 Compare or Capture A" name="TCD0_CCA" value="0xD4"/>
+                <value caption="Timer/Counter D0 Compare or Capture B" name="TCD0_CCB" value="0xD5"/>
+                <value caption="Timer/Counter D0 Compare or Capture C" name="TCD0_CCC" value="0xD6"/>
+                <value caption="Timer/Counter D0 Compare or Capture D" name="TCD0_CCD" value="0xD7"/>
+                <value caption="Timer/Counter E0 Overflow" name="TCE0_OVF" value="0xE0"/>
+                <value caption="Timer/Counter E0 Error" name="TCE0_ERR" value="0xE1"/>
+                <value caption="Timer/Counter E0 Compare or Capture A" name="TCE0_CCA" value="0xE4"/>
+                <value caption="Timer/Counter E0 Compare or Capture B" name="TCE0_CCB" value="0xE5"/>
+                <value caption="Timer/Counter E0 Compare or Capture C" name="TCE0_CCC" value="0xE6"/>
+                <value caption="Timer/Counter E0 Compare or Capture D" name="TCE0_CCD" value="0xE7"/>
+                <value caption="Timer/Counter F0 Overflow" name="TCF0_OVF" value="0xF0"/>
+                <value caption="Timer/Counter F0 Error" name="TCF0_ERR" value="0xF1"/>
+                <value caption="Timer/Counter F0 Compare or Capture A" name="TCF0_CCA" value="0xF4"/>
+                <value caption="Timer/Counter F0 Compare or Capture B" name="TCF0_CCB" value="0xF5"/>
+                <value caption="Timer/Counter F0 Compare or Capture C" name="TCF0_CCC" value="0xF6"/>
+                <value caption="Timer/Counter F0 Compare or Capture D" name="TCF0_CCD" value="0xF7"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I6076" version="XMEGAAU" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Mapping Enable" mask="0x08" name="EEMAPEN"/>
+                    <bitfield caption="Flash Power Reduction Enable" mask="0x04" name="FPRM"/>
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read EEPROM" name="READ_EEPROM" value="0x06"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Load EEPROM page buffer" name="LOAD_EEPROM_BUFFER" value="0x33"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 LSB pins" mask="0x07"
+                              name="MUXNEGL" values="ADC_CH_MUXNEGL"/>
+                    <bitfield caption="MUX selection on Negative ADC Input Gain on 4 MSB pins" mask="0x07"
+                              name="MUXNEGH" values="ADC_CH_MUXNEGH"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="CHIF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX setting offset" mask="0xF0" name="OFFSET"/>
+                    <bitfield caption="Number of Channels included in scan" mask="0x0F" name="SCANNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="40">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel 0 Start Conversion" mask="0x04" name="CH0START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x18" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling Time Control" name="SAMPVAL" mask="0x3F"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="2"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 scaled VCC" name="SCALEDVCC" value="0x02"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 LSB pins" name="ADC_CH_MUXNEGL">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="PAD ground" name="GND" value="0x05"/>
+                <value caption="Internal ground" name="INTGND" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection when gain on 4 MSB pins" name="ADC_CH_MUXNEGH">
+                <value caption="Input pin 4" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7" name="PIN7" value="0x03"/>
+                <value caption="Internal ground" name="INTGND" value="0x04"/>
+                <value caption="PAD ground" name="GND" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, no gain" name="DIFF" value="0x02"/>
+                <value caption="Differential input, with gain" name="DIFFWGAIN" value="0x03"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT B" name="AREFB" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel 0" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Interupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="Interrupt 0"/>
+            </interrupt-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAD" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="8">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" caption="Real-Time Counter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAAU" caption="Two-Wire Interface">
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baurd Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAAU" caption="I/O Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt 1 Level" mask="0x0C" name="INT1LVL" values="PORT_INT1LVL"/>
+                    <bitfield caption="Port Interrupt 0 Level" mask="0x03" name="INT0LVL" values="PORT_INT0LVL"/>
+                </register>
+                <register caption="Port Interrupt 0 Mask" name="INT0MASK" offset="0x0A" size="1"/>
+                <register caption="Port Interrupt 1 Mask" name="INT1MASK" offset="0x0B" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Port Interrupt 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Port Interrupt 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="I/O Port Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="SPI" mask="0x20" name="SPI"/>
+                    <bitfield caption="USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare D" mask="0x08" name="TC0D"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare C" mask="0x04" name="TC0C"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare B" mask="0x02" name="TC0B"/>
+                    <bitfield caption="Timer/Counter 0 Output Compare A" mask="0x01" name="TC0A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Slew Rate Enable" mask="0x80" name="SRLEN"/>
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt 0 Level" name="PORT_INT0LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Port Interrupt 1 Level" name="PORT_INT1LVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT0" caption="External Interrupt 0"/>
+                <interrupt index="1" name="INT1" caption="External Interrupt 1"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 0" name="TC0" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture D Enable" mask="0x80" name="CCDEN"/>
+                    <bitfield caption="Compare or Capture C Enable" mask="0x40" name="CCCEN"/>
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare D Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Compare C Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC_CCDINTLVL"/>
+                    <bitfield caption="Compare or Capture C Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC_CCCINTLVL"/>
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture D Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Compare or Capture C Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture D Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Compare or Capture C Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 1" name="TC1" size="60">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Compare or Capture B Enable" mask="0x20" name="CCBEN"/>
+                    <bitfield caption="Compare or Capture A Enable" mask="0x10" name="CCAEN"/>
+                    <bitfield caption="Waveform generation mode" mask="0x07" name="WGMODE" values="TC_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Compare B Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Compare A Output Value" mask="0x01" name="CMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x01" name="BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Error Interrupt Level" mask="0x0C" name="ERRINTLVL" values="TC_ERRINTLVL"/>
+                    <bitfield caption="Overflow interrupt level" mask="0x03" name="OVFINTLVL" values="TC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC_CCBINTLVL"/>
+                    <bitfield caption="Compare or Capture A Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC_CCAINTLVL"/>
+                </register>
+                <register caption="Control Register F Clear" name="CTRLFCLR" offset="0x08" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register F Set" name="CTRLFSET" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x0A" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x0B" size="1">
+                    <bitfield caption="Compare or Capture B Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Compare or Capture A Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Compare or Capture B Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Compare or Capture A Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Single Slope" name="SS" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Update on TOP" name="DS_T" value="0x05"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on both TOP and BOTTOM" name="DS_TB" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DS_B" value="0x07"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters (TC2)" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Input Capture" name="CAPT" value="0x01"/>
+                <value caption="Externally Controlled Up/Down Count" name="UPDOWN" value="0x02"/>
+                <value caption="Quadrature Decode" name="QDEC" value="0x03"/>
+                <value caption="Restart" name="RESTART" value="0x04"/>
+                <value caption="Frequency Capture" name="FRQ" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PW" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture D Interrupt Level" name="TC_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture C Interrupt Level" name="TC_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture B Interrupt Level" name="TC_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture A Interrupt Level" name="TC_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC0">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Compare or Capture C Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Compare or Capture D Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC1">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Compare or Capture A Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Compare or Capture B Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC2" id="I6090" version="XMEGAD" caption="16-bit Timer/Counter type 2">
+            <register-group caption="16-bit Timer/Counter type 2" name="TC2" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="TC2_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="High Byte Compare D Enable" mask="0x80" name="HCMPDEN"/>
+                    <bitfield caption="High Byte Compare C Enable" mask="0x40" name="HCMPCEN"/>
+                    <bitfield caption="High Byte Compare B Enable" mask="0x20" name="HCMPBEN"/>
+                    <bitfield caption="High Byte Compare A Enable" mask="0x10" name="HCMPAEN"/>
+                    <bitfield caption="Low Byte Compare D Enable" mask="0x08" name="LCMPDEN"/>
+                    <bitfield caption="Low Byte Compare C Enable" mask="0x04" name="LCMPCEN"/>
+                    <bitfield caption="Low Byte Compare B Enable" mask="0x02" name="LCMPBEN"/>
+                    <bitfield caption="Low Byte Compare A Enable" mask="0x01" name="LCMPAEN"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="High Byte Compare D Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Byte Compare C Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Byte Compare B Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Byte Compare A Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Byte Compare D Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Byte Compare C Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Byte Compare B Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Byte Compare A Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Byte Mode" mask="0x03" name="BYTEM" values="TC2_BYTEM"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="High Byte Underflow Interrupt Level" mask="0x0C" name="HUNFINTLVL"
+                              values="TC2_HUNFINTLVL"/>
+                    <bitfield caption="Low Byte Underflow interrupt level" mask="0x03" name="LUNFINTLVL"
+                              values="TC2_LUNFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Level" mask="0xC0" name="LCMPDINTLVL"
+                              values="TC2_LCMPDINTLVL"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Level" mask="0x30" name="LCMPCINTLVL"
+                              values="TC2_LCMPCINTLVL"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Level" mask="0x0C" name="LCMPBINTLVL"
+                              values="TC2_LCMPBINTLVL"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Level" mask="0x03" name="LCMPAINTLVL"
+                              values="TC2_LCMPAINTLVL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x09" size="1">
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC2_CMD"/>
+                    <bitfield caption="Command Enable" mask="0x03" name="CMDEN" values="TC2_CMDEN"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Low Byte Compare D Interrupt Flag" mask="0x80" name="LCMPDIF"/>
+                    <bitfield caption="Low Byte Compare C Interrupt Flag" mask="0x40" name="LCMPCIF"/>
+                    <bitfield caption="Low Byte Compare B Interrupt Flag" mask="0x20" name="LCMPBIF"/>
+                    <bitfield caption="Low Byte Compare A Interrupt Flag" mask="0x10" name="LCMPAIF"/>
+                    <bitfield caption="High Byte Underflow Interrupt Flag" mask="0x02" name="HUNFIF"/>
+                    <bitfield caption="Low Byte Underflow Interrupt Flag" mask="0x01" name="LUNFIF"/>
+                </register>
+                <register caption="Low Byte Count" name="LCNT" offset="0x20" size="1"/>
+                <register caption="High Byte Count" name="HCNT" offset="0x21" size="1"/>
+                <register caption="Low Byte Period" name="LPER" offset="0x26" size="1"/>
+                <register caption="High Byte Period" name="HPER" offset="0x27" size="1"/>
+                <register caption="Low Byte Compare A" name="LCMPA" offset="0x28" size="1"/>
+                <register caption="High Byte Compare A" name="HCMPA" offset="0x29" size="1"/>
+                <register caption="Low Byte Compare B" name="LCMPB" offset="0x2A" size="1"/>
+                <register caption="High Byte Compare B" name="HCMPB" offset="0x2B" size="1"/>
+                <register caption="Low Byte Compare C" name="LCMPC" offset="0x2C" size="1"/>
+                <register caption="High Byte Compare C" name="HCMPC" offset="0x2D" size="1"/>
+                <register caption="Low Byte Compare D" name="LCMPD" offset="0x2E" size="1"/>
+                <register caption="High Byte Compare D" name="HCMPD" offset="0x2F" size="1"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC2_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC2_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter operating in byte mode only (TC2)" name="BYTEMODE" value="0x01"/>
+                <value caption="Timer/Counter split into two 8-bit Counters" name="SPLITMODE" value="0x02"/>
+            </value-group>
+            <value-group caption="High Byte Underflow Interrupt Level" name="TC2_HUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Underflow Interrupt Level" name="TC2_LUNFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare D Interrupt Level" name="TC2_LCMPDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare C Interrupt Level" name="TC2_LCMPCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare B Interrupt Level" name="TC2_LCMPBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Low Byte Compare A Interrupt Level" name="TC2_LCMPAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC2_CMDEN">
+                <value caption="Low Byte Timer/Counter" name="LOW" value="0x01"/>
+                <value caption="High Byte Timer/Counter" name="HIGH" value="0x02"/>
+                <value caption="Both Low Byte and High Byte Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC2">
+                <interrupt index="0" name="LUNF" caption="Low Byte Underflow Interrupt"/>
+                <interrupt index="1" name="HUNF" caption="High Byte Underflow Interrupt"/>
+                <interrupt index="2" name="LCMPA" caption="Low Byte Compare A Interrupt"/>
+                <interrupt index="3" name="LCMPB" caption="Low Byte Compare B Interrupt"/>
+                <interrupt index="4" name="LCMPC" caption="Low Byte Compare C Interrupt"/>
+                <interrupt index="5" name="LCMPD" caption="Low Byte Compare D Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="AWEX" id="I6090" version="XMEGAAU" caption="Timer/Counter Advanced Waveform Extension">
+            <register-group caption="Advanced Waveform Extension" name="AWEX" size="13">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Pattern Generation Mode" mask="0x20" name="PGM"/>
+                    <bitfield caption="Common Waveform Channel Mode" mask="0x10" name="CWCM"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel D Enable" mask="0x08" name="DTICCDEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel C Enable" mask="0x04" name="DTICCCEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel B Enable" mask="0x02" name="DTICCBEN"/>
+                    <bitfield caption="Dead Time Insertion Compare Channel A Enable" mask="0x01" name="DTICCAEN"/>
+                </register>
+                <register caption="Fault Detection Event Mask" name="FDEMASK" offset="0x02" size="1"/>
+                <register caption="Fault Detection Control Register" name="FDCTRL" offset="0x03" size="1">
+                    <bitfield caption="Fault Detect on Disable Break Disable" mask="0x10" name="FDDBD"/>
+                    <bitfield caption="Fault Detect Mode" mask="0x04" name="FDMODE"/>
+                    <bitfield caption="Fault Detect Action" mask="0x03" name="FDACT" values="AWEX_FDACT"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Fault Detect Flag" mask="0x04" name="FDF"/>
+                    <bitfield caption="Dead Time High Side Buffer Valid" mask="0x02" name="DTHSBUFV"/>
+                    <bitfield caption="Dead Time Low Side Buffer Valid" mask="0x01" name="DTLSBUFV"/>
+                </register>
+                <register caption="Dead Time Both Sides" name="DTBOTH" offset="0x06" size="1"/>
+                <register caption="Dead Time Both Sides Buffer" name="DTBOTHBUF" offset="0x07" size="1"/>
+                <register caption="Dead Time Low Side" name="DTLS" offset="0x08" size="1"/>
+                <register caption="Dead Time High Side" name="DTHS" offset="0x09" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="DTLSBUF" offset="0x0A" size="1"/>
+                <register caption="Dead Time High Side Buffer" name="DTHSBUF" offset="0x0B" size="1"/>
+                <register caption="Output Override Enable" name="OUTOVEN" offset="0x0C" size="1"/>
+            </register-group>
+            <value-group caption="Fault Detect Action" name="AWEX_FDACT">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Clear Output Enable Bits" name="CLEAROE" value="0x01"/>
+                <value caption="Clear I/O Port Direction Bits" name="CLEARDIR" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I6090" version="XMEGAAU" caption="Timer/Counter High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Enable" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Enable" name="HIRES_HREN">
+                <value caption="No Fault Protection" name="NONE" value="0x00"/>
+                <value caption="Enable High Resolution on Timer/Counter 0" name="TC0" value="0x01"/>
+                <value caption="Enable High Resolution on Timer/Counter 1" name="TC1" value="0x02"/>
+                <value caption="Enable High Resolution both Timer/Counters" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I6090" version="XMEGAAU" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x03" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x05" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAAU" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface" name="SPI" size="4">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag" mask="0x80" name="IF"/>
+                    <bitfield caption="Write Collision" mask="0x40" name="WRCOL"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0" name="0" value="0x00"/>
+                <value caption="SPI Mode 1" name="1" value="0x01"/>
+                <value caption="SPI Mode 2" name="2" value="0x02"/>
+                <value caption="SPI Mode 3" name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="System Clock / 4" name="DIV4" value="0x00"/>
+                <value caption="System Clock / 16" name="DIV16" value="0x01"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x02"/>
+                <value caption="System Clock / 128" name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAD" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Fuses" name="NVM_FUSES" size="6">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="Timer Oscillator pin location" mask="0x20" name="TOSCSEL" values="TOSCSEL"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer Oscillator pin location" name="TOSCSEL">
+                <value caption="TOSC1 / TOSC2 on separate pins" name="ALTERNATE" value="0x00"/>
+                <value caption="TOSC1 / TOSC2 shared with XTAL1 / XTAL2" name="XTAL" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="LOCKBIT" id="I6570" version="XMEGAD" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I6570" version="XMEGAD" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 2 MHz Calibration Value B" name="RCOSC2M" offset="0x00" size="1"/>
+                <register caption="RCOSC 2 MHz Calibration Value A" name="RCOSC2MA" offset="0x01" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFN_QFP_44">
+            <pin pad="PA5" position="1"/>
+            <pin pad="PA6" position="2"/>
+            <pin pad="PA7" position="3"/>
+            <pin pad="PB0" position="4"/>
+            <pin pad="PB1" position="5"/>
+            <pin pad="PB2" position="6"/>
+            <pin pad="PB3" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="PC0" position="10"/>
+            <pin pad="PC1" position="11"/>
+            <pin pad="PC2" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC4" position="14"/>
+            <pin pad="PC5" position="15"/>
+            <pin pad="PC6" position="16"/>
+            <pin pad="PC7" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="VCC" position="19"/>
+            <pin pad="PD0" position="20"/>
+            <pin pad="PD1" position="21"/>
+            <pin pad="PD2" position="22"/>
+            <pin pad="PD3" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD5" position="25"/>
+            <pin pad="PD6" position="26"/>
+            <pin pad="PD7" position="27"/>
+            <pin pad="PE0" position="28"/>
+            <pin pad="PE1" position="29"/>
+            <pin pad="GND" position="30"/>
+            <pin pad="VCC" position="31"/>
+            <pin pad="PE2" position="32"/>
+            <pin pad="PE3" position="33"/>
+            <pin pad="PDI" position="34"/>
+            <pin pad="RESET" position="35"/>
+            <pin pad="PR0" position="36"/>
+            <pin pad="PR1" position="37"/>
+            <pin pad="GND" position="38"/>
+            <pin pad="AVCC" position="39"/>
+            <pin pad="PA0" position="40"/>
+            <pin pad="PA1" position="41"/>
+            <pin pad="PA2" position="42"/>
+            <pin pad="PA3" position="43"/>
+            <pin pad="PA4" position="44"/>
+        </pinout>
+        <pinout name="BGA_49">
+            <pin pad="PA3" position="A1"/>
+            <pin pad="AVCC" position="A2"/>
+            <pin pad="GND" position="A3"/>
+            <pin pad="PR1" position="A4"/>
+            <pin pad="PR0" position="A5"/>
+            <pin pad="PDI" position="A6"/>
+            <pin pad="PE3" position="A7"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA1" position="B2"/>
+            <pin pad="PA0" position="B3"/>
+            <pin pad="GND" position="B4"/>
+            <pin pad="RESET" position="B5"/>
+            <pin pad="PE2" position="B6"/>
+            <pin pad="VCC" position="B7"/>
+            <pin pad="PA5" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA6" position="C3"/>
+            <pin pad="PA7" position="C4"/>
+            <pin pad="GND" position="C5"/>
+            <pin pad="PE1" position="C6"/>
+            <pin pad="GND" position="C7"/>
+            <pin pad="PB1" position="D1"/>
+            <pin pad="PB2" position="D2"/>
+            <pin pad="PB3" position="D3"/>
+            <pin pad="PB0" position="D4"/>
+            <pin pad="GND" position="D5"/>
+            <pin pad="PD7" position="D6"/>
+            <pin pad="PE0" position="D7"/>
+            <pin pad="GND" position="E1"/>
+            <pin pad="GND" position="E2"/>
+            <pin pad="PC3" position="E3"/>
+            <pin pad="GND" position="E4"/>
+            <pin pad="PD4" position="E5"/>
+            <pin pad="PD5" position="E6"/>
+            <pin pad="PD6" position="E7"/>
+            <pin pad="VCC" position="F1"/>
+            <pin pad="PC0" position="F2"/>
+            <pin pad="PC4" position="F3"/>
+            <pin pad="PC6" position="F4"/>
+            <pin pad="PD0" position="F5"/>
+            <pin pad="PD1" position="F6"/>
+            <pin pad="PD3" position="F7"/>
+            <pin pad="PC1" position="G1"/>
+            <pin pad="PC2" position="G2"/>
+            <pin pad="PC5" position="G3"/>
+            <pin pad="PC7" position="G4"/>
+            <pin pad="GND" position="G5"/>
+            <pin pad="VCC" position="G6"/>
+            <pin pad="PD2" position="G7"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
new file mode 100644
index 00000000..ba0bb804
--- /dev/null
+++ b/src/Targets/Microchip/AVR/PartDescriptionFiles/AVR8/XMEGA/ATXMEGA8E5.xml
@@ -0,0 +1,3365 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<part-description-file>
+    <variants>
+        <variant ordercode="ATxmega8E5-AU" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-MU" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-M4U" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="85"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-AN" package="TQFP32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-MN" package="VQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+        <variant ordercode="ATxmega8E5-M4N" package="UQFN32" pinout="QFP_QFN_32" speedmax="32000000" tempmax="105"
+                 tempmin="-40" vccmax="3.6" vccmin="1.6"/>
+    </variants>
+    <devices>
+        <device name="ATxmega8E5" architecture="AVR8_XMEGA" family="AVR XMEGA">
+            <address-spaces>
+                <address-space name="prog" id="prog" start="0x00000" size="0x2800" endianness="little">
+                    <memory-segment start="0x00000" size="0x2000" type="flash" rw="RW" exec="1" name="APP_SECTION"
+                                    pagesize="128"/>
+                    <memory-segment start="0x01800" size="0x0800" type="flash" rw="RW" exec="1" name="APPTABLE_SECTION"
+                                    pagesize="128"/>
+                    <memory-segment start="0x02000" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION"
+                                    pagesize="128"/>
+                </address-space>
+                <address-space name="data" id="data" start="0x0000" size="0x2400" endianness="little">
+                    <memory-segment start="0x0000" size="0x1000" type="io" rw="RW" exec="0" name="IO"/>
+                    <memory-segment start="0x1000" size="0x0200" type="eeprom" rw="RW" exec="0" name="MAPPED_EEPROM"/>
+                    <memory-segment start="0x2000" size="0x0400" type="ram" rw="RW" exec="0" name="INTERNAL_SRAM"/>
+                </address-space>
+                <address-space name="eeprom" id="eeprom" start="0x00000" size="0x0200">
+                    <memory-segment start="0x00000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM"
+                                    pagesize="32"/>
+                </address-space>
+                <address-space name="signatures" id="signatures" start="0x0000" size="0x0003">
+                    <memory-segment start="0x0000" size="0x0003" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
+                </address-space>
+                <address-space name="fuses" id="fuses" start="0x0000" size="0x0007">
+                    <memory-segment start="0x0000" size="0x0007" type="fuses" rw="RW" exec="0" name="FUSES"/>
+                </address-space>
+                <address-space name="lockbits" id="lockbits" start="0x0000" size="0x0001">
+                    <memory-segment start="0x0000" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
+                </address-space>
+                <address-space name="user_signatures" id="user_signatures" start="0x0000" size="0x0080">
+                    <memory-segment start="0x0000" size="0x0080" type="user_signatures" rw="RW" exec="0"
+                                    name="USER_SIGNATURES" pagesize="128"/>
+                </address-space>
+                <address-space name="prod_signatures" id="prod_signatures" start="0x0000" size="0x0036">
+                    <memory-segment start="0x0000" size="0x0036" type="other" rw="R" exec="0" name="PROD_SIGNATURES"
+                                    pagesize="128"/>
+                </address-space>
+            </address-spaces>
+            <peripherals>
+                <module name="GPIO" id="I6085" version="XMEGAD">
+                    <instance name="GPIO">
+                        <register-group address-space="data" offset="0x0000" name-in-module="GPIO" name="GPIO"/>
+                    </instance>
+                </module>
+                <module name="VPORT" id="I6075" version="XMEGAE">
+                    <instance name="VPORT0">
+                        <register-group address-space="data" offset="0x0010" name-in-module="VPORT" name="VPORT0"/>
+                    </instance>
+                    <instance name="VPORT1">
+                        <register-group address-space="data" offset="0x0014" name-in-module="VPORT" name="VPORT1"/>
+                    </instance>
+                    <instance name="VPORT2">
+                        <register-group address-space="data" offset="0x0018" name-in-module="VPORT" name="VPORT2"/>
+                    </instance>
+                    <instance name="VPORT3">
+                        <register-group address-space="data" offset="0x001C" name-in-module="VPORT" name="VPORT3"/>
+                    </instance>
+                </module>
+                <module name="XOCD" id="I6043">
+                    <instance name="OCD">
+                        <register-group address-space="data" offset="0x002E" name-in-module="OCD" name="OCD"/>
+                    </instance>
+                </module>
+                <module name="CPU" id="I6000">
+                    <instance name="CPU">
+                        <register-group address-space="data" offset="0x0030" name-in-module="CPU" name="CPU"/>
+                        <parameters>
+                            <param name="CORE_VERSION" value="V3XJ"/>
+                        </parameters>
+                    </instance>
+                </module>
+                <module name="CLK" id="I6073" version="XMEGAE">
+                    <instance name="CLK">
+                        <register-group address-space="data" offset="0x0040" name-in-module="CLK" name="CLK"/>
+                        <signals>
+                            <signal function="EXTERNAL_CLOCK" group="EXTCLK" pad="PC4"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PR" id="I6073" version="XMEGAE">
+                    <instance name="PR">
+                        <register-group address-space="data" offset="0x0070" name-in-module="PR" name="PR"/>
+                    </instance>
+                </module>
+                <module name="SLEEP" id="I6081" version="XMEGAAU">
+                    <instance name="SLEEP">
+                        <register-group address-space="data" offset="0x0048" name-in-module="SLEEP" name="SLEEP"/>
+                    </instance>
+                </module>
+                <module name="OSC" id="I6079" version="XMEGAE">
+                    <instance name="OSC">
+                        <register-group address-space="data" offset="0x0050" name-in-module="OSC" name="OSC"/>
+                        <signals>
+                            <signal function="XTAL" group="XTAL2" pad="PR0"/>
+                            <signal function="XTAL" group="XTAL1" pad="PR1"/>
+                            <signal function="TOSC" group="TOSC2" pad="PR0"/>
+                            <signal function="TOSC" group="TOSC1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DFLL" id="I6055" version="XMEGAAU">
+                    <instance name="DFLLRC32M">
+                        <register-group address-space="data" offset="0x0060" name-in-module="DFLL" name="DFLLRC32M"/>
+                    </instance>
+                </module>
+                <module name="RST" id="I6083" version="XMEGAAU">
+                    <instance name="RST">
+                        <register-group address-space="data" offset="0x0078" name-in-module="RST" name="RST"/>
+                    </instance>
+                </module>
+                <module name="WDT" id="I6078">
+                    <instance name="WDT">
+                        <register-group address-space="data" offset="0x0080" name-in-module="WDT" name="WDT"/>
+                    </instance>
+                </module>
+                <module name="MCU" id="I6091" version="XMEGAE">
+                    <instance name="MCU">
+                        <register-group address-space="data" offset="0x0090" name-in-module="MCU" name="MCU"/>
+                    </instance>
+                </module>
+                <module name="PMIC" id="I6057">
+                    <instance name="PMIC">
+                        <register-group address-space="data" offset="0x00A0" name-in-module="PMIC" name="PMIC"/>
+                    </instance>
+                </module>
+                <module name="PORTCFG" id="I6075" version="XMEGAE">
+                    <instance name="PORTCFG">
+                        <register-group address-space="data" offset="0x00B0" name-in-module="PORTCFG" name="PORTCFG"/>
+                        <signals>
+                            <signal field="CLKOUT" function="CLKOUTD" group="CLKOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="CLKOUTD_ALT" group="CLKOUT" pad="PD4"/>
+                            <signal field="CLKOUT" function="CLKOUTR" group="CLKOUT" pad="PR0"/>
+                            <signal field="EVOUT" function="EVOUTD" group="EVOUT" pad="PD7"/>
+                            <signal field="CLKEVPIN" function="EVOUTD_ALT" group="EVOUT" pad="PD4"/>
+                            <signal field="EVOUT" function="EVOUTR" group="EVOUT" pad="PR0"/>
+                            <signal field="RTCOUT" function="RTCOUTD" group="RTCOUT" pad="PD6"/>
+                            <signal field="RTCOUT" function="RTCOUTR" group="RTCOUT" pad="PR0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="CRC" id="I6111" version="XMEGAAU">
+                    <instance name="CRC">
+                        <register-group address-space="data" offset="0x0D0" name-in-module="CRC" name="CRC"/>
+                    </instance>
+                </module>
+                <module name="EDMA" id="I3002" version="XMEGAE">
+                    <instance name="EDMA">
+                        <register-group address-space="data" offset="0x0100" name-in-module="EDMA" name="EDMA"/>
+                    </instance>
+                </module>
+                <module name="EVSYS" id="I6061" version="XMEGAE">
+                    <instance name="EVSYS">
+                        <register-group address-space="data" offset="0x0180" name-in-module="EVSYS" name="EVSYS"/>
+                    </instance>
+                </module>
+                <module name="NVM" id="I3620" version="XMEGAE">
+                    <instance name="NVM">
+                        <register-group address-space="data" offset="0x01C0" name-in-module="NVM" name="NVM"/>
+                    </instance>
+                </module>
+                <module name="ADC" id="I6110" version="XMEGAE">
+                    <instance name="ADCA">
+                        <register-group address-space="data" offset="0x0200" name-in-module="ADC" name="ADCA"/>
+                        <signals>
+                            <signal function="ADC" group="ADC" index="0" pad="PA0"/>
+                            <signal function="ADC" group="ADC" index="1" pad="PA1"/>
+                            <signal function="ADC" group="ADC" index="2" pad="PA2"/>
+                            <signal function="ADC" group="ADC" index="3" pad="PA3"/>
+                            <signal function="ADC" group="ADC" index="4" pad="PA4"/>
+                            <signal function="ADC" group="ADC" index="5" pad="PA5"/>
+                            <signal function="ADC" group="ADC" index="6" pad="PA6"/>
+                            <signal function="ADC" group="ADC" index="7" pad="PA7"/>
+                            <signal function="ADC" group="ADC" index="8" pad="PD0"/>
+                            <signal function="ADC" group="ADC" index="9" pad="PD1"/>
+                            <signal function="ADC" group="ADC" index="10" pad="PD2"/>
+                            <signal function="ADC" group="ADC" index="11" pad="PD3"/>
+                            <signal function="ADC" group="ADC" index="12" pad="PD4"/>
+                            <signal function="ADC" group="ADC" index="13" pad="PD5"/>
+                            <signal function="ADC" group="ADC" index="14" pad="PD6"/>
+                            <signal function="ADC" group="ADC" index="15" pad="PD7"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFD" index="0" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="DAC" id="I6059" version="XMEGAAU">
+                    <instance name="DACA">
+                        <register-group address-space="data" offset="0x0300" name-in-module="DAC" name="DACA"/>
+                        <signals>
+                            <signal function="DAC" group="DAC" index="0" pad="PA2"/>
+                            <signal function="DAC" group="DAC" index="1" pad="PA3"/>
+                            <signal function="AREF" group="REFA" index="0" pad="PA0"/>
+                            <signal function="AREF" group="REFD" index="0" pad="PD0"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="AC" id="I6077" version="XMEGAE">
+                    <instance name="ACA">
+                        <register-group address-space="data" offset="0x0380" name-in-module="AC" name="ACA"/>
+                        <signals>
+                            <signal function="AC" group="AC" index="0" pad="PA0"/>
+                            <signal function="AC" group="AC" index="1" pad="PA1"/>
+                            <signal function="AC" group="AC" index="2" pad="PA2"/>
+                            <signal function="AC" group="AC" index="3" pad="PA3"/>
+                            <signal function="AC" group="AC" index="4" pad="PA4"/>
+                            <signal function="AC" group="AC" index="5" pad="PA5"/>
+                            <signal function="AC" group="AC" index="6" pad="PA6"/>
+                            <signal function="AC" group="AC" index="7" pad="PA7"/>
+                            <signal field="ACOUT" function="ACOUT_PA" group="ACOUT" index="1" pad="PA6"/>
+                            <signal field="ACOUT" function="ACOUT_PA" group="ACOUT" index="0" pad="PA7"/>
+                            <signal field="ACOUT" function="ACOUT_PC" group="ACOUT" index="1" pad="PC6"/>
+                            <signal field="ACOUT" function="ACOUT_PC" group="ACOUT" index="0" pad="PC7"/>
+                            <signal field="ACOUT" function="ACOUT_PD" group="ACOUT" index="1" pad="PD6"/>
+                            <signal field="ACOUT" function="ACOUT_PD" group="ACOUT" index="0" pad="PD7"/>
+                            <signal field="ACOUT" function="ACOUT_PR" group="ACOUT" index="1" pad="PR0"/>
+                            <signal field="ACOUT" function="ACOUT_PR" group="ACOUT" index="0" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="RTC" id="I6093" version="XMEGAE">
+                    <instance name="RTC">
+                        <register-group address-space="data" offset="0x0400" name-in-module="RTC" name="RTC"/>
+                    </instance>
+                </module>
+                <module name="XCL" id="I3008">
+                    <instance name="XCL">
+                        <register-group address-space="data" offset="0x0460" name-in-module="XCL" name="XCL"/>
+                        <signals>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="1" pad="PC0"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="2" pad="PC1"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="0" pad="PC2"/>
+                            <signal function="XCLIN_LSB_PC" group="IN" index="3" pad="PC3"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="1" pad="PC4"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="2" pad="PC5"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="0" pad="PC6"/>
+                            <signal function="XCLIN_MSB_PC" group="IN" index="3" pad="PC7"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="1" pad="PD0"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="2" pad="PD1"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="0" pad="PD2"/>
+                            <signal function="XCLIN_LSB_PD" group="IN" index="3" pad="PD3"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="1" pad="PD4"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="2" pad="PD5"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="0" pad="PD6"/>
+                            <signal function="XCLIN_MSB_PD" group="IN" index="3" pad="PD7"/>
+                            <signal function="XCLOUT_LSB_PC" group="OUT" index="0" pad="PC0"/>
+                            <signal function="XCLOUT_MSB_PC" group="OUT" index="0" pad="PC4"/>
+                            <signal function="XCLOUT_LSB_PD" group="OUT" index="0" pad="PD0"/>
+                            <signal function="XCLOUT_LSB_PD" group="OUT" index="0" pad="PD4"/>
+                            <signal function="XCL_OCOUT" group="OC" index="0" pad="PD2"/>
+                            <signal function="XCL_OCOUT" group="OC" index="1" pad="PD3"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TWI" id="I6089" version="XMEGAE">
+                    <instance name="TWIC">
+                        <register-group address-space="data" offset="0x480" name-in-module="TWI" name="TWIC"/>
+                        <signals>
+                            <signal function="TWI" group="SDA" pad="PC0"/>
+                            <signal function="TWI" group="SCL" pad="PC1"/>
+                            <signal function="TWI_BRIDGE" group="SDA" pad="PD0"/>
+                            <signal function="TWI_BRIDGE" group="SCL" pad="PD1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="PORT" id="I6075" version="XMEGAE">
+                    <instance name="PORTA">
+                        <register-group address-space="data" offset="0x0600" name-in-module="PORT" name="PORTA"/>
+                        <signals>
+                            <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                            <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                            <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                            <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                            <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                            <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                            <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                            <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTC">
+                        <register-group address-space="data" offset="0x0640" name-in-module="PORT" name="PORTC"/>
+                        <signals>
+                            <signal function="PORTC" group="P" index="0" pad="PC0"/>
+                            <signal function="PORTC" group="P" index="1" pad="PC1"/>
+                            <signal function="PORTC" group="P" index="2" pad="PC2"/>
+                            <signal function="PORTC" group="P" index="3" pad="PC3"/>
+                            <signal function="PORTC" group="P" index="4" pad="PC4"/>
+                            <signal function="PORTC" group="P" index="5" pad="PC5"/>
+                            <signal function="PORTC" group="P" index="6" pad="PC6"/>
+                            <signal function="PORTC" group="P" index="7" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTD">
+                        <register-group address-space="data" offset="0x0660" name-in-module="PORT" name="PORTD"/>
+                        <signals>
+                            <signal function="PORTD" group="P" index="0" pad="PD0"/>
+                            <signal function="PORTD" group="P" index="1" pad="PD1"/>
+                            <signal function="PORTD" group="P" index="2" pad="PD2"/>
+                            <signal function="PORTD" group="P" index="3" pad="PD3"/>
+                            <signal function="PORTD" group="P" index="4" pad="PD4"/>
+                            <signal function="PORTD" group="P" index="5" pad="PD5"/>
+                            <signal function="PORTD" group="P" index="6" pad="PD6"/>
+                            <signal function="PORTD" group="P" index="7" pad="PD7"/>
+                        </signals>
+                    </instance>
+                    <instance name="PORTR">
+                        <register-group address-space="data" offset="0x07E0" name-in-module="PORT" name="PORTR"/>
+                        <signals>
+                            <signal function="PORTR" group="P" index="0" pad="PR0"/>
+                            <signal function="PORTR" group="P" index="1" pad="PR1"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="TC" id="I3007" version="XMEGAE">
+                    <instance name="TCC4">
+                        <register-group address-space="data" offset="0x800" name-in-module="TC4" name="TCC4"/>
+                        <signals>
+                            <signal field="TC4A" function="TC4" group="OC4A" pad="PC0"/>
+                            <signal field="TC4B" function="TC4" group="OC4B" pad="PC1"/>
+                            <signal field="TC4C" function="TC4" group="OC4C" pad="PC2"/>
+                            <signal field="TC4D" function="TC4" group="OC4D" pad="PC3"/>
+                            <signal field="TC4A" function="TC4_ALT" group="OC4A" pad="PC4"/>
+                            <signal field="TC4B" function="TC4_ALT" group="OC4B" pad="PC5"/>
+                            <signal field="TC4C" function="TC4_ALT" group="OC4C" pad="PC6"/>
+                            <signal field="TC4D" function="TC4_ALT" group="OC4D" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCC5">
+                        <register-group address-space="data" offset="0x840" name-in-module="TC5" name="TCC5"/>
+                        <signals>
+                            <signal function="TC5" group="OC5A" pad="PC4"/>
+                            <signal function="TC5" group="OC5B" pad="PC5"/>
+                        </signals>
+                    </instance>
+                    <instance name="TCD5">
+                        <register-group address-space="data" offset="0x940" name-in-module="TC5" name="TCD5"/>
+                        <signals>
+                            <signal function="TC5" group="OC5A" pad="PD4"/>
+                            <signal function="TC5" group="OC5B" pad="PD5"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="FAULT" id="I3620" version="XMEGAE">
+                    <instance name="FAULTC4">
+                        <register-group address-space="data" offset="0x880" name-in-module="FAULT" name="FAULTC4"/>
+                    </instance>
+                    <instance name="FAULTC5">
+                        <register-group address-space="data" offset="0x890" name-in-module="FAULT" name="FAULTC5"/>
+                    </instance>
+                </module>
+                <module name="WEX" id="I3007" version="XMEGAE">
+                    <instance name="WEXC">
+                        <register-group address-space="data" offset="0x8A0" name-in-module="WEX" name="WEXC"/>
+                        <signals>
+                            <signal function="WEX" group="OC4ALS" pad="PC0"/>
+                            <signal function="WEX" group="OC4AHS" pad="PC1"/>
+                            <signal function="WEX" group="OC4BLS" pad="PC2"/>
+                            <signal function="WEX" group="OC4BHS" pad="PC3"/>
+                            <signal function="WEX" group="OC4CLS" pad="PC4"/>
+                            <signal function="WEX" group="OC4CHS" pad="PC5"/>
+                            <signal function="WEX" group="OC4DLS" pad="PC6"/>
+                            <signal function="WEX" group="OC4DHS" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="HIRES" id="I3620" version="XMEGAE">
+                    <instance name="HIRESC">
+                        <register-group address-space="data" offset="0x8B0" name-in-module="HIRES" name="HIRESC"/>
+                    </instance>
+                </module>
+                <module name="USART" id="I4000" version="XMEGAE">
+                    <instance name="USARTC0">
+                        <register-group address-space="data" offset="0x8C0" name-in-module="USART" name="USARTC0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PC1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PC2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PC3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PC5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PC6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PC7"/>
+                        </signals>
+                    </instance>
+                    <instance name="USARTD0">
+                        <register-group address-space="data" offset="0x9C0" name-in-module="USART" name="USARTD0"/>
+                        <signals>
+                            <signal field="USART0" function="USART" group="XCK" pad="PD1"/>
+                            <signal field="USART0" function="USART" group="RXD" pad="PD2"/>
+                            <signal field="USART0" function="USART" group="TXD" pad="PD3"/>
+                            <signal field="USART0" function="USART_ALT" group="XCK" pad="PD5"/>
+                            <signal field="USART0" function="USART_ALT" group="RXD" pad="PD6"/>
+                            <signal field="USART0" function="USART_ALT" group="TXD" pad="PD7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="SPI" id="I6090" version="XMEGAE">
+                    <instance name="SPIC">
+                        <register-group address-space="data" offset="0x08E0" name-in-module="SPI" name="SPIC"/>
+                        <signals>
+                            <signal function="SPI" group="SS" pad="PC4"/>
+                            <signal function="SPI" group="SCK" pad="PC5"/>
+                            <signal function="SPI" group="MISO" pad="PC6"/>
+                            <signal function="SPI" group="MOSI" pad="PC7"/>
+                        </signals>
+                    </instance>
+                </module>
+                <module name="IRCOM" id="I6090" version="XMEGAAU">
+                    <instance name="IRCOM">
+                        <register-group address-space="data" offset="0x8F8" name-in-module="IRCOM" name="IRCOM"/>
+                    </instance>
+                </module>
+                <module name="FUSE" id="I3620" version="XMEGAE">
+                    <instance name="FUSE">
+                        <register-group address-space="fuses" offset="0x00" name-in-module="NVM_FUSES" name="FUSE"/>
+                    </instance>
+                    <instance name="LOCKBIT">
+                        <register-group address-space="lockbits" offset="0x00" name-in-module="NVM_LOCKBITS"
+                                        name="LOCKBIT"/>
+                    </instance>
+                </module>
+                <module name="SIGROW" id="I3620" version="XMEGAE">
+                    <instance name="PROD_SIGNATURES">
+                        <register-group address-space="prod_signatures" offset="0x00"
+                                        name-in-module="NVM_PROD_SIGNATURES" name="PROD_SIGNATURES"/>
+                    </instance>
+                </module>
+            </peripherals>
+            <interrupts>
+                <interrupt-group index="1" module-instance="OSC" name-in-module="OSC"/>
+                <interrupt-group index="2" module-instance="PORTR" name-in-module="PORT"/>
+                <interrupt-group index="3" module-instance="EDMA" name-in-module="EDMA"/>
+                <interrupt-group index="7" module-instance="RTC" name-in-module="RTC"/>
+                <interrupt-group index="9" module-instance="PORTC" name-in-module="PORT"/>
+                <interrupt-group index="10" module-instance="TWIC" name-in-module="TWI"/>
+                <interrupt-group index="12" module-instance="TCC4" name-in-module="TC4"/>
+                <interrupt-group index="18" module-instance="TCC5" name-in-module="TC5"/>
+                <interrupt-group index="22" module-instance="SPIC" name-in-module="SPI"/>
+                <interrupt-group index="23" module-instance="USARTC0" name-in-module="USART"/>
+                <interrupt-group index="26" module-instance="NVM" name-in-module="NVM"/>
+                <interrupt-group index="28" module-instance="XCL" name-in-module="XCL"/>
+                <interrupt-group index="30" module-instance="PORTA" name-in-module="PORT"/>
+                <interrupt-group index="31" module-instance="ACA" name-in-module="AC"/>
+                <interrupt-group index="34" module-instance="ADCA" name-in-module="ADC"/>
+                <interrupt-group index="35" module-instance="PORTD" name-in-module="PORT"/>
+                <interrupt-group index="36" module-instance="TCD5" name-in-module="TC5"/>
+                <interrupt-group index="40" module-instance="USARTD0" name-in-module="USART"/>
+            </interrupts>
+            <interfaces>
+                <interface type="pdi" name="PDI"/>
+            </interfaces>
+            <property-groups>
+                <property-group name="SIGNATURES">
+                    <property name="SIGNATURE0" value="0x1E"/>
+                    <property name="SIGNATURE1" value="0x93"/>
+                    <property name="SIGNATURE2" value="0x41"/>
+                </property-group>
+                <property-group name="PDI_INTERFACE">
+                    <property name="APP_SECTION_OFFSET" value="0x00800000"/>
+                    <property name="APPTABLE_SECTION_OFFSET" value="0x00801800"/>
+                    <property name="BOOT_SECTION_OFFSET" value="0x00802000"/>
+                    <property name="DATAMEM_OFFSET" value="0x01000000"/>
+                    <property name="EEPROM_OFFSET" value="0x008C0000"/>
+                    <property name="USER_SIGNATURES_OFFSET" value="0x008E0400"/>
+                    <property name="PROD_SIGNATURES_OFFSET" value="0x008E0200"/>
+                    <property name="FUSE_REGISTERS_OFFSET" value="0x008F0020"/>
+                    <property name="LOCK_REGISTERS_OFFSET" value="0x008F0027"/>
+                </property-group>
+            </property-groups>
+        </device>
+    </devices>
+    <modules>
+        <module name="GPIO" id="I6085" version="XMEGAD" caption="General Purpose IO">
+            <register-group caption="General Purpose IO Registers" name="GPIO" size="4">
+                <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x00" size="1"/>
+                <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x01" size="1"/>
+                <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x02" size="1"/>
+                <register caption="General Purpose IO Register 3" name="GPIOR3" offset="0x03" size="1"/>
+            </register-group>
+        </module>
+        <module name="VPORT" id="I6075" version="XMEGAE" caption="Virtual Ports">
+            <register-group caption="Virtual Port" name="VPORT" size="4">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x01" size="1"/>
+                <register caption="I/O Port Input" name="IN" offset="0x02" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Interrupt Pin 7 Flag" mask="0x80" name="INT7IF"/>
+                    <bitfield caption="Interrupt Pin 6 Flag" mask="0x40" name="INT6IF"/>
+                    <bitfield caption="Interrupt Pin 5 Flag" mask="0x20" name="INT5IF"/>
+                    <bitfield caption="Interrupt Pin 4 Flag" mask="0x10" name="INT4IF"/>
+                    <bitfield caption="Interrupt Pin 3 Flag" mask="0x08" name="INT3IF"/>
+                    <bitfield caption="Interrupt Pin 2 Flag" mask="0x04" name="INT2IF"/>
+                    <bitfield caption="Interrupt Pin 1 Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Interrupt Pin 0 Flag" mask="0x01" name="INT0IF"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="XOCD" caption="On-Chip Debug System" id="I6043">
+            <register-group name="OCD" caption="On-Chip Debug System" size="2">
+                <register name="OCDR0" caption="OCD Register 0" size="1" offset="0x00">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0xFF"/>
+                </register>
+                <register name="OCDR1" caption="OCD Register 1" size="1" offset="0x01">
+                    <bitfield name="OCDRD" caption="OCDR Dirty" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="CPU" id="I6000" caption="CPU">
+            <register-group caption="CPU registerMap" name="CPU" size="16">
+                <register caption="Configuration Change Protection" name="CCP" offset="0x04" size="1">
+                    <bitfield caption="CCP signature" mask="0xFF" name="CCP" values="CCP"/>
+                </register>
+                <register caption="Ramp D" name="RAMPD" offset="0x08" size="1"/>
+                <register caption="Ramp X" name="RAMPX" offset="0x09" size="1"/>
+                <register caption="Ramp Y" name="RAMPY" offset="0x0A" size="1"/>
+                <register caption="Ramp Z" name="RAMPZ" offset="0x0B" size="1"/>
+                <register caption="Extended Indirect Jump" name="EIND" offset="0x0C" size="1"/>
+                <register caption="Stack Pointer Low" name="SPL" offset="0x0D" size="1"/>
+                <register caption="Stack Pointer High" name="SPH" offset="0x0E" size="1"/>
+                <register caption="Status Register" name="SREG" offset="0x0F" size="1">
+                    <bitfield caption="Global Interrupt Enable Flag" mask="0x80" name="I"/>
+                    <bitfield caption="Transfer Bit" mask="0x40" name="T"/>
+                    <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
+                    <bitfield caption="N Exclusive Or V Flag" mask="0x10" name="S"/>
+                    <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
+                    <bitfield caption="Negative Flag" mask="0x04" name="N"/>
+                    <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
+                    <bitfield caption="Carry Flag" mask="0x01" name="C"/>
+                </register>
+            </register-group>
+            <value-group caption="CCP signatures" name="CCP">
+                <value caption="SPM Instruction Protection" name="SPM" value="0x9D"/>
+                <value caption="IO Register Protection" name="IOREG" value="0xD8"/>
+            </value-group>
+
+        </module>
+        <module name="CLK" id="I6073" version="XMEGAE" caption="Clock System">
+            <register-group caption="Clock System" name="CLK" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="System Clock Selection" mask="0x07" name="SCLKSEL" values="CLK_SCLKSEL"/>
+                </register>
+                <register caption="Prescaler Control Register" name="PSCTRL" offset="0x01" size="1">
+                    <bitfield caption="Prescaler A Division Factor" mask="0x7C" name="PSADIV" values="CLK_PSADIV"/>
+                    <bitfield caption="Prescaler B and C Division factor" mask="0x03" name="PSBCDIV"
+                              values="CLK_PSBCDIV"/>
+                </register>
+                <register caption="Lock register" name="LOCK" offset="0x02" size="1">
+                    <bitfield caption="Clock System Lock" mask="0x01" name="LOCK"/>
+                </register>
+                <register caption="RTC Control Register" name="RTCCTRL" offset="0x03" size="1">
+                    <bitfield caption="Clock Source" mask="0x0E" name="RTCSRC" values="CLK_RTCSRC"/>
+                    <bitfield caption="Clock Source Enable" mask="0x01" name="RTCEN"/>
+                </register>
+            </register-group>
+            <value-group caption="System Clock Selection" name="CLK_SCLKSEL">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x01"/>
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x02"/>
+                <value caption="External Crystal Oscillator or Clock" name="XOSC" value="0x03"/>
+                <value caption="Phase Locked Loop" name="PLL" value="0x04"/>
+                <value caption="Internal 8 MHz RC Oscillator" name="RC8M" value="0x05"/>
+            </value-group>
+            <value-group caption="Prescaler A Division Factor" name="CLK_PSADIV">
+                <value caption="Divide by 1" name="1" value="0x00"/>
+                <value caption="Divide by 2" name="2" value="0x01"/>
+                <value caption="Divide by 4" name="4" value="0x03"/>
+                <value caption="Divide by 8" name="8" value="0x05"/>
+                <value caption="Divide by 16" name="16" value="0x07"/>
+                <value caption="Divide by 32" name="32" value="0x09"/>
+                <value caption="Divide by 64" name="64" value="0x0B"/>
+                <value caption="Divide by 128" name="128" value="0x0D"/>
+                <value caption="Divide by 256" name="256" value="0x0F"/>
+                <value caption="Divide by 512" name="512" value="0x11"/>
+                <value caption="Divide by 6" name="6" value="0x13"/>
+                <value caption="Divide by 10" name="10" value="0x15"/>
+                <value caption="Divide by 12" name="12" value="0x17"/>
+                <value caption="Divide by 24" name="24" value="0x19"/>
+                <value caption="Divide by 48" name="48" value="0x1B"/>
+            </value-group>
+            <value-group caption="Prescaler B and C Division Factor" name="CLK_PSBCDIV">
+                <value caption="Divide B by 1 and C by 1" name="1_1" value="0x00"/>
+                <value caption="Divide B by 1 and C by 2" name="1_2" value="0x01"/>
+                <value caption="Divide B by 4 and C by 1" name="4_1" value="0x02"/>
+                <value caption="Divide B by 2 and C by 2" name="2_2" value="0x03"/>
+            </value-group>
+            <value-group caption="RTC Clock Source" name="CLK_RTCSRC">
+                <value caption="1.024 kHz from internal 32kHz ULP" name="ULP" value="0x00"/>
+                <value caption="1.024 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC" value="0x01"/>
+                <value caption="1.024 kHz from internal 32.768 kHz RC oscillator" name="RCOSC" value="0x02"/>
+                <value caption="32.768 kHz from 32.768 kHz crystal oscillator on TOSC" name="TOSC32" value="0x05"/>
+                <value caption="32.768 kHz from internal 32.768 kHz RC oscillator" name="RCOSC32" value="0x06"/>
+                <value caption="External Clock from TOSC1" name="EXTCLK" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="PR" id="I6073" version="XMEGAE" caption="Power Reduction">
+            <register-group caption="Power Reduction" name="PR" size="7">
+                <register caption="General Power Reduction" name="PRGEN" offset="0x00" size="1">
+                    <bitfield caption="XMEGA Custom Logic" mask="0x80" name="XCL"/>
+                    <bitfield caption="Real-time Counter" mask="0x04" name="RTC"/>
+                    <bitfield caption="Event System" mask="0x02" name="EVSYS"/>
+                    <bitfield caption="Enhanced DMA-Controller" mask="0x01" name="EDMA"/>
+                </register>
+                <register caption="Power Reduction Port A" name="PRPA" offset="0x01" size="1">
+                    <bitfield caption="Port A DAC" mask="0x04" name="DAC"/>
+                    <bitfield caption="Port A ADC" mask="0x02" name="ADC"/>
+                    <bitfield caption="Port A Analog Comparator" mask="0x01" name="AC"/>
+                </register>
+                <register caption="Power Reduction Port C" name="PRPC" offset="0x03" size="1">
+                    <bitfield caption="Port C Two-wire Interface" mask="0x40" name="TWI"/>
+                    <bitfield caption="Port C USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port C SPI" mask="0x08" name="SPI"/>
+                    <bitfield caption="Port C WEX" mask="0x04" name="HIRES"/>
+                    <bitfield caption="Port C Timer/Counter5" mask="0x02" name="TC5"/>
+                    <bitfield caption="Port C Timer/Counter4" mask="0x01" name="TC4"/>
+                </register>
+                <register caption="Power Reduction Port D" name="PRPD" offset="0x04" size="1">
+                    <bitfield caption="Port D USART0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Port D Timer/Counter5" mask="0x02" name="TC5"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="SLEEP" id="I6081" version="XMEGAAU" caption="Sleep Controller">
+            <register-group caption="Sleep Controller" name="SLEEP" size="1">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Sleep Mode" mask="0x0E" name="SMODE" values="SLEEP_SMODE"/>
+                    <bitfield caption="Sleep Enable" mask="0x01" name="SEN"/>
+                </register>
+            </register-group>
+            <value-group caption="Sleep Mode" name="SLEEP_SMODE">
+                <value caption="Idle mode" name="IDLE" value="0x00"/>
+                <value caption="Power-down Mode" name="PDOWN" value="0x02"/>
+                <value caption="Power-save Mode" name="PSAVE" value="0x03"/>
+                <value caption="Standby Mode" name="STDBY" value="0x06"/>
+                <value caption="Extended Standby Mode" name="ESTDBY" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="OSC" id="I6079" version="XMEGAE" caption="Oscillator">
+            <register-group caption="Oscillator" name="OSC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Internal 8 MHz RC Low Power Mode Enable" mask="0x40" name="RC8MLPM"/>
+                    <bitfield caption="Internal 8 MHz RC Oscillator Enable" mask="0x20" name="RC8MEN"/>
+                    <bitfield caption="PLL Enable" mask="0x10" name="PLLEN"/>
+                    <bitfield caption="External Oscillator Enable" mask="0x08" name="XOSCEN"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Enable" mask="0x04" name="RC32KEN"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Enable" mask="0x02" name="RC32MEN"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Enable" mask="0x01" name="RC2MEN"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Internal 8 MHz RC Oscillator Ready" mask="0x20" name="RC8MRDY"/>
+                    <bitfield caption="PLL Ready" mask="0x10" name="PLLRDY"/>
+                    <bitfield caption="External Oscillator Ready" mask="0x08" name="XOSCRDY"/>
+                    <bitfield caption="Internal 32.768 kHz RC Oscillator Ready" mask="0x04" name="RC32KRDY"/>
+                    <bitfield caption="Internal 32 MHz RC Oscillator Ready" mask="0x02" name="RC32MRDY"/>
+                    <bitfield caption="Internal 2 MHz RC Oscillator Ready" mask="0x01" name="RC2MRDY"/>
+                </register>
+                <register caption="External Oscillator Control Register" name="XOSCCTRL" offset="0x02" size="1">
+                    <bitfield caption="Frequency Range" mask="0xC0" name="FRQRANGE" values="OSC_FRQRANGE"/>
+                    <bitfield caption="32.768 kHz XTAL OSC Low-power Mode" mask="0x20" name="X32KLPM"/>
+                    <bitfield caption="16 MHz Crystal Oscillator High Power mode" mask="0x10" name="XOSCPWR"/>
+                    <bitfield caption="External Oscillator Selection and Startup Time" mask="0x1F" name="XOSCSEL"
+                              values="OSC_XOSCSEL"/>
+                </register>
+                <register caption="Oscillator Failure Detection Register" name="XOSCFAIL" offset="0x03" size="1">
+                    <bitfield caption="PLL Failure Detection Interrupt Flag" mask="0x08" name="PLLFDIF"/>
+                    <bitfield caption="PLL Failure Detection Enable" mask="0x04" name="PLLFDEN"/>
+                    <bitfield caption="XOSC Failure Detection Interrupt Flag" mask="0x02" name="XOSCFDIF"/>
+                    <bitfield caption="XOSC Failure Detection Enable" mask="0x01" name="XOSCFDEN"/>
+                </register>
+                <register caption="32.768 kHz Internal Oscillator Calibration Register" name="RC32KCAL" offset="0x04"
+                          size="1"/>
+                <register caption="PLL Control Register" name="PLLCTRL" offset="0x05" size="1">
+                    <bitfield caption="Clock Source" mask="0xC0" name="PLLSRC" values="OSC_PLLSRC"/>
+                    <bitfield caption="Divide by 2" mask="0x20" name="PLLDIV"/>
+                    <bitfield caption="Multiplication Factor" mask="0x1F" name="PLLFAC"/>
+                </register>
+                <register caption="DFLL Control Register" name="DFLLCTRL" offset="0x06" size="1">
+                    <bitfield caption="32 MHz DFLL Calibration Reference" mask="0x06" name="RC32MCREF"
+                              values="OSC_RC32MCREF"/>
+                </register>
+                <register caption="Internal 8 MHz RC Oscillator Calibration Register" name="RC8MCAL" offset="0x07"
+                          size="1">
+                    <bitfield caption="Calibration Bits" mask="0xFF" name="RC8MCAL"/>
+                </register>
+            </register-group>
+            <value-group caption="Oscillator Frequency Range" name="OSC_FRQRANGE">
+                <value caption="0.4 - 2 MHz" name="04TO2" value="0x00"/>
+                <value caption="2 - 9 MHz" name="2TO9" value="0x01"/>
+                <value caption="9 - 12 MHz" name="9TO12" value="0x02"/>
+                <value caption="12 - 16 MHz" name="12TO16" value="0x03"/>
+            </value-group>
+            <value-group caption="External Oscillator Selection and Startup Time" name="OSC_XOSCSEL">
+                <value caption="External Clock on port R1 - 6 CLK" name="EXTCLK" value="0x00"/>
+                <value caption="32.768 kHz TOSC - 32K CLK" name="32KHz" value="0x02"/>
+                <value caption="0.4-16 MHz XTAL - 256 CLK" name="XTAL_256CLK" value="0x03"/>
+                <value caption="0.4-16 MHz XTAL - 1K CLK" name="XTAL_1KCLK" value="0x07"/>
+                <value caption="0.4-16 MHz XTAL - 16K CLK" name="XTAL_16KCLK" value="0x0B"/>
+                <value caption="External Clock on port C4 - 6 CLK" name="EXTCLK_C4" value="0x14"/>
+            </value-group>
+            <value-group caption="PLL Clock Source" name="OSC_PLLSRC">
+                <value caption="Internal 2 MHz RC Oscillator" name="RC2M" value="0x00"/>
+                <value caption="Internal 8 MHz RC Oscillator" name="RC8M" value="0x01"/>
+                <value caption="Internal 32 MHz RC Oscillator" name="RC32M" value="0x02"/>
+                <value caption="External Oscillator" name="XOSC" value="0x03"/>
+            </value-group>
+            <value-group caption="32 MHz DFLL Calibration Reference" name="OSC_RC32MCREF">
+                <value caption="Internal 32.768 kHz RC Oscillator" name="RC32K" value="0x00"/>
+                <value caption="External 32.768 kHz Crystal Oscillator" name="XOSC32K" value="0x01"/>
+            </value-group>
+            <interrupt-group name="OSC">
+                <interrupt index="0" name="OSCF" caption="Oscillator Failure Interrupt (NMI)"/>
+            </interrupt-group>
+        </module>
+        <module name="DFLL" id="I6055" version="XMEGAAU" caption="DFLL">
+            <register-group caption="DFLL" name="DFLL" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="DFLL Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Calibration Register A" name="CALA" offset="0x02" size="1">
+                    <bitfield caption="DFLL Calibration Value A" mask="0x7F" name="CALL"/>
+                </register>
+                <register caption="Calibration Register B" name="CALB" offset="0x03" size="1">
+                    <bitfield caption="DFLL Calibration Value B" mask="0x3F" name="CALH"/>
+                </register>
+                <register caption="Oscillator Compare Register 0" name="COMP0" offset="0x04" size="1"/>
+                <register caption="Oscillator Compare Register 1" name="COMP1" offset="0x05" size="1"/>
+                <register caption="Oscillator Compare Register 2" name="COMP2" offset="0x06" size="1"/>
+            </register-group>
+        </module>
+        <module name="RST" id="I6083" version="XMEGAAU" caption="Reset">
+            <register-group caption="Reset" name="RST" size="2">
+                <register caption="Status Register" name="STATUS" offset="0x00" size="1">
+                    <bitfield caption="Spike Detection Reset Flag" mask="0x40" name="SDRF"/>
+                    <bitfield caption="Software Reset Flag" mask="0x20" name="SRF"/>
+                    <bitfield caption="Programming and Debug Interface Interface Reset Flag" mask="0x10" name="PDIRF"/>
+                    <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
+                    <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
+                    <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
+                    <bitfield caption="Power-on Reset Flag" mask="0x01" name="PORF"/>
+                </register>
+                <register caption="Control Register" name="CTRL" offset="0x01" size="1">
+                    <bitfield caption="Software Reset" mask="0x01" name="SWRST"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="WDT" id="I6078" caption="Watch-Dog Timer">
+            <register-group caption="Watch-Dog Timer" name="WDT" size="3">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Period" mask="0x3C" name="PER" values="WDT_PER"/>
+                    <bitfield caption="Enable" mask="0x02" name="ENABLE"/>
+                    <bitfield caption="Change Enable" mask="0x01" name="CEN"/>
+                </register>
+                <register caption="Windowed Mode Control" name="WINCTRL" offset="0x01" size="1">
+                    <bitfield caption="Windowed Mode Period" mask="0x3C" name="WPER" values="WDT_WPER"/>
+                    <bitfield caption="Windowed Mode Enable" mask="0x02" name="WEN"/>
+                    <bitfield caption="Windowed Mode Change Enable" mask="0x01" name="WCEN"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Syncronization busy" mask="0x01" name="SYNCBUSY"/>
+                </register>
+            </register-group>
+            <value-group caption="Period setting" name="WDT_PER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Closed window period" name="WDT_WPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.128s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.256s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.512s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+        </module>
+        <module name="MCU" id="I6091" version="XMEGAE" caption="MCU Control">
+            <register-group caption="MCU Control" name="MCU" size="12">
+                <register caption="Device ID byte 0" name="DEVID0" offset="0x00" size="1"/>
+                <register caption="Device ID byte 1" name="DEVID1" offset="0x01" size="1"/>
+                <register caption="Device ID byte 2" name="DEVID2" offset="0x02" size="1"/>
+                <register caption="Revision ID" name="REVID" offset="0x03" size="1"/>
+                <register caption="Analog Startup Delay" name="ANAINIT" offset="0x07" size="1">
+                    <bitfield caption="Analog startup delay Port A" mask="0x03" name="STARTUPDLYA"/>
+                </register>
+                <register caption="Event System Lock" name="EVSYSLOCK" offset="0x08" size="1">
+                    <bitfield caption="Event Channel 4-7 Lock" mask="0x10" name="EVSYS1LOCK"/>
+                    <bitfield caption="Event Channel 0-3 Lock" mask="0x01" name="EVSYS0LOCK"/>
+                </register>
+                <register caption="WEX Lock" name="WEXLOCK" offset="0x09" size="1">
+                    <bitfield caption="WeX on T/C C4 Lock" mask="0x01" name="WEXCLOCK"/>
+                </register>
+                <register caption="FAULT Lock" name="FAULTLOCK" offset="0x0A" size="1">
+                    <bitfield caption="Fault on T/C C5 Lock" mask="0x02" name="FAULTC5LOCK"/>
+                    <bitfield caption="Fault on T/C C4 Lock" mask="0x01" name="FAULTC4LOCK"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PMIC" caption="Programmable Multi-level Interrupt Controller" id="I6057">
+            <register-group name="PMIC" caption="Programmable Multi-level Interrupt Controller" size="16">
+                <register name="STATUS" caption="Status Register" size="1" offset="0x00">
+                    <bitfield name="NMIEX" caption="Non-maskable Interrupt Executing" mask="0x80"/>
+                    <bitfield name="HILVLEX" caption="High Level Interrupt Executing" mask="0x04"/>
+                    <bitfield name="MEDLVLEX" caption="Medium Level Interrupt Executing" mask="0x02"/>
+                    <bitfield name="LOLVLEX" caption="Low Level Interrupt Executing" mask="0x01"/>
+                </register>
+                <register name="INTPRI" caption="Interrupt Priority" size="1" offset="0x01">
+                    <bitfield name="INTPRI" caption="Interrupt Priority" mask="0xFF"/>
+                </register>
+                <register name="CTRL" caption="Control Register" size="1" offset="0x02">
+                    <bitfield name="RREN" caption="Round-Robin Priority Enable" mask="0x80"/>
+                    <bitfield name="IVSEL" caption="Interrupt Vector Select" mask="0x40"/>
+                    <bitfield name="HILVLEN" caption="High Level Enable" mask="0x04"/>
+                    <bitfield name="MEDLVLEN" caption="Medium Level Enable" mask="0x02"/>
+                    <bitfield name="LOLVLEN" caption="Low Level Enable" mask="0x01"/>
+                </register>
+            </register-group>
+        </module>
+        <module name="PORTCFG" id="I6075" version="XMEGAE" caption="Port Configuration">
+            <register-group caption="I/O port Configuration" name="PORTCFG" size="8">
+                <register caption="Multi-pin Configuration Mask" name="MPCMASK" offset="0x00" size="1"/>
+                <register caption="Clock Out Register" name="CLKOUT" offset="0x04" size="1">
+                    <bitfield caption="Clock and Event Output Pin Select" mask="0x80" name="CLKEVPIN"
+                              values="PORTCFG_CLKEVPIN"/>
+                    <bitfield caption="RTC Clock Output Enable" mask="0x60" name="RTCOUT" values="PORTCFG_RTCCLKOUT"/>
+                    <bitfield caption="Clock Output Select" mask="0x0C" name="CLKOUTSEL" values="PORTCFG_CLKOUTSEL"/>
+                    <bitfield caption="Clock Output Port" mask="0x03" name="CLKOUT" values="PORTCFG_CLKOUT"/>
+                </register>
+                <register caption="Analog Comparator and Event Out Register" name="ACEVOUT" offset="0x06" size="1">
+                    <bitfield caption="Analog Comparator Output Port" mask="0xC0" name="ACOUT" values="PORTCFG_ACOUT"/>
+                    <bitfield caption="Event Channel Output Port" mask="0x30" name="EVOUT" values="PORTCFG_EVOUT"/>
+                    <bitfield caption="Asynchronous Event Enabled" mask="0x08" name="EVASYEN"/>
+                    <bitfield caption="Event Channel Output Selection" mask="0x07" name="EVOUTSEL"
+                              values="PORTCFG_EVOUTSEL"/>
+                </register>
+                <register caption="Slew Rate Limit Control Register" name="SRLCTRL" offset="0x07" size="1">
+                    <bitfield caption="Slew Rate Limit Enable on PORTA" mask="0x01" name="SRLENRA"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTC" mask="0x04" name="SRLENRC"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTD" mask="0x08" name="SRLENRD"/>
+                    <bitfield caption="Slew Rate Limit Enable on PORTR" mask="0x80" name="SRLENRR"/>
+                </register>
+            </register-group>
+            <value-group caption="Clock and Event Output Port" name="PORTCFG_CLKEVPIN">
+                <value caption="Clock and Event Output on PIN 7" name="PIN7" value="0x00"/>
+                <value caption="Clock and Event Output on PIN 4" name="PIN4" value="0x01"/>
+            </value-group>
+            <value-group caption="RTC Clock Output Port" name="PORTCFG_RTCCLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 6" name="PC6" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 6" name="PD6" value="0x02"/>
+                <value caption="System Clock Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Peripheral Clock Output Select" name="PORTCFG_CLKOUTSEL">
+                <value caption="1x Peripheral Clock Output to pin" name="CLK1X" value="0x00"/>
+                <value caption="2x Peripheral Clock Output to pin" name="CLK2X" value="0x01"/>
+                <value caption="4x Peripheral Clock Output to pin" name="CLK4X" value="0x02"/>
+            </value-group>
+            <value-group caption="System Clock Output Port" name="PORTCFG_CLKOUT">
+                <value caption="System Clock Output Disabled" name="OFF" value="0x00"/>
+                <value caption="System Clock Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="System Clock Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="System Clock Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Analog Comparator Output Port" name="PORTCFG_ACOUT">
+                <value caption="Analog Comparator Outputs on Port A, Pin 6-7" name="PA" value="0x00"/>
+                <value caption="Analog Comparator Outputs on Port C, Pin 6-7" name="PC" value="0x01"/>
+                <value caption="Analog Comparator Outputs on Port D, Pin 6-7" name="PD" value="0x02"/>
+                <value caption="Analog Comparator Outputs on Port R, Pin 0-1" name="PR" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Port" name="PORTCFG_EVOUT">
+                <value caption="Event Output Disabled" name="OFF" value="0x00"/>
+                <value caption="Event Channel n Output on Port C pin 7" name="PC7" value="0x01"/>
+                <value caption="Event Channel n Output on Port D pin 7" name="PD7" value="0x02"/>
+                <value caption="Event Channel n Output on Port R pin 0" name="PR0" value="0x03"/>
+            </value-group>
+            <value-group caption="Event Output Select" name="PORTCFG_EVOUTSEL">
+                <value caption="Event Channel 0 output to pin" name="0" value="0x00"/>
+                <value caption="Event Channel 1 output to pin" name="1" value="0x01"/>
+                <value caption="Event Channel 2 output to pin" name="2" value="0x02"/>
+                <value caption="Event Channel 3 output to pin" name="3" value="0x03"/>
+                <value caption="Event Channel 4 output to pin" name="4" value="0x04"/>
+                <value caption="Event Channel 5 output to pin" name="5" value="0x05"/>
+                <value caption="Event Channel 6 output to pin" name="6" value="0x06"/>
+                <value caption="Event Channel 7 output to pin" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="CRC" id="I6111" version="XMEGAAU" caption="Cyclic Redundancy Checker">
+            <register-group caption="Cyclic Redundancy Checker" name="CRC" size="8">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Reset" mask="0xC0" name="RESET" values="CRC_RESET"/>
+                    <bitfield caption="CRC Mode" mask="0x20" name="CRC32"/>
+                    <bitfield caption="Input Source" mask="0x0F" name="SOURCE" values="CRC_SOURCE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Zero detection" mask="0x02" name="ZERO"/>
+                    <bitfield caption="Busy" mask="0x01" name="BUSY"/>
+                </register>
+                <register caption="Data Input" name="DATAIN" offset="0x03" size="1"/>
+                <register caption="Checksum byte 0" name="CHECKSUM0" offset="0x04" size="1"/>
+                <register caption="Checksum byte 1" name="CHECKSUM1" offset="0x05" size="1"/>
+                <register caption="Checksum byte 2" name="CHECKSUM2" offset="0x06" size="1"/>
+                <register caption="Checksum byte 3" name="CHECKSUM3" offset="0x07" size="1"/>
+            </register-group>
+            <value-group caption="Reset" name="CRC_RESET">
+                <value caption="No Reset" name="NO" value="0x00"/>
+                <value caption="Reset CRC with CHECKSUM to all zeros" name="RESET0" value="0x02"/>
+                <value caption="Reset CRC with CHECKSUM to all ones" name="RESET1" value="0x03"/>
+            </value-group>
+            <value-group caption="Input Source" name="CRC_SOURCE">
+                <value caption="Disabled" name="DISABLE" value="0x00"/>
+                <value caption="I/O Interface" name="IO" value="0x01"/>
+                <value caption="Flash" name="FLASH" value="0x02"/>
+                <value caption="DMAC Channel 0" name="DMAC0" value="0x04"/>
+                <value caption="DMAC Channel 1" name="DMAC1" value="0x05"/>
+                <value caption="DMAC Channel 2" name="DMAC2" value="0x06"/>
+                <value caption="DMAC Channel 3" name="DMAC3" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="EDMA" id="I3002" version="XMEGAE" caption="Enhanced DMA Controller">
+            <register-group caption="Enhanced DMA Controller" name="EDMA" size="80">
+                <register caption="Control" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Mode" mask="0x30" name="CHMODE" values="EDMA_CHMODE"/>
+                    <bitfield caption="Double Buffer Mode" mask="0x0C" name="DBUFMODE" values="EDMA_DBUFMODE"/>
+                    <bitfield caption="Priority Mode" mask="0x03" name="PRIMODE" values="EDMA_PRIMODE"/>
+                </register>
+                <register caption="Transfer Interrupt Status" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel 3 Transaction Error Interrupt Flag" mask="0x80" name="CH3ERRIF"/>
+                    <bitfield caption="Channel 2 Transaction Error Interrupt Flag" mask="0x40" name="CH2ERRIF"/>
+                    <bitfield caption="Channel 1 Transaction Error Interrupt Flag" mask="0x20" name="CH1ERRIF"/>
+                    <bitfield caption="Channel 0 Transaction Error Interrupt Flag" mask="0x10" name="CH0ERRIF"/>
+                    <bitfield caption="Channel 3 Transaction Complete Interrupt Flag" mask="0x08" name="CH3TRNFIF"/>
+                    <bitfield caption="Channel 2 Transaction Complete Interrupt Flag" mask="0x04" name="CH2TRNFIF"/>
+                    <bitfield caption="Channel 1 Transaction Complete Interrupt Flag" mask="0x02" name="CH1TRNFIF"/>
+                    <bitfield caption="Channel 0 Transaction Complete Interrupt Flag" mask="0x01" name="CH0TRNFIF"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x04" size="1">
+                    <bitfield caption="Channel 3 Busy Flag" mask="0x80" name="CH3BUSY"/>
+                    <bitfield caption="Channel 2 Busy Flag" mask="0x40" name="CH2BUSY"/>
+                    <bitfield caption="Channel 1 Busy Flag" mask="0x20" name="CH1BUSY"/>
+                    <bitfield caption="Channel 0 Busy Flag" mask="0x10" name="CH0BUSY"/>
+                    <bitfield caption="Channel 3 Pending Flag" mask="0x08" name="CH3PEND"/>
+                    <bitfield caption="Channel 2 Pending Flag" mask="0x04" name="CH2PEND"/>
+                    <bitfield caption="Channel 1 Pending Flag" mask="0x02" name="CH1PEND"/>
+                    <bitfield caption="Channel 0 Pending Flag" mask="0x01" name="CH0PEND"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x06" size="1"/>
+                <register-group caption="EDMA Channel 0" name="CH0" offset="0x10" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 1" name="CH1" offset="0x20" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 2" name="CH2" offset="0x30" name-in-module="EDMA_CH"/>
+                <register-group caption="EDMA Channel 3" name="CH3" offset="0x40" name-in-module="EDMA_CH"/>
+            </register-group>
+            <register-group caption="EDMA Channel" name="EDMA_CH" size="16">
+                <register caption="Channel Control A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Channel Enable" mask="0x80" name="ENABLE"/>
+                    <bitfield caption="Channel Software Reset" mask="0x40" name="RESET"/>
+                    <bitfield caption="Channel Repeat Mode" mask="0x20" name="REPEAT"/>
+                    <bitfield caption="Channel Transfer Request" mask="0x10" name="TRFREQ"/>
+                    <bitfield caption="Channel Single Shot Data Transfer" mask="0x04" name="SINGLE"/>
+                    <bitfield caption="Channel 2-bytes Burst Length" mask="0x01" name="BURSTLEN"/>
+                </register>
+                <register caption="Channel Control" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Block Transfer Busy" mask="0x80" name="CHBUSY"/>
+                    <bitfield caption="Channel Block Transfer Pending" mask="0x40" name="CHPEND"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Flag" mask="0x20" name="ERRIF"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Flag" mask="0x10" name="TRNIF"/>
+                    <bitfield caption="Channel Transaction Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="EDMA_CH_INTLVL"/>
+                    <bitfield caption="Channel Transaction Complete Interrupt Level" mask="0x03" name="TRNINTLVL"
+                              values="EDMA_CH_INTLVL"/>
+                </register>
+                <register
+                        caption="Memory Address Control for Peripheral Ch., or Source Address Control for Standard Ch."
+                        name="ADDRCTRL" offset="0x02" size="1">
+                    <bitfield
+                            caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
+                            mask="0x30" name="RELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
+                              mask="0x07" name="DIR" values="EDMA_CH_DIR"/>
+                </register>
+                <register caption="Destination Address Control for Standard Channels Only." name="DESTADDRCTRL"
+                          offset="0x03" size="1">
+                    <bitfield caption="Destination Address Reload for Standard Channels Only." mask="0x30"
+                              name="DESTRELOAD" values="EDMA_CH_RELOAD"/>
+                    <bitfield caption="Destination Address Mode for Standard Channels Only." mask="0x07" name="DESTDIR"
+                              values="EDMA_CH_DESTDIR"/>
+                </register>
+                <register caption="Channel Trigger Source" name="TRIGSRC" offset="0x04" size="1">
+                    <bitfield caption="Channel Trigger Source" mask="0xFF" name="TRIGSRC" values="EDMA_CH_TRIGSRC"/>
+                </register>
+                <register
+                        caption="Channel Block Transfer Count for Peripheral Ch., or Channel Block Transfer Count Low for Standard Ch."
+                        name="TRFCNT" offset="0x06" size="2"/>
+                <register
+                        caption="Channel Memory Address for Peripheral Ch., or Channel Source Address Low for Standard Ch."
+                        name="ADDR" offset="0x08" size="2"/>
+                <register caption="Channel Destination Address for Standard Channels Only." name="DESTADDR"
+                          offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Channel mode" name="EDMA_CHMODE">
+                <value caption="Channels 0, 1, 2 and 3 in peripheal conf." name="PER0123" value="0x00"/>
+                <value caption="Channel 0 in standard conf.; channels 2 and 3 in peripheral conf." name="STD0"
+                       value="0x01"/>
+                <value caption="Channel 2 in standard conf.; channels 0 and 1 in peripheral conf." name="STD2"
+                       value="0x02"/>
+                <value caption="Channels 0 and 2 in standard conf." name="STD02" value="0x03"/>
+            </value-group>
+            <value-group caption="Double buffer mode" name="EDMA_DBUFMODE">
+                <value caption="No double buffer enabled" name="DISABLE" value="0x00"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 (if exist) " name="BUF01"
+                       value="0x01"/>
+                <value caption="Double buffer enabled on peripheral channels 2/3 (if exist)" name="BUF23" value="0x02"/>
+                <value caption="Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2"
+                       name="BUF0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Priority mode" name="EDMA_PRIMODE">
+                <value caption="Round robin on all channels" name="RR0123" value="0x00"/>
+                <value caption="Ch0 &gt; round robin (Ch 1 ch2 Ch3)" name="RR123" value="0x01"/>
+                <value caption="Ch0 &gt; Ch 1 &gt; round robin (Ch2 Ch3)" name="RR23" value="0x02"/>
+                <value caption="Ch0 &gt; Ch1 &gt; Ch2 &gt; Ch3 " name="CH0123" value="0x03"/>
+            </value-group>
+            <value-group caption="Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch."
+                         name="EDMA_CH_RELOAD">
+                <value caption="No reload" name="NONE" value="0x00"/>
+                <value caption="Reload at end of each block transfer" name="BLOCK" value="0x01"/>
+                <value caption="Reload at end of each burst transfer" name="BURST" value="0x02"/>
+                <value caption="Reload at end of each transaction" name="TRANSACTION" value="0x03"/>
+            </value-group>
+            <value-group caption="Memory Address Mode for Peripheral Ch., or Source Address Mode for Standard Ch."
+                         name="EDMA_CH_DIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'mask-match' (data: ADDRL, mask: ADDRH), else reserved conf. "
+                       name="MP1" value="0x04"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH), else reserved conf. "
+                       name="MP2" value="0x05"/>
+                <value caption="If Peripheral Ch. (Per ==&gt; Mem), 2-byte 'match' (data-1: ADDRL followed by data-2: ADDRH), else reserved conf. "
+                       name="MP3" value="0x06"/>
+            </value-group>
+            <value-group caption="Destination addressing mode" name="EDMA_CH_DESTDIR">
+                <value caption="Fixed" name="FIXED" value="0x00"/>
+                <value caption="Increment" name="INC" value="0x01"/>
+                <value caption="1-byte 'mask-match' (data: ADDRL, mask: ADDRH)" name="MP1" value="0x04"/>
+                <value caption="1-byte 'OR-match' (data-1: ADDRL OR data-2: ADDRH)" name="MP2" value="0x05"/>
+                <value caption="2-byte 'match' (data1: ADDRL followed by data2: ADDRH)" name="MP3" value="0x06"/>
+            </value-group>
+            <value-group caption="Transfer trigger source" name="EDMA_CH_TRIGSRC">
+                <value caption="Software triggers only" name="OFF" value="0x00"/>
+                <value caption="Event CH0 as trigger (Standard Channels Only)" name="EVSYS_CH0" value="0x01"/>
+                <value caption="Event CH1 as trigger (Standard Channels Only)" name="EVSYS_CH1" value="0x02"/>
+                <value caption="Event CH2 as trigger (Standard Channels Only)" name="EVSYS_CH2" value="0x03"/>
+                <value caption="ADCA CH0 as trigger" name="ADCA_CH0" value="0x10"/>
+                <value caption="DACA CH0 as trigger" name="DACA_CH0" value="0x15"/>
+                <value caption="DACA CH1 as trigger" name="DACA_CH1" value="0x16"/>
+                <value caption="TCC4 overflow/underflow as trigger (Standard Channels Only)" name="TCC4_OVF"
+                       value="0x40"/>
+                <value caption="TCC4 error as trigger (Standard Channels Only)" name="TCC4_ERR" value="0x41"/>
+                <value caption="TCC4 compare or capture channel A as trigger (Standard Channels Only)" name="TCC4_CCA"
+                       value="0x42"/>
+                <value caption="TCC4 compare or capture channel B as trigger (Standard Channels Only)" name="TCC4_CCB"
+                       value="0x43"/>
+                <value caption="TCC4 compare or capture channel C as trigger (Standard Channels Only)" name="TCC4_CCC"
+                       value="0x44"/>
+                <value caption="TCC4 compare or capture channel D as trigger (Standard Channels Only)" name="TCC4_CCD"
+                       value="0x45"/>
+                <value caption="TCC5 overflow/underflow as trigger (Standard Channels Only)" name="TCC5_OVF"
+                       value="0x46"/>
+                <value caption="TCC5 error as trigger (Standard Channels Only)" name="TCC5_ERR" value="0x47"/>
+                <value caption="TCC5 compare or capture channel A as trigger (Standard Channels Only)" name="TCC5_CCA"
+                       value="0x48"/>
+                <value caption="TCC5 compare or capture channel B as trigger (Standard Channels Only)" name="TCC5_CCB"
+                       value="0x49"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C receive complete as trigger (SPI Buffer Modes)"
+                       name="SPIC_RXC" value="0x4A"/>
+                <value caption="SPI C transfer complete (SPI Standard Mode) or SPI C data register empty as trigger (SPI Buffer modes)"
+                       name="SPIC_DRE" value="0x4B"/>
+                <value caption="USART C0 receive complete as trigger" name="USARTC0_RXC" value="0x4C"/>
+                <value caption="USART C0 data register empty as trigger" name="USARTC0_DRE" value="0x4D"/>
+                <value caption="TCD5 overflow/underflow as trigger (Standard Channels Only)" name="TCD5_OVF"
+                       value="0x66"/>
+                <value caption="TCD5 error as trigger (Standard Channels Only)" name="TCD5_ERR" value="0x67"/>
+                <value caption="TCD5 compare or capture channel A as trigger (Standard Channels Only)" name="TCD5_CCA"
+                       value="0x68"/>
+                <value caption="TCD5 compare or capture channel B as trigger (Standard Channels Only)" name="TCD5_CCB"
+                       value="0x69"/>
+                <value caption="USART D0 receive complete as trigger" name="USARTD0_RXC" value="0x6C"/>
+                <value caption="USART D0 data register empty as trigger" name="USARTD0_DRE" value="0x6D"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="EDMA_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="EDMA">
+                <interrupt index="0" name="CH0" caption="EDMA Channel 0 Interrupt"/>
+                <interrupt index="1" name="CH1" caption="EDMA Channel 1 Interrupt"/>
+                <interrupt index="2" name="CH2" caption="EDMA Channel 2 Interrupt"/>
+                <interrupt index="3" name="CH3" caption="EDMA Channel 3 Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="EVSYS" id="I6061" version="XMEGAE" caption="Event System">
+            <register-group caption="Event System" name="EVSYS" size="19">
+                <register caption="Event Channel 0 Multiplexer" name="CH0MUX" offset="0x00" size="1">
+                    <bitfield caption="Event Channel 0 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 1 Multiplexer" name="CH1MUX" offset="0x01" size="1">
+                    <bitfield caption="Event Channel 1 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 2 Multiplexer" name="CH2MUX" offset="0x02" size="1">
+                    <bitfield caption="Event Channel 2 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 3 Multiplexer" name="CH3MUX" offset="0x03" size="1">
+                    <bitfield caption="Event Channel 3 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 4 Multiplexer" name="CH4MUX" offset="0x04" size="1">
+                    <bitfield caption="Event Channel 4 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 5 Multiplexer" name="CH5MUX" offset="0x05" size="1">
+                    <bitfield caption="Event Channel 5 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 6 Multiplexer" name="CH6MUX" offset="0x06" size="1">
+                    <bitfield caption="Event Channel 6 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Event Channel 7 Multiplexer" name="CH7MUX" offset="0x07" size="1">
+                    <bitfield caption="Event Channel 7 Multiplexer" mask="0xFF" name="CHMUX" values="EVSYS_CHMUX"/>
+                </register>
+                <register caption="Channel 0 Control Register" name="CH0CTRL" offset="0x08" size="1">
+                    <bitfield caption="Rotary Decoder Enable" mask="0x80" name="ROTARY"/>
+                    <bitfield caption="Quadrature Decoder Index Recognition Mode" mask="0x60" name="QDIRM"
+                              values="EVSYS_QDIRM"/>
+                    <bitfield caption="Quadrature Decoder Index Enable" mask="0x10" name="QDIEN"/>
+                    <bitfield caption="Quadrature Decoder Enable" mask="0x08" name="QDEN"/>
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 1 Control Register" name="CH1CTRL" offset="0x09" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 2 Control Register" name="CH2CTRL" offset="0x0A" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 3 Control Register" name="CH3CTRL" offset="0x0B" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 4 Control Register" name="CH4CTRL" offset="0x0C" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 5 Control Register" name="CH5CTRL" offset="0x0D" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 6 Control Register" name="CH6CTRL" offset="0x0E" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Channel 7 Control Register" name="CH7CTRL" offset="0x0F" size="1">
+                    <bitfield caption="Digital Filter" mask="0x07" name="DIGFILT" values="EVSYS_DIGFILT"/>
+                </register>
+                <register caption="Event Strobe" name="STROBE" offset="0x10" size="1"/>
+                <register caption="Event Data" name="DATA" offset="0x11" size="1"/>
+                <register caption="Digital Filter Control Register" name="DFCTRL" offset="0x12" size="1">
+                    <bitfield caption="Prescaler Filter" mask="0xF0" name="PRESCFILT" values="EVSYS_PRESCFILT"/>
+                    <bitfield caption="Prescaler Filter Select" mask="0x08" name="FILTSEL"/>
+                    <bitfield caption="Prescaler" mask="0x07" name="PRESC" values="EVSYS_PRESCALER"/>
+                </register>
+            </register-group>
+            <value-group caption="Event Channel multiplexer input selection" name="EVSYS_CHMUX">
+                <value caption="Off" name="OFF" value="0x00"/>
+                <value caption="RTC Overflow" name="RTC_OVF" value="0x08"/>
+                <value caption="RTC Compare Match" name="RTC_CMP" value="0x09"/>
+                <value caption="Analog Comparator A Channel 0" name="ACA_CH0" value="0x10"/>
+                <value caption="Analog Comparator A Channel 1" name="ACA_CH1" value="0x11"/>
+                <value caption="Analog Comparator A Window" name="ACA_WIN" value="0x12"/>
+                <value caption="ADC A Channel 0" name="ADCA_CH0" value="0x20"/>
+                <value caption="Port A, Pin0" name="PORTA_PIN0" value="0x50"/>
+                <value caption="Port A, Pin1" name="PORTA_PIN1" value="0x51"/>
+                <value caption="Port A, Pin2" name="PORTA_PIN2" value="0x52"/>
+                <value caption="Port A, Pin3" name="PORTA_PIN3" value="0x53"/>
+                <value caption="Port A, Pin4" name="PORTA_PIN4" value="0x54"/>
+                <value caption="Port A, Pin5" name="PORTA_PIN5" value="0x55"/>
+                <value caption="Port A, Pin6" name="PORTA_PIN6" value="0x56"/>
+                <value caption="Port A, Pin7" name="PORTA_PIN7" value="0x57"/>
+                <value caption="Port C, Pin0" name="PORTC_PIN0" value="0x60"/>
+                <value caption="Port C, Pin1" name="PORTC_PIN1" value="0x61"/>
+                <value caption="Port C, Pin2" name="PORTC_PIN2" value="0x62"/>
+                <value caption="Port C, Pin3" name="PORTC_PIN3" value="0x63"/>
+                <value caption="Port C, Pin4" name="PORTC_PIN4" value="0x64"/>
+                <value caption="Port C, Pin5" name="PORTC_PIN5" value="0x65"/>
+                <value caption="Port C, Pin6" name="PORTC_PIN6" value="0x66"/>
+                <value caption="Port C, Pin7" name="PORTC_PIN7" value="0x67"/>
+                <value caption="Port D, Pin0" name="PORTD_PIN0" value="0x68"/>
+                <value caption="Port D, Pin1" name="PORTD_PIN1" value="0x69"/>
+                <value caption="Port D, Pin2" name="PORTD_PIN2" value="0x6A"/>
+                <value caption="Port D, Pin3" name="PORTD_PIN3" value="0x6B"/>
+                <value caption="Port D, Pin4" name="PORTD_PIN4" value="0x6C"/>
+                <value caption="Port D, Pin5" name="PORTD_PIN5" value="0x6D"/>
+                <value caption="Port D, Pin6" name="PORTD_PIN6" value="0x6E"/>
+                <value caption="Port D, Pin7" name="PORTD_PIN7" value="0x6F"/>
+                <value caption="Prescaler, divide by 1" name="PRESCALER_1" value="0x80"/>
+                <value caption="Prescaler, divide by 2" name="PRESCALER_2" value="0x81"/>
+                <value caption="Prescaler, divide by 4" name="PRESCALER_4" value="0x82"/>
+                <value caption="Prescaler, divide by 8" name="PRESCALER_8" value="0x83"/>
+                <value caption="Prescaler, divide by 16" name="PRESCALER_16" value="0x84"/>
+                <value caption="Prescaler, divide by 32" name="PRESCALER_32" value="0x85"/>
+                <value caption="Prescaler, divide by 64" name="PRESCALER_64" value="0x86"/>
+                <value caption="Prescaler, divide by 128" name="PRESCALER_128" value="0x87"/>
+                <value caption="Prescaler, divide by 256" name="PRESCALER_256" value="0x88"/>
+                <value caption="Prescaler, divide by 512" name="PRESCALER_512" value="0x89"/>
+                <value caption="Prescaler, divide by 1024" name="PRESCALER_1024" value="0x8A"/>
+                <value caption="Prescaler, divide by 2048" name="PRESCALER_2048" value="0x8B"/>
+                <value caption="Prescaler, divide by 4096" name="PRESCALER_4096" value="0x8C"/>
+                <value caption="Prescaler, divide by 8192" name="PRESCALER_8192" value="0x8D"/>
+                <value caption="Prescaler, divide by 16384" name="PRESCALER_16384" value="0x8E"/>
+                <value caption="Prescaler, divide by 32768" name="PRESCALER_32768" value="0x8F"/>
+                <value caption="XCL BTC0 underflow" name="XCL_UNF0" value="0xB0"/>
+                <value caption="XCL BTC1 underflow" name="XCL_UNF1" value="0xB1"/>
+                <value caption="XCL BTC0 capture or compare" name="XCL_CC0" value="0xB2"/>
+                <value caption="XCL BTC1 capture or compare" name="XCL_CC1" value="0xB3"/>
+                <value caption="XCL PEC0 restart" name="XCL_PEC0" value="0xB4"/>
+                <value caption="XCL PEC1 restart" name="XCL_PEC1" value="0xB5"/>
+                <value caption="XCL LUT0 output" name="XCL_LUT0" value="0xB6"/>
+                <value caption="XCL LUT1 output" name="XCL_LUT1" value="0xB7"/>
+                <value caption="Timer/Counter C4 Overflow" name="TCC4_OVF" value="0xC0"/>
+                <value caption="Timer/Counter C4 Error" name="TCC4_ERR" value="0xC1"/>
+                <value caption="Timer/Counter C4 Compare or Capture A" name="TCC4_CCA" value="0xC4"/>
+                <value caption="Timer/Counter C4 Compare or Capture B" name="TCC4_CCB" value="0xC5"/>
+                <value caption="Timer/Counter C4 Compare or Capture C" name="TCC4_CCC" value="0xC6"/>
+                <value caption="Timer/Counter C4 Compare or Capture D" name="TCC4_CCD" value="0xC7"/>
+                <value caption="Timer/Counter C5 Overflow" name="TCC5_OVF" value="0xC8"/>
+                <value caption="Timer/Counter C5 Error" name="TCC5_ERR" value="0xC9"/>
+                <value caption="Timer/Counter C5 Compare or Capture A" name="TCC5_CCA" value="0xCC"/>
+                <value caption="Timer/Counter C5 Compare or Capture B" name="TCC5_CCB" value="0xCD"/>
+                <value caption="Timer/Counter D5 Overflow" name="TCD5_OVF" value="0xD8"/>
+                <value caption="Timer/Counter D5 Error" name="TCD5_ERR" value="0xD9"/>
+                <value caption="Timer/Counter D5 Compare or Capture A" name="TCD5_CCA" value="0xDC"/>
+                <value caption="Timer/Counter D5 Compare or Capture B" name="TCD5_CCB" value="0xDD"/>
+            </value-group>
+            <value-group caption="Quadrature Decoder Index Recognition Mode" name="EVSYS_QDIRM">
+                <value caption="QDPH0 = 0, QDPH90 = 0" name="00" value="0x00"/>
+                <value caption="QDPH0 = 0, QDPH90 = 1" name="01" value="0x01"/>
+                <value caption="QDPH0 = 1, QDPH90 = 0" name="10" value="0x02"/>
+                <value caption="QDPH0 = 1, QDPH90 = 1" name="11" value="0x03"/>
+            </value-group>
+            <value-group caption="Digital filter coefficient" name="EVSYS_DIGFILT">
+                <value caption="1 SAMPLE" name="1SAMPLE" value="0x00"/>
+                <value caption="2 SAMPLES" name="2SAMPLES" value="0x01"/>
+                <value caption="3 SAMPLES" name="3SAMPLES" value="0x02"/>
+                <value caption="4 SAMPLES" name="4SAMPLES" value="0x03"/>
+                <value caption="5 SAMPLES" name="5SAMPLES" value="0x04"/>
+                <value caption="6 SAMPLES" name="6SAMPLES" value="0x05"/>
+                <value caption="7 SAMPLES" name="7SAMPLES" value="0x06"/>
+                <value caption="8 SAMPLES" name="8SAMPLES" value="0x07"/>
+            </value-group>
+            <value-group caption="Prescaler Filter" name="EVSYS_PRESCFILT">
+                <value caption="Enable prescaler filter for either channel 0 or 4" name="CH04" value="0x01"/>
+                <value caption="Enable prescaler filter for either channel 1 or 5" name="CH15" value="0x02"/>
+                <value caption="Enable prescaler filter for either channel 2 or 6" name="CH26" value="0x04"/>
+                <value caption="Enable prescaler filter for either channel 3 or 7" name="CH37" value="0x08"/>
+            </value-group>
+            <value-group caption="Prescaler" name="EVSYS_PRESCALER">
+                <value caption="CLKPER, divide by 8" name="CLKPER_8" value="0x00"/>
+                <value caption="CLKPER, divide by 64" name="CLKPER_64" value="0x01"/>
+                <value caption="CLKPER, divide by 512" name="CLKPER_512" value="0x02"/>
+                <value caption="CLKPER, divide by 4096" name="CLKPER_4096" value="0x03"/>
+                <value caption="CLKPER, divide by 32768" name="CLKPER_32768" value="0x04"/>
+            </value-group>
+        </module>
+        <module name="NVM" id="I3620" version="XMEGAE" caption="Non Volatile Memory Controller">
+            <register-group caption="Non-volatile Memory Controller" name="NVM" size="17">
+                <register caption="Address Register 0" name="ADDR0" offset="0x00" size="1"/>
+                <register caption="Address Register 1" name="ADDR1" offset="0x01" size="1"/>
+                <register caption="Address Register 2" name="ADDR2" offset="0x02" size="1"/>
+                <register caption="Data Register 0" name="DATA0" offset="0x04" size="1"/>
+                <register caption="Data Register 1" name="DATA1" offset="0x05" size="1"/>
+                <register caption="Data Register 2" name="DATA2" offset="0x06" size="1"/>
+                <register caption="Command" name="CMD" offset="0x0A" size="1">
+                    <bitfield caption="Command" mask="0x7F" name="CMD" values="NVM_CMD"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x0B" size="1">
+                    <bitfield caption="Command Execute" mask="0x01" name="CMDEX"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x0C" size="1">
+                    <bitfield caption="EEPROM Power Reduction Enable" mask="0x02" name="EPRM"/>
+                    <bitfield caption="SPM Lock" mask="0x01" name="SPMLOCK"/>
+                </register>
+                <register caption="Interrupt Control" name="INTCTRL" offset="0x0D" size="1">
+                    <bitfield caption="SPM Interrupt Level" mask="0x0C" name="SPMLVL" values="NVM_SPMLVL"/>
+                    <bitfield caption="EEPROM Interrupt Level" mask="0x03" name="EELVL" values="NVM_EELVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x0F" size="1">
+                    <bitfield caption="Non-volatile Memory Busy" mask="0x80" name="NVMBUSY"/>
+                    <bitfield caption="Flash Memory Busy" mask="0x40" name="FBUSY"/>
+                    <bitfield caption="EEPROM Page Buffer Active Loading" mask="0x02" name="EELOAD"/>
+                    <bitfield caption="Flash Page Buffer Active Loading" mask="0x01" name="FLOAD"/>
+                </register>
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x10" size="1">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="NVM_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA" values="NVM_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT" values="NVM_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="NVM_LB"/>
+                </register>
+            </register-group>
+            <value-group caption="NVM Command" name="NVM_CMD">
+                <value caption="Noop/Ordinary LPM" name="NO_OPERATION" value="0x00"/>
+                <value caption="Read user signature row" name="READ_USER_SIG_ROW" value="0x01"/>
+                <value caption="Read calibration row" name="READ_CALIB_ROW" value="0x02"/>
+                <value caption="Read fuse byte" name="READ_FUSES" value="0x07"/>
+                <value caption="Write lock bits" name="WRITE_LOCK_BITS" value="0x08"/>
+                <value caption="Erase user signature row" name="ERASE_USER_SIG_ROW" value="0x18"/>
+                <value caption="Write user signature row" name="WRITE_USER_SIG_ROW" value="0x1A"/>
+                <value caption="Erase Application Section" name="ERASE_APP" value="0x20"/>
+                <value caption="Erase Application Section page" name="ERASE_APP_PAGE" value="0x22"/>
+                <value caption="Load Flash page buffer" name="LOAD_FLASH_BUFFER" value="0x23"/>
+                <value caption="Write Application Section page" name="WRITE_APP_PAGE" value="0x24"/>
+                <value caption="Erase-and-write Application Section page" name="ERASE_WRITE_APP_PAGE" value="0x25"/>
+                <value caption="Erase/flush Flash page buffer" name="ERASE_FLASH_BUFFER" value="0x26"/>
+                <value caption="Erase Boot Section page" name="ERASE_BOOT_PAGE" value="0x2A"/>
+                <value caption="Erase Flash Page" name="ERASE_FLASH_PAGE" value="0x2B"/>
+                <value caption="Write Boot Section page" name="WRITE_BOOT_PAGE" value="0x2C"/>
+                <value caption="Erase-and-write Boot Section page" name="ERASE_WRITE_BOOT_PAGE" value="0x2D"/>
+                <value caption="Write Flash Page" name="WRITE_FLASH_PAGE" value="0x2E"/>
+                <value caption="Erase-and-write Flash Page" name="ERASE_WRITE_FLASH_PAGE" value="0x2F"/>
+                <value caption="Erase EEPROM" name="ERASE_EEPROM" value="0x30"/>
+                <value caption="Erase EEPROM page" name="ERASE_EEPROM_PAGE" value="0x32"/>
+                <value caption="Write EEPROM page" name="WRITE_EEPROM_PAGE" value="0x34"/>
+                <value caption="Erase-and-write EEPROM page" name="ERASE_WRITE_EEPROM_PAGE" value="0x35"/>
+                <value caption="Erase/flush EEPROM page buffer" name="ERASE_EEPROM_BUFFER" value="0x36"/>
+                <value caption="Application section CRC" name="APP_CRC" value="0x38"/>
+                <value caption=" Boot Section CRC" name="BOOT_CRC" value="0x39"/>
+                <value caption="Flash Range CRC" name="FLASH_RANGE_CRC" value="0x3A"/>
+                <value caption="Erase Chip" name="CHIP_ERASE" value="0x40"/>
+                <value caption="Read NVM" name="READ_NVM" value="0x43"/>
+                <value caption="Write Fuse byte" name="WRITE_FUSE" value="0x4C"/>
+                <value caption="Erase Boot Section" name="ERASE_BOOT" value="0x68"/>
+                <value caption="Flash CRC" name="FLASH_CRC" value="0x78"/>
+            </value-group>
+            <value-group caption="SPM ready interrupt level" name="NVM_SPMLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="EEPROM ready interrupt level" name="NVM_EELVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - boot section" name="NVM_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="NVM_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="NVM_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="NVM_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <interrupt-group name="NVM">
+                <interrupt index="0" name="EE" caption="EE Interrupt"/>
+                <interrupt index="1" name="SPM" caption="SPM Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="ADC" id="I6110" version="XMEGAE" caption="Analog/Digital Converter">
+            <register-group caption="ADC Channel" name="ADC_CH" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Channel Start Conversion" mask="0x80" name="START"/>
+                    <bitfield caption="Gain Factor" mask="0x1C" name="GAIN" values="ADC_CH_GAIN"/>
+                    <bitfield caption="Input Mode Select" mask="0x03" name="INPUTMODE" values="ADC_CH_INPUTMODE"/>
+                </register>
+                <register caption="MUX Control" name="MUXCTRL" offset="0x01" size="1">
+                    <bitfield caption="MUX selection on Positive ADC Input" mask="0x78" name="MUXPOS"
+                              values="ADC_CH_MUXPOS"/>
+                    <bitfield caption="MUX selection on Internal ADC Input" mask="0x78" name="MUXINT"
+                              values="ADC_CH_MUXINT"/>
+                    <bitfield caption="MUX selection on Negative ADC Input" mask="0x07" name="MUXNEG"
+                              values="ADC_CH_MUXNEG"/>
+                </register>
+                <register caption="Channel Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0x0C" name="INTMODE" values="ADC_CH_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x03" name="INTLVL" values="ADC_CH_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Channel Interrupt Flag" mask="0x01" name="IF"/>
+                </register>
+                <register caption="Channel Result" name="RES" offset="0x04" size="2"/>
+                <register caption="Input Channel Scan" name="SCAN" offset="0x06" size="1">
+                    <bitfield caption="Positive MUX Setting Offset" mask="0xF0" name="INPUTOFFSET"/>
+                    <bitfield caption="Number of Channels Included in Scan" mask="0x0F" name="INPUTSCAN"/>
+                </register>
+                <register caption="Correction Control Register" name="CORRCTRL" offset="0x07" size="1">
+                    <bitfield caption="Correction Enable" mask="0x01" name="CORREN"/>
+                </register>
+                <register caption="Offset Correction Register 0" name="OFFSETCORR0" offset="0x08" size="1"/>
+                <register caption="Offset Correction Register 1" name="OFFSETCORR1" offset="0x09" size="1">
+                    <bitfield caption="Offset Correction Byte 1" mask="0x0F" name="OFFSETCORR"/>
+                </register>
+                <register caption="Gain Correction Register 0" name="GAINCORR0" offset="0x0A" size="1"/>
+                <register caption="Gain Correction Register 1" name="GAINCORR1" offset="0x0B" size="1">
+                    <bitfield caption="Gain Correction Byte 1" mask="0x0F" name="GAINCORR"/>
+                </register>
+                <register caption="Average Control Register" name="AVGCTRL" offset="0x0C" size="1">
+                    <bitfield caption="Right Shift" mask="0x70" name="RIGHTSHIFT"/>
+                    <bitfield caption="Averaged Number of Samples" mask="0x0F" name="SAMPNUM" values="ADC_SAMPNUM"/>
+                </register>
+            </register-group>
+            <register-group caption="Analog-to-Digital Converter" name="ADC" size="48">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Start Conversion" mask="0x04" name="START"/>
+                    <bitfield caption="ADC Flush" mask="0x02" name="FLUSH"/>
+                    <bitfield caption="Enable ADC" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Current Limitation" mask="0x60" name="CURRLIMIT" values="ADC_CURRLIMIT"/>
+                    <bitfield caption="Conversion Mode" mask="0x10" name="CONMODE"/>
+                    <bitfield caption="Free Running Mode Enable" mask="0x08" name="FREERUN"/>
+                    <bitfield caption="Result Resolution" mask="0x06" name="RESOLUTION" values="ADC_RESOLUTION"/>
+                </register>
+                <register caption="Reference Control" name="REFCTRL" offset="0x02" size="1">
+                    <bitfield caption="Reference Selection" mask="0x70" name="REFSEL" values="ADC_REFSEL"/>
+                    <bitfield caption="Bandgap enable" mask="0x02" name="BANDGAP"/>
+                    <bitfield caption="Temperature Reference Enable" mask="0x01" name="TEMPREF"/>
+                </register>
+                <register caption="Event Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Event Input Select" mask="0x38" name="EVSEL" values="ADC_EVSEL"/>
+                    <bitfield caption="Event Action Select" mask="0x07" name="EVACT" values="ADC_EVACT"/>
+                </register>
+                <register caption="Clock Prescaler" name="PRESCALER" offset="0x04" size="1">
+                    <bitfield caption="Clock Prescaler Selection" mask="0x07" name="PRESCALER" values="ADC_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x06" size="1">
+                    <bitfield caption="Channel 0 Interrupt Flag" mask="0x01" name="CH0IF"/>
+                </register>
+                <register caption="Temporary Register" name="TEMP" offset="0x07" size="1"/>
+                <register caption="ADC Sampling Time Control Register" name="SAMPCTRL" offset="0x08" size="1">
+                    <bitfield caption="Sampling time control register" mask="0x03F" name="SAMPVAL"/>
+                </register>
+                <register caption="Calibration Value" name="CAL" offset="0x0C" size="1"/>
+                <register caption="Channel 0 Result" name="CH0RES" offset="0x10" size="2"/>
+                <register caption="Compare Value" name="CMP" offset="0x18" size="2"/>
+                <register-group caption="ADC Channel 0" name="CH0" offset="0x20" name-in-module="ADC_CH"/>
+            </register-group>
+            <value-group caption="Current Limitation" name="ADC_CURRLIMIT">
+                <value caption="No current limit,     300ksps max sampling rate" name="NO" value="0x00"/>
+                <value caption="Low current limit,    250ksps max sampling rate" name="LOW" value="0x01"/>
+                <value caption="Medium current limit, 150ksps max sampling rate" name="MED" value="0x02"/>
+                <value caption="High current limit,   50ksps max sampling rate" name="HIGH" value="0x03"/>
+            </value-group>
+            <value-group caption="Conversion result resolution" name="ADC_RESOLUTION">
+                <value caption="12-bit right-adjusted result" name="12BIT" value="0x00"/>
+                <value caption="More than 12-bit (oversapling) right-adjusted result" name="MT12BIT" value="0x01"/>
+                <value caption="8-bit right-adjusted result" name="8BIT" value="0x02"/>
+                <value caption="12-bit left-adjusted result" name="LEFT12BIT" value="0x03"/>
+            </value-group>
+            <value-group caption="Voltage reference selection" name="ADC_REFSEL">
+                <value caption="Internal 1V" name="INT1V" value="0x00"/>
+                <value caption="Internal VCC / 1.6" name="INTVCC" value="0x01"/>
+                <value caption="External reference on PORT A" name="AREFA" value="0x02"/>
+                <value caption="External reference on PORT D" name="AREFD" value="0x03"/>
+                <value caption="Internal VCC / 2" name="INTVCC2" value="0x04"/>
+            </value-group>
+            <value-group caption="Event channel input selection" name="ADC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+            <value-group caption="Event action selection" name="ADC_EVACT">
+                <value caption="No event action" name="NONE" value="0x00"/>
+                <value caption="First event triggers channel conversion" name="CH0" value="0x01"/>
+                <value caption="The ADC is flushed and restarted for accurate timing" name="SYNCSWEEP" value="0x06"/>
+            </value-group>
+            <value-group caption="Clock prescaler" name="ADC_PRESCALER">
+                <value caption="Divide clock by 4" name="DIV4" value="0x00"/>
+                <value caption="Divide clock by 8" name="DIV8" value="0x01"/>
+                <value caption="Divide clock by 16" name="DIV16" value="0x02"/>
+                <value caption="Divide clock by 32" name="DIV32" value="0x03"/>
+                <value caption="Divide clock by 64" name="DIV64" value="0x04"/>
+                <value caption="Divide clock by 128" name="DIV128" value="0x05"/>
+                <value caption="Divide clock by 256" name="DIV256" value="0x06"/>
+                <value caption="Divide clock by 512" name="DIV512" value="0x07"/>
+            </value-group>
+            <value-group caption="Gain factor" name="ADC_CH_GAIN">
+                <value caption="1x gain" name="1X" value="0x00"/>
+                <value caption="2x gain" name="2X" value="0x01"/>
+                <value caption="4x gain" name="4X" value="0x02"/>
+                <value caption="8x gain" name="8X" value="0x03"/>
+                <value caption="16x gain" name="16X" value="0x04"/>
+                <value caption="32x gain" name="32X" value="0x05"/>
+                <value caption="64x gain" name="64X" value="0x06"/>
+                <value caption="x/2 gain" name="DIV2" value="0x07"/>
+            </value-group>
+            <value-group caption="Input mode" name="ADC_CH_INPUTMODE">
+                <value caption="Internal inputs, no gain" name="INTERNAL" value="0x00"/>
+                <value caption="Single-ended input, no gain" name="SINGLEENDED" value="0x01"/>
+                <value caption="Differential input, gain with 4 LSB pins selection" name="DIFFWGAINL" value="0x02"/>
+                <value caption="Differential input, gain with 4 MSB pins selection" name="DIFFWGAINH" value="0x03"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="ADC_CH_MUXPOS">
+                <value caption="Input pin 0" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4" name="PIN4" value="0x04"/>
+                <value caption="Input pin 5" name="PIN5" value="0x05"/>
+                <value caption="Input pin 6" name="PIN6" value="0x06"/>
+                <value caption="Input pin 7" name="PIN7" value="0x07"/>
+                <value caption="Input pin 8" name="PIN8" value="0x08"/>
+                <value caption="Input pin 9" name="PIN9" value="0x09"/>
+                <value caption="Input pin 10" name="PIN10" value="0x0A"/>
+                <value caption="Input pin 11" name="PIN11" value="0x0B"/>
+                <value caption="Input pin 12" name="PIN12" value="0x0C"/>
+                <value caption="Input pin 13" name="PIN13" value="0x0D"/>
+                <value caption="Input pin 14" name="PIN14" value="0x0E"/>
+                <value caption="Input pin 15" name="PIN15" value="0x0F"/>
+            </value-group>
+            <value-group caption="Internal input multiplexer selections" name="ADC_CH_MUXINT">
+                <value caption="Temperature Reference" name="TEMP" value="0x00"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x01"/>
+                <value caption="1/10 Scaled VCC" name="SCALEDVCC" value="0x02"/>
+                <value caption="DAC Output" name="DAC" value="0x03"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="ADC_CH_MUXNEG">
+                <value caption="Input pin 0 (Input Mode = 2)" name="PIN0" value="0x00"/>
+                <value caption="Input pin 1 (Input Mode = 2)" name="PIN1" value="0x01"/>
+                <value caption="Input pin 2 (Input Mode = 2)" name="PIN2" value="0x02"/>
+                <value caption="Input pin 3 (Input Mode = 2)" name="PIN3" value="0x03"/>
+                <value caption="Input pin 4 (Input Mode = 3)" name="PIN4" value="0x00"/>
+                <value caption="Input pin 5 (Input Mode = 3)" name="PIN5" value="0x01"/>
+                <value caption="Input pin 6 (Input Mode = 3)" name="PIN6" value="0x02"/>
+                <value caption="Input pin 7 (Input Mode = 3)" name="PIN7" value="0x03"/>
+                <value caption="PAD Ground (Input Mode = 2)" name="GND_MODE3" value="0x05"/>
+                <value caption="Internal Ground (Input Mode = 2)" name="INTGND_MODE3" value="0x07"/>
+                <value caption="Internal Ground (Input Mode = 3)" name="INTGND_MODE4" value="0x04"/>
+                <value caption="PAD Ground (Input Mode = 3)" name="GND_MODE4" value="0x07"/>
+            </value-group>
+            <value-group caption="Interrupt mode" name="ADC_CH_INTMODE">
+                <value caption="Interrupt on conversion complete" name="COMPLETE" value="0x00"/>
+                <value caption="Interrupt on result below compare value" name="BELOW" value="0x01"/>
+                <value caption="Interrupt on result above compare value" name="ABOVE" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="ADC_CH_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Averaged Number of Samples" name="ADC_SAMPNUM">
+                <value caption="1 Sample" name="1X" value="0x00"/>
+                <value caption="2 Samples" name="2X" value="0x01"/>
+                <value caption="4 Samples" name="4X" value="0x02"/>
+                <value caption="8 Samples" name="8X" value="0x03"/>
+                <value caption="16 Samples" name="16X" value="0x04"/>
+                <value caption="32 Samples" name="32X" value="0x05"/>
+                <value caption="64 Samples" name="64X" value="0x06"/>
+                <value caption="128 Samples" name="128X" value="0x07"/>
+                <value caption="256 Samples" name="256X" value="0x08"/>
+                <value caption="512 Samples" name="512X" value="0x09"/>
+                <value caption="1024 Samples" name="1024X" value="0x0A"/>
+            </value-group>
+            <interrupt-group name="ADC">
+                <interrupt index="0" name="CH0" caption="ADC Channel Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="DAC" id="I6059" version="XMEGAAU" caption="Digital/Analog Converter">
+            <register-group caption="Digital-to-Analog Converter" name="DAC" size="28">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Internal Output Enable" mask="0x10" name="IDOEN"/>
+                    <bitfield caption="Channel 1 Output Enable" mask="0x08" name="CH1EN"/>
+                    <bitfield caption="Channel 0 Output Enable" mask="0x04" name="CH0EN"/>
+                    <bitfield caption="Low Power Mode" mask="0x02" name="LPMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Channel Select" mask="0x60" name="CHSEL" values="DAC_CHSEL"/>
+                    <bitfield caption="Channel 1 Event Trig Enable" mask="0x02" name="CH1TRIG"/>
+                    <bitfield caption="Channel 0 Event Trig Enable" mask="0x01" name="CH0TRIG"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Reference Select" mask="0x18" name="REFSEL" values="DAC_REFSEL"/>
+                    <bitfield caption="Left-adjust Result" mask="0x01" name="LEFTADJ"/>
+                </register>
+                <register caption="Event Input Control" name="EVCTRL" offset="0x03" size="1">
+                    <bitfield caption="Separate Event Channel Input for Channel 1" mask="0x08" name="EVSPLIT"/>
+                    <bitfield caption="Event Input Selection" mask="0x07" name="EVSEL" values="DAC_EVSEL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Channel 1 Data Register Empty" mask="0x02" name="CH1DRE"/>
+                    <bitfield caption="Channel 0 Data Register Empty" mask="0x01" name="CH0DRE"/>
+                </register>
+                <register caption="Gain Calibration" name="CH0GAINCAL" offset="0x08" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH0GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH0OFFSETCAL" offset="0x09" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH0OFFSETCAL"/>
+                </register>
+                <register caption="Gain Calibration" name="CH1GAINCAL" offset="0x0A" size="1">
+                    <bitfield caption="Gain Calibration" mask="0x7F" name="CH1GAINCAL"/>
+                </register>
+                <register caption="Offset Calibration" name="CH1OFFSETCAL" offset="0x0B" size="1">
+                    <bitfield caption="Offset Calibration" mask="0x7F" name="CH1OFFSETCAL"/>
+                </register>
+                <register caption="Channel 0 Data" name="CH0DATA" offset="0x18" size="2"/>
+                <register caption="Channel 1 Data" name="CH1DATA" offset="0x1A" size="2"/>
+            </register-group>
+            <value-group caption="Output channel selection" name="DAC_CHSEL">
+                <value caption="Single channel operation (Channel 0 only)" name="SINGLE" value="0x00"/>
+                <value caption="Single channel operation (Channel 1 only)" name="SINGLE1" value="0x01"/>
+                <value caption="Dual channel operation (Channel 0 and channel 1)" name="DUAL" value="0x02"/>
+            </value-group>
+            <value-group caption="Reference voltage selection" name="DAC_REFSEL">
+                <value caption="Internal 1V " name="INT1V" value="0x00"/>
+                <value caption="Analog supply voltage" name="AVCC" value="0x01"/>
+                <value caption="External reference on AREF on PORTA" name="AREFA" value="0x02"/>
+                <value caption="External reference on AREF on PORTD" name="AREFD" value="0x03"/>
+                <value caption="Define for PortB kept for legacy reasons" name="AREFB" value="0x03"/>
+            </value-group>
+            <value-group caption="Event channel selection" name="DAC_EVSEL">
+                <value caption="Event Channel 0" name="0" value="0x00"/>
+                <value caption="Event Channel 1" name="1" value="0x01"/>
+                <value caption="Event Channel 2" name="2" value="0x02"/>
+                <value caption="Event Channel 3" name="3" value="0x03"/>
+                <value caption="Event Channel 4" name="4" value="0x04"/>
+                <value caption="Event Channel 5" name="5" value="0x05"/>
+                <value caption="Event Channel 6" name="6" value="0x06"/>
+                <value caption="Event Channel 7" name="7" value="0x07"/>
+            </value-group>
+        </module>
+        <module name="AC" id="I6077" version="XMEGAE" caption="Analog Comparator">
+            <register-group caption="Analog Comparator" name="AC" size="10">
+                <register caption="Analog Comparator 0 Control" name="AC0CTRL" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 1 Control" name="AC1CTRL" offset="0x01" size="1">
+                    <bitfield caption="Interrupt Mode" mask="0xC0" name="INTMODE" values="AC_INTMODE"/>
+                    <bitfield caption="Interrupt Level" mask="0x30" name="INTLVL" values="AC_INTLVL"/>
+                    <bitfield caption="Hysteresis Mode" mask="0x06" name="HYSMODE" values="AC_HYSMODE"/>
+                    <bitfield caption="Enable" mask="0x01" name="ENABLE"/>
+                </register>
+                <register caption="Analog Comparator 0 MUX Control" name="AC0MUXCTRL" offset="0x02" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Analog Comparator 1 MUX Control" name="AC1MUXCTRL" offset="0x03" size="1">
+                    <bitfield caption="MUX Positive Input" mask="0x38" name="MUXPOS" values="AC_MUXPOS"/>
+                    <bitfield caption="MUX Negative Input" mask="0x07" name="MUXNEG" values="AC_MUXNEG"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x04" size="1">
+                    <bitfield caption="Analog Comparator 1 Output Invert Enable" mask="0x08" name="AC1INVEN"/>
+                    <bitfield caption="Analog Comparator 0 Output Invert Enable" mask="0x04" name="AC0INVEN"/>
+                    <bitfield caption="Analog Comparator 1 Output Enable" mask="0x02" name="AC1OUT"/>
+                    <bitfield caption="Analog Comparator 0 Output Enable" mask="0x01" name="AC0OUT"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x05" size="1">
+                    <bitfield caption="VCC Voltage Scaler Factor" mask="0x3F" name="SCALEFAC"/>
+                </register>
+                <register caption="Window Mode Control" name="WINCTRL" offset="0x06" size="1">
+                    <bitfield caption="Window Mode Enable" mask="0x10" name="WEN"/>
+                    <bitfield caption="Window Interrupt Mode" mask="0x0C" name="WINTMODE" values="AC_WINTMODE"/>
+                    <bitfield caption="Window Interrupt Level" mask="0x03" name="WINTLVL" values="AC_WINTLVL"/>
+                </register>
+                <register caption="Status" name="STATUS" offset="0x07" size="1">
+                    <bitfield caption="Window Mode State" mask="0xC0" name="WSTATE" values="AC_WSTATE"/>
+                    <bitfield caption="Analog Comparator 1 State" mask="0x20" name="AC1STATE"/>
+                    <bitfield caption="Analog Comparator 0 State" mask="0x10" name="AC0STATE"/>
+                    <bitfield caption="Window Mode Interrupt Flag" mask="0x04" name="WIF"/>
+                    <bitfield caption="Analog Comparator 1 Interrupt Flag" mask="0x02" name="AC1IF"/>
+                    <bitfield caption="Analog Comparator 0 Interrupt Flag" mask="0x01" name="AC0IF"/>
+                </register>
+                <register caption="Current Source Control Register" name="CURRCTRL" offset="0x08" size="1">
+                    <bitfield caption="Current Source Enable" mask="0x80" name="CURREN"/>
+                    <bitfield caption="Current Mode" mask="0x40" name="CURRMODE"/>
+                    <bitfield caption="Analog Comparator 1 current source output" mask="0x02" name="AC1CURR"/>
+                    <bitfield caption="Analog Comparator 0 current source output" mask="0x01" name="AC0CURR"/>
+                </register>
+                <register caption="Current Source Calibration Register" name="CURRCALIB" offset="0x09" size="1">
+                    <bitfield caption="Current Source Calibration" mask="0x0F" name="CALIB"/>
+                </register>
+            </register-group>
+            <value-group caption="Interrupt mode" name="AC_INTMODE">
+                <value caption="Interrupt on both edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Interrupt on falling edge" name="FALLING" value="0x02"/>
+                <value caption="Interrupt on rising edge" name="RISING" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="AC_INTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low level" name="LO" value="0x01"/>
+                <value caption="Medium level" name="MED" value="0x02"/>
+                <value caption="High level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Hysteresis mode selection" name="AC_HYSMODE">
+                <value caption="No hysteresis" name="NO" value="0x00"/>
+                <value caption="Small hysteresis" name="SMALL" value="0x01"/>
+                <value caption="Large hysteresis" name="LARGE" value="0x02"/>
+            </value-group>
+            <value-group caption="Positive input multiplexer selection" name="AC_MUXPOS">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 2" name="PIN2" value="0x02"/>
+                <value caption="Pin 3" name="PIN3" value="0x03"/>
+                <value caption="Pin 4" name="PIN4" value="0x04"/>
+                <value caption="Pin 5" name="PIN5" value="0x05"/>
+                <value caption="Pin 6" name="PIN6" value="0x06"/>
+                <value caption="DAC output" name="DAC" value="0x07"/>
+            </value-group>
+            <value-group caption="Negative input multiplexer selection" name="AC_MUXNEG">
+                <value caption="Pin 0" name="PIN0" value="0x00"/>
+                <value caption="Pin 1" name="PIN1" value="0x01"/>
+                <value caption="Pin 3" name="PIN3" value="0x02"/>
+                <value caption="Pin 5" name="PIN5" value="0x03"/>
+                <value caption="Pin 7" name="PIN7" value="0x04"/>
+                <value caption="DAC output" name="DAC" value="0x05"/>
+                <value caption="Bandgap Reference" name="BANDGAP" value="0x06"/>
+                <value caption="Internal voltage scaler" name="SCALER" value="0x07"/>
+            </value-group>
+            <value-group caption="Windows interrupt mode" name="AC_WINTMODE">
+                <value caption="Interrupt on above window" name="ABOVE" value="0x00"/>
+                <value caption="Interrupt on inside window" name="INSIDE" value="0x01"/>
+                <value caption="Interrupt on below window" name="BELOW" value="0x02"/>
+                <value caption="Interrupt on outside window" name="OUTSIDE" value="0x03"/>
+            </value-group>
+            <value-group caption="Window interrupt level" name="AC_WINTLVL">
+                <value caption="Interrupt disabled" name="OFF" value="0x00"/>
+                <value caption="Low priority" name="LO" value="0x01"/>
+                <value caption="Medium priority" name="MED" value="0x02"/>
+                <value caption="High priority" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Window mode state" name="AC_WSTATE">
+                <value caption="Signal above window" name="ABOVE" value="0x00"/>
+                <value caption="Signal inside window" name="INSIDE" value="0x01"/>
+                <value caption="Signal below window" name="BELOW" value="0x02"/>
+            </value-group>
+            <interrupt-group name="AC">
+                <interrupt index="0" name="AC0" caption="AC0 Interrupt"/>
+                <interrupt index="1" name="AC1" caption="AC1 Interrupt"/>
+                <interrupt index="2" name="ACW" caption="ACW Window Mode Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="RTC" id="I6093" version="XMEGAE" caption="Real-Time Clounter">
+            <register-group caption="Real-Time Counter" name="RTC" size="14">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Correction Enable" mask="0x08" name="CORREN"/>
+                    <bitfield caption="Prescaling Factor" mask="0x07" name="PRESCALER" values="RTC_PRESCALER"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Synchronization Busy Flag" mask="0x01" name="SYNCBUSY"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x02" size="1">
+                    <bitfield caption="Compare Match Interrupt Level" mask="0x0C" name="COMPINTLVL"
+                              values="RTC_COMPINTLVL"/>
+                    <bitfield caption="Overflow Interrupt Level" mask="0x03" name="OVFINTLVL" values="RTC_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Flags" name="INTFLAGS" offset="0x03" size="1">
+                    <bitfield caption="Compare Match Interrupt Flag" mask="0x02" name="COMPIF"/>
+                    <bitfield caption="Overflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                </register>
+                <register caption="Temporary register" name="TEMP" offset="0x04" size="1"/>
+                <register caption="Calibration Register" name="CALIB" offset="0x06" size="1">
+                    <bitfield caption="Correction Sign" mask="0x80" name="SIGN"/>
+                    <bitfield caption="Error Value" mask="0x7F" name="ERROR"/>
+                </register>
+                <register caption="Count Register" name="CNT" offset="0x08" size="2"/>
+                <register caption="Period Register" name="PER" offset="0x0A" size="2"/>
+                <register caption="Compare Register" name="COMP" offset="0x0C" size="2"/>
+            </register-group>
+            <value-group caption="Prescaler Factor" name="RTC_PRESCALER">
+                <value caption="RTC Off" name="OFF" value="0x00"/>
+                <value caption="RTC Clock" name="DIV1" value="0x01"/>
+                <value caption="RTC Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="RTC Clock / 8" name="DIV8" value="0x03"/>
+                <value caption="RTC Clock / 16" name="DIV16" value="0x04"/>
+                <value caption="RTC Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="RTC Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="RTC Clock / 1024" name="DIV1024" value="0x07"/>
+            </value-group>
+            <value-group caption="Compare Interrupt level" name="RTC_COMPINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt level" name="RTC_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="RTC">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="COMP" caption="Compare Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="XCL" id="I3008" caption="XMEGA Custom Logic">
+            <register-group caption="XMEGA Custom Logic" name="XCL" size="16">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="LUT0 Output Enable" mask="0xC0" name="LUT0OUTEN" values="XCL_LUT0OUTEN"/>
+                    <bitfield caption="Port Selection" mask="0x30" name="PORTSEL" values="XCL_PORTSEL"/>
+                    <bitfield caption="LUT Configuration" mask="0x07" name="LUTCONF" values="XCL_LUTCONF"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Input Selection 3" mask="0xC0" name="IN3SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 2" mask="0x30" name="IN2SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 1" mask="0x0C" name="IN1SEL" values="XCL_INSEL"/>
+                    <bitfield caption="Input Selection 0" mask="0x03" name="IN0SEL" values="XCL_INSEL"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Asynchronous Event Line Selection for LUT1" mask="0x80" name="EVASYSEL1"/>
+                    <bitfield caption="Asynchronous Event Line Selection for LUT0" mask="0x40" name="EVASYSEL0"/>
+                    <bitfield caption="Delay Selection" mask="0x30" name="DLYSEL" values="XCL_DLYSEL"/>
+                    <bitfield caption="Delay Configuration on LUT1" mask="0x0C" name="DLY1CONF" values="XCL_DLYCONF"/>
+                    <bitfield caption="Delay Configuration on LUT0" mask="0x03" name="DLY0CONF" values="XCL_DLYCONF"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Truth Table of LUT1" mask="0xF0" name="TRUTH1"/>
+                    <bitfield caption="Truth Table of LUT0" mask="0x0F" name="TRUTH0"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Timer/Counter Command Selection" mask="0x80" name="CMDSEL" values="XCL_CMDSEL"/>
+                    <bitfield caption="Timer/Counter Selection" mask="0x70" name="TCSEL" values="XCL_TCSEL"/>
+                    <bitfield caption="Clock Selection" mask="0x0F" name="CLKSEL" values="XCL_CLKSEL"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Command Enable" mask="0xC0" name="CMDEN" values="XCL_CMDEN"/>
+                    <bitfield caption="Compare Channel 1 Output Value" mask="0x20" name="CMP1" values="XCL_CMPEN"/>
+                    <bitfield caption="Compare Channel 0 Output Value" mask="0x10" name="CMP0" values="XCL_CMPEN"/>
+                    <bitfield caption="Compare or Capture Channel 1 Enable" mask="0x08" name="CCEN1"/>
+                    <bitfield caption="Compare or Capture Channel 0 Enable" mask="0x04" name="CCEN0"/>
+                    <bitfield caption="Timer/Counter Mode" mask="0x03" name="MODE" values="XCL_TCMODE"/>
+                </register>
+                <register caption="Control Register G" name="CTRLG" offset="0x06" size="1">
+                    <bitfield caption="Event Action Enable" mask="0x80" name="EVACTEN"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 1" mask="0x60" name="EVACT1"
+                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Action Selection on Timer/Counter 0" mask="0x18" name="EVACT0"
+                              values="XCL_EVACT"/>
+                    <bitfield caption="Event Source Selection" mask="0x07" name="EVSRC" values="XCL_EVSRC"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x07" size="1">
+                    <bitfield caption="Underflow 1 Interrupt Enable" mask="0x80" name="UNF1IE"/>
+                    <bitfield caption="Peripheral Counter 1 Interrupt Enable" mask="0x80" name="PEC1IE"/>
+                    <bitfield caption="Peripheral High Counter 2 Interrupt Enable" mask="0x80" name="PEC21IE"/>
+                    <bitfield caption="Underflow 0 Interrupt Enable" mask="0x40" name="UNF0IE"/>
+                    <bitfield caption="Peripheral Counter 0 Interrupt Enable" mask="0x40" name="PEC0IE"/>
+                    <bitfield caption="Compare Or Capture 1 Interrupt Enable" mask="0x20" name="CC1IE"/>
+                    <bitfield caption="Peripheral Low Counter 2 Interrupt Enable" mask="0x20" name="PEC20IE"/>
+                    <bitfield caption="Compare Or Capture 0 Interrupt Enable" mask="0x10" name="CC0IE"/>
+                    <bitfield caption="Timer Underflow Interrupt Level" mask="0x0C" name="UNFINTLVL"
+                              values="XCL_UNF_INTLVL"/>
+                    <bitfield caption="Timer Compare or Capture Interrupt Level" mask="0x03" name="CCINTLVL"
+                              values="XCL_CC_INTLVL"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter 1 Underflow Interrupt Flag" mask="0x80" name="UNF1IF"/>
+                    <bitfield caption="Peripheral Counter 1 Interrupt Flag" mask="0x80" name="PEC1IF"/>
+                    <bitfield caption="Peripheral High Counter 2 Interrupt Flag" mask="0x80" name="PEC21IF"/>
+                    <bitfield caption="Timer/Counter 0 Underflow Interrupt Flag" mask="0x40" name="UNF0IF"/>
+                    <bitfield caption="Peripheral Counter 0 Interrupt Flag" mask="0x40" name="PEC0IF"/>
+                    <bitfield caption="Compare or Capture Channel 1 Interrupt Flag" mask="0x20" name="CC1IF"/>
+                    <bitfield caption="Peripheral Low Counter 2 Interrupt Flag" mask="0x20" name="PEC20IF"/>
+                    <bitfield caption="Compare or Capture Channel 0 Interrupt Flag" mask="0x10" name="CC0IF"/>
+                </register>
+                <register caption="Peripheral Lenght Control Register " name="PLC" offset="0x09" size="1">
+                    <bitfield caption="Peripheral Lenght Control Bits" mask="0xFF" name="PLC"/>
+                </register>
+                <register caption="Counter Register Low" name="CNTL" offset="0x0A" size="1">
+                    <bitfield caption="BTC0 Counter Byte" mask="0xFF" name="BCNTO"/>
+                    <bitfield caption="TC16 Counter Low Byte" mask="0xFF" name="CNTL"/>
+                    <bitfield caption="Peripheral Counter 0 Byte" mask="0xFF" name="PCNTO"/>
+                </register>
+                <register caption="Counter Register High" name="CNTH" offset="0x0B" size="1">
+                    <bitfield caption="BTC1 Counter Byte" mask="0xFF" name="BCNT1"/>
+                    <bitfield caption="TC16 Counter High Byte" mask="0xFF" name="CNTH"/>
+                    <bitfield caption="Peripheral Counter 1 Byte" mask="0xFF" name="PCNT1"/>
+                    <bitfield caption="Peripheral High Counter 2 Bits" mask="0xF0" name="PCNT21"/>
+                    <bitfield caption="Peripheral Low Counter 2 Bits" mask="0x0F" name="PCNT20"/>
+                </register>
+                <register caption="Compare Register Low" name="CMPL" offset="0x0C" size="1">
+                    <bitfield caption="TC16 Compare Low Byte" mask="0xFF" name="CMPL"/>
+                    <bitfield caption="BTC0 Compare Byte" mask="0xFF" name="BCMP0"/>
+                </register>
+                <register caption="Compare Register High" name="CMPH" offset="0x0D" size="1">
+                    <bitfield caption="TC16 Compare High Byte" mask="0xFF" name="CMPH"/>
+                    <bitfield caption="BTC1 Compare Byte" mask="0xFF" name="BCMP1"/>
+                </register>
+                <register caption="Period or Capture Register Low" name="PERCAPTL" offset="0x0E" size="1">
+                    <bitfield caption="TC16 Low Byte Period" mask="0xFF" name="PERL"/>
+                    <bitfield caption="TC16 Capture Value Low Byte" mask="0xFF" name="CAPTL"/>
+                    <bitfield caption="BTC0 Period" mask="0xFF" name="BPER0"/>
+                    <bitfield caption="BTC0 Capture Value Byte" mask="0xFF" name="BCAPT0"/>
+                </register>
+                <register caption="Period or Capture Register High" name="PERCAPTH" offset="0x0F" size="1">
+                    <bitfield caption="TC16 High Byte Period" mask="0xFF" name="PERH"/>
+                    <bitfield caption="TC16 Capture Value High Byte" mask="0xFF" name="CAPTH"/>
+                    <bitfield caption="BTC1 Period" mask="0xFF" name="BPER1"/>
+                    <bitfield caption="BTC1 Capture Value Byte" mask="0xFF" name="BCAPT1"/>
+                </register>
+            </register-group>
+            <value-group caption="LUT0 Output Enable" name="XCL_LUT0OUTEN">
+                <value caption="LUT0 output disabled" name="DISABLE" value="0x00"/>
+                <value caption="LUT0 Output to pin 0" name="PIN0" value="0x01"/>
+                <value caption="LUT0 Output to pin 4" name="PIN4" value="0x02"/>
+            </value-group>
+            <value-group caption="Port Selection" name="XCL_PORTSEL">
+                <value caption="Port C for LUT or USARTC0 for PEC" name="PC" value="0x00"/>
+                <value caption="Port D for LUT or USARTD0 for PEC" name="PD" value="0x01"/>
+            </value-group>
+            <value-group caption="LUT Configuration" name="XCL_LUTCONF">
+                <value caption="2-Input two LUT" name="2LUT2IN" value="0x00"/>
+                <value caption="Two LUT with duplicated input " name="2LUT1IN" value="0x01"/>
+                <value caption="Two LUT with one common input " name="2LUT3IN" value="0x02"/>
+                <value caption="3-Input LUT " name="1LUT3IN" value="0x03"/>
+                <value caption="One LUT Mux " name="MUX" value="0x04"/>
+                <value caption="One D-Latch LUT " name="DLATCH" value="0x05"/>
+                <value caption="One RS-Latch LUT " name="RSLATCH" value="0x06"/>
+                <value caption="One DFF LUT " name="DFF" value="0x07"/>
+            </value-group>
+            <value-group caption="Input Selection" name="XCL_INSEL">
+                <value caption="Event system selected as source" name="EVSYS" value="0x00"/>
+                <value caption="XCL selected as source" name="XCL" value="0x01"/>
+                <value caption="LSB port pin selected as source" name="PINL" value="0x02"/>
+                <value caption="MSB port pin selected as source" name="PINH" value="0x03"/>
+            </value-group>
+            <value-group caption="Delay Configuration on LUT" name="XCL_DLYCONF">
+                <value caption="Delay element disabled" name="DISABLE" value="0x00"/>
+                <value caption="Delay enabled on LUT input" name="IN" value="0x01"/>
+                <value caption="Delay enabled on LUT output" name="OUT" value="0x02"/>
+            </value-group>
+            <value-group caption="Delay Selection" name="XCL_DLYSEL">
+                <value caption="One cycle delay for each LUT1 and LUT0" name="DLY11" value="0x00"/>
+                <value caption="One cycle delay for LUT1 and two cycles for LUT0" name="DLY12" value="0x01"/>
+                <value caption="Two cycles delay for LUT1 and one cycle for LUT0" name="DLY21" value="0x02"/>
+                <value caption="Two cycle delays for each LUT1 and LUT0" name="DLY22" value="0x03"/>
+            </value-group>
+            <value-group caption="Clock Selection" name="XCL_CLKSEL">
+                <value caption="OFF" name="OFF" value="0x00"/>
+                <value caption="Prescaler clk" name="DIV1" value="0x01"/>
+                <value caption="Prescaler clk/2" name="DIV2" value="0x02"/>
+                <value caption="Prescaler clk/4" name="DIV4" value="0x03"/>
+                <value caption="Prescaler clk/8" name="DIV8" value="0x04"/>
+                <value caption="Prescaler clk/64" name="DIV64" value="0x05"/>
+                <value caption="Prescaler clk/256" name="DIV256" value="0x06"/>
+                <value caption="Prescaler clk/1024" name="DIV1024" value="0x07"/>
+                <value caption="Event channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command Selection" name="XCL_CMDSEL">
+                <value caption="None" name="NONE" value="0x00"/>
+                <value caption="Force restart" name="RESTART" value="0x01"/>
+            </value-group>
+            <value-group caption="Timer/Counter Selection" name="XCL_TCSEL">
+                <value caption="16-bit timer/counter" name="TC16" value="0x00"/>
+                <value caption="One 8-bit timer/counter" name="BTC0" value="0x01"/>
+                <value caption="Two 8-bit timer/counters" name="BTC01" value="0x02"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral transmitter counter" name="BTC0PEC1"
+                       value="0x03"/>
+                <value caption="One 8-bit timer/counter and one 8-bit peripheral receiver counter" name="PEC0BTC1"
+                       value="0x04"/>
+                <value caption="Two 8-bit peripheral counters" name="PEC01" value="0x05"/>
+                <value caption="One 8-bit timer/counter and two 4-bit peripheral counters" name="BTC0PEC2"
+                       value="0x06"/>
+            </value-group>
+            <value-group caption="Timer/Counter Mode" name="XCL_TCMODE">
+                <value caption="Normal mode with compare/period" name="NORMAL" value="0x00"/>
+                <value caption="Capture mode" name="CAPT" value="0x01"/>
+                <value caption="Single Slope PWM" name="PWM" value="0x02"/>
+                <value caption="One-shot PWM" name="1SHOT" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare Output Value Timer" name="XCL_CMPEN">
+                <value caption="Clear WG Output " name="CLEAR" value="0x00"/>
+                <value caption="Set WG Output " name="SET" value="0x01"/>
+            </value-group>
+            <value-group caption="Command Enable" name="XCL_CMDEN">
+                <value caption="Command Ignored" name="DISABLE" value="0x00"/>
+                <value caption="Command valid for timer/counter 0" name="CMD0" value="0x01"/>
+                <value caption="Command valid for timer/counter 1" name="CMD1" value="0x02"/>
+                <value caption="Command valid for both timer/counter 0 and 1" name="CMD01" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Event Source Selection" name="XCL_EVSRC">
+                <value caption="Event channel 0" name="EVCH0" value="0x00"/>
+                <value caption="Event channel 1" name="EVCH1" value="0x01"/>
+                <value caption="Event channel 2" name="EVCH2" value="0x02"/>
+                <value caption="Event channel 3" name="EVCH3" value="0x03"/>
+                <value caption="Event channel 4" name="EVCH4" value="0x04"/>
+                <value caption="Event channel 5" name="EVCH5" value="0x05"/>
+                <value caption="Event channel 6" name="EVCH6" value="0x06"/>
+                <value caption="Event channel 7" name="EVCH7" value="0x07"/>
+            </value-group>
+            <value-group caption="Timer/Counter Event Action Selection" name="XCL_EVACT">
+                <value caption="Input Capture" name="INPUT" value="0x00"/>
+                <value caption="Frequency Capture" name="FREQ" value="0x01"/>
+                <value caption="Pulse Width Capture" name="PW" value="0x02"/>
+                <value caption="Restart timer/counter" name="RESTART" value="0x03"/>
+            </value-group>
+            <value-group caption="Underflow Interrupt level" name="XCL_UNF_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare/Capture Interrupt level" name="XCL_CC_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <interrupt-group name="XCL">
+                <interrupt index="0" name="UNF" caption="Timer/Counter Underflow Interrupt"/>
+                <interrupt index="1" name="CC" caption="Timer/Counter Compare or Capture Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TWI" id="I6089" version="XMEGAE" caption="Two-Wire Interface">
+            <register-group caption="Two-Wire Interface" name="TWI" size="14">
+                <register caption="TWI Common Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Bridge Enable" mask="0x80" name="BRIDGEEN"/>
+                    <bitfield caption="Slave Fast Mode Plus Enable" mask="0x40" name="SFMPEN"/>
+                    <bitfield caption="Slave SDA Hold Time Enable" mask="0x30" name="SSDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="FMPLUS Enable" mask="0x08" name="FMPEN"/>
+                    <bitfield caption="SDA Hold Time Enable" mask="0x06" name="SDAHOLD" values="TWI_SDAHOLD"/>
+                    <bitfield caption="External Driver Interface Enable" mask="0x01" name="EDIEN"/>
+                </register>
+                <register-group caption="TWI master module" name="MASTER" offset="0x0001" name-in-module="TWI_MASTER"/>
+                <register-group caption="TWI slave module" name="SLAVE" offset="0x0008" name-in-module="TWI_SLAVE"/>
+                <register-group caption="TWI SMBUS timeout module" name="TIMEOUT" offset="0x000E"
+                                name-in-module="TWI_TIMEOUT"/>
+            </register-group>
+            <register-group caption="" name="TWI_MASTER" size="7">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_MASTER_INTLVL"/>
+                    <bitfield caption="Read Interrupt Enable" mask="0x20" name="RIEN"/>
+                    <bitfield caption="Write Interrupt Enable" mask="0x10" name="WIEN"/>
+                    <bitfield caption="Enable TWI Master" mask="0x08" name="ENABLE"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Inactive Bus Timeout" mask="0x0C" name="TIMEOUT" values="TWI_MASTER_TIMEOUT"/>
+                    <bitfield caption="Quick Command Enable" mask="0x02" name="QCEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                    <bitfield caption="Ttimeout Enable" mask="0x10" name="TTOUTEN"/>
+                    <bitfield caption="Slave Extend Timeout Enable" mask="0x20" name="TSEXTEN"/>
+                    <bitfield caption="Master Extend Timeout Enable" mask="0x40" name="TMEXTEN"/>
+                    <bitfield caption="Timeout Interrupt Enable" mask="0x80" name="TOIE"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_MASTER_CMD"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x03" size="1">
+                    <bitfield caption="Read Interrupt Flag" mask="0x80" name="RIF"/>
+                    <bitfield caption="Write Interrupt Flag" mask="0x40" name="WIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Arbitration Lost" mask="0x08" name="ARBLOST"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Bus State" mask="0x03" name="BUSSTATE" values="TWI_MASTER_BUSSTATE"/>
+                </register>
+                <register caption="Baud Rate Control Register" name="BAUD" offset="0x04" size="1"/>
+                <register caption="Address Register" name="ADDR" offset="0x05" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x06" size="1"/>
+            </register-group>
+            <register-group caption="" name="TWI_SLAVE" size="6">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Interrupt Level" mask="0xC0" name="INTLVL" values="TWI_SLAVE_INTLVL"/>
+                    <bitfield caption="Data Interrupt Enable" mask="0x20" name="DIEN"/>
+                    <bitfield caption="Address/Stop Interrupt Enable" mask="0x10" name="APIEN"/>
+                    <bitfield caption="Enable TWI Slave" mask="0x08" name="ENABLE"/>
+                    <bitfield caption="Stop Interrupt Enable" mask="0x04" name="PIEN"/>
+                    <bitfield caption="Promiscuous Mode Enable" mask="0x02" name="PMEN"/>
+                    <bitfield caption="Smart Mode Enable" mask="0x01" name="SMEN"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Acknowledge Action" mask="0x04" name="ACKACT"/>
+                    <bitfield caption="Command" mask="0x03" name="CMD" values="TWI_SLAVE_CMD"/>
+                    <bitfield caption="Ttimeout Enable" mask="0x10" name="TTOUTEN"/>
+                    <bitfield caption="Timeout Interrupt Enable" mask="0x80" name="TOIE"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Data Interrupt Flag" mask="0x80" name="DIF"/>
+                    <bitfield caption="Address/Stop Interrupt Flag" mask="0x40" name="APIF"/>
+                    <bitfield caption="Clock Hold" mask="0x20" name="CLKHOLD"/>
+                    <bitfield caption="Received Acknowledge" mask="0x10" name="RXACK"/>
+                    <bitfield caption="Collision" mask="0x08" name="COLL"/>
+                    <bitfield caption="Bus Error" mask="0x04" name="BUSERR"/>
+                    <bitfield caption="Read/Write Direction" mask="0x02" name="DIR"/>
+                    <bitfield caption="Slave Address or Stop" mask="0x01" name="AP"/>
+                </register>
+                <register caption="Address Register" name="ADDR" offset="0x03" size="1"/>
+                <register caption="Data Register" name="DATA" offset="0x04" size="1"/>
+                <register caption="Address Mask Register" name="ADDRMASK" offset="0x05" size="1">
+                    <bitfield caption="Address Mask" mask="0xFE" name="ADDRMASK"/>
+                    <bitfield caption="Address Enable" mask="0x01" name="ADDREN"/>
+                </register>
+            </register-group>
+            <register-group caption="" name="TWI_TIMEOUT" size="2">
+                <register caption="Timeout Status Register" name="TOS" offset="0x00" size="1">
+                    <bitfield caption="Master Ttimeout Interrupt Flag" mask="0x01" name="TTOUTMIF"/>
+                    <bitfield caption="Slave Extend Interrupt Flag" mask="0x02" name="TSEXTIF"/>
+                    <bitfield caption="Master Extend Interrupt Flag" mask="0x04" name="TMEXTIF"/>
+                    <bitfield caption="Slave Ttimeout Interrupt Flag" mask="0x10" name="TTOUTSIF"/>
+                </register>
+                <register caption="Timeout Configuration Register" name="TOCONF" offset="0x01" size="1">
+                    <bitfield caption="Master Ttimeout Select" mask="0x07" name="TTOUTMSEL"
+                              values="TWI_MASTER_TTIMEOUT"/>
+                    <bitfield caption="Master/Slave Timeout Select" mask="0x18" name="TMSEXTSEL"
+                              values="TWI_MASTER_TMSEXT"/>
+                    <bitfield caption="Slave Ttimeout Select" mask="0xE0" name="TTOUTSSEL" values="TWI_SLAVE_TTIMEOUT"/>
+                </register>
+            </register-group>
+            <value-group caption="SDA Hold Time" name="TWI_SDAHOLD">
+                <value caption="SDA Hold Time off" name="OFF" value="0x00"/>
+                <value caption="SDA Hold Time 50 ns" name="50NS" value="0x01"/>
+                <value caption="SDA Hold Time 300 ns" name="300NS" value="0x02"/>
+                <value caption="SDA Hold Time 400 ns" name="400NS" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Interrupt Level" name="TWI_MASTER_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Inactive Timeout" name="TWI_MASTER_TIMEOUT">
+                <value caption="Bus Timeout Disabled" name="DISABLED" value="0x00"/>
+                <value caption="50 Microseconds" name="50US" value="0x01"/>
+                <value caption="100 Microseconds" name="100US" value="0x02"/>
+                <value caption="200 Microseconds" name="200US" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Command" name="TWI_MASTER_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Issue Repeated Start Condition" name="REPSTART" value="0x01"/>
+                <value caption="Receive or Transmit Data" name="RECVTRANS" value="0x02"/>
+                <value caption="Issue Stop Condition" name="STOP" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Bus State" name="TWI_MASTER_BUSSTATE">
+                <value caption="Unknown Bus State" name="UNKNOWN" value="0x00"/>
+                <value caption="Bus is Idle" name="IDLE" value="0x01"/>
+                <value caption="This Module Controls The Bus" name="OWNER" value="0x02"/>
+                <value caption="The Bus is Busy" name="BUSY" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Interrupt Level" name="TWI_SLAVE_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Slave Command" name="TWI_SLAVE_CMD">
+                <value caption="No Action" name="NOACT" value="0x00"/>
+                <value caption="Used To Complete a Transaction" name="COMPTRANS" value="0x02"/>
+                <value caption="Used in Response to Address/Data Interrupt" name="RESPONSE" value="0x03"/>
+            </value-group>
+            <value-group caption="Master Timeout" name="TWI_MASTER_TTIMEOUT">
+                <value caption="25 Milliseconds" name="25MS" value="0x000"/>
+                <value caption="24 Milliseconds" name="24MS" value="0x001"/>
+                <value caption="23 Milliseconds" name="23MS" value="0x002"/>
+                <value caption="22 Milliseconds" name="22MS" value="0x003"/>
+                <value caption="26 Milliseconds" name="26MS" value="0x004"/>
+                <value caption="27 Milliseconds" name="27MS" value="0x005"/>
+                <value caption="28 Milliseconds" name="28MS" value="0x006"/>
+                <value caption="29 Milliseconds" name="29MS" value="0x007"/>
+            </value-group>
+            <value-group caption="Slave Ttimeout" name="TWI_SLAVE_TTIMEOUT">
+                <value caption="25 Milliseconds" name="25MS" value="0x000"/>
+                <value caption="24 Milliseconds" name="24MS" value="0x001"/>
+                <value caption="23 Milliseconds" name="23MS" value="0x002"/>
+                <value caption="22 Milliseconds" name="22MS" value="0x003"/>
+                <value caption="26 Milliseconds" name="26MS" value="0x004"/>
+                <value caption="27 Milliseconds" name="27MS" value="0x005"/>
+                <value caption="28 Milliseconds" name="28MS" value="0x006"/>
+                <value caption="29 Milliseconds" name="29MS" value="0x007"/>
+            </value-group>
+            <value-group caption="Master/Slave Extend Timeout" name="TWI_MASTER_TMSEXT">
+                <value caption="Tmext 10ms Tsext 25ms" name="10MS25MS" value="0x00"/>
+                <value caption="Tmext 9ms  Tsext 24ms" name="9MS24MS" value="0x01"/>
+                <value caption="Tmext 11ms Tsext 26ms" name="11MS26MS" value="0x02"/>
+                <value caption="Tmext 12ms Tsext 27ms" name="12MS27MS" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TWI">
+                <interrupt index="0" name="TWIS" caption="TWI Slave Interrupt"/>
+                <interrupt index="1" name="TWIM" caption="TWI Master Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="PORT" id="I6075" version="XMEGAE" caption="Port Configuration">
+            <register-group caption="I/O Ports" name="PORT" size="24">
+                <register caption="I/O Port Data Direction" name="DIR" offset="0x00" size="1"/>
+                <register caption="I/O Port Data Direction Set" name="DIRSET" offset="0x01" size="1"/>
+                <register caption="I/O Port Data Direction Clear" name="DIRCLR" offset="0x02" size="1"/>
+                <register caption="I/O Port Data Direction Toggle" name="DIRTGL" offset="0x03" size="1"/>
+                <register caption="I/O Port Output" name="OUT" offset="0x04" size="1"/>
+                <register caption="I/O Port Output Set" name="OUTSET" offset="0x05" size="1"/>
+                <register caption="I/O Port Output Clear" name="OUTCLR" offset="0x06" size="1"/>
+                <register caption="I/O Port Output Toggle" name="OUTTGL" offset="0x07" size="1"/>
+                <register caption="I/O port Input" name="IN" offset="0x08" size="1"/>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x09" size="1">
+                    <bitfield caption="Port Interrupt Level" mask="0x03" name="INTLVL" values="PORT_INTLVL"/>
+                </register>
+                <register caption="Port Interrupt Mask" name="INTMASK" offset="0x0A" size="1"/>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Pin 7 Interrupt Flag" mask="0x80" name="INT7IF"/>
+                    <bitfield caption="Pin 6 Interrupt Flag" mask="0x40" name="INT6IF"/>
+                    <bitfield caption="Pin 5 Interrupt Flag" mask="0x20" name="INT5IF"/>
+                    <bitfield caption="Pin 4 Interrupt Flag" mask="0x10" name="INT4IF"/>
+                    <bitfield caption="Pin 3 Interrupt Flag" mask="0x08" name="INT3IF"/>
+                    <bitfield caption="Pin 2 Interrupt Flag" mask="0x04" name="INT2IF"/>
+                    <bitfield caption="Pin 1 Interrupt Flag" mask="0x02" name="INT1IF"/>
+                    <bitfield caption="Pin 0 Interrupt Flag" mask="0x01" name="INT0IF"/>
+                </register>
+                <register caption="Pin Remap Register" name="REMAP" offset="0x0E" size="1">
+                    <bitfield caption="Usart0" mask="0x10" name="USART0"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare D" mask="0x08" name="TC4D"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare C" mask="0x04" name="TC4C"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare B" mask="0x02" name="TC4B"/>
+                    <bitfield caption="Timer/Counter 4 Output Compare A" mask="0x01" name="TC4A"/>
+                </register>
+                <register caption="Pin 0 Control Register" name="PIN0CTRL" offset="0x10" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 1 Control Register" name="PIN1CTRL" offset="0x11" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 2 Control Register" name="PIN2CTRL" offset="0x12" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 3 Control Register" name="PIN3CTRL" offset="0x13" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 4 Control Register" name="PIN4CTRL" offset="0x14" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 5 Control Register" name="PIN5CTRL" offset="0x15" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 6 Control Register" name="PIN6CTRL" offset="0x16" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+                <register caption="Pin 7 Control Register" name="PIN7CTRL" offset="0x17" size="1">
+                    <bitfield caption="Inverted I/O Enable" mask="0x40" name="INVEN"/>
+                    <bitfield caption="Output/Pull Configuration" mask="0x38" name="OPC" values="PORT_OPC"/>
+                    <bitfield caption="Input/Sense Configuration" mask="0x07" name="ISC" values="PORT_ISC"/>
+                </register>
+            </register-group>
+            <value-group caption="Port Interrupt Level" name="PORT_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Output/Pull Configuration" name="PORT_OPC">
+                <value caption="Totempole" name="TOTEM" value="0x00"/>
+                <value caption="Totempole w/ Bus keeper on Input and Output" name="BUSKEEPER" value="0x01"/>
+                <value caption="Totempole w/ Pull-down on Input" name="PULLDOWN" value="0x02"/>
+                <value caption="Totempole w/ Pull-up on Input" name="PULLUP" value="0x03"/>
+                <value caption="Wired OR" name="WIREDOR" value="0x04"/>
+                <value caption="Wired AND" name="WIREDAND" value="0x05"/>
+                <value caption="Wired OR w/ Pull-down" name="WIREDORPULL" value="0x06"/>
+                <value caption="Wired AND w/ Pull-up" name="WIREDANDPULL" value="0x07"/>
+            </value-group>
+            <value-group caption="Input/Sense Configuration" name="PORT_ISC">
+                <value caption="Sense Both Edges" name="BOTHEDGES" value="0x00"/>
+                <value caption="Sense Rising Edge" name="RISING" value="0x01"/>
+                <value caption="Sense Falling Edge" name="FALLING" value="0x02"/>
+                <value caption="Sense Level (Transparent For Events)" name="LEVEL" value="0x03"/>
+                <value caption="Digital Input Buffer Forced Enable" name="FORCE_ENABLE" value="0x06"/>
+                <value caption="Disable Digital Input Buffer" name="INPUT_DISABLE" value="0x07"/>
+            </value-group>
+            <interrupt-group name="PORT">
+                <interrupt index="0" name="INT" caption="External Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="TC" id="I3007" version="XMEGAE" caption="16-bit Timer/Counter With PWM">
+            <register-group caption="16-bit Timer/Counter 4" name="TC4" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Synchronization Enabled" mask="0x40" name="SYNCHEN"/>
+                    <bitfield caption="Start on Next Event" mask="0x20" name="EVSTART"/>
+                    <bitfield caption="Stop on Next Update" mask="0x10" name="UPSTOP"/>
+                    <bitfield caption="Clock Select" mask="0x0F" name="CLKSEL" values="TC45_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Byte Mode" mask="0xC0" name="BYTEM" values="TC45_BYTEM"/>
+                    <bitfield caption="Circular Buffer Enable" mask="0x30" name="CIRCEN" values="TC45_CIRCEN"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x07" name="WGMODE" values="TC45_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Channel D Output Polarity" mask="0x80" name="POLD"/>
+                    <bitfield caption="Channel C Output Polarity" mask="0x40" name="POLC"/>
+                    <bitfield caption="Channel B Output Polarity" mask="0x20" name="POLB"/>
+                    <bitfield caption="Channel A Output Polarity" mask="0x10" name="POLA"/>
+                    <bitfield caption="Channel D Compare Output Value" mask="0x08" name="CMPD"/>
+                    <bitfield caption="Channel C Compare Output Value" mask="0x04" name="CMPC"/>
+                    <bitfield caption="Channel B Compare Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Channel A Compare Output Value" mask="0x01" name="CMPA"/>
+                    <bitfield caption="High Channel D Compare Output Value" mask="0x80" name="HCMPD"/>
+                    <bitfield caption="High Channel C Compare Output Value" mask="0x40" name="HCMPC"/>
+                    <bitfield caption="High Channel B Compare Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Channel A Compare Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Channel D Compare Output Value" mask="0x08" name="LCMPD"/>
+                    <bitfield caption="Low Channel C Compare Output Value" mask="0x04" name="LCMPC"/>
+                    <bitfield caption="Low Channel B Compare Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Channel A Compare Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC45_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Channel D Compare or Capture Mode" mask="0xC0" name="CCDMODE"
+                              values="TC45_CCDMODE"/>
+                    <bitfield caption="Channel C Compare or Capture Mode" mask="0x30" name="CCCMODE"
+                              values="TC45_CCCMODE"/>
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
+                              values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
+                              values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low D Compare or Capture Mode" mask="0xC0" name="LCCDMODE"
+                              values="TC45_LCCDMODE"/>
+                    <bitfield caption="Channel Low C Compare or Capture Mode" mask="0x30" name="LCCCMODE"
+                              values="TC45_LCCCMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
+                              values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
+                              values="TC45_LCCAMODE"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Channel High D Compare or Capture Mode" mask="0xC0" name="HCCDMODE"
+                              values="TC45_HCCDMODE"/>
+                    <bitfield caption="Channel High C Compare or Capture Mode" mask="0x30" name="HCCCMODE"
+                              values="TC45_HCCCMODE"/>
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
+                              values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
+                              values="TC45_HCCAMODE"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
+                              values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
+                              values="TC45_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Channel D Compare or Capture Interrupt Level" mask="0xC0" name="CCDINTLVL"
+                              values="TC45_CCDINTLVL"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Level" mask="0x30" name="CCCINTLVL"
+                              values="TC45_CCCINTLVL"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Level" mask="0xC0" name="LCCDINTLVL"
+                              values="TC45_LCCDINTLVL"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Level" mask="0x30" name="LCCCINTLVL"
+                              values="TC45_LCCCINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
+                              values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
+                              values="TC45_LCCAINTLVL"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x09" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register H Clear" name="CTRLHCLR" offset="0x0A" size="1">
+                    <bitfield caption="Channel D Compare or Capture Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Channel C Compare or Capture Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low D Compare or Capture Buffer Valid" mask="0x10" name="LCCDBV"/>
+                    <bitfield caption="Channel Low C Compare or Capture Buffer Valid" mask="0x08" name="LCCCBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Control Register H Set" name="CTRLHSET" offset="0x0B" size="1">
+                    <bitfield caption="Channel D Compare or Capture Buffer Valid" mask="0x10" name="CCDBV"/>
+                    <bitfield caption="Channel C Compare or Capture Buffer Valid" mask="0x08" name="CCCBV"/>
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low D Compare or Capture Buffer Valid" mask="0x10" name="LCCDBV"/>
+                    <bitfield caption="Channel Low C Compare or Capture Buffer Valid" mask="0x08" name="LCCCBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Channel D Compare or Capture Interrupt Flag" mask="0x80" name="CCDIF"/>
+                    <bitfield caption="Channel C Compare or Capture Interrupt Flag" mask="0x40" name="CCCIF"/>
+                    <bitfield caption="Channel B Compare or Capture Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Trigger Restart Interrupt Flag" mask="0x04" name="TRGIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow/Underflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                    <bitfield caption="Channel Low D Compare or Capture Interrupt Flag" mask="0x80" name="LCCDIF"/>
+                    <bitfield caption="Channel Low C Compare or Capture Interrupt Flag" mask="0x40" name="LCCCIF"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Flag" mask="0x20" name="LCCBIF"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Flag" mask="0x10" name="LCCAIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Compare or Capture C" name="CCC" offset="0x2C" size="2"/>
+                <register caption="Compare or Capture D" name="CCD" offset="0x2E" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+                <register caption="Compare Or Capture C Buffer" name="CCCBUF" offset="0x3C" size="2"/>
+                <register caption="Compare Or Capture D Buffer" name="CCDBUF" offset="0x3E" size="2"/>
+            </register-group>
+            <register-group caption="16-bit Timer/Counter 5" name="TC5" size="64">
+                <register caption="Control  Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Synchronization Enabled" mask="0x40" name="SYNCHEN"/>
+                    <bitfield caption="Start on Next Event" mask="0x20" name="EVSTART"/>
+                    <bitfield caption="Stop on Next Update" mask="0x10" name="UPSTOP"/>
+                    <bitfield caption="Clock Select" mask="0x0F" name="CLKSEL" values="TC45_CLKSEL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Byte Mode" mask="0xC0" name="BYTEM" values="TC45_BYTEM"/>
+                    <bitfield caption="Circular Buffer Enable" mask="0x30" name="CIRCEN" values="TC45_CIRCEN"/>
+                    <bitfield caption="Waveform Generation Mode" mask="0x07" name="WGMODE" values="TC45_WGMODE"/>
+                </register>
+                <register caption="Control register C" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Channel B Output Polarity" mask="0x20" name="POLB"/>
+                    <bitfield caption="Channel A Output Polarity" mask="0x10" name="POLA"/>
+                    <bitfield caption="Channel B Compare Output Value" mask="0x02" name="CMPB"/>
+                    <bitfield caption="Channel A Compare Output Value" mask="0x01" name="CMPA"/>
+                    <bitfield caption="High Channel B Compare Output Value" mask="0x20" name="HCMPB"/>
+                    <bitfield caption="High Channel A Compare Output Value" mask="0x10" name="HCMPA"/>
+                    <bitfield caption="Low Channel B Compare Output Value" mask="0x02" name="LCMPB"/>
+                    <bitfield caption="Low Channel A Compare Output Value" mask="0x01" name="LCMPA"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Event Action" mask="0xE0" name="EVACT" values="TC45_EVACT"/>
+                    <bitfield caption="Event Delay" mask="0x10" name="EVDLY"/>
+                    <bitfield caption="Event Source Select" mask="0x0F" name="EVSEL" values="TC45_EVSEL"/>
+                </register>
+                <register caption="Control Register E" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Channel B Compare or Capture Mode" mask="0x0C" name="CCBMODE"
+                              values="TC45_CCBMODE"/>
+                    <bitfield caption="Channel A Compare or Capture Mode" mask="0x03" name="CCAMODE"
+                              values="TC45_CCAMODE"/>
+                    <bitfield caption="Channel Low B Compare or Capture Mode" mask="0x0C" name="LCCBMODE"
+                              values="TC45_LCCBMODE"/>
+                    <bitfield caption="Channel Low A Compare or Capture Mode" mask="0x03" name="LCCAMODE"
+                              values="TC45_LCCAMODE"/>
+                </register>
+                <register caption="Control Register F" name="CTRLF" offset="0x05" size="1">
+                    <bitfield caption="Channel High B Compare or Capture Mode" mask="0x0C" name="HCCBMODE"
+                              values="TC45_HCCBMODE"/>
+                    <bitfield caption="Channel High A Compare or Capture Mode" mask="0x03" name="HCCAMODE"
+                              values="TC45_HCCAMODE"/>
+                </register>
+                <register caption="Interrupt Control Register A" name="INTCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Timer Trigger Restart Interrupt Level" mask="0x30" name="TRGINTLVL"
+                              values="TC45_TRGINTLVL"/>
+                    <bitfield caption="Timer Error Interrupt Level" mask="0x0C" name="ERRINTLVL"
+                              values="TC45_ERRINTLVL"/>
+                    <bitfield caption="Timer Overflow/Underflow Interrupt Level" mask="0x03" name="OVFINTLVL"
+                              values="TC45_OVFINTLVL"/>
+                </register>
+                <register caption="Interrupt Control Register B" name="INTCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Channel B Compare or Capture Interrupt Level" mask="0x0C" name="CCBINTLVL"
+                              values="TC45_CCBINTLVL"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Level" mask="0x03" name="CCAINTLVL"
+                              values="TC45_CCAINTLVL"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Level" mask="0x0C" name="LCCBINTLVL"
+                              values="TC45_LCCBINTLVL"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Level" mask="0x03" name="LCCAINTLVL"
+                              values="TC45_LCCAINTLVL"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x08" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x20" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register G Set" name="CTRLGSET" offset="0x09" size="1">
+                    <bitfield caption="Timer/Counter Stop" mask="0x10" name="STOP"/>
+                    <bitfield caption="Command" mask="0x0C" name="CMD" values="TC45_CMD"/>
+                    <bitfield caption="Lock Update" mask="0x02" name="LUPD"/>
+                    <bitfield caption="Counter Direction" mask="0x01" name="DIR"/>
+                </register>
+                <register caption="Control Register H Clear" name="CTRLHCLR" offset="0x0A" size="1">
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Control Register H Set" name="CTRLHSET" offset="0x0B" size="1">
+                    <bitfield caption="Channel B Compare or Capture Buffer Valid" mask="0x04" name="CCBBV"/>
+                    <bitfield caption="Channel A Compare or Capture Buffer Valid" mask="0x02" name="CCABV"/>
+                    <bitfield caption="Period Buffer Valid" mask="0x01" name="PERBV"/>
+                    <bitfield caption="Channel Low B Compare or Capture Buffer Valid" mask="0x04" name="LCCBBV"/>
+                    <bitfield caption="Channel Low A Compare or Capture Buffer Valid" mask="0x02" name="LCCABV"/>
+                    <bitfield caption="Period Low Buffer Valid" mask="0x01" name="LPERBV"/>
+                </register>
+                <register caption="Interrupt Flag Register" name="INTFLAGS" offset="0x0C" size="1">
+                    <bitfield caption="Channel B Compare or Capture Interrupt Flag" mask="0x20" name="CCBIF"/>
+                    <bitfield caption="Channel A Compare or Capture Interrupt Flag" mask="0x10" name="CCAIF"/>
+                    <bitfield caption="Trigger Restart Interrupt Flag" mask="0x04" name="TRGIF"/>
+                    <bitfield caption="Error Interrupt Flag" mask="0x02" name="ERRIF"/>
+                    <bitfield caption="Overflow/Underflow Interrupt Flag" mask="0x01" name="OVFIF"/>
+                    <bitfield caption="Channel Low B Compare or Capture Interrupt Flag" mask="0x20" name="LCCBIF"/>
+                    <bitfield caption="Channel Low A Compare or Capture Interrupt Flag" mask="0x10" name="LCCAIF"/>
+                </register>
+                <register caption="Temporary Register For 16-bit Access" name="TEMP" offset="0x0F" size="1"/>
+                <register caption="Count" name="CNT" offset="0x20" size="2"/>
+                <register caption="Period" name="PER" offset="0x26" size="2"/>
+                <register caption="Compare or Capture A" name="CCA" offset="0x28" size="2"/>
+                <register caption="Compare or Capture B" name="CCB" offset="0x2A" size="2"/>
+                <register caption="Period Buffer" name="PERBUF" offset="0x36" size="2"/>
+                <register caption="Compare Or Capture A Buffer" name="CCABUF" offset="0x38" size="2"/>
+                <register caption="Compare Or Capture B Buffer" name="CCBBUF" offset="0x3A" size="2"/>
+            </register-group>
+            <value-group caption="Clock Selection" name="TC45_CLKSEL">
+                <value caption="Timer Off" name="OFF" value="0x00"/>
+                <value caption="System Clock" name="DIV1" value="0x01"/>
+                <value caption="System Clock / 2" name="DIV2" value="0x02"/>
+                <value caption="System Clock / 4" name="DIV4" value="0x03"/>
+                <value caption="System Clock / 8" name="DIV8" value="0x04"/>
+                <value caption="System Clock / 64" name="DIV64" value="0x05"/>
+                <value caption="System Clock / 256" name="DIV256" value="0x06"/>
+                <value caption="System Clock / 1024" name="DIV1024" value="0x07"/>
+                <value caption="Event Channel 0" name="EVCH0" value="0x08"/>
+                <value caption="Event Channel 1" name="EVCH1" value="0x09"/>
+                <value caption="Event Channel 2" name="EVCH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="EVCH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="EVCH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="EVCH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="EVCH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="EVCH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Byte Mode" name="TC45_BYTEM">
+                <value caption="16-bit mode" name="NORMAL" value="0x00"/>
+                <value caption="Timer/Counter Operating in Byte Mode Only" name="BYTEMODE" value="0x01"/>
+            </value-group>
+            <value-group caption="Circular Enable Mode" name="TC45_CIRCEN">
+                <value caption="Circular Buffer Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Circular Buffer Enabled on PER/PERBUF" name="PER" value="0x01"/>
+                <value caption="Circular Buffer Enabled on CCA/CCABUF" name="CCA" value="0x02"/>
+                <value caption="Circular Buffer Enabled on All Buffered Registers" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="Waveform Generation Mode" name="TC45_WGMODE">
+                <value caption="Normal Mode" name="NORMAL" value="0x00"/>
+                <value caption="Frequency Generation Mode" name="FRQ" value="0x01"/>
+                <value caption="Single Slope" name="SINGLESLOPE" value="0x03"/>
+                <value caption="Dual Slope, Update on TOP" name="DSTOP" value="0x05"/>
+                <value caption="Dual Slope, Both" name="DSBOTH" value="0x06"/>
+                <value caption="Dual Slope, Update on BOTTOM" name="DSBOTTOM" value="0x07"/>
+            </value-group>
+            <value-group caption="Event Action" name="TC45_EVACT">
+                <value caption="No Event Action" name="OFF" value="0x00"/>
+                <value caption="Fault Mode 1 capture" name="FMODE1" value="0x01"/>
+                <value caption="Fault Mode 2 capture" name="FMODE2" value="0x02"/>
+                <value caption="Up/down count" name="UPDOWN" value="0x03"/>
+                <value caption="Quadrature decode" name="QDEC" value="0x04"/>
+                <value caption="Restart" name="RESTART" value="0x05"/>
+                <value caption="Pulse-width Capture" name="PWF" value="0x06"/>
+            </value-group>
+            <value-group caption="Event Selection" name="TC45_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="CH0" value="0x08"/>
+                <value caption="Event Channel 1" name="CH1" value="0x09"/>
+                <value caption="Event Channel 2" name="CH2" value="0x0A"/>
+                <value caption="Event Channel 3" name="CH3" value="0x0B"/>
+                <value caption="Event Channel 4" name="CH4" value="0x0C"/>
+                <value caption="Event Channel 5" name="CH5" value="0x0D"/>
+                <value caption="Event Channel 6" name="CH6" value="0x0E"/>
+                <value caption="Event Channel 7" name="CH7" value="0x0F"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel A Mode" name="TC45_CCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel B Mode" name="TC45_CCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel C Mode" name="TC45_CCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel D Mode" name="TC45_CCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel A Mode" name="TC45_LCCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel B Mode" name="TC45_LCCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel C Mode" name="TC45_LCCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel D Mode" name="TC45_LCCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel A Mode" name="TC45_HCCAMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel B Mode" name="TC45_HCCBMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel C Mode" name="TC45_HCCCMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture High Channel D Mode" name="TC45_HCCDMODE">
+                <value caption="Channel Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Output Compare enabled" name="COMP" value="0x01"/>
+                <value caption="Input Capture enabled" name="CAPT" value="0x02"/>
+                <value caption="Both Compare and Capture enabled" name="BOTHCC" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer Trigger Restart Interrupt Level" name="TC45_TRGINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Error Interrupt Level" name="TC45_ERRINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Overflow Interrupt Level" name="TC45_OVFINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel A Interrupt Level" name="TC45_CCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel B Interrupt Level" name="TC45_CCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel C Interrupt Level" name="TC45_CCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Channel D Interrupt Level" name="TC45_CCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel A Interrupt Level" name="TC45_LCCAINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel B Interrupt Level" name="TC45_LCCBINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel C Interrupt Level" name="TC45_LCCCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Compare or Capture Low Channel D Interrupt Level" name="TC45_LCCDINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Timer/Counter Command" name="TC45_CMD">
+                <value caption="No Command" name="NONE" value="0x00"/>
+                <value caption="Force Update" name="UPDATE" value="0x01"/>
+                <value caption="Force Restart" name="RESTART" value="0x02"/>
+                <value caption="Force Hard Reset" name="RESET" value="0x03"/>
+            </value-group>
+            <interrupt-group name="TC4">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Channel A Compare or Capture Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Channel B Compare or Capture Interrupt"/>
+                <interrupt index="4" name="CCC" caption="Channel C Compare or Capture Interrupt"/>
+                <interrupt index="5" name="CCD" caption="Channel D Compare or Capture Interrupt"/>
+            </interrupt-group>
+            <interrupt-group name="TC5">
+                <interrupt index="0" name="OVF" caption="Overflow Interrupt"/>
+                <interrupt index="1" name="ERR" caption="Error Interrupt"/>
+                <interrupt index="2" name="CCA" caption="Channel A Compare or Capture Interrupt"/>
+                <interrupt index="3" name="CCB" caption="Channel B Compare or Capture Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="FAULT" id="I3620" version="XMEGAE" caption="Fault Extension">
+            <register-group caption="Fault Extension" name="FAULT" size="8">
+                <register caption="Control A Register" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="Ramp Mode Selection" mask="0xC0" name="RAMP" values="FAULT_RAMP"/>
+                    <bitfield caption="Fault on Debug Break Detection" mask="0x20" name="FDDBD"/>
+                    <bitfield caption="Port Control Mode" mask="0x10" name="PORTCTRL"/>
+                    <bitfield caption="Fuse State " mask="0x08" name="FUSE"/>
+                    <bitfield caption="Fault E Digital Filter Selection" mask="0x04" name="FILTERE"/>
+                    <bitfield caption="Fault E Input selection" mask="0x03" name="SRCE" values="FAULT_SRCE"/>
+                </register>
+                <register caption="Control B Register" name="CTRLB" offset="0x01" size="1">
+                    <bitfield caption="Fault A Software Mode" mask="0x80" name="SOFTA"/>
+                    <bitfield caption="Fault A Halt Action" mask="0x60" name="HALTA" values="FAULT_HALTA"/>
+                    <bitfield caption="Fault A Restart Action" mask="0x10" name="RESTARTA"/>
+                    <bitfield caption="Fault A Keep Action" mask="0x08" name="KEEPA"/>
+                    <bitfield caption="Fault A Source Selection" mask="0x03" name="SRCA" values="FAULT_SRCA"/>
+                </register>
+                <register caption="Control C Register" name="CTRLC" offset="0x02" size="1">
+                    <bitfield caption="Fault A Capture" mask="0x20" name="CAPTA"/>
+                    <bitfield caption="Fault A Digital Filter Selection" mask="0x04" name="FILTERA"/>
+                    <bitfield caption="Fault A Blanking" mask="0x02" name="BLANKA"/>
+                    <bitfield caption="Fault A Qualification" mask="0x01" name="QUALA"/>
+                </register>
+                <register caption="Control D Register" name="CTRLD" offset="0x03" size="1">
+                    <bitfield caption="Fault B Software Mode" mask="0x80" name="SOFTB"/>
+                    <bitfield caption="Fault B Halt Action" mask="0x60" name="HALTB" values="FAULT_HALTB"/>
+                    <bitfield caption="Fault B Restart Action" mask="0x10" name="RESTARTB"/>
+                    <bitfield caption="Fault B Keep Action" mask="0x08" name="KEEPB"/>
+                    <bitfield caption="Fault B Source Selection" mask="0x03" name="SRCB" values="FAULT_SRCB"/>
+                </register>
+                <register caption="Control E Register" name="CTRLE" offset="0x04" size="1">
+                    <bitfield caption="Fault B Capture" mask="0x20" name="CAPTB"/>
+                    <bitfield caption="Fault B Digital Filter Selection" mask="0x04" name="FILTERB"/>
+                    <bitfield caption="Fault B Blanking" mask="0x02" name="BLANKB"/>
+                    <bitfield caption="Fault B Qualification" mask="0x01" name="QUALB"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x05" size="1">
+                    <bitfield caption="Fault B State" mask="0x80" name="STATEB"/>
+                    <bitfield caption="Fault A State" mask="0x40" name="STATEA"/>
+                    <bitfield caption="Fault E State" mask="0x20" name="STATEE"/>
+                    <bitfield caption="Channel Index Flag" mask="0x08" name="IDX"/>
+                    <bitfield caption="Fault B Flag" mask="0x04" name="FAULTBIN"/>
+                    <bitfield caption="Fault A Flag" mask="0x02" name="FAULTAIN"/>
+                    <bitfield caption="Fault E Flag" mask="0x01" name="FAULTEIN"/>
+                </register>
+                <register caption="Control Register G Clear" name="CTRLGCLR" offset="0x06" size="1">
+                    <bitfield caption="State B Clear" mask="0x80" name="HALTBCLR"/>
+                    <bitfield caption="State A Clear" mask="0x40" name="HALTACLR"/>
+                    <bitfield caption="State E Clear" mask="0x20" name="STATEECLR"/>
+                    <bitfield caption="Fault B Flag" mask="0x04" name="FAULTB"/>
+                    <bitfield caption="Fault A Flag" mask="0x02" name="FAULTA"/>
+                    <bitfield caption="Fault E Flag" mask="0x01" name="FAULTE"/>
+                </register>
+                <register caption="Control Register G set" name="CTRLGSET" offset="0x07" size="1">
+                    <bitfield caption="Software Fault B" mask="0x80" name="FAULTBSW"/>
+                    <bitfield caption="Software Fault A" mask="0x40" name="FAULTASW"/>
+                    <bitfield caption="Software Fault E" mask="0x20" name="FAULTESW"/>
+                    <bitfield caption="Channel index Command" mask="0x18" name="IDXCMD" values="FAULT_IDXCMD"/>
+                </register>
+            </register-group>
+            <value-group caption="Ramp Mode Selection" name="FAULT_RAMP">
+                <value caption="Normal Mode" name="RAMP1" value="0x00"/>
+                <value caption="RAMP2 Mode" name="RAMP2" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault E Input Source Selection" name="FAULT_SRCE">
+                <value caption="Fault Protection Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Event Channel n+2" name="CHN2" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault A Halt Action Selection" name="FAULT_HALTA">
+                <value caption="Halt Action Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Hardware Halt Action" name="HW" value="0x01"/>
+                <value caption="Software Halt Action" name="SW" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault A Source Selection" name="FAULT_SRCA">
+                <value caption="Fault A Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Fault A linked to Fault B State from previous cycle" name="LINK" value="0x03"/>
+            </value-group>
+            <value-group caption="Fault B Halt Action Selection" name="FAULT_HALTB">
+                <value caption="Halt Action Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Hardware Halt Action" name="HW" value="0x01"/>
+                <value caption="Software Halt Action" name="SW" value="0x02"/>
+            </value-group>
+            <value-group caption="Fault B Source Selection" name="FAULT_SRCB">
+                <value caption="Fault B disabled" name="DISABLE" value="0x00"/>
+                <value caption="Event Channel n" name="CHN" value="0x01"/>
+                <value caption="Event Channel n+1" name="CHN1" value="0x02"/>
+                <value caption="Fault B linked to Fault A State from previous cycle" name="LINK" value="0x03"/>
+            </value-group>
+            <value-group caption="Channel index Command" name="FAULT_IDXCMD">
+                <value caption="Command Disabled" name="DISABLE" value="0x00"/>
+                <value caption="Force Cycle B in Next Cycle" name="SET" value="0x01"/>
+                <value caption="Force Cycle A in Next Cycle" name="CLEAR" value="0x02"/>
+                <value caption="Hold Current Cycle Index in Next Cycle " name="HOLD" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="WEX" id="I3007" version="XMEGAE" caption="Waveform Extension">
+            <register-group caption="Waveform Extension" name="WEX" size="16">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Update Source Selection" mask="0x80" name="UPSEL"/>
+                    <bitfield caption="Output Matrix" mask="0x70" name="OTMX" values="WEX_OTMX"/>
+                    <bitfield caption="Dead-Time Insertion Generator 3 Enable" mask="0x08" name="DTI3EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 2 Enable" mask="0x04" name="DTI2EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 1 Enable" mask="0x02" name="DTI1EN"/>
+                    <bitfield caption="Dead-Time Insertion Generator 0 Enable" mask="0x01" name="DTI0EN"/>
+                </register>
+                <register caption="Dead-time Concurrent Write to Both Sides Register" name="DTBOTH" offset="0x01"
+                          size="1"/>
+                <register caption="Dead-time Low Side Register" name="DTLS" offset="0x02" size="1"/>
+                <register caption="Dead-time High Side Register" name="DTHS" offset="0x03" size="1"/>
+                <register caption="Status Clear Register" name="STATUSCLR" offset="0x04" size="1">
+                    <bitfield caption="Swap Buffer Valid " mask="0x04" name="SWAPBUF"/>
+                    <bitfield caption="Pattern Generator Value Buffer Valid " mask="0x02" name="PGVBUFV"/>
+                    <bitfield caption="Pattern Generator Overwrite Buffer Valid" mask="0x01" name="PGOBUFV"/>
+                </register>
+                <register caption="Status Set Register" name="STATUSSET" offset="0x05" size="1">
+                    <bitfield caption="Swap Buffer Valid " mask="0x04" name="SWAPBUF"/>
+                    <bitfield caption="Pattern Generator Value Buffer Valid " mask="0x02" name="PGVBUFV"/>
+                    <bitfield caption="Pattern Generator Overwrite Buffer Valid " mask="0x01" name="PGOBUFV"/>
+                </register>
+                <register caption="Swap Register" name="SWAP" offset="0x06" size="1">
+                    <bitfield caption="Swap DTI output pair 3" mask="0x08" name="SWAP3"/>
+                    <bitfield caption="Swap DTI output pair 2" mask="0x04" name="SWAP2"/>
+                    <bitfield caption="Swap DTI output pair 1" mask="0x02" name="SWAP1"/>
+                    <bitfield caption="Swap DTI output pair 0" mask="0x01" name="SWAP0"/>
+                </register>
+                <register caption="Pattern Generation Override Register" name="PGO" offset="0x07" size="1"/>
+                <register caption="Pattern Generation Value Register" name="PGV" offset="0x08" size="1"/>
+                <register caption="Dead Time Low Side Buffer" name="SWAPBUF" offset="0x0A" size="1">
+                    <bitfield caption="Swap DTI output pair 3 " mask="0x08" name="SWAP3BUF"/>
+                    <bitfield caption="Swap DTI output pair 2" mask="0x04" name="SWAP2BUF"/>
+                    <bitfield caption="Swap DTI output pair 1 " mask="0x02" name="SWAP1BUF"/>
+                    <bitfield caption="Swap DTI output pair 0" mask="0x01" name="SWAP0BUF"/>
+                </register>
+                <register caption="Pattern Generation Overwrite Buffer Register" name="PGOBUF" offset="0x0B" size="1"/>
+                <register caption="Pattern Generation Value Buffer Register" name="PGVBUF" offset="0x0C" size="1"/>
+                <register caption="Output Override Disable Register " name="OUTOVDIS" offset="0x0F" size="1"/>
+            </register-group>
+            <value-group caption="Output Matrix Mode" name="WEX_OTMX">
+                <value caption="Default Output Matrix Mode" name="DEFAULT" value="0x00"/>
+                <value caption="First Output matrix Mode" name="FIRST" value="0x01"/>
+                <value caption="Second Output matrix Mode" name="SECOND" value="0x02"/>
+                <value caption="Third Output matrix Mode" name="THIRD" value="0x03"/>
+                <value caption="Fourth Output matrix Mode" name="FOURTH" value="0x04"/>
+            </value-group>
+        </module>
+        <module name="HIRES" id="I3620" version="XMEGAE" caption="High-Resolution Extension">
+            <register-group caption="High-Resolution Extension" name="HIRES" size="1">
+                <register caption="Control Register A" name="CTRLA" offset="0x00" size="1">
+                    <bitfield caption="High Resolution Plus" mask="0x0C" name="HRPLUS" values="HIRES_HRPLUS"/>
+                    <bitfield caption="High Resolution Mode" mask="0x03" name="HREN" values="HIRES_HREN"/>
+                </register>
+            </register-group>
+            <value-group caption="High Resolution Plus Mode" name="HIRES_HRPLUS">
+                <value caption="No Hi-Res Plus" name="NONE" value="0x00"/>
+                <value caption="Hi-Res Plus enabled on Timer 4" name="HRP4" value="0x01"/>
+                <value caption="Hi-Res Plus enabled on Timer 5" name="HRP5" value="0x02"/>
+                <value caption="Hi-Res Plus enabled on Timer 4 and 5" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="High Resolution Mode" name="HIRES_HREN">
+                <value caption="No Hi-Res" name="NONE" value="0x00"/>
+                <value caption="Hi-Res enabled on Timer 4" name="HRP4" value="0x01"/>
+                <value caption="Hi-Res enabled on Timer 5" name="HRP5" value="0x02"/>
+                <value caption="Hi-Res enabled on Timer 4 and 5" name="BOTH" value="0x03"/>
+            </value-group>
+        </module>
+        <module name="USART" id="I4000" version="XMEGAE" caption="Universal Asynchronous Receiver-Transmitter">
+            <register-group caption="Universal Synchronous/Asynchronous Receiver/Transmitter" name="USART" size="8">
+                <register caption="Data Register" name="DATA" offset="0x00" size="1"/>
+                <register caption="Status Register" name="STATUS" offset="0x01" size="1">
+                    <bitfield caption="Receive Interrupt Flag" mask="0x80" name="RXCIF"/>
+                    <bitfield caption="Transmit Interrupt Flag" mask="0x40" name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Flag" mask="0x20" name="DREIF"/>
+                    <bitfield caption="Frame Error" mask="0x10" name="FERR"/>
+                    <bitfield caption="Buffer Overflow" mask="0x08" name="BUFOVF"/>
+                    <bitfield caption="Parity Error" mask="0x04" name="PERR"/>
+                    <bitfield caption="Receive Start Bit Interrupt Flag" mask="0x02" name="RXSIF"/>
+                    <bitfield caption="Receive Bit 8" mask="0x01" name="RXB8"/>
+                    <bitfield caption="Data Reception Flag" mask="0x01" name="DRIF"/>
+                </register>
+                <register caption="Control Register A" name="CTRLA" offset="0x02" size="1">
+                    <bitfield caption="Receive Start Interrupt Enable" mask="0x80" name="RXSIE"/>
+                    <bitfield caption="Data Reception Interrupt Enable" mask="0x40" name="DRIE"/>
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="RXCINTLVL" values="USART_RXCINTLVL"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="TXCINTLVL" values="USART_TXCINTLVL"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="DREINTLVL"
+                              values="USART_DREINTLVL"/>
+                </register>
+                <register caption="Control Register B" name="CTRLB" offset="0x03" size="1">
+                    <bitfield caption="One Wire Mode" mask="0x80" name="ONEWIRE"/>
+                    <bitfield caption="Start Frame Detection Enable" mask="0x40" name="SFDEN"/>
+                    <bitfield caption="Receiver Enable" mask="0x10" name="RXEN"/>
+                    <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN"/>
+                    <bitfield caption="Double transmission speed" mask="0x04" name="CLK2X"/>
+                    <bitfield caption="Multi-processor Communication Mode" mask="0x02" name="MPCM"/>
+                    <bitfield caption="Transmit bit 8" mask="0x01" name="TXB8"/>
+                </register>
+                <register caption="Control Register C" name="CTRLC" offset="0x04" size="1">
+                    <bitfield caption="Communication Mode" mask="0xC0" name="CMODE" values="USART_CMODE"/>
+                    <bitfield caption="Parity Mode" mask="0x30" name="PMODE" values="USART_PMODE"/>
+                    <bitfield caption="Stop Bit Mode" mask="0x08" name="SBMODE"/>
+                    <bitfield caption="Character Size" mask="0x07" name="CHSIZE" values="USART_CHSIZE"/>
+                </register>
+                <register caption="Control Register D" name="CTRLD" offset="0x05" size="1">
+                    <bitfield caption="Receive Interrupt Level" mask="0x30" name="DECTYPE" values="USART_DECTYPE"/>
+                    <bitfield caption="Transmit Interrupt Level" mask="0x0C" name="LUTACT" values="USART_LUTACT"/>
+                    <bitfield caption="Data Register Empty Interrupt Level" mask="0x03" name="PECACT"
+                              values="USART_PECACT"/>
+                </register>
+                <register caption="Baud Rate Control Register A" name="BAUDCTRLA" offset="0x06" size="1">
+                    <bitfield caption="Baud Rate Selection Bits [7:0]" mask="0xFF" name="BSEL"/>
+                </register>
+                <register caption="Baud Rate Control Register B" name="BAUDCTRLB" offset="0x07" size="1">
+                    <bitfield caption="Baud Rate Scale" mask="0xF0" name="BSCALE"/>
+                    <bitfield caption="Baud Rate Selection bits[11:8]" mask="0x0F" name="BSEL"/>
+                </register>
+            </register-group>
+            <value-group caption="Receive Start Interrupt level" name="USART_RXSINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Receive Complete Interrupt level" name="USART_RXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Transmit Complete Interrupt level" name="USART_TXCINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Data Register Empty Interrupt level" name="USART_DREINTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Character Size" name="USART_CHSIZE">
+                <value caption="Character size: 5 bit" name="5BIT" value="0x00"/>
+                <value caption="Character size: 6 bit" name="6BIT" value="0x01"/>
+                <value caption="Character size: 7 bit" name="7BIT" value="0x02"/>
+                <value caption="Character size: 8 bit" name="8BIT" value="0x03"/>
+                <value caption="Character size: 9 bit" name="9BIT" value="0x07"/>
+            </value-group>
+            <value-group caption="Communication Mode" name="USART_CMODE">
+                <value caption="Asynchronous Mode" name="ASYNCHRONOUS" value="0x00"/>
+                <value caption="Synchronous Mode" name="SYNCHRONOUS" value="0x01"/>
+                <value caption="IrDA Mode" name="IRDA" value="0x02"/>
+                <value caption="Master SPI Mode" name="MSPI" value="0x03"/>
+            </value-group>
+            <value-group caption="Parity Mode" name="USART_PMODE">
+                <value caption="No Parity" name="DISABLED" value="0x00"/>
+                <value caption="Even Parity" name="EVEN" value="0x02"/>
+                <value caption="Odd Parity" name="ODD" value="0x03"/>
+            </value-group>
+            <value-group caption="Encoding and Decoding Type" name="USART_DECTYPE">
+                <value caption="DATA Field Encoding" name="DATA" value="0x00"/>
+                <value caption="Start and Data Fields Encoding" name="SDATA" value="0x02"/>
+                <value caption="Start and Data Fields Encoding, with invertion in START field" name="NOTSDATA"
+                       value="0x03"/>
+            </value-group>
+            <value-group caption="XCL LUT Action" name="USART_LUTACT">
+                <value caption="Standard Frame Configuration" name="OFF" value="0x00"/>
+                <value caption="Receiver Decoding Enabled" name="RX" value="0x01"/>
+                <value caption="Transmitter Encoding Enabled" name="TX" value="0x02"/>
+                <value caption="Both Encoding and Decoding Enabled" name="BOTH" value="0x03"/>
+            </value-group>
+            <value-group caption="XCL Peripheral Counter Action" name="USART_PECACT">
+                <value caption="Standard Mode" name="OFF" value="0x00"/>
+                <value caption="Variable Data Lenght in Reception" name="PEC0" value="0x01"/>
+                <value caption="Variable Data Lenght in Transmission" name="PEC1" value="0x02"/>
+                <value caption="Variable Data Lenght in both Reception and Transmission" name="PERC01" value="0x03"/>
+            </value-group>
+            <interrupt-group name="USART">
+                <interrupt index="0" name="RXC" caption="Reception Complete Interrupt"/>
+                <interrupt index="1" name="DRE" caption="Data Register Empty Interrupt"/>
+                <interrupt index="2" name="TXC" caption="Transmission Complete Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="SPI" id="I6090" version="XMEGAE" caption="Serial Peripheral Interface">
+            <register-group caption="Serial Peripheral Interface with Buffer Modes" name="SPI" size="5">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Enable Double Speed" mask="0x80" name="CLK2X"/>
+                    <bitfield caption="Enable SPI Module" mask="0x40" name="ENABLE"/>
+                    <bitfield caption="Data Order Setting" mask="0x20" name="DORD"/>
+                    <bitfield caption="Master Operation Enable" mask="0x10" name="MASTER"/>
+                    <bitfield caption="SPI Mode" mask="0x0C" name="MODE" values="SPI_MODE"/>
+                    <bitfield caption="Prescaler" mask="0x03" name="PRESCALER" values="SPI_PRESCALER"/>
+                </register>
+                <register caption="Interrupt Control Register" name="INTCTRL" offset="0x01" size="1">
+                    <bitfield caption="Receive Complete Interrupt Enable (In Buffer Modes Only)." mask="0x80"
+                              name="RXCIE"/>
+                    <bitfield caption="Transmit Complete Interrupt Enable (In Buffer Modes Only)." mask="0x40"
+                              name="TXCIE"/>
+                    <bitfield caption="Data Register Empty Interrupt Enable (In Buffer Modes Only)." mask="0x20"
+                              name="DREIE"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Enable (In Buffer Modes Only)." mask="0x10"
+                              name="SSIE"/>
+                    <bitfield caption="Interrupt level" mask="0x03" name="INTLVL" values="SPI_INTLVL"/>
+                </register>
+                <register caption="Status Register" name="STATUS" offset="0x02" size="1">
+                    <bitfield caption="Interrupt Flag (In Standard Mode Only)." mask="0x80" name="IF"/>
+                    <bitfield caption="Receive Complete Interrupt Flag (In Buffer Modes Only)." mask="0x80"
+                              name="RXCIF"/>
+                    <bitfield caption="Write Collision Flag (In Standard Mode Only)." mask="0x40" name="WRCOL"/>
+                    <bitfield caption="Transmit Complete Interrupt Flag (In Buffer Modes Only)." mask="0x40"
+                              name="TXCIF"/>
+                    <bitfield caption="Data Register Empty Interrupt Flag (In Buffer Modes Only)." mask="0x20"
+                              name="DREIF"/>
+                    <bitfield caption="Slave Select Trigger Interrupt Flag (In Buffer Modes Only)." mask="0x10"
+                              name="SSIF"/>
+                    <bitfield caption="Buffer Overflow (In Buffer Modes Only)." mask="0x01" name="BUFOVF"/>
+                </register>
+                <register caption="Data Register" name="DATA" offset="0x03" size="1"/>
+                <register caption="Control Register B" name="CTRLB" offset="0x04" size="1">
+                    <bitfield caption="Buffer Modes" mask="0xC0" name="BUFMODE" values="SPI_BUFMODE"/>
+                    <bitfield caption="Slave Select Disable" mask="0x04" name="SSD"/>
+                </register>
+            </register-group>
+            <value-group caption="SPI Mode" name="SPI_MODE">
+                <value caption="SPI Mode 0, base clock at &#34;0&#34;, sampling on leading edge (rising) &amp; set-up on trailling edge (falling)."
+                       name="0" value="0x00"/>
+                <value caption="SPI Mode 1, base clock at &#34;0&#34;, set-up on leading edge (rising) &amp; sampling on trailling edge (falling)."
+                       name="1" value="0x01"/>
+                <value caption="SPI Mode 2, base clock at &#34;1&#34;, sampling on leading edge (falling) &amp; set-up on trailling edge (rising)."
+                       name="2" value="0x02"/>
+                <value caption="SPI Mode 3, base clock at &#34;1&#34;, set-up on leading edge (falling) &amp; sampling on trailling edge (rising)."
+                       name="3" value="0x03"/>
+            </value-group>
+            <value-group caption="Prescaler setting" name="SPI_PRESCALER">
+                <value caption="If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4." name="DIV4" value="0x00"/>
+                <value caption="If CLK2X=1 CLKper/8, else (CLK2X=0) CLKper/16." name="DIV16" value="0x01"/>
+                <value caption="If CLK2X=1 CLKper/32, else (CLK2X=0) CLKper/64." name="DIV64" value="0x02"/>
+                <value caption="If CLK2X=1 CLKper/64, else (CLK2X=0) CLKper/128." name="DIV128" value="0x03"/>
+            </value-group>
+            <value-group caption="Interrupt level" name="SPI_INTLVL">
+                <value caption="Interrupt Disabled" name="OFF" value="0x00"/>
+                <value caption="Low Level" name="LO" value="0x01"/>
+                <value caption="Medium Level" name="MED" value="0x02"/>
+                <value caption="High Level" name="HI" value="0x03"/>
+            </value-group>
+            <value-group caption="Buffer Modes" name="SPI_BUFMODE">
+                <value caption="SPI Unbuffered Mode" name="OFF" value="0x00"/>
+                <value caption="Buffer Mode 1 (with dummy byte)" name="BUFMODE1" value="0x02"/>
+                <value caption="Buffer Mode 2 (no dummy byte)" name="BUFMODE2" value="0x03"/>
+            </value-group>
+            <interrupt-group name="SPI">
+                <interrupt index="0" name="INT" caption="SPI Interrupt"/>
+            </interrupt-group>
+        </module>
+        <module name="IRCOM" id="I6090" version="XMEGAAU" caption="IR Communication Module">
+            <register-group caption="IR Communication Module" name="IRCOM" size="3">
+                <register caption="Control Register" name="CTRL" offset="0x00" size="1">
+                    <bitfield caption="Event Channel Select" mask="0x0F" name="EVSEL" values="IRDA_EVSEL"/>
+                </register>
+                <register caption="IrDA Transmitter Pulse Length Control Register" name="TXPLCTRL" offset="0x01"
+                          size="1"/>
+                <register caption="IrDA Receiver Pulse Length Control Register" name="RXPLCTRL" offset="0x02" size="1"/>
+            </register-group>
+            <value-group caption="Event channel selection" name="IRDA_EVSEL">
+                <value caption="No Event Source" name="OFF" value="0x00"/>
+                <value caption="Event Channel 0" name="0" value="0x08"/>
+                <value caption="Event Channel 1" name="1" value="0x09"/>
+                <value caption="Event Channel 2" name="2" value="0x0A"/>
+                <value caption="Event Channel 3" name="3" value="0x0B"/>
+                <value caption="Event Channel 4" name="4" value="0x0C"/>
+                <value caption="Event Channel 5" name="5" value="0x0D"/>
+                <value caption="Event Channel 6" name="6" value="0x0E"/>
+                <value caption="Event Channel 7" name="7" value="0x0F"/>
+            </value-group>
+        </module>
+        <module name="FUSE" id="I3620" version="XMEGAE" caption="Fuses and Lockbits">
+            <register-group caption="Lock Bits" name="NVM_LOCKBITS" size="1">
+                <register caption="Lock Bits" name="LOCKBITS" offset="0x00" size="1" initval="0xFF">
+                    <bitfield caption="Boot Lock Bits - Boot Section" mask="0xC0" name="BLBB" values="FUSE_BLBB"/>
+                    <bitfield caption="Boot Lock Bits - Application Section" mask="0x30" name="BLBA"
+                              values="FUSE_BLBA"/>
+                    <bitfield caption="Boot Lock Bits - Application Table" mask="0x0C" name="BLBAT"
+                              values="FUSE_BLBAT"/>
+                    <bitfield caption="Lock Bits" mask="0x03" name="LB" values="FUSE_LB"/>
+                </register>
+            </register-group>
+            <register-group caption="Fuses" name="NVM_FUSES" size="7">
+                <register caption="Watchdog Configuration" name="FUSEBYTE1" offset="0x01" size="1" initval="0x00">
+                    <bitfield caption="Watchdog Window Timeout Period" mask="0xF0" name="WDWPER" values="WDWPER"/>
+                    <bitfield caption="Watchdog Timeout Period" mask="0x0F" name="WDPER" values="WDPER"/>
+                </register>
+                <register caption="Reset Configuration" name="FUSEBYTE2" offset="0x02" size="1" initval="0xFF">
+                    <bitfield caption="Boot Loader Section Reset Vector" mask="0x40" name="BOOTRST" values="BOOTRST"/>
+                    <bitfield caption="BOD Operation in Power-Down Mode" mask="0x03" name="BODPD" values="BODPD"/>
+                </register>
+                <register caption="Start-up Configuration" name="FUSEBYTE4" offset="0x04" size="1" initval="0xFF">
+                    <bitfield caption="External Reset Disable" mask="0x10" name="RSTDISBL"/>
+                    <bitfield caption="Start-up Time" mask="0x0C" name="STARTUPTIME" values="SUT"/>
+                    <bitfield caption="Watchdog Timer Lock" mask="0x02" name="WDLOCK"/>
+                </register>
+                <register caption="EESAVE and BOD Level" name="FUSEBYTE5" offset="0x05" size="1" initval="0xFF">
+                    <bitfield caption="BOD Operation in Active Mode" mask="0x30" name="BODACT" values="BODACT"/>
+                    <bitfield caption="Preserve EEPROM Through Chip Erase" mask="0x08" name="EESAVE"/>
+                    <bitfield caption="Brownout Detection Voltage Level" mask="0x07" name="BODLEVEL" values="BODLVL"/>
+                </register>
+                <register caption="Fault State" name="FUSEBYTE6" offset="0x06" size="1" initval="0xFF">
+                    <bitfield caption="Fault Dectection Action on TC5" mask="0x80" name="FDACT5"/>
+                    <bitfield caption="Fault Dectection Action on TC4" mask="0x40" name="FDACT4"/>
+                    <bitfield caption="Port Pin Value" mask="0x3F" name="VALUE"/>
+                </register>
+            </register-group>
+            <value-group caption="Boot lock bits - boot section" name="FUSE_BLBB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application section" name="FUSE_BLBA">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot lock bits - application table section" name="FUSE_BLBAT">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Read not allowed" name="RLOCK" value="0x01"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Lock bits" name="FUSE_LB">
+                <value caption="Read and write not allowed" name="RWLOCK" value="0x00"/>
+                <value caption="Write not allowed" name="WLOCK" value="0x02"/>
+                <value caption="No locks" name="NOLOCK" value="0x03"/>
+            </value-group>
+            <value-group caption="Boot Loader Section Reset Vector" name="BOOTRST">
+                <value caption="Boot Loader Reset" name="BOOTLDR" value="0x00"/>
+                <value caption="Application Reset" name="APPLICATION" value="0x01"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODPD">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="BOD operation" name="BODACT">
+                <value caption="BOD enabled in sampled mode" name="SAMPLED" value="0x01"/>
+                <value caption="BOD enabled continuously" name="CONTINUOUS" value="0x02"/>
+                <value caption="BOD Disabled" name="DISABLED" value="0x03"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDWPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Watchdog (Window) Timeout Period" name="WDPER">
+                <value caption="8 cycles (8ms @ 3.3V)" name="8CLK" value="0x00"/>
+                <value caption="16 cycles (16ms @ 3.3V)" name="16CLK" value="0x01"/>
+                <value caption="32 cycles (32ms @ 3.3V)" name="32CLK" value="0x02"/>
+                <value caption="64 cycles (64ms @ 3.3V)" name="64CLK" value="0x03"/>
+                <value caption="128 cycles (0.125s @ 3.3V)" name="128CLK" value="0x04"/>
+                <value caption="256 cycles (0.25s @ 3.3V)" name="256CLK" value="0x05"/>
+                <value caption="512 cycles (0.5s @ 3.3V)" name="512CLK" value="0x06"/>
+                <value caption="1K cycles (1s @ 3.3V)" name="1KCLK" value="0x07"/>
+                <value caption="2K cycles (2s @ 3.3V)" name="2KCLK" value="0x08"/>
+                <value caption="4K cycles (4s @ 3.3V)" name="4KCLK" value="0x09"/>
+                <value caption="8K cycles (8s @ 3.3V)" name="8KCLK" value="0x0A"/>
+            </value-group>
+            <value-group caption="Start-up Time" name="SUT">
+                <value caption="0 ms" name="0MS" value="0x03"/>
+                <value caption="4 ms" name="4MS" value="0x01"/>
+                <value caption="64 ms" name="64MS" value="0x00"/>
+            </value-group>
+            <value-group caption="Brownout Detection Voltage Level" name="BODLVL">
+                <value caption="1.6 V" name="1V6" value="0x07"/>
+                <value caption="1.8 V" name="1V8" value="0x06"/>
+                <value caption="2.0 V" name="2V0" value="0x05"/>
+                <value caption="2.2 V" name="2V2" value="0x04"/>
+                <value caption="2.4 V" name="2V4" value="0x03"/>
+                <value caption="2.6 V" name="2V6" value="0x02"/>
+                <value caption="2.8 V" name="2V8" value="0x01"/>
+                <value caption="3.0 V" name="3V0" value="0x00"/>
+            </value-group>
+        </module>
+        <module name="SIGROW" id="I3620" version="XMEGAE" caption="Signature Row">
+            <register-group caption="Production Signatures" name="NVM_PROD_SIGNATURES" size="64">
+                <register caption="RCOSC 8MHz Calibration Value" name="RCOSC8M" offset="0x00" size="1"/>
+                <register caption="RCOSC 32.768 kHz Calibration Value" name="RCOSC32K" offset="0x02" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value B" name="RCOSC32M" offset="0x03" size="1"/>
+                <register caption="RCOSC 32 MHz Calibration Value A" name="RCOSC32MA" offset="0x04" size="1"/>
+                <register caption="Lot Number Byte 0, ASCII" name="LOTNUM0" offset="0x08" size="1"/>
+                <register caption="Lot Number Byte 1, ASCII" name="LOTNUM1" offset="0x09" size="1"/>
+                <register caption="Lot Number Byte 2, ASCII" name="LOTNUM2" offset="0x0A" size="1"/>
+                <register caption="Lot Number Byte 3, ASCII" name="LOTNUM3" offset="0x0B" size="1"/>
+                <register caption="Lot Number Byte 4, ASCII" name="LOTNUM4" offset="0x0C" size="1"/>
+                <register caption="Lot Number Byte 5, ASCII" name="LOTNUM5" offset="0x0D" size="1"/>
+                <register caption="Wafer Number" name="WAFNUM" offset="0x10" size="1"/>
+                <register caption="Wafer Coordinate X Byte 0" name="COORDX0" offset="0x12" size="1"/>
+                <register caption="Wafer Coordinate X Byte 1" name="COORDX1" offset="0x13" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 0" name="COORDY0" offset="0x14" size="1"/>
+                <register caption="Wafer Coordinate Y Byte 1" name="COORDY1" offset="0x15" size="1"/>
+                <register caption="Temperature corresponds to TEMPSENSE3/2" name="ROOMTEMP" offset="0x1E" size="1"/>
+                <register caption="Temperature corresponds to TEMPSENSE1/0" name="HOTTEMP" offset="0x1F" size="1"/>
+                <register caption="ADCA Calibration Byte 0" name="ADCACAL0" offset="0x20" size="1"/>
+                <register caption="ADCA Calibration Byte 1" name="ADCACAL1" offset="0x21" size="1"/>
+                <register caption="ACA Current Calibration Byte" name="ACACURRCAL" offset="0x28" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 2" name="TEMPSENSE2" offset="0x2C" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 3" name="TEMPSENSE3" offset="0x2D" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 0" name="TEMPSENSE0" offset="0x2E" size="1"/>
+                <register caption="Temperature Sensor Calibration Byte 1" name="TEMPSENSE1" offset="0x2F" size="1"/>
+                <register caption="DACA0 Calibration Byte 0" name="DACA0OFFCAL" offset="0x30" size="1"/>
+                <register caption="DACA0 Calibration Byte 1" name="DACA0GAINCAL" offset="0x31" size="1"/>
+                <register caption="DACA1 Calibration Byte 0" name="DACA1OFFCAL" offset="0x34" size="1"/>
+                <register caption="DACA1 Calibration Byte 1" name="DACA1GAINCAL" offset="0x35" size="1"/>
+            </register-group>
+        </module>
+    </modules>
+    <pinouts>
+        <pinout name="QFP_QFN_32">
+            <pin pad="GND" position="1"/>
+            <pin pad="PA4" position="2"/>
+            <pin pad="PA3" position="3"/>
+            <pin pad="PA2" position="4"/>
+            <pin pad="PA1" position="5"/>
+            <pin pad="PA0" position="6"/>
+            <pin pad="PDI" position="7"/>
+            <pin pad="RESET" position="8"/>
+            <pin pad="PC7" position="9"/>
+            <pin pad="PC6" position="10"/>
+            <pin pad="PC5" position="11"/>
+            <pin pad="PC4" position="12"/>
+            <pin pad="PC3" position="13"/>
+            <pin pad="PC2" position="14"/>
+            <pin pad="PC1" position="15"/>
+            <pin pad="PC0" position="16"/>
+            <pin pad="VCC" position="17"/>
+            <pin pad="GND" position="18"/>
+            <pin pad="PR1" position="19"/>
+            <pin pad="PR0" position="20"/>
+            <pin pad="PD7" position="21"/>
+            <pin pad="PD6" position="22"/>
+            <pin pad="PD5" position="23"/>
+            <pin pad="PD4" position="24"/>
+            <pin pad="PD3" position="25"/>
+            <pin pad="PD2" position="26"/>
+            <pin pad="PD1" position="27"/>
+            <pin pad="PD0" position="28"/>
+            <pin pad="PA7" position="29"/>
+            <pin pad="PA6" position="30"/>
+            <pin pad="PA5" position="31"/>
+            <pin pad="AVCC" position="32"/>
+        </pinout>
+    </pinouts>
+</part-description-file>
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/Target.hpp b/src/Targets/Microchip/AVR/Target.hpp
new file mode 100644
index 00000000..f5cc745f
--- /dev/null
+++ b/src/Targets/Microchip/AVR/Target.hpp
@@ -0,0 +1,40 @@
+#pragma once
+
+#include <src/Logger/Logger.hpp>
+#include <sstream>
+#include <iomanip>
+
+#include "../../Target.hpp"
+#include "TargetSignature.hpp"
+
+namespace Bloom::Targets::Microchip::Avr
+{
+    class Target: public ::Bloom::Targets::Target
+    {
+    protected:
+        std::optional<TargetSignature> id;
+
+        virtual void setId(unsigned char byteZero, unsigned char byteOne, unsigned char byteTwo) {
+            if (!this->id.has_value()) {
+                this->id = TargetSignature();
+            }
+
+            this->id->byteZero = byteZero;
+            this->id->byteOne = byteOne;
+            this->id->byteTwo = byteTwo;
+        }
+
+        virtual void setId(const TargetSignature& id) {
+            this->id = id;
+        }
+
+        virtual TargetSignature getId() = 0;
+
+    public:
+        explicit Target() = default;
+
+        std::string getHumanReadableId() override {
+            return this->getId().toHex();
+        }
+    };
+}
\ No newline at end of file
diff --git a/src/Targets/Microchip/AVR/TargetSignature.hpp b/src/Targets/Microchip/AVR/TargetSignature.hpp
new file mode 100644
index 00000000..355b8d09
--- /dev/null
+++ b/src/Targets/Microchip/AVR/TargetSignature.hpp
@@ -0,0 +1,60 @@
+#pragma once
+
+#include <cstdint>
+#include <sstream>
+#include <iomanip>
+
+namespace Bloom::Targets::Microchip::Avr
+{
+    /**
+     * All AVR targets carry a three-byte signature that is *usually* unique to the target.
+     *
+     * The AVR target signature consists of three bytes: 0xAABBCC
+     *  Byte AA (byteZero) identifies the manufacture of the target (usually 1E for Atmel/Microchip)
+     *  Byte BB (byteOne) sometimes indicates the flash/ram capacity of the target
+     *  Byte CC (byteTwo) identifies the target
+     *
+     * Some AVR targets have been found to carry identical signatures. For example, the AT90PWM1, AT90PWM2B
+     * and the AT90PWM3B all carry a signature of 0x1E9383. Although these devices may not differ in
+     * significant ways, Bloom does still take duplicate signatures into account, to ensure that the correct
+     * part description file is used.
+     *
+     * This class represents an AVR target signature.
+     */
+    struct TargetSignature
+    {
+        unsigned char byteZero = 0x00;
+        unsigned char byteOne = 0x00;
+        unsigned char byteTwo = 0x00;
+
+        TargetSignature() = default;
+        TargetSignature(unsigned char byteZero, unsigned char byteOne, unsigned char byteTwo) :
+        byteZero(byteZero), byteOne(byteOne), byteTwo(byteTwo) {};
+        TargetSignature(std::string hex) {
+            auto signature = static_cast<std::uint32_t>(std::stoul(hex, nullptr, 16));
+            this->byteZero = static_cast<unsigned char>(signature >> 16);
+            this->byteOne = static_cast<unsigned char>(signature >> 8);
+            this->byteTwo = static_cast<unsigned char>(signature);
+        }
+
+        std::string toHex() {
+            std::stringstream stream;
+            stream << std::hex << std::setfill('0');
+            stream << std::setw(2) << static_cast<unsigned int>(this->byteZero);
+            stream << std::setw(2) << static_cast<unsigned int>(this->byteOne);
+            stream << std::setw(2) << static_cast<unsigned int>(this->byteTwo);
+
+            return "0x" + stream.str();
+        }
+
+        bool operator == (const TargetSignature& signature) const {
+            return signature.byteZero == this->byteZero
+            && signature.byteOne == this->byteOne
+            && signature.byteTwo == this->byteTwo;
+        }
+
+        bool operator != (const TargetSignature& signature) const {
+            return !(*this == signature);
+        }
+    };
+}
diff --git a/src/Targets/Target.cpp b/src/Targets/Target.cpp
new file mode 100644
index 00000000..09b79650
--- /dev/null
+++ b/src/Targets/Target.cpp
@@ -0,0 +1,2 @@
+
+#include "Target.hpp"
diff --git a/src/Targets/Target.hpp b/src/Targets/Target.hpp
new file mode 100644
index 00000000..aca4ec80
--- /dev/null
+++ b/src/Targets/Target.hpp
@@ -0,0 +1,118 @@
+#pragma once
+
+#include <cstdint>
+#include <string>
+#include <vector>
+#include <memory>
+#include <src/EventManager/Events/Event.hpp>
+#include <set>
+#include <map>
+
+#include "src/DebugToolDrivers/DebugTool.hpp"
+#include "src/ApplicationConfig.hpp"
+#include "TargetDescriptor.hpp"
+#include "TargetState.hpp"
+#include "TargetRegister.hpp"
+#include "TargetMemory.hpp"
+#include "TargetBreakpoint.hpp"
+
+namespace Bloom::Targets
+{
+    using namespace Events;
+
+    class Target
+    {
+    protected:
+        bool activated = false;
+        TargetConfig config;
+
+    public:
+        explicit Target() {}
+
+        bool getActivated() {
+            return this->activated;
+        }
+
+        /**
+         * There are three stages of configuration for targets.
+         *
+         * @param targetConfig
+         */
+        virtual void preActivationConfigure(const TargetConfig& targetConfig) {
+            this->config = targetConfig;
+        };
+
+        virtual void postActivationConfigure() = 0;
+        virtual void postPromotionConfigure() = 0;
+
+        /**
+         * Should put the target in a state where debugging can be performed. This would typically involve
+         * activating the physical interface, among other things.
+         */
+        virtual void activate() = 0;
+
+        /**
+         * Should pull the target out of the debugging state and reset it.
+         */
+        virtual void deactivate() = 0;
+        virtual void setBreakpoint(std::uint32_t address) = 0;
+        virtual void removeBreakpoint(std::uint32_t address) = 0;
+        virtual void clearAllBreakpoints() = 0;
+
+        /**
+         * Should check if debugTool is compatible with the Target.
+         *
+         * @param debugTool
+         * @return
+         */
+        virtual bool isDebugToolSupported(DebugTool* debugTool) = 0;
+
+        virtual void setDebugTool(DebugTool* debugTool) = 0;
+
+        virtual bool supportsPromotion() {
+            return false;
+        }
+
+        virtual std::unique_ptr<Target> promote() = 0;
+
+        virtual std::string getName() const = 0;
+        virtual std::string getHumanReadableId() = 0;
+        virtual TargetDescriptor getDescriptor() = 0;
+
+        virtual void run() = 0;
+        virtual void stop() = 0;
+        virtual void step() = 0;
+        virtual void reset() = 0;
+
+        virtual TargetRegisters readGeneralPurposeRegisters(std::set<std::size_t> registerIds) = 0;
+        virtual void writeRegisters(const TargetRegisters& registers) = 0;
+        virtual TargetRegisters readRegisters(const TargetRegisterDescriptors& descriptors) = 0;
+
+        virtual TargetMemoryBuffer readMemory(TargetMemoryType memoryType, std::uint32_t startAddress, std::uint32_t bytes) = 0;
+        virtual void writeMemory(TargetMemoryType memoryType, std::uint32_t startAddress, const TargetMemoryBuffer& buffer) = 0;
+
+        virtual TargetState getState() = 0;
+
+        virtual std::uint32_t getProgramCounter() = 0;
+        virtual TargetRegister getProgramCounterRegister() = 0;
+        virtual TargetRegister getStatusRegister() = 0;
+        virtual TargetRegister getStackPointerRegister() = 0;
+        virtual void setProgramCounter(std::uint32_t programCounter) = 0;
+        virtual std::map<int, TargetPinState> getPinStates(int variantId) = 0;
+        virtual void setPinState(
+            int variantId,
+            const TargetPinDescriptor& pinDescriptor,
+            const TargetPinState& state
+        ) = 0;
+
+        virtual bool willMemoryWriteAffectIoPorts(
+            TargetMemoryType memoryType,
+            std::uint32_t startAddress,
+            std::uint32_t bytes
+        ) = 0;
+
+        virtual ~Target() = default;
+
+
+    };
+}
diff --git a/src/Targets/TargetBreakpoint.hpp b/src/Targets/TargetBreakpoint.hpp
new file mode 100644
index 00000000..dd74f343
--- /dev/null
+++ b/src/Targets/TargetBreakpoint.hpp
@@ -0,0 +1,25 @@
+#pragma once
+
+#include <cstdint>
+
+namespace Bloom::Targets
+{
+    enum class TargetBreakCause: int
+    {
+        BREAKPOINT,
+        UNKNOWN,
+    };
+
+    using TargetBreakpointAddress = std::uint32_t;
+
+    struct TargetBreakpoint
+    {
+        /**
+         * Byte address of the breakpoint.
+         */
+        TargetBreakpointAddress address;
+
+        bool disabled = false;
+    };
+}
+
diff --git a/src/Targets/TargetDescriptor.hpp b/src/Targets/TargetDescriptor.hpp
new file mode 100644
index 00000000..d1598238
--- /dev/null
+++ b/src/Targets/TargetDescriptor.hpp
@@ -0,0 +1,19 @@
+#pragma once
+
+#include <string>
+#include <cstdint>
+#include <vector>
+
+#include "TargetVariant.hpp"
+
+namespace Bloom::Targets
+{
+    struct TargetDescriptor
+    {
+        std::string name;
+        std::string id;
+        std::uint32_t ramSize;
+        std::vector<TargetVariant> variants;
+    };
+}
+
diff --git a/src/Targets/TargetMemory.hpp b/src/Targets/TargetMemory.hpp
new file mode 100644
index 00000000..acb00e11
--- /dev/null
+++ b/src/Targets/TargetMemory.hpp
@@ -0,0 +1,15 @@
+#pragma once
+
+#include <vector>
+
+namespace Bloom::Targets
+{
+    using TargetMemoryBuffer = std::vector<unsigned char>;
+
+    enum class TargetMemoryType: unsigned int
+    {
+        FLASH,
+        RAM,
+        EEPROM,
+    };
+}
diff --git a/src/Targets/TargetPinDescriptor.hpp b/src/Targets/TargetPinDescriptor.hpp
new file mode 100644
index 00000000..6bf9ecbd
--- /dev/null
+++ b/src/Targets/TargetPinDescriptor.hpp
@@ -0,0 +1,50 @@
+#pragma once
+
+#include <string>
+#include <cstdint>
+#include <vector>
+#include <optional>
+#include <map>
+
+namespace Bloom::Targets
+{
+    enum class TargetPinType: int {
+        UNKNOWN,
+        GPIO,
+        GND,
+        VCC,
+    };
+
+    struct TargetPinDescriptor
+    {
+        int number;
+        bool supportsGpio = false;
+        std::string name;
+        std::string padName;
+        std::vector<std::string> functions;
+
+        TargetPinType type = TargetPinType::UNKNOWN;
+    };
+
+    struct TargetPinState
+    {
+        enum class IoState: int {
+            HIGH,
+            LOW,
+        };
+
+        enum class IoDirection: int {
+            INPUT,
+            OUTPUT,
+        };
+
+        std::optional<IoState> ioState;
+        std::optional<IoDirection> ioDirection;
+    };
+
+    using TargetPinStateMappingType = std::map<int, Bloom::Targets::TargetPinState>;
+}
+
+Q_DECLARE_METATYPE(Bloom::Targets::TargetPinDescriptor)
+Q_DECLARE_METATYPE(Bloom::Targets::TargetPinState)
+Q_DECLARE_METATYPE(Bloom::Targets::TargetPinStateMappingType)
diff --git a/src/Targets/TargetRegister.hpp b/src/Targets/TargetRegister.hpp
new file mode 100644
index 00000000..ba72e30b
--- /dev/null
+++ b/src/Targets/TargetRegister.hpp
@@ -0,0 +1,70 @@
+#pragma once
+
+#include <vector>
+#include <map>
+
+namespace Bloom::Targets
+{
+    enum class TargetRegisterType: int
+    {
+        GENERAL_PURPOSE_REGISTER,
+        PROGRAM_COUNTER,
+        STACK_POINTER,
+        STATUS_REGISTER,
+    };
+
+    struct TargetRegisterDescriptor
+    {
+        using IdType = size_t;
+        std::optional<IdType> id;
+        TargetRegisterType type = TargetRegisterType::GENERAL_PURPOSE_REGISTER;
+
+        TargetRegisterDescriptor() {};
+        TargetRegisterDescriptor(TargetRegisterType type): type(type) {};
+        TargetRegisterDescriptor(IdType id, TargetRegisterType type): id(id), type(type) {};
+
+        bool operator==(const TargetRegisterDescriptor& other) const {
+            return this->id == other.id && this->type == other.type;
+        }
+    };
+
+    struct TargetRegister
+    {
+        using IdType = size_t;
+        using ValueType = std::vector<unsigned char>;
+        std::optional<IdType> id;
+        ValueType value;
+        TargetRegisterDescriptor descriptor;
+
+        TargetRegister(const ValueType& value): value(value) {};
+
+        TargetRegister(TargetRegisterDescriptor descriptor, const ValueType& value): value(value),
+        descriptor(descriptor) {};
+
+        TargetRegister(IdType id, const ValueType& value): id(id), value(value) {
+            this->descriptor.id = id;
+        };
+
+        IdType size() const {
+            return this->value.size();
+        }
+    };
+
+    using TargetRegisterMap = std::map<TargetRegister::IdType , TargetRegister>;
+    using TargetRegisters = std::vector<TargetRegister>;
+    using TargetRegisterDescriptors = std::vector<TargetRegisterDescriptor>;
+}
+
+namespace std {
+
+    using Bloom::Targets::TargetRegisterDescriptor;
+
+    template<>
+    class hash<TargetRegisterDescriptor> {
+    public:
+        size_t operator()(const TargetRegisterDescriptor& descriptor) const {
+            return descriptor.id.value_or(0) + static_cast<size_t>(descriptor.type);
+        }
+    };
+
+}
diff --git a/src/Targets/TargetState.hpp b/src/Targets/TargetState.hpp
new file mode 100644
index 00000000..d1294faa
--- /dev/null
+++ b/src/Targets/TargetState.hpp
@@ -0,0 +1,16 @@
+#pragma once
+
+#include <QMetaType>
+
+namespace Bloom::Targets
+{
+    enum class TargetState: int
+    {
+        UNKNOWN,
+        STOPPED,
+        RUNNING,
+    };
+}
+
+Q_DECLARE_METATYPE(Bloom::Targets::TargetState)
+
diff --git a/src/Targets/TargetVariant.hpp b/src/Targets/TargetVariant.hpp
new file mode 100644
index 00000000..9e4aa9e8
--- /dev/null
+++ b/src/Targets/TargetVariant.hpp
@@ -0,0 +1,46 @@
+#pragma once
+
+#include <string>
+#include <cstdint>
+#include <map>
+
+#include "TargetPinDescriptor.hpp"
+
+namespace Bloom::Targets
+{
+    enum class TargetPackage: int {
+        UNKNOWN,
+
+        /**
+         * Quad flat package (QFP)
+         */
+        QFP,
+
+        /**
+         * Dual inline package (DIP)
+         */
+        DIP,
+
+        /**
+         * Small outline integrated circuit (SOIC) package.
+         *
+         * Because of the similarities between SOIC and DIP, Insight treats SOIC packages as DIP packages. That is,
+         * it uses the same package widget.
+         */
+        SOIC,
+
+        /**
+         * Quad flat no-lead (QFN) package
+         */
+        QFN,
+    };
+
+    struct TargetVariant
+    {
+        int id;
+        std::string name;
+        std::string packageName;
+        TargetPackage package = TargetPackage::UNKNOWN;
+        std::map<int, TargetPinDescriptor> pinDescriptorsByNumber;
+    };
+}
diff --git a/src/Targets/Targets.hpp b/src/Targets/Targets.hpp
new file mode 100644
index 00000000..d51fa39e
--- /dev/null
+++ b/src/Targets/Targets.hpp
@@ -0,0 +1,5 @@
+#pragma once
+
+#include <src/Targets/Target.hpp>
+#include <src/Targets/Microchip/AVR/Target.hpp>
+#include <src/Targets/Microchip/AVR/AVR8/Avr8.hpp>
diff --git a/src/main.cpp b/src/main.cpp
new file mode 100644
index 00000000..0bbd58ab
--- /dev/null
+++ b/src/main.cpp
@@ -0,0 +1,17 @@
+#include <string>
+#include <vector>
+
+#include "Application.hpp"
+
+using namespace Bloom;
+
+int main(int argc, char* argv[])
+{
+    auto arguments = std::vector<std::string>();
+    if (argc > 1) {
+        arguments.assign(argv + 1, argv + argc);
+    }
+
+    auto application = Application();
+    return application.run(arguments);
+}
diff --git a/src/resources.qrc b/src/resources.qrc
new file mode 100644
index 00000000..e8f7c7f4
--- /dev/null
+++ b/src/resources.qrc
@@ -0,0 +1,16 @@
+<!DOCTYPE RCC>
+<RCC version="1.0">
+<qresource>
+    <file alias="/compiled/resources/help.txt">../resources/help.txt</file>
+    <file alias="/compiled/resources/bloom.template.json">../resources/bloom.template.json</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui">./Insight/UserInterfaces/InsightWindow/UiFiles/InsightWindow.ui</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui">./Insight/UserInterfaces/InsightWindow/UiFiles/AboutWindow.ui</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss">./Insight/UserInterfaces/InsightWindow/Stylesheets/InsightWindow.qss</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss">./Insight/UserInterfaces/InsightWindow/Stylesheets/AboutWindow.qss</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss">./Insight/UserInterfaces/InsightWindow/TargetWidgets/DIP/Stylesheets/DualInlinePackage.qss</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg">./Insight/UserInterfaces/InsightWindow/Images/BloomIcon.svg</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/Images/RAM.svg">./Insight/UserInterfaces/InsightWindow/Images/RAM.svg</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/Images/refresh.svg">./Insight/UserInterfaces/InsightWindow/Images/refresh.svg</file>
+    <file alias="/compiled/Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg">./Insight/UserInterfaces/InsightWindow/Images/refresh-disabled.svg</file>
+</qresource>
+</RCC>
\ No newline at end of file